TW260768B - - Google Patents
Info
- Publication number
- TW260768B TW260768B TW083112055A TW83112055A TW260768B TW 260768 B TW260768 B TW 260768B TW 083112055 A TW083112055 A TW 083112055A TW 83112055 A TW83112055 A TW 83112055A TW 260768 B TW260768 B TW 260768B
- Authority
- TW
- Taiwan
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
- G06F9/3828—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage with global bypass, e.g. between pipelines, between clusters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US20406394A | 1994-03-01 | 1994-03-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW260768B true TW260768B (zh) | 1995-10-21 |
Family
ID=22756467
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW083112055A TW260768B (zh) | 1994-03-01 | 1994-12-22 |
Country Status (5)
Country | Link |
---|---|
US (2) | US5564056A (zh) |
DE (1) | DE19506990A1 (zh) |
GB (1) | GB2287109A (zh) |
SG (1) | SG47010A1 (zh) |
TW (1) | TW260768B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7365994B2 (en) | 2005-06-28 | 2008-04-29 | Hon Hai Precision Industry Co., Ltd. | Bracket for expansion card slot |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5539911A (en) | 1991-07-08 | 1996-07-23 | Seiko Epson Corporation | High-performance, superscalar-based computer system with out-of-order instruction execution |
US5493687A (en) | 1991-07-08 | 1996-02-20 | Seiko Epson Corporation | RISC microprocessor architecture implementing multiple typed register sets |
EP0636256B1 (en) | 1992-03-31 | 1997-06-04 | Seiko Epson Corporation | Superscalar risc processor instruction scheduling |
EP0638183B1 (en) * | 1992-05-01 | 1997-03-05 | Seiko Epson Corporation | A system and method for retiring instructions in a superscalar microprocessor |
DE69330889T2 (de) | 1992-12-31 | 2002-03-28 | Seiko Epson Corp., Tokio/Tokyo | System und Verfahren zur Änderung der Namen von Registern |
US5628021A (en) * | 1992-12-31 | 1997-05-06 | Seiko Epson Corporation | System and method for assigning tags to control instruction processing in a superscalar processor |
US6079014A (en) * | 1993-12-02 | 2000-06-20 | Intel Corporation | Processor that redirects an instruction fetch pipeline immediately upon detection of a mispredicted branch while committing prior instructions to an architectural state |
TW448403B (en) * | 1995-03-03 | 2001-08-01 | Matsushita Electric Ind Co Ltd | Pipeline data processing device and method for executing multiple data processing data dependent relationship |
US5974240A (en) * | 1995-06-07 | 1999-10-26 | International Business Machines Corporation | Method and system for buffering condition code data in a data processing system having out-of-order and speculative instruction execution |
US5764959A (en) * | 1995-12-20 | 1998-06-09 | Intel Corporation | Adaptive 128-bit floating point load and store instructions for quad-precision compatibility |
US5790880A (en) * | 1996-01-04 | 1998-08-04 | Advanced Micro Devices | Microprocessor configured to dynamically connect processing elements according to data dependencies |
US5829031A (en) * | 1996-02-23 | 1998-10-27 | Advanced Micro Devices, Inc. | Microprocessor configured to detect a group of instructions and to perform a specific function upon detection |
US5802556A (en) * | 1996-07-16 | 1998-09-01 | International Business Machines Corporation | Method and apparatus for correcting misaligned instruction data |
US5903740A (en) * | 1996-07-24 | 1999-05-11 | Advanced Micro Devices, Inc. | Apparatus and method for retiring instructions in excess of the number of accessible write ports |
US5802386A (en) * | 1996-11-19 | 1998-09-01 | International Business Machines Corporation | Latency-based scheduling of instructions in a superscalar processor |
US5838941A (en) * | 1996-12-30 | 1998-11-17 | Intel Corporation | Out-of-order superscalar microprocessor with a renaming device that maps instructions from memory to registers |
US6035388A (en) | 1997-06-27 | 2000-03-07 | Sandcraft, Inc. | Method and apparatus for dual issue of program instructions to symmetric multifunctional execution units |
US6266766B1 (en) * | 1998-04-03 | 2001-07-24 | Intel Corporation | Method and apparatus for increasing throughput when accessing registers by using multi-bit scoreboarding with a bypass control unit |
US6289435B1 (en) * | 1999-05-17 | 2001-09-11 | Creative Technology Ltd. | Re-use of special purposed registers as general purpose registers |
US6493819B1 (en) * | 1999-11-16 | 2002-12-10 | Advanced Micro Devices, Inc. | Merging narrow register for resolution of data dependencies when updating a portion of a register in a microprocessor |
IT1320582B1 (it) * | 2000-08-03 | 2003-12-10 | Campagnolo Srl | Cerchio per una ruota di bicicletta con pneumatico senza camera d'aria. |
US8127117B2 (en) * | 2006-05-10 | 2012-02-28 | Qualcomm Incorporated | Method and system to combine corresponding half word units from multiple register units within a microprocessor |
US8417922B2 (en) * | 2006-08-02 | 2013-04-09 | Qualcomm Incorporated | Method and system to combine multiple register units within a microprocessor |
US8583897B2 (en) * | 2009-02-02 | 2013-11-12 | Arm Limited | Register file with circuitry for setting register entries to a predetermined value |
US9003170B2 (en) | 2009-12-22 | 2015-04-07 | Intel Corporation | Bit range isolation instructions, methods, and apparatus |
US8972701B2 (en) | 2011-12-06 | 2015-03-03 | Arm Limited | Setting zero bits in architectural register for storing destination operand of smaller size based on corresponding zero flag attached to renamed physical register |
US9292569B2 (en) * | 2012-10-02 | 2016-03-22 | Oracle International Corporation | Semi-join acceleration |
US10816944B2 (en) | 2015-01-06 | 2020-10-27 | Afero, Inc. | System and method for using data collected from internet-of-things (IoT) sensors to disable IoT-enabled home devices |
US9774507B2 (en) | 2015-01-06 | 2017-09-26 | Afero, Inc. | System and method for collecting and utilizing user behavior data within an IoT system |
US10025554B2 (en) * | 2016-09-19 | 2018-07-17 | Arm Limited | Data item order restoration |
US11256511B2 (en) * | 2019-05-20 | 2022-02-22 | International Business Machines Corporation | Instruction scheduling during execution in a processor |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3687124T2 (de) * | 1986-02-06 | 1993-03-18 | Mips Computer Systems Inc | Funktionseinheit fuer rechner. |
US5185872A (en) * | 1990-02-28 | 1993-02-09 | Intel Corporation | System for executing different cycle instructions by selectively bypassing scoreboard register and canceling the execution of conditionally issued instruction if needed resources are busy |
US5265213A (en) * | 1990-12-10 | 1993-11-23 | Intel Corporation | Pipeline system for executing predicted branch target instruction in a cycle concurrently with the execution of branch instruction |
GB2251320A (en) * | 1990-12-20 | 1992-07-01 | Motorola Ltd | Parallel processor |
EP0503514B1 (en) * | 1991-03-11 | 1998-11-18 | Silicon Graphics, Inc. | Backward-compatible computer architecture with extended word size and address space |
JP2693651B2 (ja) * | 1991-04-30 | 1997-12-24 | 株式会社東芝 | 並列プロセッサー |
US5539911A (en) * | 1991-07-08 | 1996-07-23 | Seiko Epson Corporation | High-performance, superscalar-based computer system with out-of-order instruction execution |
US5345569A (en) * | 1991-09-20 | 1994-09-06 | Advanced Micro Devices, Inc. | Apparatus and method for resolving dependencies among a plurality of instructions within a storage device |
US5371684A (en) * | 1992-03-31 | 1994-12-06 | Seiko Epson Corporation | Semiconductor floor plan for a register renaming circuit |
US5471633A (en) * | 1993-09-30 | 1995-11-28 | Intel Corporation | Idiom recognizer within a register alias table |
US5497493A (en) * | 1993-09-30 | 1996-03-05 | Intel Corporation | High byte right-shift apparatus with a register alias table |
US5442577A (en) * | 1994-03-08 | 1995-08-15 | Exponential Technology, Inc. | Sign-extension of immediate constants in an alu |
-
1994
- 1994-11-02 US US08/333,397 patent/US5564056A/en not_active Expired - Lifetime
- 1994-12-22 TW TW083112055A patent/TW260768B/zh active
-
1995
- 1995-01-06 GB GB9500255A patent/GB2287109A/en not_active Withdrawn
- 1995-01-06 SG SG1996001853A patent/SG47010A1/en unknown
- 1995-02-28 DE DE19506990A patent/DE19506990A1/de not_active Withdrawn
- 1995-11-29 US US08/565,646 patent/US5615385A/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7365994B2 (en) | 2005-06-28 | 2008-04-29 | Hon Hai Precision Industry Co., Ltd. | Bracket for expansion card slot |
Also Published As
Publication number | Publication date |
---|---|
US5564056A (en) | 1996-10-08 |
US5615385A (en) | 1997-03-25 |
GB9500255D0 (en) | 1995-03-01 |
SG47010A1 (en) | 1998-03-20 |
GB2287109A (en) | 1995-09-06 |
DE19506990A1 (de) | 1995-09-07 |