Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ind Tech Res InstfiledCriticalInd Tech Res Inst
Priority to TW81109752ApriorityCriticalpatent/TW208078B/en
Application grantedgrantedCritical
Publication of TW208078BpublicationCriticalpatent/TW208078B/en
This is a matrix multiplication system which consists of 1. The first stage device used for the multiplication of the first and second matrix includes one set of pipelined circuit of parallel processing. 2. The second stage device used for the multiplication of the result of the first and second matrix and the third matrix includes one set of pipelined circuit of parallel processing and one set of relating adder.