TW202425267A - Capacitor coupling package structure - Google Patents
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- 239000000725 suspension Substances 0.000 claims description 30
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- 238000004806 packaging method and process Methods 0.000 claims description 23
- 239000003989 dielectric material Substances 0.000 claims description 12
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Abstract
Description
本發明涉及一種電容耦合封裝結構,特別是涉及一種通過懸浮支架分離設置的多信號通道電容耦合封裝結構。The present invention relates to a capacitive coupling packaging structure, and in particular to a multi-signal channel capacitive coupling packaging structure which is separately arranged by a suspension bracket.
現有電容耦合(capacitive coupling)技術主要將電容器設置於晶片上(on-chip),然而電容器的金屬導體之間的距離不能過大(一般必須小於16 μm),且當電容器設置於晶片上時,晶片的整體面積亦會隨之增加,致使相關產品會具有較大體積。此外,晶片上電容器的隔離電壓也會受限於晶片主體材料(例如二氧化矽)的厚度,因此不易符合特定應用領域的隔離要求。The existing capacitive coupling technology mainly places capacitors on-chip. However, the distance between the metal conductors of the capacitor cannot be too large (generally must be less than 16 μm), and when the capacitor is placed on the chip, the overall area of the chip will also increase, resulting in a larger volume for the related products. In addition, the isolation voltage of the capacitor on the chip is also limited by the thickness of the chip's main material (such as silicon dioxide), so it is not easy to meet the isolation requirements of specific application areas.
故,如何通過結構設計的改良,以使整體電容耦合封裝結構能夠微型化,來克服上述的缺陷,已成為該項事業所欲解決的重要課題之一。Therefore, how to improve the structural design so that the overall capacitor coupling package structure can be miniaturized to overcome the above-mentioned defects has become one of the important issues that the industry wants to solve.
本發明所要解決的技術問題在於,針對現有技術的不足提供一種多信號通道電容耦合封裝結構。The technical problem to be solved by the present invention is to provide a multi-signal channel capacitive coupling packaging structure in view of the shortcomings of the prior art.
為了解決上述的技術問題,本發明所採用的其中一技術方案是提供一種電容耦合封裝結構,其包括一第一引線架、一第二引線架、多個傳送器模組、以及多個接收器模組。第二引線架對應並對準第一引線架,且第一引線架與第二引線架之間具有一間隙。多個傳送器模組分別設置於第一引線架的一第一表面上或第二引線架的一第二表面上。每一傳送器模組包括一傳送器、一信號輸入引腳、一第一信號輸出極板及一第二信號輸出極板。傳送器的一輸入端電性連接信號輸入引腳,傳送器的一輸出端分別電性連接第一信號輸出極板及第二信號輸出極板。多個接收器模組分別設置於第一引線架的第一表面上或第二引線架的第二表面上。每一接收器模組包括一接收器、一信號輸出引腳、一第一信號輸入極板及一第二信號輸入極板。接收器的一輸入端分別電性連接第一信號輸入極板及第二信號輸入極板,接收器的一輸出端電性連接信號輸出引腳。多個接收器模組分別對應多個傳送器模組。第一信號輸入極板、第二信號輸入極板、第一信號輸出極板及第二信號輸出極板分別通過多個懸浮支架分離設置。當任一傳送器模組設置於第一引線架的第一表面上或第二引線架的第二表面上時,任一傳送器模組的對應接收器模組設置於第二引線架的第二表面上或第一引線架的第一表面上。In order to solve the above-mentioned technical problems, one of the technical solutions adopted by the present invention is to provide a capacitive coupling package structure, which includes a first lead frame, a second lead frame, a plurality of transmitter modules, and a plurality of receiver modules. The second lead frame corresponds to and is aligned with the first lead frame, and there is a gap between the first lead frame and the second lead frame. The plurality of transmitter modules are respectively arranged on a first surface of the first lead frame or a second surface of the second lead frame. Each transmitter module includes a transmitter, a signal input pin, a first signal output pole plate and a second signal output pole plate. An input end of the transmitter is electrically connected to the signal input pin, and an output end of the transmitter is electrically connected to the first signal output pole plate and the second signal output pole plate, respectively. A plurality of receiver modules are respectively arranged on the first surface of the first lead frame or the second surface of the second lead frame. Each receiver module includes a receiver, a signal output pin, a first signal input pole plate and a second signal input pole plate. An input end of the receiver is electrically connected to the first signal input pole plate and the second signal input pole plate, and an output end of the receiver is electrically connected to the signal output pin. A plurality of receiver modules correspond to a plurality of transmitter modules respectively. The first signal input pole plate, the second signal input pole plate, the first signal output pole plate and the second signal output pole plate are respectively separately arranged through a plurality of suspension brackets. When any transmitter module is disposed on the first surface of the first lead frame or the second surface of the second lead frame, the corresponding receiver module of any transmitter module is disposed on the second surface of the second lead frame or the first surface of the first lead frame.
本發明的其中一有益效果在於,本發明所提供的電容耦合封裝結構,其能通過“第一引線架與所述第二引線架之間具有一間隙”、“第一信號輸入極板、第二信號輸入極板、第一信號輸出極板及第二信號輸出極板分別通過懸浮支架分離設置”、“當任一傳送器模組設置於第一引線架的第一表面上或第二引線架的第二表面上時,任一傳送器模組的對應接收器模組設置於第二引線架的第二表面上或第一引線架的第一表面上” 以及“多個傳送器模組可以不全部設置於第一引線架的第一表面上或第二引線架的第二表面上”的技術方案,不僅提供了多信號通道電容耦合還可提升電容耦合封裝結構製備靈活性及有效減小體積,並可通過調整間隙的距離使整體電容值得以調整。One of the beneficial effects of the present invention is that the capacitive coupling package structure provided by the present invention can be realized by "a gap between the first lead frame and the second lead frame", "the first signal input plate, the second signal input plate, the first signal output plate and the second signal output plate are separately arranged through the suspension bracket", "when any transmitter module is arranged on the first surface of the first lead frame or the second surface of the second lead frame, the corresponding receiver module of any transmitter module is arranged on the second surface of the second lead frame or the first surface of the first lead frame" As well as the technical solution of "multiple transmitter modules may not all be arranged on the first surface of the first lead frame or the second surface of the second lead frame", it not only provides multi-signal channel capacitive coupling but also improves the flexibility of capacitive coupling packaging structure preparation and effectively reduces the volume, and the overall capacitance value can be adjusted by adjusting the distance of the gap.
更進一步來說,本發明所提供的電容耦合封裝結構,傳送器模組還包括至少一功能性半導體元件,至少一功能性半導體元件電性連接於信號輸入引腳與傳送器的輸入端之間,及/或接收器模組還包括至少一功能性半導體元件,至少一功能性半導體元件電性連接於接收器的輸出端與信號輸出引腳之間,可以在有限的結構空間中達到輸出信號的控制。Furthermore, in the capacitive coupling package structure provided by the present invention, the transmitter module further includes at least one functional semiconductor element, at least one functional semiconductor element is electrically connected between the signal input pin and the input end of the transmitter, and/or the receiver module further includes at least one functional semiconductor element, at least one functional semiconductor element is electrically connected between the output end of the receiver and the signal output pin, so that the control of the output signal can be achieved in a limited structural space.
為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與圖式,然而所提供的圖式僅用於提供參考與說明,並非用來對本發明加以限制。To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only used for reference and description and are not used to limit the present invention.
以下是通過特定的具體實施例來說明本發明所公開有關“電容耦合封裝結構”的實施方式,本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。本發明可通過其他不同的具體實施例加以施行或應用,本說明書中的各項細節也可基於不同觀點與應用,在不背離本發明的構思下進行各種修改與變更。另外,本發明的附圖僅為簡單示意說明,並非依實際尺寸的描繪,事先聲明。以下的實施方式將進一步詳細說明本發明的相關技術內容,但所公開的內容並非用以限制本發明的保護範圍。另外,本文中所使用的術語“或”,應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。The following is an explanation of the implementation of the "capacitive coupling packaging structure" disclosed in the present invention through specific concrete embodiments. Technical personnel in this field can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual sizes. Please note in advance. The following implementation will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein may include any one or more combinations of the associated listed items as appropriate.
[第一實施例][First embodiment]
參閱圖1至圖7所示,本發明第一實施例提供一種電容耦合封裝結構,其包括:一第一引線架1、一第二引線架2、多個傳送器模組3、多個接收器模組4以及一間隔物(封裝體5)。1 to 7 , the first embodiment of the present invention provides a capacitive coupling package structure, which includes: a first lead frame 1, a
具體來說,第一引線架1與第二引線架2可以具有相同的尺寸,且可由相同的材料製成,但本發明不限於此。此外,在電容耦合封裝結構中,第一引線架1與第二引線架2相互對應並對準,且第一引線架1與第二引線架2之間具有一間隙d,也就是說,第一引線架1可以平行設置在第二引線架2的正上方。在一較佳實施例中,間隙d的距離可以為50 μm至600 μm。值得注意的是,間隙d的距離可以根據實際應用進行調整,進而使整體電容值得以調整。Specifically, the first lead frame 1 and the
多個傳送器模組3可以分別設置於第一引線架1的第一表面11或第二引線架2的第二表面21,多個接收器模組4可以對應分別設置於第二引線架2的第二表面21或第一引線架1的第一表面11,且多個傳送器模組3及多個接收器模組4都可以通過固晶(die-attach)的方式固定於第一引線架1或第二引線架2。舉例來說,如圖1至圖3所示,傳送器模組3及接收器模組4可以各具有3個,但本發明不限於此。3個傳送器模組3可以皆設置於第一引線架1且3個接收器模組4可以皆設置於第二引線架2(如圖1所示);3個傳送器模組3中的2個傳送器模組3設置於第一引線架1,另1個傳送器模組3設置於第二引線架2,且3個接收器模組4中的2個接收器模組4設置於第二引線架2,另1個接收器模組4設置於第一引線架1(如圖2所示);或3個傳送器模組3中的1個傳送器模組3設置於第一引線架1,另2個傳送器模組3設置於第二引線架2,且3個接收器模組4中的1個接收器模組4設置於第二引線架2,另2個接收器模組4設置於第一引線架1(如圖3所示)。The plurality of transmitter modules 3 may be disposed on the
傳送器模組3可以分別包含具有傳送信號的晶片。每一傳送器模組3可包括傳送器31、信號輸入引腳32、第一信號輸出極板33及第二信號輸出極板34。傳送器31的輸入端電性連接信號輸入引腳32,傳送器31的輸出端分別電性連接第一信號輸出極板33及第二信號輸出極板34。值得注意的是,傳送器模組3的各個組件可以由相同的導電材料製成,但本發明不限於此。The transmitter module 3 may include chips with transmission signals. Each transmitter module 3 may include a
接收器模組4可以含具有接收信號的晶片。每一接收器模組4可包括接收器41、信號輸出引腳42、第一信號輸入極板43及第二信號輸入極板44,接收器41的輸入端分別電性連接第一信號輸入極板43及第二信號輸入極板44,接收器41的輸出端電性連接信號輸出引腳42。值得注意的是,接收器模組4的各個組件可以由相同的導電材料製成,但本發明不限於此。The receiver module 4 may include a chip having a receiving signal. Each receiver module 4 may include a
在本發明中,傳送器31可以包含高頻傳送器晶片,且是以差分形式進行信號處理的傳送器晶片。在本發明中,使用差分形式進行信號處理可以使得電容耦合封裝結構符合共模拒斥(common mode rejection,CMR)的需求。因此,由信號輸入引腳32傳送至傳送器31的信號會以差分形式被分別傳送至第一信號輸出極板33以及第二信號輸出極板34,用以與接收器模組4的第一信號輸入極板43及第二信號輸入極板44產生兩個物理鏈接(physical link),而兩個物理鏈接形成一個信號通道(channel)。每一信號通道中的傳送器31及接收器41通過第一信號輸出極板33、第二信號輸出極板34、第一信號輸入極板43及第二信號輸入極板44所形成的電容而彼此電性絕緣(galvanically isolated/DC isolated),而高頻信號則可以藉由電容耦合而通過電容所形成之阻礙(barrier)。In the present invention, the
間隔物設置於第一引線架1及第二引線架2的間隙d,換言之,本實施例的間隔物可以為一封裝體5,封裝體5包覆第一引線架1及第二引線架2,且封裝體5填充充實於間隙d。封裝體5可以由模塑膠所形成,也可由模塑膠混合絕緣材料所形成,使得第一引線架1與第二引線架2彼此電性隔離,但本發明的封裝體5的絕緣材料可以根據實際需求進行調整。在一較佳實施例,封裝體5可以由環氧樹脂或矽氧樹脂所形成。The spacer is disposed in the gap d between the first lead frame 1 and the
更進一步,第一引線架1的第一表面11與第二引線架2的第二表面21可以朝向相同方向或不同方向。舉例來說,在一實施例中,如圖4所示,第一表面11與第二表面21朝向相同方向,亦即,傳送器模組3與接收器模組4分別設置在第一引線架1的上表面(第一表面11)及第二引線架2的上表面(第二表面21)。在另一實施例中,如圖5所示,第一表面11與第二表面21朝向不同方向,亦即,傳送器模組3與接收器模組4分別設置在第一引線架1的下表面(第一表面11)及第二引線架2的上表面(第二表面21),或者,傳送器模組3與接收器模組4分別設置在第一引線架1的上表面(第一表面11)及第二引線架2的下表面(第二表面21)。值得注意的是,第一引線架1的第一表面11與第二引線架2的第二表面21的設置可以根據實際應用進行調整,本發明不限於此。Furthermore, the
值得一提的是,本發明的電容耦合封裝結構還可以包括至少一功能性半導體元件E。在一實施例中,功能性半導體元件E可以電性連接於信號輸入引腳32與傳送器31的輸入端之間。在另一實施例中,如圖6及圖7所示,功能性半導體元件E可以電性連接於接收器41的輸出端與信號輸出引腳42之間。在又一實施例中,功能性半導體元件E可以為2個,其中一個功能性半導體元件E電性連接於信號輸入引腳32與傳送器31的輸入端之間,另一功能性半導體元件E電性連接於接收器41的輸出端與信號輸出引腳42之間。此外,功能性半導體元件E可以根據實際應用擇用,舉例來說,功能性半導體元件E可以為絕緣柵雙極電晶體(Insulated Gate Bipolar Transistor,IGBT)、數位類比轉換器電路(Digital to analog converter,DAC)或類比數位轉換器電路(Analog to Digital converter,ADC)等。It is worth mentioning that the capacitive coupling package structure of the present invention may further include at least one functional semiconductor element E. In one embodiment, the functional semiconductor element E may be electrically connected between the
進一步,如圖6所示,功能性半導體元件E可以集成設置於接收器模組4,接收器模組4檢測來自傳送器31的調制高頻信號後可對其進行解調,使其恢復為傳輸控制信號以輸出至功能性半導體元件E。另一方面,如圖7所示,功能性半導體元件E也可以不與接收器模組4集成設置,亦即接收器模組4與功能性半導體元件E是分開的獨立結構,接收器模組4檢測來自傳送器31的調制高頻信號後可對其進行解調,使其恢復為傳輸控制信號再將控制信號輸出至功能性半導體元件E。Furthermore, as shown in FIG6 , the functional semiconductor element E can be integrated in the receiver module 4. After the receiver module 4 detects the modulated high-frequency signal from the
更進一步,在本實施例中,如圖8所示,3個傳送器模組3設置於第一引線架1的第一表面11,3個接收器模組4對應設置於第二引線架2的第二表面21,以形成具有3個通道(即第一通道、第二通道及第三通道)的多信號通道電容耦合封裝結構。本實施例中,3個傳送器模組3可以集成於一個IC 晶片,同樣地,3個接收器模組4 可以集成於一個IC 晶片,減少成本以及封裝的尺寸。進行封裝時第一引線架1的第一表面11與所述第二引線架2的第二表面21朝向相同方向,平移第一引線架1或第二引線架2,則3個通道個別的第一信號輸出極板33(即圖8上半部所示之C1+、C2+及C3+;C1+、C2+及C3+是物理上相互不連接的,各自獨立的極板 )、第二信號輸出極板34(即圖8上半部所示之C1-、C2-及C3-; C1-、C2-及C3-是物理上相互不連接的,各自獨立的極板)、第一信號輸入極板43(即圖8下半部所示之C1+、C2+及C3+;C1+、C2+及C3+是物理上相互不連接的,各自獨立的極板。)及第二信號輸入極板44(即圖8下半部所示之C1-、C2-及C3-;C1-、C2-及C3-是物理上相互不連接的,各自獨立的極板)可以分別通過對應的懸浮支架FL(floating lead)懸浮設置於封裝體5,且第一信號輸出極板33與第一信號輸入極板43彼此對準,第二信號輸出極板34與第二信號輸入極板44彼此對準。此外,第一引線架1可以通過多個彼此分離的第一引腳12設置於封裝體5,第二引線架2可以通過多個彼此分離的第二引腳22設置於封裝體5,且第一引線架1與第二引線架2於封裝體5中相互對應並對準。在一實施例中,如圖8所示,當第一信號輸出極板33、第二信號輸出極板34、第一信號輸入極板43及第二信號輸入極板44分別通過對應的懸浮支架FL懸浮設置於封裝體5時,懸浮支架FL在投影面上的投影可以平行於多個第一引腳12及多個第二引腳22。也就是說,如圖8所示,第一信號輸出極板33及第二信號輸出極板34沿第一引線架1的一長度方向排列,第一信號輸入極板43及第二信號輸入極板44沿第二引線架2的一長度方向排列。在一較佳實施例,任一個懸浮支架FL在投影面上的投影對應於其所對應的相鄰的兩個第一引腳12之間的一中心線或其所對應的相鄰的兩個第二引腳22之間的一中心線,也就是說,自本發明的電容耦合封裝結構的上方觀察時,懸浮支架FL是設置在相鄰的兩個第一引腳12的間隔距離的中點或相鄰的兩個第二引腳22的間隔距離的中點。Furthermore, in this embodiment, as shown in FIG8 , three transmitter modules 3 are disposed on the
然而,上述所舉的例子只是其中一可行的實施例而並非用以限定本發明。However, the above example is only a feasible embodiment and is not intended to limit the present invention.
[第二實施例][Second embodiment]
參閱圖9所示,圖9為本發明第二實施例的電容耦合封裝結構的示意圖。第二實施例與第一實施例主要不同之處在於懸浮支架FL的設置方式。另外,須說明的是,第二實施例的電容耦合封裝結構的其他結構與第一實施例相仿,在此不再贅述。Referring to FIG. 9, FIG. 9 is a schematic diagram of a capacitive coupling package structure of the second embodiment of the present invention. The second embodiment differs from the first embodiment mainly in the arrangement of the suspension bracket FL. In addition, it should be noted that the other structures of the capacitive coupling package structure of the second embodiment are similar to those of the first embodiment, and will not be described in detail here.
在本實施例中,如圖9所示,3個傳送器模組3設置於第一引線架1的第一表面11,3個接收器模組4對應設置於第二引線架2的第二表面21,以形成具有3個通道(即第一通道、第二通道及第三通道)的多信號通道電容耦合封裝結構。進行封裝時第一引線架1可以相對軸X進行翻轉以使第一引線架1設置於第二引線架2的正上方,也就是使得第一引線架1的第一表面11與所述第二引線架2的第二表面21相互面對,則設置於第一引線架1的第一通道上的第一信號輸出極板33(即圖9上半部所示之C1+)及第二信號輸出極板34(即圖9上半部所示之C1-)能夠分別與設置於對應第二引線架2的第一通道上的第一信號輸入極板43(即圖9下半部所示之C1+)及第二信號輸入極板44(即圖9下半部所示之C1-)彼此對應,第一引線架1的第二通道上的第一信號輸出極板33(即圖9上半部所示之C2+)及第二信號輸出極板34(即圖9上半部所示之C2-)能夠分別與設置於對應第二引線架2的第二通道上的第一信號輸入極板43(即圖9下半部所示之C2+)及第二信號輸入極板44(即圖9下半部所示之C2-)彼此對應,且第一引線架1的第三通道上的第一信號輸出極板33(即圖9上半部所示之C3+)及第二信號輸出極板34(即圖9上半部所示之C3-)能夠分別與設置於對應第二引線架2的第三通道的第一信號輸入極板43(即圖9下半部所示之C3+)及第二信號輸入極板44(即圖9下半部所示之C3-)彼此對應。In this embodiment, as shown in FIG. 9 , three transmitter modules 3 are disposed on the
然而,上述所舉的例子只是其中一可行的實施例而並非用以限定本發明。However, the above example is only a feasible embodiment and is not intended to limit the present invention.
[第三實施例][Third Embodiment]
參閱圖10所示,圖10為本發明第三實施例的電容耦合封裝結構的示意圖。第三實施例與第一實施例主要不同之處在於懸浮支架FL的設置方式。另外,須說明的是,第三實施例的電容耦合封裝結構的其他結構與第一實施例及第二實施例相仿,在此不再贅述。Referring to FIG. 10 , FIG. 10 is a schematic diagram of a capacitive coupling package structure of the third embodiment of the present invention. The third embodiment differs from the first embodiment mainly in the arrangement of the suspension bracket FL. In addition, it should be noted that the other structures of the capacitive coupling package structure of the third embodiment are similar to those of the first and second embodiments, and will not be described in detail here.
在本實施例中,如圖10所示,4個傳送器模組3設置於第一引線架1的第一表面11,4個接收器模組4對應設置於第二引線架2的第二表面21,以形成具有4個通道(即第一通道、第二通道、第三通道及第四通道)的多信號通道電容耦合封裝結構。進行封裝時第一引線架1的第一表面11與所述第二引線架2的第二表面21朝向相同方向,平移第一引線架1或第二引線架2,使得第一信號輸出極板33(即圖10上半部所示之C1+、C2+、C3+及C4+)與第一信號輸入極板43(即圖10下半部所示之C1+、C2+、C3+及C4+)彼此對準,以及第二信號輸出極板34(即圖10上半部所示之C1-、C2-、C3-及C4-)與第二信號輸入極板44(即圖10下半部所示之C1-、C2-、C3-及C4-)彼此對準,且4個通道個別的第一信號輸出極板33、第二信號輸出極板34、第一信號輸入極板43及第二信號輸入極板44係通過多個懸浮支架FL懸浮設置於封裝體5,其中一部分的懸浮支架FL在投影面上的投影可以平行於多個第一引腳12及多個第二引腳22,其餘部分的懸浮支架FL在投影面上的投影可以垂直於多個第一引腳12及多個第二引腳22,也就是說,懸浮支架FL的設置朝向水準方向或垂直方向。此外,第一引線架1可以通過多個彼此分離的第一引腳12設置於封裝體5,第二引線架2可以通過多個彼此分離的第二引腳22設置於封裝體5。In this embodiment, as shown in FIG. 10 , four transmitter modules 3 are disposed on the
對於在投影面上的投影垂直於多個第一引腳12及多個第二引腳22的懸浮支架FL(垂直懸浮支架),為了滿足隔離要求,第一引線架1的垂直懸浮支架與第二引線架2的垂直懸浮支架的爬行間距(creepage distance)必須大於隔離和安全要求的距離。但通常對於小型封裝,垂直懸浮支架的爬行間距不容易滿足隔離和安全要求的距離。為了克服這一問題,可以採用兩次封裝成型(double molding)的技術將懸浮支架密封在第二層封裝膠體內。這樣第一引線架1的垂直懸浮支架與第二引線架2的垂直懸浮支架的間距只需要大於400um,便可以滿足隔離和安全要求了。For the suspended bracket FL (vertical suspended bracket) whose projection on the projection plane is perpendicular to the first plurality of pins 12 and the second plurality of pins 22, in order to meet the isolation requirements, the creepage distance between the vertical suspended bracket of the first lead frame 1 and the vertical suspended bracket of the
然而,上述所舉的例子只是其中一可行的實施例而並非用以限定本發明。However, the above example is only a feasible embodiment and is not intended to limit the present invention.
[第四實施例][Fourth embodiment]
參閱圖11所示,圖11為本發明第四實施例的電容耦合封裝結構的示意圖。第四實施例與第三實施例主要不同之處在於傳送器模組3於第一引線架1的第一表面11及接收器模組4於第二引線架2的第二表面21的設置方式。另外,須說明的是,第四實施例的電容耦合封裝結構的其他結構與第一實施例、第二實施例及第三實施例相仿,在此不再贅述。Referring to FIG. 11 , FIG. 11 is a schematic diagram of a capacitive coupling package structure of a fourth embodiment of the present invention. The fourth embodiment differs from the third embodiment mainly in the arrangement of the transmitter module 3 on the
在本實施例中,如圖11所示,4個傳送器模組3設置於第一引線架1的第一表面11,4個接收器模組4對應設置於第二引線架2的第二表面21,以形成具有4個通道(即第一通道、第二通道、第三通道及第四通道)的多信號通道電容耦合封裝結構。進行封裝時第一引線架1可以相對軸X進行翻轉以使第一引線架1設置於第二引線架2的正上方,也就是使得第一引線架1的第一表面11與所述第二引線架2的第二表面21相互面對,則設置於第一引線架1的第一通道的第一信號輸出極板33(即圖11上半部所示之C1+)及第二信號輸出極板34(即圖11上半部所示之C1-)能夠分別與設置於對應第二引線架2的第一通道的第一信號輸入極板43(即圖11下半部所示之C1+)及第二信號輸入極板44(即圖11下半部所示之C1-)彼此對應,第一引線架1的第二通道的第一信號輸出極板33(即圖11上半部所示之C2+)及第二信號輸出極板34(即圖11上半部所示之C2-)能夠分別與設置於對應第二引線架2的第二通道的第一信號輸入極板43(即圖11下半部所示之C2+)及第二信號輸入極板44(即圖11下半部所示之C2-)彼此對應,第一引線架1的第三通道的第一信號輸出極板33(即圖11上半部所示之C3+)及第二信號輸出極板34(即圖11上半部所示之C3-)能夠分別與設置於對應第二引線架2的第三通道的第一信號輸入極板43(即圖11下半部所示之C3+)及第二信號輸入極板44(即圖11下半部所示之C3-)彼此對應,且第一引線架1的第四通道的第一信號輸出極板33(即圖11上半部所示之C4+)及第二信號輸出極板34(即圖11上半部所示之C4-)能夠分別與設置於對應第二引線架2的第四通道的第一信號輸入極板43(即圖11下半部所示之C4+)及第二信號輸入極板44(即圖11下半部所示之C4-)彼此對應。In this embodiment, as shown in FIG. 11 , four transmitter modules 3 are disposed on the
此外,在本實施例中,如圖11所示,當第一信號輸出極板33(即圖11上半部所示之C1+、C2+、C3+及C4+)、第二信號輸出極板34(即圖11上半部所示之C1-、C2-、C3-及C4-)、第一信號輸入極板43(即圖11下半部所示之C1+、C2+、C3+及C4+)及第二信號輸入極板44(即圖11下半部所示之C1-、C2-、C3-及C4-)分別通過懸浮支架FL懸浮設置於封裝體5時,一部分的懸浮支架FL在投影面上的投影可以平行於多個第一引腳12及多個第二引腳22,其餘部分的懸浮支架FL在投影面上的投影可以垂直於多個第一引腳12及多個第二引腳22,也就是說,懸浮支架FL的設置朝向水準方向或垂直方向。In addition, in this embodiment, as shown in FIG. 11, when the first signal output plate 33 (i.e., C1+, C2+, C3+, and C4+ shown in the upper half of FIG. 11), the second signal output plate 34 (i.e., C1-, C2-, C3-, and C4- shown in the upper half of FIG. 11), the first signal input plate 43 (i.e., C1+, C2+, C3+, and C4+ shown in the lower half of FIG. 11) and the second signal input plate 44 (i.e., C1-, C2-, C3-, and C4- shown in the lower half of FIG. 11) are connected to each other, the first
然而,上述所舉的例子只是其中一可行的實施例而並非用以限定本發明。However, the above example is only a feasible embodiment and is not intended to limit the present invention.
[第五實施例][Fifth Embodiment]
參閱圖12所示,圖12為本發明第五實施例的電容耦合封裝結構的示意圖。第五實施例與第一實施例主要不同之處在於懸浮支架FL的設置方式的設置方式。另外,須說明的是,第五實施例的電容耦合封裝結構的其他結構與第一實施例、第二實施例、第三實施例及第四實施例相仿,在此不再贅述。Referring to FIG. 12, FIG. 12 is a schematic diagram of a capacitive coupling package structure of the fifth embodiment of the present invention. The fifth embodiment differs from the first embodiment mainly in the arrangement of the suspension bracket FL. In addition, it should be noted that the other structures of the capacitive coupling package structure of the fifth embodiment are similar to those of the first embodiment, the second embodiment, the third embodiment and the fourth embodiment, and will not be described in detail here.
在本實施例中,如圖12所示,4個傳送器模組3設置於第一引線架1的第一表面11,4個接收器模組4對應設置於第二引線架2的第二表面21,以形成具有4個通道(即第一通道、第二通道、第三通道及第四通道)的多信號通道電容耦合封裝結構。如圖12所示,進行封裝時第一引線架1的第一表面11與所述第二引線架2的第二表面21朝向相同方向,平移第一引線架1或第二引線架2,當第一信號輸出極板33(即圖12上半部所示之C1+、C2+、C3+及C4+)、第二信號輸出極板34(即圖12上半部所示之C1-、C2-、C3-及C4-)、第一信號輸入極板43(即圖12下半部所示之C1+、C2+、C3+及C4+)及第二信號輸入極板44(即圖12下半部所示之C1-、C2-、C3-及C4-)分別通過懸浮支架FL懸浮設置於封裝體5時,懸浮支架FL在投影面上的投影可以垂直於多個第一引腳12及多個第二引腳22。也就是說,如圖12所示,第一信號輸出極板33(即圖12上半部所示之C1+、C2+、C3+及C4+)及第二信號輸出極板34(即圖12上半部所示之C1-、C2-、C3-及C4-)沿第一引線架1的一寬度方向排列,第一信號輸入極板43(即圖12下半部所示之C1+、C2+、C3+及C4+)及第二信號輸入極板44(即圖12下半部所示之C1-、C2-、C3-及C4-)沿第二引線架2的一寬度方向排列。In this embodiment, as shown in FIG12, four transmitter modules 3 are disposed on the
綜上所述,N個通道的多信號通道電容耦合封裝結構需對應設置2*M*N個懸浮支架FL(floating lead),N,M≥2。In summary, a multi-signal channel capacitive coupling package structure with N channels needs to be equipped with 2*M*N floating leads FL (floating leads), where N, M≥2.
舉例來說,當通道為三個(N=3)且信號輸出/輸入極板的數量M為2,則信號輸出側的懸浮支架與對應信號輸入側的懸浮支架皆為6個(即圖8-9上下半部所示之C1+、C1-、C2+、C2-、C3+及C3-各自對應且獨立的懸浮支架FL),上下加總為12個。當通道為四個(N=4)且信號輸出/輸入極板的數量M為2,則信號輸出側的懸浮支架與對應信號輸入側的懸浮支架皆為8個(即圖10-12上下半部所示之C1+、C1-、C2+、C2-、C3+、C3-、C4+及C4-各自對應且獨立的懸浮支架FL),上下加總為16個。For example, when there are three channels (N=3) and the number of signal output/input poles M is 2, the number of suspension brackets on the signal output side and the corresponding signal input side are both 6 (i.e., the independent suspension brackets FL corresponding to C1+, C1-, C2+, C2-, C3+ and C3- shown in the upper and lower halves of Figure 8-9), totaling 12. When there are four channels (N=4) and the number of signal output/input poles M is 2, the number of suspension brackets on the signal output side and the corresponding signal input side are both 8 (i.e., the independent suspension brackets FL corresponding to C1+, C1-, C2+, C2-, C3+, C3-, C4+ and C4- shown in the upper and lower halves of Figure 10-12), totaling 16.
然而,上述所舉的例子只是其中一可行的實施例而並非用以限定本發明。However, the above example is only a feasible embodiment and is not intended to limit the present invention.
[第六實施例][Sixth Embodiment]
本發明的電容耦合封裝結構可以根據實際應用而使用不同的製程製得。舉例來說,本發明的電容耦合封裝結構可以先形成電路基板,之後進行電路集成,最後再進行封裝製程而完成電容耦合封裝結構。The capacitive coupling package structure of the present invention can be manufactured using different processes according to actual applications. For example, the capacitive coupling package structure of the present invention can first form a circuit substrate, then perform circuit integration, and finally perform a packaging process to complete the capacitive coupling package structure.
在一實施例中,傳送器模組3與接收器模組4設置可設置於同一基板的相對表面上,基板為介電質材料,每個第一引腳12的一部分及每個第二引腳22的一部分被介電質材料所包圍或設置於介電質材料表面,且介電質材料的上表面及下表面可形成圖案化導電材料層,亦即傳送器模組3與接收器模組4分別設置於圖案化導電材料層,之後再進行封裝製程而完成電容耦合封裝結構。In one embodiment, the transmitter module 3 and the receiver module 4 can be arranged on opposite surfaces of the same substrate, the substrate is a dielectric material, a portion of each first pin 12 and a portion of each second pin 22 are surrounded by the dielectric material or arranged on the surface of the dielectric material, and the upper surface and the lower surface of the dielectric material can form a patterned conductive material layer, that is, the transmitter module 3 and the receiver module 4 are respectively arranged on the patterned conductive material layer, and then the packaging process is performed to complete the capacitive coupling packaging structure.
或者,傳送器模組3與接收器模組4設置可設置於不同基板的任一表面,每個第一引腳12的一部分及每個第二引腳22的一部分可分別設置不同的基板上,每個第一引腳12的一部分設置於第一基板上、每個第二引腳22的一部分設置於第二基板上,第一基板和第二基板為介電質材料,每個第一引腳12的另一部分及每個第二引腳22的另一部分分別被介電質材料所包圍或設置於介電質材料表面(亦即可將介電質材料層視為本發明前述實施例的第一引線架1與第二引線架2),且介電質材料的上表面及下表面可形成圖案化導電材料,亦即傳送器模組3與接收器模組4分別設置於圖案化導電材料,進一步而言,如圖4或圖5所示,傳送器模組3與接收器模組4設置在朝向相同或不同方向的兩個不同基板表面上,以第一基板或第二基板或二者的組合作為間隔物,亦即介電質材料設置於傳送器模組3與接收器模組4之間,而提供間隙d後,之後再進行封裝製程而完成電容耦合封裝結構。Alternatively, the transmitter module 3 and the receiver module 4 may be disposed on any surface of different substrates, a portion of each first pin 12 and a portion of each second pin 22 may be disposed on different substrates, a portion of each first pin 12 is disposed on the first substrate, a portion of each second pin 22 is disposed on the second substrate, the first substrate and the second substrate are dielectric materials, another portion of each first pin 12 and another portion of each second pin 22 are respectively surrounded by the dielectric material or disposed on the surface of the dielectric material (that is, the dielectric material layer can be regarded as the aforementioned embodiment of the present invention). The first lead frame 1 and the
在一實施例中,介電質材料可以為陶瓷材料所製成,較佳地,陶瓷材料可以為氮化鋁、氧化鋁或其任意組合,但本發明不限於此。在一實施例中,導電材料層可以為銅所製成,但本發明不限於此。In one embodiment, the dielectric material can be made of a ceramic material, preferably, the ceramic material can be aluminum nitride, aluminum oxide or any combination thereof, but the present invention is not limited thereto. In one embodiment, the conductive material layer can be made of copper, but the present invention is not limited thereto.
然而,上述所舉的例子只是其中一可行的實施例而並非用以限定本發明。However, the above example is only a feasible embodiment and is not intended to limit the present invention.
[實施例的有益效果][Beneficial Effects of Embodiments]
本發明的其中一有益效果在於,本發明所提供的電容耦合封裝結構,其能通過“第一引線架與所述第二引線架之間具有一間隙”、“第一信號輸入極板、第二信號輸入極板、第一信號輸出極板及第二信號輸出極板分別通過懸浮支架設置於間隔物”、“當任一傳送器模組設置於第一引線架的第一表面上或第二引線架的第二表面上時,任一傳送器模組的對應接收器模組設置於第二引線架的第二表面上或第一引線架的第一表面上” 以及“多個傳送器模組可以不全部設置於第一引線架的第一表面上或第二引線架的第二表面上”的技術方案,不僅提供多信號通道電容耦合還可提升電容耦合封裝結構製備靈活性及有效減小體積,並可通過調整間隙的距離使整體電容值得以調整。One of the beneficial effects of the present invention is that the capacitive coupling package structure provided by the present invention can be realized by "a gap between the first lead frame and the second lead frame", "the first signal input plate, the second signal input plate, the first signal output plate and the second signal output plate are respectively arranged on the spacer through the suspension bracket", "when any transmitter module is arranged on the first surface of the first lead frame or the second surface of the second lead frame, the corresponding receiver module of any transmitter module is arranged on the second surface of the second lead frame or the first surface of the first lead frame" As well as the technical solution of "multiple transmitter modules may not all be arranged on the first surface of the first lead frame or the second surface of the second lead frame", it not only provides multi-signal channel capacitive coupling but also enhances the flexibility of capacitive coupling packaging structure preparation and effectively reduces the volume, and the overall capacitance value can be adjusted by adjusting the distance of the gap.
更進一步來說,本發明所提供的電容耦合封裝結構,傳送器模組還包括至少一功能性半導體元件,至少一功能性半導體元件電性連接於信號輸入引腳與傳送器的輸入端之間,及/或接收器模組還包括至少一功能性半導體元件,至少一功能性半導體元件電性連接於接收器的輸出端與信號輸出引腳之間,可以在有限的結構空間中達到輸出信號的控制。Furthermore, in the capacitive coupling package structure provided by the present invention, the transmitter module further includes at least one functional semiconductor element, at least one functional semiconductor element is electrically connected between the signal input pin and the input end of the transmitter, and/or the receiver module further includes at least one functional semiconductor element, at least one functional semiconductor element is electrically connected between the output end of the receiver and the signal output pin, so that the control of the output signal can be achieved in a limited structural space.
以上所公開的內容僅為本發明的優選可行實施例,並非因此侷限本發明的申請專利範圍,所以凡是運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的申請專利範圍內。The contents disclosed above are only preferred feasible embodiments of the present invention and are not intended to limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made using the contents of the specification and drawings of the present invention are included in the scope of the patent application of the present invention.
1:第一引線架 11:第一表面 12:第一引腳 2:第二引線架 21:第二表面 22:第二引腳 3:傳送器模組 31:傳送器 32:信號輸入引腳 33:第一信號輸入極板 34:第二信號輸入極板 4:接收器模組 41:接收器 42:信號輸出引腳 43:第一信號輸出極板 44:第二信號輸出極板 5:封裝體 C1+、C2+、C3+、C4+:第一信號輸入極板/第一信號輸出極板 C1-、C2-、C3-、C4-:第二信號輸入極板/第二信號輸出極板 d:間隙 E:功能性半導體元件 FL:懸浮支架 X:軸 1: First lead frame 11: First surface 12: First lead 2: Second lead frame 21: Second surface 22: Second lead 3: Transmitter module 31: Transmitter 32: Signal input pin 33: First signal input plate 34: Second signal input plate 4: Receiver module 41: Receiver 42: Signal output pin 43: First signal output plate 44: Second signal output plate 5: Package C1+, C2+, C3+, C4+: First signal input plate/First signal output plate C1-, C2-, C3-, C4-: Second signal input plate/Second signal output plate d: gap E: functional semiconductor element FL: suspension bracket X: axis
圖1至圖3為本發明第一實施例的電容耦合封裝結構的傳送器模組及接收器模組的設置示意圖。1 to 3 are schematic diagrams of the configuration of a transmitter module and a receiver module of a capacitive coupling package structure according to a first embodiment of the present invention.
圖4為本發明一實施例的電容耦合封裝結構的示意圖。FIG. 4 is a schematic diagram of a capacitive coupling packaging structure according to an embodiment of the present invention.
圖5為本發明另一實施例的電容耦合封裝結構的示意圖。FIG. 5 is a schematic diagram of a capacitive coupling packaging structure according to another embodiment of the present invention.
圖6為本發明第一實施例的電容耦合封裝結構設置有的功能性半導體元件的示意圖。FIG6 is a schematic diagram of a functional semiconductor element provided in the capacitive coupling package structure of the first embodiment of the present invention.
圖7為本發明第一實施例的電容耦合封裝結構設置有的功能性半導體元件的另一示意圖。FIG. 7 is another schematic diagram of a functional semiconductor element provided in the capacitive coupling package structure of the first embodiment of the present invention.
圖8為本發明第一實施例的電容耦合封裝結構的示意圖。FIG8 is a schematic diagram of a capacitive coupling packaging structure according to the first embodiment of the present invention.
圖9為本發明第二實施例的電容耦合封裝結構的示意圖。FIG9 is a schematic diagram of a capacitive coupling packaging structure according to a second embodiment of the present invention.
圖10為本發明第三實施例的電容耦合封裝結構的示意圖。FIG. 10 is a schematic diagram of a capacitive coupling packaging structure according to a third embodiment of the present invention.
圖11為本發明第四實施例的電容耦合封裝結構的示意圖。FIG. 11 is a schematic diagram of a capacitive coupling packaging structure according to a fourth embodiment of the present invention.
圖12為本發明第五實施例的電容耦合封裝結構的示意圖。FIG. 12 is a schematic diagram of a capacitive coupling packaging structure according to a fifth embodiment of the present invention.
1:第一引線架 1: First lead frame
11:第一表面 11: First surface
12:第一引腳 12: First pin
2:第二引線架 2: Second lead frame
21:第二表面 21: Second surface
22:第二引腳 22: Second pin
5:封裝體 5: Package body
C1+、C2+、C3+:第一信號輸入極板/第一信號輸出極板 C1+, C2+, C3+: First signal input plate/first signal output plate
C1-、C2-、C3-:第二信號輸入極板/第二信號輸出極板 C1-, C2-, C3-: Second signal input plate/second signal output plate
FL:懸浮支架 FL: Floating bracket
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