TW202416676A - System and method for forwarding network traffic - Google Patents

Abstract

A device for control of network traffic may include a plurality of edge interface circuit and internal interface circuits each coupled to one or more network components. The device may prepend frame identification information to received data frames and remove duplicate data frames when identification information is detected multiple times. The device may store frame identification information in a non-transitory memory device and perform a lookup operation to identify duplicate data frames and eliminate loops in the network.

Description

System and method for forwarding network traffic

This application claims priority to commonly owned U.S. Patent Application No. 63/404,736 filed on September 8, 2022, the entire contents of which are incorporated herein by reference for all purposes.

The present invention relates to the forwarding of traffic in a computer network.

In a computer network, network components including but not limited to switches and routers are tasked with receiving data at their input ports (also called ingress ports) and forwarding the received data to the appropriate destination through their output ports (also called egress ports). This process of sending incoming data to a set of appropriate destinations is called forwarding in a computer network.

In one type of network, often referred to as a store and forward (S&F) network, a network component may receive an incoming frame at its ingress port. The frame is received in its entirety before a forwarding decision is made. Once the entire frame is received and buffered, the network component compares the cyclic redundancy check (CRC) data contained in the frame to determine the correctness of the received data. If the CRC check indicates that the data is correct, the data is forwarded to the appropriate media access control (MAC) address.

In another type of network, often called a through-forwarding (CTF) network, only a small portion of the incoming frame is received, and once a forwarding decision is made, the network component begins sending the incoming frame data to the appropriate egress port. The forwarding decision may include a MAC address destination, or may include other information. The network component does not wait for the entire frame to be received before beginning to forward the frame to the appropriate destination.

Cut-through forwarding is advantageous in many applications because it provides low-latency forwarding through a network component, and this low latency can be fixed and independent of frame size.

Cut-through forwarding may fail to detect and discard frames with bit errors before forwarding to the next destination in the network. A first network component may begin forwarding the beginning of a frame before receiving the end of the frame at the ingress port of the first network component, thereby forwarding the frame to the appropriate destination at a second network component at the egress port of the first network component. This second network component may receive the data frame at its ingress port and similarly begin forwarding the beginning of the frame before receiving the end of the frame at the ingress port of the second network component, thereby forwarding the frame to a third network component at the egress port of the second network component. In a similar manner, a data frame may be forwarded across multiple network components in a CTF network. When the end of the frame is received at the first network component, a CRC check may be performed. If an error is detected, the frame has already been forwarded to at least one destination. In a broadcast or multicast network implementation, an erroneous data frame may be forwarded to multiple destinations in the network before the error is detected. Correcting these erroneous data frames increases the complexity of the network and adds latency. Additionally, a single bit error in a frame field used in forwarding decisions can cause data frames to loop in the network because the data frames are continually forwarded to the wrong destination.

In a network using cut-through forwarding, a mechanism is needed to prevent excessive network traffic and unnecessary data traffic loops.

Embodiments herein implement an apparatus, system, and method for performing low-latency network forwarding thereby eliminating excess network traffic and unnecessary data loops.

According to one aspect, an embodiment of the present invention implements a device, which includes an edge interface circuit for coupling to a network component and to a forwarder circuit. The edge interface circuit receives data frames from the network component, pre-appends a frame-specific information header to the received data frames, and forwards the pre-appended data frames to the forwarder circuit. The edge interface circuit receives data frames from the forwarder circuit, removes duplicate data frames, and forwards non-duplicate data frames to the network component. An internal interface circuit is coupled to an internal network segment and to the forwarder circuit, and the internal interface circuit receives data frames from the internal network segment and forwards the received data frames to the forwarder circuit. The internal interface circuit receives data frames from the forwarder circuit, removes duplicate data frames, and forwards non-duplicate data frames to the internal network segment.

According to one aspect, the embodiments herein implement a system including a network. The network includes a plurality of network-connected devices. The network-connected devices include an edge interface circuit coupled to a network component and coupled to a forwarder circuit, the edge interface circuit receives data frames from the network component, pre-attaches a frame-specific information header to the received data frames, and forwards the pre-attached data frames to the forwarder circuit. The edge interface circuit receives data frames from the forwarder circuit, removes duplicate data frames, and forwards non-duplicate data frames to the network component. An internal interface circuit is coupled to an internal network segment and to the repeater circuit, wherein the internal interface circuit receives data frames from the internal network segment and forwards the received data frames to the repeater circuit. The internal interface circuit receives data frames from the repeater circuit, removes duplicate data frames, and forwards non-duplicate data frames to the internal network segment.

According to one aspect, an embodiment of the present invention implements a method including the following operations: receiving a data frame from a network component at an edge interface circuit; generating a frame specific information header based on the received data frame; pre-appending the frame specific information header as a tag to the received data frame to generate a pre-appended data frame; forwarding the pre-appended data frame to a forwarder circuit; receiving a data frame from the forwarder circuit at an edge interface circuit and discarding a data frame with a detected error; identifying duplicate received data frames based on the contents of a non-transient memory and the frame specific information header; a data frame; removing duplicate received data frames; removing the frame specific information header from non-duplicate received data frames to create an updated data frame; forwarding the updated data frame to a network destination through an egress port; receiving a data frame from an internal network segment at an internal interface circuit; forwarding the received data frame to the forwarder circuit; receiving a data frame from the forwarder circuit at an internal interface circuit; identifying duplicate received data frames based on contents of a non-transitory memory and the frame specific information header; removing duplicate received data frames; and forwarding the non-duplicate data frames to a network component.

FIG. 1 illustrates one of various embodiments of a computer network 100. The embodiment of FIG. 1 includes network components 110, 130, and 140. Network components 110, 130, and 140 may include, but are not limited to, bridges, switches, and routers. There is no requirement that network components 110, 130, and 140 be of the same type. Internal network segment 150 may include one or more network components that utilize a CTF protocol. Edge circuits 115, 135, 145 may connect internal network segment 150 to network components 110, 130, 140, respectively. The cut-through forwarder circuits 151 and 152 of the internal network segment 150 may forward data frames between the edge circuits 115, 135, 145 using a CTF protocol.

The network component 110 may be coupled to the internal network segment 150 via an edge circuit 115. The edge circuit 115 may include a first edge interface circuit 118 for communicating with the network component 110 using a storage and forwarding protocol. The first edge interface circuit 118 may include at least one ingress port 111 and at least one egress port 112. The first edge interface circuit 118 may receive data from the network component 110 via the ingress port 111. The first edge interface circuit may send data to the network component 110 via the egress port 112. The edge circuit 115 may include one or more internal interface circuits 116, 117 for communicating with the pass-through forwarder circuits 151 and 152 of the internal network segment 150.

The embodiment illustrated in FIG1 includes two through-forwarding circuits 151 and 152 of the internal network segment 150, but this is not intended to be limiting. Other embodiments may include more through-forwarding circuits than those illustrated in FIG1, or may include fewer through-forwarding circuits than those illustrated in FIG1.

The specific configuration of network components and the specific paths between network components as illustrated in FIG. 1 are for illustrative purposes and are not intended to be limiting.

The edge circuit 115 may receive a data frame from the network component 110 via the ingress port 111 at the first edge interface circuit 118. The data frame received at the edge circuit 115 may contain identification information. The edge circuit 115 may include an error detector circuit 172 for detecting errors in the received data frame. The error detector circuit 172 may perform a CRC check or other error detection check on the received data frame. The edge circuit 115 may perform a CRC check or other error detection check on the received data frame. The edge circuit 115 may pre-append a frame specific information header to the received data frame to create a pre-appended data frame. The frame-specific information header may be generated by the identification circuit 175. The identification circuit 175 may be implemented in hardware or software or a combination thereof. The identification circuit 175 may be integrated into the first edge interface circuit 118, or may be a separate component. The frame-specific information header may include a source MAC address for the received data frame. The frame-specific information header may include an identification code associated with the received data frame. This identification code may also be referred to as a frame number. The identification code or frame number may distinguish a first received data frame received from a specific MAC address from a second received data frame received from the same MAC address at an earlier or later point in time. The frame-specific information header may be part of a tag that is pre-appended to the received data frame to generate the pre-appended data frame. The tag may be pre-appended by tag insertion circuit 176. Tag insertion circuit 176 may be coupled to identification circuit 175 and may be implemented in hardware or software or a combination thereof. Tag insertion circuit 176 may be integrated into first edge interface circuit 118 or may be a separate component. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to other destinations in the network. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to the forwarder circuit 152 of the internal network segment 150 via forwarder circuit 113, internal interface circuit 117 and path 162. The data frame with the pre-pended frame specific information header can be forwarded by the forwarder circuit 113 to the forwarder circuit 151 of the internal network segment 150 via the forwarder circuit 113, the internal interface circuit 116 and the path 161.

The edge circuit 115 may receive a data frame at the internal interface circuit 116 via the path 161. The data frame received at the edge circuit 115 may contain identification information. The edge circuit 115 may update portions of the received data frame and forward the updated data frame to the network component 110 via the egress port 112 using an S&F protocol. The edge circuit 115 may include an error detector circuit 172 for detecting errors in received data frames and discarding data frames having a detected error. The error detector circuit 172 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded. The edge circuit 115 may read a portion of the received data frame including a frame specific information header. The frame specific information header may be present at a predetermined location in the received data frame. The edge circuit 115 may cooperate with a remove duplicate table (RDT) 171 in the edge circuit 115 to perform a lookup operation to determine whether the frame specific information header in the received data frame matches the frame specific information header of a previous data frame that has been forwarded. The frame specific information header may be stored in the RDT 171 in the edge circuit 115. The RDT 171 may be a non-transient memory. If the frame specific information header of the received data frame is listed in the RDT 171, the received data frame can be discarded and not forwarded, because the received data frame has been forwarded through the egress port 112. The lookup operation and discarding of duplicate data frames can be implemented by a duplicate removal circuit 173. The duplicate removal circuit 173 can be implemented in hardware or software or a combination thereof. If the frame specific information header of the received data frame is not listed in the RDT 171, the data frame can be called a non-duplicate data frame, and the edge circuit 115 can add the frame specific information header to the RDT 171. The edge circuit 115 can remove the frame specific information header from the data frame after performing the lookup operation to create an updated data frame. The removal of the frame specific information header can be implemented by a tag removal circuit 174. The tag removal circuit 174 may be implemented in hardware or software or a combination thereof. The updated data frame may be forwarded to the first edge interface circuit 118 via the forwarder circuit 113. The updated data frame may be forwarded to the network component 110 via the first edge interface circuit 118 at the egress port 112.

The edge circuit 115 may receive a data frame at the internal interface circuit 117 via the path 162. The data frame received at the edge circuit 115 may contain identification information. The edge circuit 115 may update portions of the received data frame and forward the updated data frame to the network component 110 via the egress port 112 in the first edge interface circuit 118 using an S&F protocol. The edge circuit 115 may include an error detector circuit 172 for detecting errors in received data frames and discarding data frames having a detected error. The error detector circuit 172 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame can be discarded. The edge circuit 115 can read the portion of the received data frame that includes the frame specific information header. The frame specific information header can be present at a predetermined position in the received data frame. The edge circuit 115 can cooperate with the RDT 171 to perform a search operation to determine whether the frame specific information header matches the frame specific information header of a previous data frame that has been forwarded. If the frame specific information header of the received data frame is listed in the RDT 171, the received data frame can be discarded and not forwarded, because the received data frame has been forwarded through the egress port 112 of the first edge interface circuit 118. The search operation and discarding of duplicate data frames can be implemented by the duplicate removal circuit 173. If the frame specific information header of the received data frame is not listed in the RDT 171, the data frame can be called a non-duplicate data frame, and the edge circuit 115 can add the frame specific information header to the RDT 171. The edge circuit 115 can remove the frame specific information header from the data frame after performing the lookup operation to create an updated data frame. The removal of the frame specific information header can be implemented by the label removal circuit 174. The updated data frame can be forwarded to the first edge interface circuit 118 via the forwarder circuit 113. The updated data frame can be forwarded to the network component 110 at the egress port 112.

The network component 140 can be coupled to an edge circuit 145. The edge circuit 145 can include one or more edge interface circuits 148, 149 for communicating with the network component 140 using a storage and forwarding protocol. The first edge interface circuit 148 can communicate with the network component 140 via an ingress port 141 and an egress port 142. The second edge interface circuit 149 can communicate with the network component 140 via an ingress port 143 and an egress port 144. The edge circuit 145 can include one or more internal interface circuits 146, 147 for communicating with other network components in the internal network segment 150.

The edge circuit 145 can receive a data frame from the network component 140 via the ingress port 141 at the first edge interface circuit 148. The edge circuit 145 can include an error detector circuit 182 for detecting errors in the received data frame. The error detector circuit 182 can perform a CRC check or other error detection check on the received data frame. The data frame received at the edge circuit 145 can contain identification information. The edge circuit 145 can prepend a frame specific information header to the received data frame to create a prepended data frame. The frame specific information header can be generated by an identification circuit 185 of the edge circuit 145. The identification circuit 185 may be implemented in hardware or software or a combination thereof. The identification circuit 185 may be integrated into the first edge interface circuit 148, or may be a separate component. The frame specific information header may include an identification code associated with the received data frame. The frame specific information header may be part of a label that is pre-appended to the received data frame to generate a pre-appended data frame. The label may be pre-appended by the label insertion circuit 186 of the edge circuit 145. The label insertion circuit 186 may be coupled to the identification circuit 185 and may be implemented in hardware or software or a combination thereof. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to the through forwarder circuit 151 of the internal network segment 150 via the forwarder circuit 174, the internal interface circuit 146 and the path 166. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to the edge circuit 135 via the forwarder circuit 174, the internal interface circuit 147 and the path 164.

The edge circuit 145 can receive a data frame from the network component 140 via the ingress port 143 at the second edge interface circuit 149. The edge circuit 145 can include an error detector circuit 182 for detecting errors in the received data frame. The error detector circuit 182 can perform a CRC check or other error detection check on the received data frame. The data frame received at the edge circuit 145 can contain identification information. The edge circuit 145 can prepend a frame specific information header to the received data frame to create a prepended data frame. The frame specific information header can be generated by the identification circuit 185. The identification circuit 175 may be integrated into the second edge interface circuit 149, or may be a separate component. The frame-specific information header may include an identification code associated with the received data frame. The identification code may also be referred to as a frame number. The identification code or frame number may distinguish a first received data frame received from a specific MAC address from a second received data frame received from the same MAC address at an earlier or later point in time. The frame-specific information header may be part of a label pre-appended to the data frame. The label may be inserted by the label insertion circuit 186. The label insertion circuit 186 may be integrated into the second edge interface circuit 149, or may be a separate component. The pre-appended data frame with the pre-appended frame-specific information header may be forwarded to other destinations in the network. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to the edge circuit 135 via the forwarder circuit 174, the internal interface circuit 147, and the path 164. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to the through forwarder circuit 151 of the internal network segment 150 via the forwarder circuit 174, the internal interface circuit 146, and the path 166.

The edge circuit 145 may receive a data frame at the first internal interface circuit 146 via the path 166. The edge circuit 145 may include an error detector circuit 182 for detecting errors in the received data frame and discarding the data frame having a detected error. The error detector circuit 182 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded. The data frame received at the edge circuit 145 may contain identification information. The edge circuit 145 may update a portion of the received data frame and forward the updated data frame to the network component 140 via the egress port 142 using an S&F protocol. The edge circuit 145 may read a portion of the received data frame including a frame specific information header. The edge circuit 145 may cooperate with the RDT 181 in the edge circuit 145 to perform a lookup operation to determine whether the frame specific information header matches the frame specific information header of a previous data frame that has been forwarded. The frame specific information header may be stored in the RDT 181 in the edge circuit 145. The RDT 181 may be a non-transient memory. If the frame specific information header of the received data frame is listed in the RDT 181, the received data frame may be discarded and not forwarded because the received data frame has been forwarded by the egress port 142. The edge circuit 145 may include an error detector circuit 182 for detecting errors in the received data frame and discarding the data frame having a detected error. The duplicate data frame search operation and discarding may be implemented by the duplicate removal circuit 183 in the edge circuit 145. The duplicate removal circuit 183 may be implemented in hardware or software or a combination thereof. The duplicate removal circuit 183 may include a first circuit for detecting duplicate data frames forwarded to the egress port 142 and a second circuit for detecting duplicate data frames forwarded to the egress port 144. If the frame specific information header of the received data frame is not listed in the RDT 181, the data frame may be referred to as a non-duplicate data frame, and the edge circuit 145 may add the frame specific information header to the RDT 181. The edge circuit 145 may remove the frame specific information header from the data frame after performing the lookup operation to create an updated data frame. The removal of the frame specific information header may be implemented by the tag removal circuit 184 in the edge circuit 145. The tag removal circuit 184 may be implemented in hardware or software or a combination thereof. The updated data frame may be forwarded to the first edge interface circuit 148 via the forwarder circuit 174. The updated data frame may be forwarded to the network component 140 via the first edge interface circuit 148 at the egress port 142.

The edge circuit 145 may receive a data frame at the internal interface circuit 147 via the path 164. The edge circuit 145 may include an error detector circuit 182 for detecting errors in the received data frame and discarding the data frame having a detected error. The error detector circuit 182 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded. The data frame received at the edge circuit 145 may contain identification information. The edge circuit 145 may update a portion of the received data frame and forward the updated data frame to the network component 140 via the egress port 144 using an S&F protocol. The edge circuit 145 may read a portion of the received data frame including a frame specific information header. The frame specific information header may be present at a predetermined location in the received data frame. The edge circuit 145 may cooperate with the RDT 181 to perform a lookup operation to determine whether the frame specific information header matches the frame specific information header of a previous data frame that has been forwarded. The frame specific information header may be stored in the RDT 181 in the edge circuit 145. The RDT 181 may be a non-transient memory. For a data frame forwarded to the egress port 144, if the frame specific information header of the received data frame is listed in the RDT 181, the received data frame may be discarded and not forwarded, because the received data frame has been forwarded through the egress port 144. For a data frame forwarded to the egress port 142, if the frame specific information header of the received data frame is listed in the RDT 181, the received data frame may be discarded and not forwarded, because the received data frame has been forwarded through the egress port 142. The search operation and discarding of duplicate data frames may be implemented by the duplicate removal circuit 183. For a data frame forwarded to the egress port 144, if the frame-specific information header of the received data frame is not listed in the RDT 181, the data frame may be referred to as a non-duplicate data frame, and the edge circuit 145 may add the frame-specific information header to the RDT 181. For a data frame forwarded to the egress port 142, if the frame-specific information header of the received data frame is not listed in the RDT 181, the data frame may be referred to as a non-duplicate data frame, and the edge circuit 145 may add the frame-specific information header to the RDT 181. The edge circuit 145 may remove the frame-specific information header from the data frame after performing the lookup operation to create an updated data frame. The removal of the frame-specific information header may be implemented by the tag removal circuit 184 in the edge circuit 145. The updated data frame may be forwarded to the second edge interface circuit 149 via the forwarder circuit 174. The updated data frame may be forwarded to the network component 140 via the second edge interface circuit 149 at the egress port 144.

The network component 130 may be coupled to the edge circuit 135. The edge circuit 135 may include a first edge interface circuit 138 for communicating with the network component 130 using a storage and forwarding protocol. The first edge interface circuit 138 may communicate with the network component 130 via the ingress port 132 and the egress port 131. The edge circuit 135 may include one or more internal interface circuits 136, 137 for communicating with the internal network segment 150.

The edge circuit 135 may receive a data frame at the first edge interface circuit 138 via the ingress port 132. The edge circuit 135 may include an error detector circuit 192 for detecting errors in the received data frame. The error detector circuit 192 may perform a CRC check or other error detection check on the received data frame. The data frame received at the edge circuit 135 may contain identification information. The edge circuit 135 may prepend a frame specific information header to the received data frame to create a prepended data frame. The frame specific information header may be generated by an identification circuit 195. The identification circuit 195 may be implemented in hardware or software or a combination thereof. The frame specific information header may include an identification code associated with the received data frame. This identification code may also be referred to as a frame number. The frame specific information header may be part of a label that is pre-appended to the received data frame to generate a pre-appended data frame. The label may be pre-appended by label insertion circuit 196. Label insertion circuit 196 may be coupled to identification circuit 195 and may be implemented in hardware or software or a combination thereof. Label insertion circuit 196 may be integrated into first edge interface circuit 138 or may be a separate component. The pre-appended data frame with the pre-appended frame specific information header may be forwarded to edge circuit 145 via forwarder circuit 133, internal interface circuit 137 and path 164. The data frame with the pre-appended frame specific information header can be forwarded to the direct forwarder circuit 151 of the internal network segment 150 via the forwarder circuit 133, the internal interface circuit 137 and the path 165. The data frame with the pre-appended frame specific information header can be forwarded to the direct forwarder circuit 152 of the internal network segment 150 via the forwarder circuit 133, the internal interface circuit 136 and the path 163.

The edge circuit 135 may receive a data frame at the first internal interface circuit 136 via path 163. The edge circuit 135 may include an error detector circuit 192 for detecting errors in received data frames and discarding data frames having a detected error. The error detector circuit 192 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded. The data frame received at the edge circuit 135 may contain identification information. The edge circuit 135 may update a portion of the received data frame and forward the updated data frame to the network component 130 via the egress port 131 using an S&F protocol. The edge circuit 135 may read a portion of the received data frame including a frame specific information header. The frame specific information header may be present at a predetermined location in the received data frame. The edge circuit 135 may perform a lookup operation to determine whether the frame specific information header matches the frame specific information header of a previous data frame that has been forwarded. The frame specific information header may be stored in the RDT 191 in the edge circuit 135. The RDT 191 may be a non-transient memory. If the frame specific information header of the received data frame is listed in the RDT 191, the received data frame may be discarded and not forwarded because the received data frame has already been forwarded through the egress port 131. The lookup operation and discarding of duplicate data frames may be implemented by a duplicate removal circuit 193 of the edge circuit 135. The duplicate removal circuit may be implemented in hardware or software or a combination thereof. If the frame specific information header of the received data frame is not listed in the RDT 191, the data frame may be referred to as a non-duplicate data frame, and the edge circuit 135 may add the frame specific information header to the RDT 191. The edge circuit 135 may remove the frame specific information header from the data frame after performing the lookup operation to create an updated data frame. The removal of the frame specific information header may be implemented by a tag removal circuit 194 of the edge circuit 135. The tag removal circuit 194 may be implemented in hardware or software or a combination thereof. The updated data frame may be forwarded to the edge interface circuit 138 via the forwarder circuit 133. The updated data frame may be forwarded to the network component 130 via the edge interface circuit 138 at the egress port 131. The error detector circuit 192 may be included in the duplicate removal circuit 193, or may be a separate circuit.

The edge circuit 135 may receive a data frame at the internal interface circuit 137 via path 164. The edge circuit 135 may receive data at the internal interface circuit 137 via path 165. The edge circuit 135 may include an error detector circuit 192 for detecting errors in received data frames and discarding data frames having a detected error. The error detector circuit 192 may perform a CRC check or other error detection check on the received data frame. If an error is detected, the frame may be discarded. The data frame received at the edge circuit 135 may contain identification information. The edge circuit 135 may update a portion of the received data frame and forward the updated data frame to the network component 130 via the egress port 131 using an S&F protocol. The edge circuit 135 may read a portion of the received data frame including a frame specific information header. The edge circuit 135 may cooperate with the RDT 191 to perform a lookup operation to determine whether the frame specific information header matches the frame specific information header of a previous data frame that has been forwarded. If the frame specific information header of the received data frame is listed in the RDT 191, the received data frame may be discarded and not forwarded because the received data frame has already been forwarded via the egress port 131. If the frame specific information header of the received data frame is not listed in the RDT 191, the data frame can be called a non-duplicate data frame, and the edge circuit 135 can add the frame specific information header to the RDT 191. The edge circuit 135 can remove the frame specific information header from the data frame after performing the lookup operation to create an updated data frame. The removal of the frame specific information header can be implemented by the tag removal circuit 194 in the edge circuit 135. The updated data frame can be forwarded to the edge interface circuit 138 via the forwarder circuit 133. The updated data frame can be forwarded to the network component 130 via the edge interface circuit 138 via the egress port 131.

The embodiment illustrated in FIG. 1 is for illustrative purposes only and is not intended to limit the present invention. The embodiment illustrated in FIG. 1 includes a specific number of network components, edge interface circuits, internal interface circuits, internal network segments, and cut-through forwarder circuits of edge circuits. The specific paths between network components, edge interface circuits, internal interface circuits, cut-through forwarder circuits, and edge circuits illustrated in FIG. 1 are for illustrative purposes only and are not intended to limit the present invention.

Other embodiments not illustrated in FIG1 may include a greater number of network components than the number of network components illustrated in FIG1. Other embodiments not illustrated in FIG1 may include a lesser number of network components than the number of network components illustrated in FIG1.

Other embodiments not illustrated in FIG. 1 may include a greater number of edge circuits than the number of edge circuits illustrated in FIG. 1 Other embodiments not illustrated in FIG. 1 may include a lesser number of edge circuits than the number of edge circuits illustrated in FIG.

Other embodiments not illustrated in FIG. 1 may include a greater number of edge interface circuits than the number of edge interface circuits illustrated in FIG. 1 Other embodiments not illustrated in FIG. 1 may include a lesser number of edge interface circuits than the number of edge interface circuits illustrated in FIG.

Other embodiments not illustrated in FIG. 1 may include a greater number of internal interface circuits than the number of internal interface circuits illustrated in FIG. 1 Other embodiments not illustrated in FIG. 1 may include a lesser number of internal interface circuits than the number of internal interface circuits illustrated in FIG.

Other embodiments not illustrated in FIG1 may include a greater number of network components than the number of network components illustrated in FIG1. Other embodiments not illustrated in FIG1 may include a lesser number of network components than the number of network components illustrated in FIG1.

Other embodiments not illustrated in FIG. 1 may include network components that differ from the specific network components illustrated in FIG. 1 .

FIG2 illustrates one of various embodiments of an edge circuit 200. The edge circuit 200 may represent one of various embodiments of the edge circuit 145 as illustrated in FIG1. In the embodiment of FIG2, the first edge interface circuit 270 and the second edge interface circuit 275 may interface with a network component 201 and the first internal interface circuit 280, and the second internal interface circuit 285 may interface with the internal network segment 202. The internal network segment 202 may be one of various embodiments of the internal network segment 150, as illustrated and described with reference to FIG1.

The edge circuit 200 may include an RDT 290. The RDT 290 may be a non-transitory memory. In one of the various embodiments, the first edge interface circuit 270, the second edge interface circuit 275, the first internal interface circuit 280, and the second internal interface circuit 285 may each include an RDT. In one of the various embodiments, an RDT may be shared by more than one of the first edge interface circuit 270, the second edge interface circuit 275, the first internal interface circuit 280, and the second internal interface circuit 285.

The first edge interface circuit 270 may include an error detector circuit 296. The error detector circuit 296 may generate an output signal based on the detection of an error. The second edge interface circuit 275 may include an error detector circuit 297. The error detector circuit 297 may generate an output signal based on the detection of an error. The first internal interface circuit 280 may include an error detector circuit 298. The error detector circuit 298 may generate an output signal based on the detection of an error. The second internal interface circuit 285 may include an error detector circuit 299. 2 illustrates a single error detector circuit for each of the first edge interface circuit 270, the second edge interface circuit 275, the first internal interface circuit 280, and the second internal interface circuit 285, but this is not intended to be limiting. In one of the various embodiments, a single error detector circuit may be shared by more than one of the first edge interface circuit 270, the second edge interface circuit 275, the first internal interface circuit 280, and the second internal interface circuit 285.

The forwarder circuit 205 may receive data from the first edge interface circuit 270, the second edge interface circuit 275, the first internal interface circuit 280, and the second internal interface circuit 285 and may forward the received data to a proper destination.

The first edge interface circuit 270 can receive a data frame from the repeater circuit 205 via the path 210. The data frame can be received by the error detector circuit 296. The error detector circuit 296 can check for errors in the data frame and can discard frames with detected errors. Checking for errors can be a CRC check or another error checking technique. The error detector circuit 296 can detect errors in the data frame and can provide an error output to the duplicate removal circuit 211. The duplicate removal circuit 211 can remove the data frame with errors based on the error output. The duplicate removal circuit 211 may include a controller circuit for performing a lookup operation to determine whether the frame specific information header of the received data frame matches the frame specific information header of a previous data frame that has been forwarded at the egress port 272. Alternatively, the operation of the duplicate removal circuit 211 may be responsive to the controller 295. If the frame specific information header of the received data is listed in the RDT 290, the received frame is discarded and not forwarded by the duplicate removal circuit 211 because the received frame has already been forwarded through the egress port 272. If the frame specific information header of the received data is not listed in the RDT 290, the data frame may be referred to as a non-duplicate data frame, and the controller circuit 295 may add the frame specific information header to the RDT 290. Tag removal circuit 212 may remove the frame specific information header from the frame and forward the updated frame from first edge interface circuit 270 to network component 201 at egress port 272. Error detector circuit 296 may be included in duplicate removal circuit 211, or may be a separate circuit, as illustrated in FIG.

The first edge interface circuit 270 can receive a data frame from the network component 201 via the ingress port 271. The ingress port 271 can be coupled to the identification circuit 222. The identification circuit 222 can pre-append a frame specific information header to the received data frame. The frame specific information header can include an identification code associated with the received data frame. This identification code can also be referred to as a frame number. The identification code or frame number can distinguish a first received data frame received from a specific MAC address from a second received data frame received from the same MAC address at an earlier or later time point. The identification circuit 222 can be coupled to the tag insertion circuit 221. The tag insertion circuit 221 can combine the frame specific information header with the received data frame to create a pre-appended data frame. The pre-pended data frame may be forwarded via path 220 to forwarder circuit 205 for forwarding to other destinations on the network.

The second edge interface circuit 275 can receive a data frame from the repeater circuit 205 via the path 230. The network component 201 can be connected to the second edge interface circuit 275. The data frame can be received by the error detector circuit 297. The error detector circuit 297 can check for errors in the data frame and can provide an error output to the duplicate removal circuit 231. The error check can be a CRC check or another error checking technique. The duplicate removal circuit 231 can remove the data frame with errors based on the error output. The duplicate removal circuit 231 may include a controller circuit for performing a search to determine whether the frame specific information header of the received data frame matches the frame specific information header of a previous data frame that has been received. Alternatively, the operation of the duplicate removal circuit 231 may be responsive to the controller 295. If the frame specific information header of the received data is listed in the RDT 290, the received frame is discarded and not forwarded by the duplicate removal circuit 231 because the received frame has been forwarded through the egress port 277. If the frame specific information header of the received data is not listed in the RDT 290, the data frame may be referred to as a non-duplicate data frame, and the controller circuit 295 may add the frame specific information header to the RDT 290. The tag removal circuit 232 may remove the frame specific information header from the frame and forward the updated frame from the second edge interface circuit 275 at the egress port 277. The error detector circuit 297 may be included in the duplicate removal circuit 231, or may be a separate circuit, as illustrated in FIG.

The second edge interface circuit 275 can receive a data frame via the ingress port 276. The ingress port 276 can be coupled to the identification circuit 242. The identification circuit 242 can pre-append a frame specific information header to the received frame. The frame specific information header can include an identification code associated with the received data frame. This identification code can also be referred to as a frame number. The identification code or frame number can distinguish a first received data frame received from a specific MAC address from a second received data frame received from the same MAC address at an earlier or later point in time. The identification circuit 242 can be coupled to the tag insertion circuit 241. The tag insertion circuit 241 can pre-append the frame specific information header to the received data to create a pre-appended data frame. The data frame including the prepended frame specific information header may be forwarded via path 240 to forwarder circuit 205 for forwarding to other destinations on the network.

The edge circuit 200 may receive a data frame from the internal network segment 202 at the first internal interface circuit 280 via the first ingress port 282. The received data frame may be forwarded to the forwarder circuit 205 via the first egress port 250.

The first internal interface circuit 280 can forward a data frame through the second egress port 281. The data frame can be received from the forwarder circuit 205 through the second ingress port 255. The data frame can be received by the error detector circuit 298. The error detector circuit 298 can check for errors in the data frame and can provide an error output to the duplicate removal circuit 251. The error check can be a CRC check or another error checking technique. The duplicate removal circuit 251 can remove the data frame with errors based on the error output. The duplicate removal circuit 251 can read the portion of the received data frame that includes the frame specific information header. The duplicate removal circuit 251 may include a controller circuit for performing a lookup operation and determining whether the frame specific information header of the received data frame matches the frame specific information header of a previous data frame that has been received and forwarded via the second egress port 281. Alternatively, the operation of the duplicate removal circuit 251 may be responsive to the controller 295. If the frame specific information header of the received data is listed in the RDT 290, the received frame is discarded and not forwarded because the received frame has already been forwarded via the second egress port 281. If the frame specific information header of the received data is not listed in the RDT 290, the data frame may be referred to as a non-duplicate data frame, and the controller circuit 295 may add the information to the RDT 290. The first internal interface circuit 280 may forward the frame via the second egress port 281. The error detector circuit 298 may be included in the duplicate removal circuit 251, or may be a separate circuit, as illustrated in FIG. 2 .

The edge circuit 200 may receive a data frame from the internal network segment 202 via the first ingress port 287 at the second internal interface circuit 285. The received data may be forwarded to the forwarder circuit 205 via the first egress port 260.

The second internal interface circuit 285 can forward a data frame through the second egress port 286. Data can be received from the forwarder circuit 205 through the second ingress port 265. The data frame can be received by the error detector circuit 299. The error detector circuit 299 can check for errors in the data frame and can provide an error output to the duplicate removal circuit 261. The error check can be a CRC check or another error checking technique. The duplicate removal circuit 261 can remove the data frame with errors based on the error output. The duplicate removal circuit 261 can read the portion of the received data frame that includes the frame specific information header. The duplicate removal circuit 261 may include a controller circuit for performing a lookup to determine whether the frame specific information header matches the frame specific information of a previous data frame that has been forwarded via the second egress port 286. Alternatively, the operation of the duplicate removal circuit 231 may be responsive to the controller 295. If the frame specific information header of the received data is listed in the RDT 290, the received frame is discarded and not forwarded because the received frame has been forwarded via the second egress port 286. If the frame specific information header of the received data is not listed in the RDT 290, the data frame may be referred to as a non-duplicate data frame, and the controller circuit 295 may add the frame specific information header to the RDT 290. The second egress port 286 may forward the data to the internal network segment 202. The error detector circuit 299 may be included in the repeat removal circuit 261, or may be a separate circuit, as illustrated in FIG. 2 .

Figure 3 illustrates a method for network traffic control. A device as previously illustrated and described with reference to Figure 2 may perform the illustrated method.

At operation 305, an edge interface circuit may receive a data frame from a network component.

At operation 310, the edge interface circuitry may generate frame identification information associated with the data frame. The frame specific information header may include an identification code for the received data frame. This identification code may also be referred to as a frame number. The identification code or frame number may distinguish a first received data frame received from a specific MAC address from a second received data frame received from the same MAC address at an earlier or later point in time.

At operation 315, the frame specific information header may be prepended to the received data frame as a tag to generate a prepended data frame.

At operation 320, the prepended data frame may be forwarded to a forwarder circuit.

At operation 325, a data frame may be received at an edge interface circuit from a repeater circuit. The data frame received at the edge interface circuit may be a pre-pended data frame as described with reference to operations 305 to 320 (including operations 305 and 320). An error detection operation may be performed on the received data frame, and data frames with detected errors may be removed.

At operation 330, duplicate data frames received at the edge interface circuitry may be selectively removed. A frame specific information header may be read from a portion of the received data frame. The frame specific information header may be present at a predetermined location in the received data frame. A search operation may determine whether the frame specific information header in the received data frame matches the frame specific information header of a previous data frame that has been forwarded. The frame specific information header may be stored in an RDT. If the frame specific information header of the received data frame is listed in the RDT, the received data frame may be discarded and not forwarded because the received data has already been forwarded.

At operation 335, if the received data frame is not a duplicate, the frame specific information header may be removed from the received data frame to create an updated data frame.

At operation 340, the updated data frame may be forwarded to a network component via an egress port.

At operation 345, a data frame may be received from a network component at an internal interface circuit. At operation 350, the received data frame may be forwarded to a forwarder circuit.

At operation 355, a data frame may be received from a forwarder circuit at an internal interface circuit. The data frame received at the internal interface circuit may be a pre-pended data frame as described with reference to operations 305 to 320 (including operations 305 and 320). An error detection operation may be performed on the received data frame, and the data frame with the detected error may be removed. At operation 360, if the received data frame is a duplicate data frame, the received data frame may be selectively removed. A frame specific information header may be read from a portion of the received data frame. The frame specific information header may be present at a predetermined position in the received data frame. A search operation may determine whether the frame specific information header in the received data frame matches the frame specific information header of a previous data frame that has been forwarded. The frame specific information header may be stored in an RDT. If the frame specific information header of a received data frame is listed in the RDT, the received data frame may be discarded and not forwarded, since the received data has already been forwarded.

At operation 365, non-duplicate received data frames may be forwarded to a network component.

100: computer network 110: network component 111: entry port 112: exit port 113: forwarder circuit 115: edge circuit 116: internal interface circuit 117: internal interface circuit 118: first edge interface circuit 130: network component 131: exit port 132: entry port 133: forwarder circuit 135: edge circuit 136: internal interface circuit, first internal interface circuit 137: internal interface circuit 138: first edge interface circuit, edge interface circuit 140: network component 141: entry port 142: exit port 143: entry port 144: exit port 145: edge circuit 146: internal interface circuit, first internal interface circuit 147: internal interface circuit 148: edge interface circuit, first edge interface circuit 149: edge interface circuit, second edge interface circuit 150: internal network segment 151: straight-through forwarder circuit, forwarder circuit 152: straight-through forwarder circuit, forwarder circuit 161: path 162: path 163: path 164: path 165: path 166: path 171: duplicate removal table 172: error detector circuit 173: duplicate removal circuit 174: Label removal circuit, forwarder circuit 175: Identification circuit 176: Label insertion circuit 181: Duplicate table removal 182: Error detector circuit 183: Duplicate removal circuit 184: Label removal circuit 185: Identification circuit 186: Label insertion circuit 191: Duplicate table removal 192: Error detector circuit 193: Duplicate removal circuit 194: Label removal circuit 195: Identification circuit 196: Label insertion circuit 200: Edge circuit 201: Network component 202: Internal network segment 205: Forwarder circuit 210: Path 211: Repeat removal circuit 212: Label removal circuit 220: Path 221: Label insertion circuit 222: Identification circuit 230: Path 231: Repeat removal circuit 232: Label removal circuit 240: Path 241: Label insertion circuit 242: Identification circuit 250: First exit port 251: Repeat removal circuit 255: Second entry port 260: First exit port 261: Repeat removal circuit 265: Second entry port 270: First edge interface circuit 271: Entry port 272: Exit port 275: Second edge interface circuit 276: Entry port 277: Exit port 280: First internal interface circuit 281: Second exit port 282: First entry port 285: Second internal interface circuit 286: Second exit port 287: First entry port 290: Remove duplicate table 295: Controller, controller circuit 296: Error detector circuit 297: Error detector circuit 298: Error detector circuit 299: Error detector circuit

The figures illustrate embodiments of a system for network traffic control. FIG. 1 illustrates one of various embodiments of a computer network. FIG. 2 illustrates one of various embodiments of an edge circuit. FIG. 3 illustrates a method for network traffic control.

100: Computer network

110: Network components

111: Entry port

112: Export port

113: Transmitter circuit

115:Edge circuit

116: Internal interface circuit

117: Internal interface circuit

118: First edge interface circuit

130: Network components

131: Export port

132: Entry port

133: Transmitter circuit

135:Edge Circuit

136: internal interface circuit, first internal interface circuit

137: Internal interface circuit

138: First edge interface circuit, edge interface circuit

140: Network components

141: Entry port

142: Export port

143: Entry port

144: Export port

145:Edge Circuit

146: internal interface circuit, first internal interface circuit

147: Internal interface circuit

148: Edge interface circuit, first edge interface circuit

149: Edge interface circuit, second edge interface circuit

150: Intranet segment

151: Direct forwarder circuit, forwarder circuit

152: Direct forwarder circuit, forwarder circuit

161: Path

162: Path

163: Path

164: Path

165: Path

166: Path

171: Remove duplicate tables

172: Error detector circuit

173: Repeatedly remove circuit

174: Label removal circuit, forwarder circuit

175: Identification circuit

176: Label insertion circuit

181: Remove duplicate tables

182: Error detector circuit

183: Repeatedly remove circuit

184: Label removal circuit

185: Identification circuit

186: Label insertion circuit

191: Remove duplicate tables

192: Error detector circuit

193: Repeatedly remove circuit

194: Label removal circuit

195: Identification circuit

196: Label insertion circuit

Claims (18)

A device, comprising: an edge interface circuit, which is used to couple to a network component and to a forwarder circuit, the edge interface circuit is used to: receive data frames from the network component, pre-attach a frame-specific information header to the received data frames and forward the pre-attached data frames to the forwarder circuit; receive data frames from the forwarder circuit, remove duplicate data frames and forward non-duplicate data frames to the network component; an internal interface circuit, which is used to couple to an internal network segment and to the forwarder circuit, the internal interface circuit is used to: receive data frames from the internal network segment and forward the received data frames to the forwarder circuit, and Receives data frames from the forwarder circuit, removes duplicate frames and forwards non-duplicate frames to the internal network segment. As in the device of claim 1, the edge interface circuit includes: an ingress port, which is used to couple to the network component, the ingress port is used to receive data frames; an identification circuit, which is used to couple to the first ingress port, the identification circuit is used to generate a frame-specific information header based on at least the received data frames, and a label insertion circuit, which is used to couple to the identification circuit, the label insertion circuit is used to pre-append the frame-specific information header to the received data frames to generate pre-appended data frames, and the label insertion circuit is used to forward the pre-appended data frames to the forwarder circuit. As in the device of claim 2, the edge interface circuit includes: an error detector circuit for receiving data frames from the forwarder circuit; a duplicate removal circuit for removing duplicate data frames based at least on the contents of a non-transient memory and the frame-specific information header; a tag removal circuit for coupling to the duplicate removal circuit, the tag removal circuit for removing the frame-specific information header in the received data frame to generate an updated data frame, and an egress port for coupling to the tag removal circuit, the egress port for forwarding the updated data frames to the network component. As in claim 3, the duplicate removal circuit includes a controller circuit for searching the contents of the non-transitory memory for a portion of a received data frame that is present in the contents of the non-transitory memory. As in the device of claim 3, the duplicate removal circuit is used to remove received data frames based on an output of the error detector circuit. As in the device of claim 1, the internal interface circuit includes: a first ingress port, which is used to couple to an internal network segment and to couple to the forwarder circuit, the first ingress port is used to receive a data frame from the internal network segment and forward the received data frame to the forwarder circuit through a first egress port; a second ingress port, which is used to couple to the forwarder circuit, the second ingress port is used to receive a data frame from the forwarder circuit; an error detector circuit, which is used to couple to the second ingress port; a duplicate removal circuit, which is used to couple to the error detector circuit, the duplicate removal circuit is used to remove duplicate received data frames based at least on the contents of a non-transient memory and the frame-specific information header, and A second egress port for forwarding non-duplicate frames to the internal network segment. As in claim 6, the duplicate removal circuit includes a controller circuit for searching the contents of the non-transitory memory for a portion of the received data frame. As in the device of claim 6, the duplicate removal circuit is used to remove received data frames based on an output of the error detector circuit. A system, comprising: A network, comprising: A plurality of network connection devices, comprising: An edge interface circuit, which is used to couple to a network component and to a forwarder circuit, the edge interface circuit is used to: Receive data frames from the network component, pre-attach a frame-specific information header to the received data frames and forward the pre-attached data frames to the forwarder circuit; Receive data frames from the forwarder circuit, remove duplicate data frames and forward non-duplicate data frames to the network component; An internal interface circuit, which is used to couple to an internal network segment and to the forwarder circuit, the internal interface circuit is used to: Receive data frames from the internal network segment and forward the received data frames to the forwarder circuit, and Receives data frames from the forwarder circuit, removes duplicate frames and forwards non-duplicate frames to the internal network segment. In the system of claim 9, the edge interface circuit includes: an ingress port for coupling to the network component, the ingress port for receiving data frames; an identification circuit for coupling to the first ingress port, the identification circuit for generating a frame-specific information header based at least on the received data frames, and a tag insertion circuit for coupling to the identification circuit, the tag insertion circuit for pre-appending the frame-specific information header to the received data frames to generate pre-appended data frames, and the tag insertion circuit for forwarding the pre-appended data frames to the forwarder circuit. In the system of claim 10, the edge interface circuit includes: an error detector circuit for receiving a data frame from the forwarder circuit; a duplicate removal circuit for receiving a data frame from the error detector circuit, the duplicate removal circuit for removing duplicate data frames based at least on the contents of a non-transient memory and the frame-specific information header; a tag removal circuit for coupling to the duplicate removal circuit, the tag removal circuit for removing the frame-specific information header in the received data frame to generate an updated data frame, and an egress port for coupling to the tag removal circuit, the egress port for forwarding the updated data frames to the network component. A system as in claim 11, wherein the duplicate removal circuit includes a controller circuit for searching the contents of the non-transitory memory for the frame specific information header within the contents of the non-transitory memory. As in the system of claim 11, the duplicate removal circuit is used to remove received data frames based on an output of the error detector circuit. In the system of claim 11, the internal interface circuit includes: a first ingress port, which is used to couple to an internal network segment and to couple to the forwarder circuit, the first ingress port is used to receive data frames from the internal network segment and forward the received data frames to the forwarder circuit through a first egress port; a second ingress port, which is used to couple to the forwarder circuit, the second ingress port is used to receive data frames from the forwarder circuit; an error detector circuit, which is used to couple to the second ingress port; a duplicate removal circuit, which is used to couple to the error detector circuit, the duplicate removal circuit is used to remove duplicate received data frames based at least on the contents of a non-transient memory and the frame-specific information header, and A second egress port for forwarding non-duplicate data frames to the internal network segment. A system as claimed in claim 14, wherein the duplicate removal circuit includes a controller circuit for searching the contents of the non-transitory memory for the presence of the frame specific information header in the contents of the non-transitory memory. As in the system of claim 14, the duplicate removal circuit is used to remove received data frames based on an output of the error detector circuit. A method, comprising: receiving a data frame from a network component at an edge interface circuit; generating a frame specific information header based on the received data frame; prepending the frame specific information header as a tag to the received data frame to generate a prepended data frame; forwarding the prepended data frame to a forwarder circuit; receiving a data frame from the forwarder circuit at an edge interface circuit and discarding a data frame with a detected error; identifying duplicate received data frames based on the contents of a non-transient memory and the frame specific information header; removing duplicate received data frames; removing the frame specific information header from the non-duplicate received data frame to create an updated data frame; forwarding the updated data frame to a network destination via an egress port; receiving a data frame from an internal network segment at an internal interface circuit; forwarding the received data frame to the forwarder circuit; receiving a data frame from the forwarder circuit at an internal interface circuit; identifying duplicate received data frames based on the contents of a non-transient memory and the frame specific information header; removing duplicate received data frames, and forwarding non-duplicate data frames to a network component. A method as in claim 17, wherein removing duplicate received data frames includes a controller circuit for searching the contents of the non-transitory memory for the frame specific information header within the contents of the non-transitory memory.