TW202414538A - Method for manufacturing semiconductor wafer and semiconductor wafer - Google Patents
Method for manufacturing semiconductor wafer and semiconductor wafer Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 106
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 42
- 238000000034 method Methods 0.000 title claims abstract description 34
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 158
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 158
- 239000010703 silicon Substances 0.000 claims abstract description 158
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 82
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 238000000137 annealing Methods 0.000 claims abstract description 9
- 238000001556 precipitation Methods 0.000 claims abstract description 7
- 125000004429 atom Chemical group 0.000 claims description 48
- 150000001721 carbon Chemical group 0.000 claims description 36
- 230000007547 defect Effects 0.000 abstract description 7
- 235000012431 wafers Nutrition 0.000 description 107
- 239000010410 layer Substances 0.000 description 64
- 230000000052 comparative effect Effects 0.000 description 19
- 239000007789 gas Substances 0.000 description 15
- 238000005229 chemical vapour deposition Methods 0.000 description 14
- 230000015572 biosynthetic process Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 6
- 238000002356 laser light scattering Methods 0.000 description 5
- 239000002994 raw material Substances 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 3
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000005247 gettering Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 239000002244 precipitate Substances 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- UIUXUFNYAYAMOE-UHFFFAOYSA-N methylsilane Chemical compound [SiH3]C UIUXUFNYAYAMOE-UHFFFAOYSA-N 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2015—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline semiconductor material, e.g. lattice adaptation, heteroepitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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Abstract
Description
本發明關於一種包含矽層的半導體晶圓的製造方法,其中該矽層含有碳。The present invention relates to a method for manufacturing a semiconductor wafer including a silicon layer, wherein the silicon layer contains carbon.
在摻雜有碳(C)的矽(Si)中,確認到有著金屬吸除(gettering)能力或氧捕捉效果等在非摻雜的Si中無法看到的特性。雖然根據上述特性能夠期待各種對於元件的應用,但存在有高濃度的摻雜有C的Si會因熱處理而使SiC析出至表層的問題。當應用於元件時,存在許多要求對於熱的穩定性的情況,如為了退火或與Si層的積層化而需要進行高溫中的成膜等,因此摻雜有C的Si的熱不穩定性是個問題。Silicon (Si) doped with carbon (C) has been found to have properties that are not seen in non-doped Si, such as metal gettering ability and oxygen capture effect. Although various applications to devices can be expected based on the above properties, there is a problem that SiC will precipitate to the surface layer due to heat treatment when Si doped with high concentration of C. When applied to devices, there are many situations where thermal stability is required, such as the need for film formation at high temperatures for annealing or lamination with Si layers, so the thermal instability of Si doped with C is a problem.
在先前的含有碳的矽層的成膜中提案有一種磊晶膜堆疊形成方法(專利文獻1),其在將磊晶層堆疊形成於基板上的情況中,在700℃以下形成包含目標碳濃度為200ppm~5%的原子的碳之層,然後在700℃以下形成不含碳之頂蓋層,並藉由蝕刻氣體來加以蝕刻。然而,會因為需要有蝕刻這樣的追加步驟而使步驟數增加,造成成本上升,且未討論缺陷等對膜質的影響。In the previous film formation of a silicon layer containing carbon, a method for forming an epitaxial film stack has been proposed (Patent Document 1), in which, when forming an epitaxial layer stack on a substrate, a carbon layer containing a target carbon concentration of 200ppm to 5% of atoms is formed at a temperature below 700°C, and then a cap layer not containing carbon is formed at a temperature below 700°C and etched using an etching gas. However, the need for an additional step such as etching increases the number of steps, resulting in an increase in cost, and the influence of defects on film quality is not discussed.
[先前技術文獻] (專利文獻) 專利文獻1:日本專利第5090451號公報 [Prior technical literature] (Patent literature) Patent literature 1: Japanese Patent No. 5090451
(發明所欲解決的問題) 本發明是鑑於上述事態而完成,目的是要提供一種用於製造包含矽層的半導體晶圓的方法,其中該矽層含有碳,在晶圓表面未析出SiC,且其他的缺陷也受到抑制。 (Problem to be solved by the invention) The present invention was made in view of the above situation, and its purpose is to provide a method for manufacturing a semiconductor wafer including a silicon layer, wherein the silicon layer contains carbon, SiC is not precipitated on the wafer surface, and other defects are also suppressed.
(用於解決問題的手段) 為了解決上述問題,本發明中提供一種半導體製造方法,具有以下步驟:(1) 在矽基板上,以第一溫度形成摻雜有碳的矽膜;(2) 在前述摻雜有碳的矽膜上,以前述第一溫度形成未摻雜碳的矽膜,藉此得到積層晶圓;及(3) 以比前述第一溫度更高的第二溫度對前述積層晶圓進行退火,或是在前述積層晶圓上以前述第二溫度更進行成膜,藉此得到半導體晶圓。 (Means for solving the problem) In order to solve the above problem, the present invention provides a semiconductor manufacturing method, which has the following steps: (1) forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) forming a non-carbon-doped silicon film on the carbon-doped silicon film at the first temperature, thereby obtaining a laminated wafer; and (3) annealing the laminated wafer at a second temperature higher than the first temperature, or further forming a film on the laminated wafer at the second temperature, thereby obtaining a semiconductor wafer.
若如此作,藉由以第一溫度形成未摻雜碳的矽膜,能夠製造出包含矽層的半導體晶圓,其中該矽層含有碳,在表面未析出SiC,且其他的缺陷也受到抑制。By doing so, a semiconductor wafer including a silicon layer containing carbon, without SiC being precipitated on the surface, and with other defects suppressed can be manufactured by forming a silicon film not doped with carbon at a first temperature.
又,較佳為將前述第一溫度設為400℃~1000℃。Furthermore, it is preferred that the first temperature be set to 400°C to 1000°C.
此時,更佳為將前述第一溫度設為600℃~800℃。At this time, it is more preferable to set the first temperature to 600°C to 800°C.
以這樣的溫度形成摻雜有碳的矽膜與未摻雜碳的矽膜是較佳的。It is preferable to form a carbon-doped silicon film and a carbon-undoped silicon film at such a temperature.
又,較佳為將前述未摻雜碳的矽膜的膜厚作成5nm~200nm。Furthermore, it is preferred that the thickness of the silicon film not doped with carbon be 5 nm to 200 nm.
此時,更佳為將前述未摻雜碳的矽膜的膜厚作成5nm~50nm。In this case, it is more preferable that the thickness of the silicon film not doped with carbon is set to 5 nm to 50 nm.
若將未摻雜碳的矽膜的膜厚作成這樣的厚度,能夠更確實發揮本發明的功效。If the thickness of the silicon film not doped with carbon is made to be this thickness, the effect of the present invention can be more reliably exerted.
又,較佳為將前述摻雜有碳的矽膜的碳原子濃度作成1.0E+17atoms/cm 3以上且4.5E+22atoms/cm 3以下。 Furthermore, it is preferred that the carbon atom concentration of the carbon-doped silicon film be greater than or equal to 1.0E+17 atoms/cm 3 and less than or equal to 4.5E+22 atoms/cm 3 .
此時,更佳為將前述摻雜有碳的矽膜的碳原子濃度作成1.0E+18atoms/cm 3以上且2.0E+22atoms /cm 3以下。 At this time, it is more preferable to make the carbon atom concentration of the carbon-doped silicon film not less than 1.0E+18 atoms/cm 3 and not more than 2.0E+22 atoms/cm 3 .
此時,又更佳為將前述摻雜有碳的矽膜的碳原子濃度作成1.0E+19atoms/cm 3以上且5.0E+21atoms /cm 3以下。 At this time, it is more preferable to make the carbon atom concentration of the carbon-doped silicon film not less than 1.0E+19 atoms/cm 3 and not more than 5.0E+21 atoms/cm 3 .
將摻雜有碳的矽膜的碳原子濃度作在這樣的範圍中,就實用面而言是較佳的。It is preferable from a practical point of view that the carbon atom concentration of the carbon-doped silicon film is within such a range.
又,本發明中提供一種半導體晶圓,其特徵在於:前述半導體晶圓至少具有:矽基板,其具有上表面與下表面;摻雜有碳的矽膜,其形成於該矽基板的上表面;及,未摻雜碳的矽膜,其形成於該摻雜有碳的矽膜上;並且,前述半導體晶圓,在與前述矽基板的下表面相反的一側的表面沒有SiC析出。Furthermore, the present invention provides a semiconductor wafer, which is characterized in that: the semiconductor wafer at least has: a silicon substrate having an upper surface and a lower surface; a carbon-doped silicon film formed on the upper surface of the silicon substrate; and a silicon film not doped with carbon formed on the carbon-doped silicon film; and, the semiconductor wafer has no SiC precipitation on the surface on the side opposite to the lower surface of the silicon substrate.
藉由本發明的半導體晶圓的製造方法,能夠製造出一種半導體晶圓,其包含不受到這樣的熱所造成的劣化且含有碳之矽層,且該晶圓的表面的未摻雜碳的矽膜的膜質亦良好。The semiconductor wafer manufacturing method of the present invention can manufacture a semiconductor wafer including a silicon layer containing carbon that is not degraded by such heat, and the film quality of the silicon film not doped with carbon on the surface of the wafer is also good.
又,較佳為前述未摻雜碳的矽膜的膜厚是5nm~200nm。Furthermore, it is preferred that the thickness of the carbon-undoped silicon film is 5 nm to 200 nm.
此時,更佳為前述未摻雜碳的矽膜的膜厚是5nm~50nm。In this case, it is more preferred that the thickness of the carbon-undoped silicon film is 5 nm to 50 nm.
若未摻雜碳的矽膜的膜厚是這樣的厚度,能夠更確實發揮本發明的功效。If the thickness of the silicon film not doped with carbon is of such a thickness, the effect of the present invention can be more reliably exerted.
又,較佳為前述摻雜有碳的矽膜的碳原子濃度是1.0E+17atoms/cm 3以上且4.5E+22atoms/cm 3以下。 Furthermore, it is preferred that the carbon atom concentration of the carbon-doped silicon film is greater than or equal to 1.0E+17 atoms/cm 3 and less than or equal to 4.5E+22 atoms/cm 3 .
此時,更佳為前述摻雜有碳的矽膜的碳原子濃度是1.0E+18atoms/cm 3以上且2.0E+22atoms/cm 3以下。 At this time, it is more preferred that the carbon atom concentration of the carbon-doped silicon film is greater than or equal to 1.0E+18 atoms/cm 3 and less than or equal to 2.0E+22 atoms/cm 3 .
此時,又更佳為前述摻雜有碳的矽膜的碳原子濃度是1.0E+19atoms/cm 3以上且5.0E+21atoms/cm 3以下。 In this case, it is more preferred that the carbon atom concentration of the carbon-doped silicon film is greater than or equal to 1.0E+19 atoms/cm 3 and less than or equal to 5.0E+21 atoms/cm 3 .
若摻雜有碳的矽膜的碳原子濃度在這樣的範圍中,就實用面而言是較佳的。If the carbon atom concentration of the carbon-doped silicon film is within this range, it is preferable from a practical point of view.
(發明的功效) 根據本發明,在形成摻雜有碳的矽膜後,以相同溫度在前述摻雜有碳的矽膜上形成未摻雜碳的矽膜,藉此可製造出一種半導體晶圓,其不受到後續高溫熱處理所造成之摻雜有碳的矽膜因熱而產生的劣化,而包含良質的摻雜有碳之矽層,且該晶圓的表面的未摻雜碳的矽膜的膜質亦良好。 (Effect of the invention) According to the present invention, after forming a carbon-doped silicon film, a non-carbon-doped silicon film is formed on the aforementioned carbon-doped silicon film at the same temperature, thereby manufacturing a semiconductor wafer which is not subjected to thermal degradation of the carbon-doped silicon film caused by subsequent high-temperature heat treatment, but contains a good-quality carbon-doped silicon layer, and the film quality of the non-carbon-doped silicon film on the surface of the wafer is also good.
如上述,要求開發一種方法,用於一邊防止因熱造成的劣化一邊製造包含矽層的半導體晶圓,其中該矽層含有碳。As described above, there is a demand for developing a method for manufacturing a semiconductor wafer including a silicon layer containing carbon while preventing degradation due to heat.
本發明者們針對上述問題反覆深入研究的結果,發現到在具有吸除效果的磊晶晶圓中,針對以使碳濃度成為1.0E+17atoms/cm 3以上且4.5E+22atoms/cm 3以下的方式來加以摻雜後的矽磊晶層,與未摻雜上述碳的矽磊晶層,皆以700℃、壓力1~80Torr的條件加以形成後,以1080℃形成要成為元件活性層的矽磊晶層,藉此能夠減低磊晶層表面的因摻雜有碳的磊晶層所造成的缺陷,而完成了本發明。 As a result of repeated and in-depth studies on the above-mentioned problems, the inventors of the present invention have discovered that, in an epitaxial wafer having a gettering effect, a silicon epitaxial layer doped with carbon to a carbon concentration of 1.0E+17atoms/cm 3 or more and 4.5E+22atoms/cm 3 or less and a silicon epitaxial layer not doped with the above-mentioned carbon are both formed at 700°C and a pressure of 1 to 80 Torr, and then the silicon epitaxial layer to be the active layer of the device is formed at 1080°C. This makes it possible to reduce defects on the surface of the epitaxial layer caused by the epitaxial layer doped with carbon, thereby completing the present invention.
亦即,本發明是一種半導體晶圓的製造方法,具有以下步驟:(1) 在矽基板上,以第一溫度形成摻雜有碳的矽膜;(2) 在前述摻雜有碳的矽膜上,以前述第一溫度形成未摻雜碳的矽膜,藉此得到積層晶圓;及(3) 以比前述第一溫度更高的第二溫度對前述積層晶圓進行退火,或是在前述積層晶圓上以前述第二溫度更進行成膜,藉此得到半導體晶圓。That is, the present invention is a method for manufacturing a semiconductor wafer, comprising the following steps: (1) forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) forming a non-carbon-doped silicon film on the carbon-doped silicon film at the first temperature, thereby obtaining a laminated wafer; and (3) annealing the laminated wafer at a second temperature higher than the first temperature, or further forming a film on the laminated wafer at the second temperature, thereby obtaining a semiconductor wafer.
以下,針對本發明詳細加以說明,但本發明不限定於該等實施型態。The present invention is described in detail below, but the present invention is not limited to these embodiments.
[半導體晶圓的製造方法] 本發明的半導體晶圓的製造方法包含第一態樣與第二態樣,第一態樣藉由步驟(1)與步驟(2),以第一溫度在矽基板上形成摻雜有碳的矽膜與形成在其上的未摻雜碳的矽膜,而得到積層晶圓後,藉由步驟(3)以比第一溫度更高的第二溫度在積層晶圓上更進行成膜,第二態樣與第一態樣同樣進行步驟(1)與步驟(2)而得到積層晶圓後,藉由步驟(3)以比第一溫度更高的第二溫度進行積層晶圓的退火。以下,參照圖式對各態樣詳細加以說明。 [Method for manufacturing semiconductor wafer] The method for manufacturing semiconductor wafer of the present invention includes a first embodiment and a second embodiment. In the first embodiment, a carbon-doped silicon film and a carbon-undoped silicon film formed on a silicon substrate at a first temperature are formed on the silicon substrate by steps (1) and (2) to obtain a laminated wafer, and then a film is formed on the laminated wafer at a second temperature higher than the first temperature by step (3). In the second embodiment, steps (1) and (2) are performed in the same manner as the first embodiment to obtain a laminated wafer, and then the laminated wafer is annealed by step (3) at a second temperature higher than the first temperature. Each embodiment is described in detail below with reference to the drawings.
[第一態樣] 第1圖表示一流程圖,該流程圖表示本發明的半導體晶圓的製造方法的第一態樣的一例。在第一態樣中,藉由進行下述的步驟(1)~(3)來得到半導體晶圓。以下,沿著第1圖說明第一態樣。 [First Aspect] FIG. 1 shows a flow chart showing an example of the first aspect of the method for manufacturing a semiconductor wafer of the present invention. In the first aspect, a semiconductor wafer is obtained by performing the following steps (1) to (3). The first aspect is described below along FIG. 1.
<步驟(1)> 如第1圖所示,步驟(1)是在矽基板1上以第一溫度形成摻雜有碳的矽膜2的步驟。 <Step (1)> As shown in FIG. 1, step (1) is a step of forming a carbon-doped silicon film 2 on a silicon substrate 1 at a first temperature.
作為矽基板1並未特別限定,較佳為單晶矽基板。作為單晶矽基板亦未特別限定,可為CZ基板亦可為FZ基板。又,可為非摻雜,亦可已摻雜。在已摻雜的情況下,可為n型亦可為p型。在n型的情況下,例如能夠摻雜P、Sb或As。在p型的情況下,例如能夠摻雜B、Al或Ga。此外,基板的方位、直徑、電阻率等亦未特別限定。The silicon substrate 1 is not particularly limited, and preferably a single crystal silicon substrate. The single crystal silicon substrate is also not particularly limited, and may be a CZ substrate or a FZ substrate. Furthermore, it may be non-doped or doped. In the case of doping, it may be n-type or p-type. In the case of n-type, for example, P, Sb or As may be doped. In the case of p-type, for example, B, Al or Ga may be doped. In addition, the orientation, diameter, resistivity, etc. of the substrate are not particularly limited.
在這樣的矽基板1上,例如藉由CVD(化學氣相成長),更佳為藉由RP-CVD(減壓CVD),以第一溫度形成摻雜有碳的矽膜(矽磊晶層)2。此時使用的原料氣體,例如能夠使用單甲基矽烷或三甲基矽烷來作為碳源,且使用二氯矽烷或單矽烷來作為矽源。然而,原料氣體不限於該氣體。此時的成膜溫度為「第一溫度」,例如能夠設為400~1000℃,且較佳為600~800℃,但不限定於該溫度。摻雜於矽層的碳原子濃度,能夠根據原料氣體的流量或成膜溫度而調整。又,CVD時的壓力能夠設為1~80Torr(133~10640Pa)。On such a silicon substrate 1, a silicon film (silicon epitaxial layer) 2 doped with carbon is formed at a first temperature, for example, by CVD (chemical vapor deposition), preferably by RP-CVD (reduced pressure CVD). The raw gas used at this time can be, for example, monomethylsilane or trimethylsilane as a carbon source, and dichlorosilane or monosilane as a silicon source. However, the raw gas is not limited to this gas. The film formation temperature at this time is the "first temperature", for example, it can be set to 400 to 1000°C, and preferably 600 to 800°C, but is not limited to this temperature. The concentration of carbon atoms doped in the silicon layer can be adjusted according to the flow rate of the raw gas or the film formation temperature. Furthermore, the pressure during CVD can be set to 1 to 80 Torr (133 to 10640 Pa).
摻雜有碳的矽膜2的碳原子濃度,較佳為1.0E+17atoms/cm 3以上且4.5E+22atoms/cm 3以下,更佳為1.0E+18atoms/cm 3以上且2.0E+22atoms/cm 3以下,又更佳為1.0E+19atoms/cm 3以上且5.0E+21atoms/cm 3以下。此外,碳原子濃度能夠藉由SIMS(Secondary Ion Mass Spectroscopy,二次離子質譜儀)來加以確認。 The carbon atom concentration of the carbon-doped silicon film 2 is preferably 1.0E+17atoms/cm 3 or more and 4.5E+22atoms/cm 3 or less, more preferably 1.0E+18atoms/cm 3 or more and 2.0E+22atoms/cm 3 or less, and even more preferably 1.0E+19atoms/cm 3 or more and 5.0E+21atoms/cm 3 or less. In addition, the carbon atom concentration can be confirmed by SIMS (Secondary Ion Mass Spectroscopy).
摻雜有碳的矽膜2的膜厚並未特別加以限定,例如能夠作成10~1000nm,較佳為20~500nm,更佳為30~200nm。The film thickness of the carbon-doped silicon film 2 is not particularly limited, and can be, for example, 10 to 1000 nm, preferably 20 to 500 nm, and more preferably 30 to 200 nm.
<步驟(2)> 如第1圖所示,步驟(2)是在摻雜有碳的矽膜2上,以第一溫度形成未摻雜碳的矽膜3而藉此得到積層晶圓10的步驟。 <Step (2)> As shown in FIG. 1, step (2) is a step of forming a non-carbon-doped silicon film 3 on a carbon-doped silicon film 2 at a first temperature to obtain a laminated wafer 10.
未摻雜碳的矽膜(矽磊晶層)3,亦能夠例如藉由CVD且較佳為RP-CVD(減壓CVD)來加以形成。此時使用的原料氣體,例如使用二氯矽烷或單矽烷。然而,原料氣體不限於該氣體。又,CVD時的壓力能夠設為1~80Torr。其中,未摻雜碳的矽膜3,是以與上述摻雜有碳的矽膜2的成膜溫度相同的溫度(亦即第一溫度)來加以形成。The silicon film (silicon epitaxial layer) 3 not doped with carbon can also be formed, for example, by CVD, preferably RP-CVD (reduced pressure CVD). The raw material gas used at this time is, for example, dichlorosilane or monosilane. However, the raw material gas is not limited to this gas. In addition, the pressure during CVD can be set to 1 to 80 Torr. Among them, the silicon film 3 not doped with carbon is formed at the same temperature (i.e., the first temperature) as the film formation temperature of the above-mentioned silicon film 2 doped with carbon.
此外,步驟(1)與步驟(2),可利用相同CVD裝置來進行,亦可利用不同CVD裝置來進行。In addition, step (1) and step (2) can be performed using the same CVD device or different CVD devices.
以第一溫度形成的摻雜有碳的矽膜是作為Si-Cap(矽頂蓋)層來發揮功能,當在後述的步驟(3)中以比第一溫度更高的第二溫度更進行成膜時,能夠抑制因高溫而使碳從摻雜有碳的矽膜2擴散至上層的情形。The carbon-doped silicon film formed at the first temperature functions as a Si-Cap (silicon cap) layer. When the film is formed at a second temperature higher than the first temperature in the later-described step (3), diffusion of carbon from the carbon-doped silicon film 2 to the upper layer due to the high temperature can be suppressed.
未摻雜碳的矽膜3的膜厚,例如能夠作成5nm~200nm,且較佳為5nm~50nm。若作成這樣的膜厚,能夠更確實地抑制碳從摻雜有碳的矽膜2擴散至半導體晶圓表面的情形。The thickness of the carbon-undoped silicon film 3 can be, for example, 5 nm to 200 nm, and preferably 5 nm to 50 nm. If the thickness is set to this level, diffusion of carbon from the carbon-doped silicon film 2 to the surface of the semiconductor wafer can be more reliably suppressed.
<步驟(3)> 如第1圖所示,步驟(3)是在積層晶圓10上以比第一溫度更高的第二溫度更進行成膜,藉此得到半導體晶圓100的步驟。此外,第1圖中舉的例子是在積層晶圓10上更成膜出要成為元件活性層的矽膜4,但本步驟中更成膜的層不限定於該層。 <Step (3)> As shown in FIG. 1, step (3) is a step of further forming a film on the stacked wafer 10 at a second temperature higher than the first temperature, thereby obtaining a semiconductor wafer 100. In addition, the example given in FIG. 1 is to further form a silicon film 4 to become an active layer of the device on the stacked wafer 10, but the layer further formed in this step is not limited to this layer.
要成為元件活性層的矽膜(矽磊晶層)4,亦能夠例如藉由CVD且較佳為RP-CVD(減壓CVD)來加以形成。此時使用的原料氣體,例如使用二氯矽烷或單矽烷。然而,原料氣體不限於該氣體。又,CVD時的壓力能夠設為1~80Torr。其中,本步驟中的成膜,是以比第一溫度更高的第二溫度來進行。The silicon film (silicon epitaxial layer) 4 to be the active layer of the device can also be formed, for example, by CVD, preferably RP-CVD (reduced pressure CVD). The raw material gas used at this time is, for example, dichlorosilane or monosilane. However, the raw material gas is not limited to this gas. In addition, the pressure during CVD can be set to 1 to 80 Torr. In this step, the film formation is performed at a second temperature higher than the first temperature.
作為第二溫度,只要是比第一溫度更高的溫度則並未特別加以限定,例如能夠設為800℃以上,且較佳為1000~1200℃。The second temperature is not particularly limited as long as it is higher than the first temperature, and can be, for example, 800° C. or higher, and preferably 1000 to 1200° C.
本步驟中更成膜出的要成為元件活性層的矽膜4的膜厚並未特別加以限制,可根據用途而設定適當的膜厚。The thickness of the silicon film 4 formed in this step to become the active layer of the device is not particularly limited, and an appropriate thickness can be set according to the application.
此外,步驟(3),可利用與步驟(2)相同CVD裝置來進行,亦可利用不同CVD裝置來進行。In addition, step (3) can be performed using the same CVD apparatus as step (2), or can be performed using a different CVD apparatus.
本發明中,步驟(3)中的利用高溫(第二溫度)的成膜,不是在摻雜有碳的矽膜2的正上方,而是在矽膜2上以低溫(第一溫度)形成的未摻雜碳的矽膜(Si-Cap層)3之上進行。藉此,能夠抑制碳從摻雜有碳的矽膜2擴散至上層的情形。因此,根據本發明製造出的半導體晶圓100,碳並未擴散至要成為元件活性層的矽膜4中,亦即在磊晶層的表面不會有SiC的析出。In the present invention, the film formation using high temperature (second temperature) in step (3) is not performed directly above the carbon-doped silicon film 2, but on the non-carbon-doped silicon film (Si-Cap layer) 3 formed at low temperature (first temperature) on the silicon film 2. In this way, the diffusion of carbon from the carbon-doped silicon film 2 to the upper layer can be suppressed. Therefore, in the semiconductor wafer 100 manufactured according to the present invention, carbon does not diffuse into the silicon film 4 to become the device active layer, that is, there is no precipitation of SiC on the surface of the epitaxial layer.
[第二態樣] 第2圖表示一流程圖,該流程圖表示本發明的半導體晶圓的製造方法的第二態樣的一例。在本發明的半導體晶圓的製造方法的第二態樣中,藉由進行下述的步驟(1)~(3)來得到半導體晶圓。以下,沿著第2圖來說明第二態樣。 [Second Aspect] FIG. 2 shows a flow chart showing an example of the second aspect of the method for manufacturing a semiconductor wafer of the present invention. In the second aspect of the method for manufacturing a semiconductor wafer of the present invention, a semiconductor wafer is obtained by performing the following steps (1) to (3). The second aspect is described below along FIG. 2.
<步驟(1)> 如第2圖所示,步驟(1)是在矽基板1上以第一溫度形成摻雜有碳的矽膜2的步驟。關於步驟(1),與上述第一態樣所說明的內容相同。 <Step (1)> As shown in FIG. 2, step (1) is a step of forming a carbon-doped silicon film 2 on a silicon substrate 1 at a first temperature. Step (1) is the same as that described in the first embodiment above.
<步驟(2)> 如第2圖所示,步驟(2)是在摻雜有碳的矽膜2上,以第一溫度形成未摻雜碳的矽膜3而藉此得到積層晶圓10的步驟。關於步驟(2),亦與上述第一態樣所說明的內容相同。 <Step (2)> As shown in FIG. 2, step (2) is a step of forming a non-carbon-doped silicon film 3 at a first temperature on a carbon-doped silicon film 2 to obtain a laminated wafer 10. Step (2) is the same as that described in the first embodiment above.
<步驟(3)> 如第2圖所示,步驟(3)是在積層晶圓10上以比第一溫度更高的第二溫度來進行退火,藉此得到半導體晶圓100的步驟。 <Step (3)> As shown in FIG. 2, step (3) is a step of annealing the laminated wafer 10 at a second temperature higher than the first temperature to obtain a semiconductor wafer 100.
作為進行退火時的第二溫度,只要是比第一溫度更高的溫度則並未特別加以限定,例如能夠設為800℃以上,且較佳為1000~1200℃。The second temperature for annealing is not particularly limited as long as it is higher than the first temperature, and can be, for example, 800°C or higher, and preferably 1000 to 1200°C.
在第二態樣中,步驟(3)的根據高溫(第二溫度)所進行的退火,是在以低溫(第一溫度)形成未摻雜碳的矽膜(Si-Cap層)3之後進行。因此,與第一態樣同樣能夠抑制在高溫下碳從摻雜有碳的矽膜2擴散至上層的情形。根據本發明的第二態樣製造出的半導體晶圓100,亦不會在磊晶層的表面有SiC的析出。In the second aspect, the annealing at high temperature (second temperature) in step (3) is performed after the carbon-free silicon film (Si-Cap layer) 3 is formed at low temperature (first temperature). Therefore, the diffusion of carbon from the carbon-doped silicon film 2 to the upper layer at high temperature can be suppressed as in the first aspect. The semiconductor wafer 100 manufactured according to the second aspect of the present invention also does not have SiC precipitation on the surface of the epitaxial layer.
[半導體晶圓] 又,在本發明中提供一種半導體晶圓,其特徵在於至少具有:矽基板,其具有上表面與下表面;摻雜有碳的矽膜,其形成於該矽基板的上表面;及,未摻雜碳的矽膜,其形成於該摻雜有碳的矽膜上;並且,在與前述矽基板的下表面相反的一側的表面沒有SiC析出。 [Semiconductor wafer] In the present invention, a semiconductor wafer is provided, which is characterized by at least having: a silicon substrate having an upper surface and a lower surface; a carbon-doped silicon film formed on the upper surface of the silicon substrate; and a non-carbon-doped silicon film formed on the carbon-doped silicon film; and no SiC is precipitated on the surface opposite to the lower surface of the aforementioned silicon substrate.
本發明的半導體晶圓,亦可在未摻雜碳的矽膜上更形成別的磊晶層,例如要成為元件活性層的矽膜。The semiconductor wafer of the present invention can also form another epitaxial layer on the silicon film not doped with carbon, for example, a silicon film to be used as an active layer of a device.
本發明的半導體晶圓,能夠藉由上述本發明的半導體晶圓的製造方法所製造。因此,來自摻雜有碳的矽膜的碳之擴散,會被形成於其上的未摻雜碳的矽膜所抑制,因此在磊晶層的表面不會有SiC析出。The semiconductor wafer of the present invention can be manufactured by the above-mentioned method for manufacturing the semiconductor wafer of the present invention. Therefore, the diffusion of carbon from the carbon-doped silicon film is suppressed by the carbon-undoped silicon film formed thereon, so that SiC will not precipitate on the surface of the epitaxial layer.
因此,本發明的半導體晶圓,具有金屬吸除能力或氧捕捉效果、RF(射頻)特性提高的效果,並且表面的未摻雜有碳的矽膜也是高品質,因此能夠應用於各種元件(RF元件或CIS(CMOS影像感測器))。Therefore, the semiconductor wafer of the present invention has metal absorption capability or oxygen capture effect, RF (radio frequency) characteristics improvement effect, and the silicon film not doped with carbon on the surface is also of high quality, so it can be applied to various devices (RF devices or CIS (CMOS image sensor)).
[實施例] 以下,使用實施例及比較例來具體說明本發明,但本發明不限定於該等實施例。此外,下述實施例、比較例中,作為半導體晶圓表面的缺陷評價,是藉由使用KLA Tencor公司製的SP3對LLS(局部光散射)缺陷的個數加以測定來進行。 [Example] The present invention is specifically described below using examples and comparative examples, but the present invention is not limited to these examples. In addition, in the following examples and comparative examples, the number of LLS (local light scattering) defects is measured using SP3 manufactured by KLA Tencor as the defect evaluation on the surface of the semiconductor wafer.
在下述實施例1~8中,如第3圖的流程所示進行本發明的半導體晶圓的製造方法中的步驟(1)~(3)。另一方面,在下述比較例1~7中,僅如第3圖的流程所示進行本發明的半導體晶圓的製造方法中的步驟(1)與步驟(3),而不進行步驟(2)。In the following Examples 1 to 8, steps (1) to (3) of the method for manufacturing a semiconductor wafer of the present invention are performed as shown in the flow chart of FIG3. On the other hand, in the following Comparative Examples 1 to 7, only steps (1) and (3) of the method for manufacturing a semiconductor wafer of the present invention are performed as shown in the flow chart of FIG3, and step (2) is not performed.
(實施例1) 使用RP-CVD,在700℃、5Torr的條件下,以含有SiH 4與SiH(CH 3) 3的混合氣體環境,在矽基板上成長出100nm的摻雜有C的Si層(碳原子濃度:1.0E+20atoms/cm 3)。然後,同樣在700℃中成長出30nm的C非摻雜Si層(Si-cap層)。並且在這之後,昇溫至1080℃,使Si層成長而製造半導體晶圓。此時,LLS在32nmup中是16個。 (Example 1) Using RP-CVD, under the conditions of 700°C and 5 Torr, in a mixed gas environment containing SiH 4 and SiH(CH 3 ) 3 , a 100nm C-doped Si layer (carbon atom concentration: 1.0E+20atoms/cm 3 ) was grown on a silicon substrate. Then, a 30nm C-undoped Si layer (Si-cap layer) was grown at 700°C. After that, the temperature was raised to 1080°C to grow the Si layer and manufacture a semiconductor wafer. At this time, the LLS was 16 in 32nmup.
(實施例2) 作為要評價的半導體晶圓,將C非摻雜Si層(Si-cap層)的厚度作成10nm,除此以外以與實施例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是25個。 (Example 2) As a semiconductor wafer to be evaluated, the thickness of the C non-doped Si layer (Si-cap layer) was made 10nm, and the semiconductor wafer was manufactured under the same conditions as Example 1. At this time, the number of LLS in 32nmup was 25.
(實施例3) 作為要評價的半導體晶圓,將碳原子濃度作成3.0E+21atoms/cm 3,除此以外以與實施例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是15個。 (Example 3) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Example 1 except that the carbon atom concentration was set to 3.0E+21 atoms/cm 3 . In this case, the number of LLSs was 15 in 32 nmup.
(實施例4) 作為要評價的半導體晶圓,將碳原子濃度作成8.0E+21atoms/cm 3,除此以外以與實施例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是165個。 (Example 4) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Example 1 except that the carbon atom concentration was set to 8.0E+21 atoms/cm 3 . At this time, the number of LLSs in 32 nmup was 165.
(實施例5) 作為要評價的半導體晶圓,將碳原子濃度作成2.5E+22atoms/cm 3,除此以外以與實施例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是861個。 (Example 5) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Example 1 except that the carbon atom concentration was set to 2.5E+22 atoms/cm 3 . At this time, the number of LLSs in 32 nmup was 861.
(實施例6) 使用RP-CVD,在850℃、5Torr的條件下,以含有SiH 4與SiH 3(CH 3)的混合氣體環境,在矽基板上成長出100nm的摻雜有C的Si層(碳原子濃度:2.0E+19atoms/cm 3)。然後,同樣在850℃中成長出30nm的C非摻雜Si層(Si-cap層)。並且在這之後,昇溫至1080℃,使Si層成長而製造半導體晶圓。此時,LLS在32nmup中是6個。 (Example 6) Using RP-CVD, under the conditions of 850°C and 5 Torr, in a mixed gas environment containing SiH 4 and SiH 3 (CH 3 ), a 100nm C-doped Si layer (carbon atom concentration: 2.0E+19atoms/cm 3 ) was grown on a silicon substrate. Then, a 30nm C-undoped Si layer (Si-cap layer) was grown at 850°C. After that, the temperature was raised to 1080°C to grow the Si layer to manufacture a semiconductor wafer. At this time, the LLS was 6 in 32nmup.
(實施例7) 作為要評價的半導體晶圓,將碳原子濃度作成2.0E+18atoms/cm 3,除此以外以與實施例6相同的條件製造出半導體晶圓,此時LLS在32nmup中是26個。 (Example 7) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Example 6 except that the carbon atom concentration was set to 2.0E+18 atoms/cm 3 . In this case, the number of LLSs in 32 nmup was 26.
(實施例8) 作為要評價的半導體晶圓,將碳原子濃度作成4.0E+17atoms/cm 3,除此以外以與實施例6相同的條件製造出半導體晶圓,此時LLS在32nmup中是12個。 (Example 8) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Example 6 except that the carbon atom concentration was set to 4.0E+17 atoms/cm 3 . In this case, the number of LLSs in 32 nmup was 12.
(比較例1) 使用RP-CVD,在700℃、5Torr的條件下,以含有SiH 4與SiH(CH 3) 3的混合氣體環境,在矽基板上成長出100nm的摻雜有C的Si層(碳原子濃度:1.0E+20atoms/cm 3)。然後,昇溫至1080℃,使Si層成長而製造半導體晶圓。此時,LLS在32nmup中是overload(過載)的狀態。此外,overload是指LLS約在30000個以上/每片晶圓。 (Comparative Example 1) Using RP-CVD, at 700°C and 5Torr, in a mixed gas environment containing SiH 4 and SiH(CH 3 ) 3 , a 100nm C-doped Si layer (carbon atom concentration: 1.0E+20atoms/cm 3 ) is grown on a silicon substrate. Then, the temperature is raised to 1080°C to grow the Si layer and manufacture a semiconductor wafer. At this time, LLS is in an overload state in 32nmup. In addition, overload means that LLS is about 30,000 or more per wafer.
(比較例2) 作為要評價的半導體晶圓,將碳原子濃度作成3.0E+21atoms/cm 3,除此以外以與比較例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是overload的狀態。 (Comparative Example 2) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Comparative Example 1 except that the carbon atom concentration was set to 3.0E+21 atoms/cm 3 . At this time, LLS was in an overload state in 32nmup.
(比較例3) 作為要評價的半導體晶圓,將碳原子濃度作成8.0E+21atoms/cm 3,除此以外以與比較例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是overload的狀態。 (Comparative Example 3) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Comparative Example 1 except that the carbon atom concentration was set to 8.0E+21 atoms/cm 3 . At this time, LLS was in an overload state in 32nmup.
(比較例4) 作為要評價的半導體晶圓,將碳原子濃度作成2.5E+22atoms/cm 3,除此以外以與比較例1相同的條件製造出半導體晶圓,此時LLS在32nmup中是overload的狀態。 (Comparative Example 4) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Comparative Example 1 except that the carbon atom concentration was set to 2.5E+22 atoms/cm 3 . At this time, LLS was in an overload state in 32nmup.
(比較例5) 使用RP-CVD,在850℃、5Torr的條件下,以含有SiH 4與SiH 3(CH 3)的混合氣體環境,在矽基板上成長出100nm的摻雜有C的Si層(碳原子濃度:2.0E+19atoms/cm 3)。然後,昇溫至1080℃,使Si層成長而製造半導體晶圓。此時,LLS在32nmup中是overload的狀態。 (Comparative Example 5) Using RP-CVD, at 850°C and 5 Torr, in a mixed gas environment containing SiH 4 and SiH 3 (CH 3 ), a 100nm C-doped Si layer (carbon atom concentration: 2.0E+19atoms/cm 3 ) was grown on a silicon substrate. Then, the temperature was raised to 1080°C to grow the Si layer and manufacture a semiconductor wafer. At this time, LLS was in an overload state in 32nmup.
(比較例6) 作為要評價的半導體晶圓,將碳原子濃度作成2.0E+18atoms/cm 3,除此以外以與比較例5相同的條件製造出半導體晶圓,此時LLS在32nmup中是overload的狀態。 (Comparative Example 6) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Comparative Example 5 except that the carbon atom concentration was set to 2.0E+18 atoms/cm 3 . At this time, LLS was in an overload state in 32nmup.
(比較例7) 作為要評價的半導體晶圓,將碳原子濃度作成4.0E+17atoms/cm 3,除此以外以與比較例5相同的條件製造出半導體晶圓,此時LLS在32nmup中是overload的狀態。 (Comparative Example 7) As a semiconductor wafer to be evaluated, a semiconductor wafer was manufactured under the same conditions as in Comparative Example 5 except that the carbon atom concentration was set to 4.0E+17 atoms/cm 3 . At this time, LLS was in an overload state in 32nmup.
將實施例1~8、比較例1~7的結果統整於表1。The results of Examples 1 to 8 and Comparative Examples 1 to 7 are summarized in Table 1.
[表1]
自表1可清楚得知,藉由如實施例1~8之本發明的半導體晶圓的製造方法所製造出的半導體晶圓,在磊晶層的表面沒有SiC的析出且LLS非常少,藉由Si-Cap層抑制了碳的擴散。特別在摻雜有C的Si層的碳濃度在3.0E21atoms/cm 3以下的情況中特別有著優異的結果。另一方面,在比較例1~7中,未實施本發明的步驟(2),而是在摻雜有C的Si層上直接以高溫成膜出元件活性層,因此碳自摻雜有C的Si層擴散出而有SiC析出於元件活性層表面,成為LLS非常多(Overload)的結果。 It can be clearly seen from Table 1 that the semiconductor wafers manufactured by the semiconductor wafer manufacturing method of the present invention as in Examples 1 to 8 have no SiC precipitation on the surface of the epitaxial layer and very few LLS, and the diffusion of carbon is suppressed by the Si-Cap layer. In particular, when the carbon concentration of the C-doped Si layer is below 3.0E21atoms/ cm3 , excellent results are particularly achieved. On the other hand, in Comparative Examples 1 to 7, step (2) of the present invention is not implemented, but the device active layer is directly formed at a high temperature on the C-doped Si layer, so that carbon diffuses from the C-doped Si layer and SiC is precipitated on the surface of the device active layer, resulting in a very large number of LLS (overload).
本說明書包含以下發明。This specification contains the following inventions.
[1]:一種半導體晶圓的製造方法,具有以下步驟:(1) 在矽基板上,以第一溫度形成摻雜有碳的矽膜;(2) 在前述摻雜有碳的矽膜上,以前述第一溫度形成未摻雜碳的矽膜,藉此得到積層晶圓;及(3) 以比前述第一溫度更高的第二溫度對前述積層晶圓進行退火,或是在前述積層晶圓上以前述第二溫度更進行成膜,藉此得到半導體晶圓。[1]: A method for manufacturing a semiconductor wafer comprises the following steps: (1) forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) forming a non-carbon-doped silicon film on the carbon-doped silicon film at the first temperature, thereby obtaining a laminated wafer; and (3) annealing the laminated wafer at a second temperature higher than the first temperature, or further forming a film on the laminated wafer at the second temperature, thereby obtaining a semiconductor wafer.
[2]:如上述[1]所述的半導體晶圓的製造方法,其中,將前述第一溫度設為400℃~1000℃。[2]: The method for manufacturing a semiconductor wafer as described in [1] above, wherein the first temperature is set to 400°C to 1000°C.
[3]:如上述[1]或上述[2]所述的半導體晶圓的製造方法,其中,將前述第一溫度設為600℃~800℃。[3]: The method for manufacturing a semiconductor wafer as described in [1] or [2] above, wherein the first temperature is set to 600°C to 800°C.
[4]:如上述[1]、上述[2]或上述[3]所述的半導體晶圓的製造方法,其中,將前述未摻雜碳的矽膜的膜厚作成5nm~200nm。[4]: The method for manufacturing a semiconductor wafer as described in [1], [2] or [3] above, wherein the thickness of the carbon-undoped silicon film is set to 5 nm to 200 nm.
[5]:如上述[1]、上述[2]、上述[3]或上述[4]所述的半導體晶圓的製造方法,其中,將前述未摻雜碳的矽膜的膜厚作成5nm~50nm。[5]: The method for manufacturing a semiconductor wafer as described in [1], [2], [3] or [4] above, wherein the thickness of the carbon-undoped silicon film is set to 5 nm to 50 nm.
[6]:如上述[1]、上述[2]、上述[3]、上述[4]或上述[5]所述的半導體晶圓的製造方法,其中,將前述摻雜有碳的矽膜的碳原子濃度作成1.0E+17atoms/cm 3以上且4.5E+22atoms/cm 3以下。 [6]: A method for manufacturing a semiconductor wafer as described in [1], [2], [3], [4] or [5] above, wherein the carbon atom concentration of the carbon-doped silicon film is set to be greater than 1.0E+17 atoms/ cm3 and less than 4.5E+22 atoms/ cm3 .
[7]:如上述[1]、上述[2]、上述[3]、上述[4]、上述[5]或上述[6]所述的半導體晶圓的製造方法,其中,將前述摻雜有碳的矽膜的碳原子濃度作成1.0E+18atoms/cm 3以上且2.0E+22atoms/cm 3以下。 [7]: A method for manufacturing a semiconductor wafer as described in [1], [2], [3], [4], [5] or [6] above, wherein the carbon atom concentration of the carbon-doped silicon film is set to be greater than 1.0E+18 atoms/ cm3 and less than 2.0E+22 atoms/ cm3 .
[8]:如上述[1]、上述[2]、上述[3]、上述[4]、上述[5]、上述[6]或上述[7]所述的半導體晶圓的製造方法,其中,將前述摻雜有碳的矽膜的碳原子濃度作成1.0E+19atoms/cm 3以上且5.0E+21atoms/cm 3以下。 [8]: A method for manufacturing a semiconductor wafer as described in [1], [2], [3], [4], [5], [6] or [7] above, wherein the carbon atom concentration of the carbon-doped silicon film is set to be greater than 1.0E+19 atoms/ cm3 and less than 5.0E+21 atoms/ cm3 .
[9]:一種半導體晶圓,其特徵在於:前述半導體晶圓至少具有:矽基板,其具有上表面與下表面;摻雜有碳的矽膜,其形成於該矽基板的上表面;及,未摻雜碳的矽膜,其形成於該摻雜有碳的矽膜上;並且,前述半導體晶圓,在與前述矽基板的下表面相反的一側的表面沒有SiC析出。[9]: A semiconductor wafer, characterized in that: the semiconductor wafer at least comprises: a silicon substrate having an upper surface and a lower surface; a carbon-doped silicon film formed on the upper surface of the silicon substrate; and a non-carbon-doped silicon film formed on the carbon-doped silicon film; and the semiconductor wafer has no SiC precipitation on the surface opposite to the lower surface of the silicon substrate.
[10]:如上述[9]所述的半導體晶圓,其中,前述未摻雜碳的矽膜的膜厚是5nm~200nm。[10]: The semiconductor wafer as described in [9] above, wherein the thickness of the carbon-undoped silicon film is 5 nm to 200 nm.
[11]:如上述[9]或上述[10]所述的半導體晶圓,其中,前述未摻雜碳的矽膜的膜厚是5nm~50nm。[11]: The semiconductor wafer as described in [9] or [10] above, wherein the thickness of the carbon-undoped silicon film is 5 nm to 50 nm.
[12]:如上述[9]、上述[10]或上述[11]所述的半導體晶圓,其中,前述摻雜有碳的矽膜的碳原子濃度是1.0E+17atoms/cm 3以上且4.5E+22atoms/cm 3以下。 [12]: A semiconductor wafer as described in [9], [10] or [11] above, wherein the carbon atom concentration of the carbon-doped silicon film is greater than or equal to 1.0E+17 atoms/cm 3 and less than or equal to 4.5E+22 atoms/cm 3 .
[13]:如上述[9]、上述[10]、上述[11]或上述[12]所述的半導體晶圓,其中,前述摻雜有碳的矽膜的碳原子濃度是1.0E+18atoms/cm 3以上且2.0E+22atoms /cm 3以下。 [13]: A semiconductor wafer as described in [9], [10], [11] or [12] above, wherein the carbon atom concentration of the carbon-doped silicon film is greater than or equal to 1.0E+18 atoms/cm 3 and less than or equal to 2.0E+22 atoms/cm 3 .
[14]:如上述[9]、上述[10]、上述[11]、上述[12]或上述[13]所述的半導體晶圓,其中,前述摻雜有碳的矽膜的碳原子濃度是1.0E+19atoms/cm 3以上且5.0E+21atoms/cm 3以下。 [14]: A semiconductor wafer as described in [9], [10], [11], [12] or [13] above, wherein the carbon atom concentration of the carbon-doped silicon film is greater than or equal to 1.0E+19 atoms/cm 3 and less than or equal to 5.0E+21 atoms/cm 3 .
此外,本發明不限定於上述實施型態。上述實施型態為例示,任何與本發明的申請專利範圍所述之技術性思想具有實質上相同的構成,且發揮相同的作用功效者,皆包含於本發明的技術性範圍中。In addition, the present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiments are illustrative, and any embodiments having substantially the same structure and exerting the same function and effect as the technical concept described in the patent application scope of the present invention are included in the technical scope of the present invention.
1:矽基板 2:矽膜 3:矽膜 4:矽膜 10:積層晶圓 100:半導體晶圓 1: Silicon substrate 2: Silicon film 3: Silicon film 4: Silicon film 10: Laminated wafer 100: Semiconductor wafer
第1圖是表示本發明的半導體晶圓的製造方法的第一態樣的一例之流程圖。 第2圖是表示本發明的半導體晶圓的製造方法的第二態樣的一例之流程圖。 第3圖是實施例與比較例中的半導體晶圓成膜時的流程圖。 FIG. 1 is a flowchart showing an example of a first aspect of the method for manufacturing a semiconductor wafer of the present invention. FIG. 2 is a flowchart showing an example of a second aspect of the method for manufacturing a semiconductor wafer of the present invention. FIG. 3 is a flowchart showing the film formation of the semiconductor wafer in the embodiment and the comparative example.
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None
1:矽基板 1: Silicon substrate
2:矽膜 2: Silicon film
3:矽膜 3:Silicon film
4:矽膜 4: Silicon film
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