TW202405936A - Substrate processing method - Google Patents

Substrate processing method Download PDF

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TW202405936A
TW202405936A TW112123620A TW112123620A TW202405936A TW 202405936 A TW202405936 A TW 202405936A TW 112123620 A TW112123620 A TW 112123620A TW 112123620 A TW112123620 A TW 112123620A TW 202405936 A TW202405936 A TW 202405936A
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Taiwan
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gas
film
processing method
hydrogen
substrate processing
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TW112123620A
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Chinese (zh)
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西塚哲也
本田昌伸
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日商東京威力科創股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching

Abstract

A substrate processing method according to the present invention comprises: a step in which a substrate that comprises a silicon-containing film and a mask that is superposed on the silicon-containing film is carried into a chamber; and a step in which the silicon-containing film is etched by generating a plasma from a processing gas that contains a COF2 gas and a hydrogen-containing gas. With respect to this substrate processing method, the flow rate of the hydrogen-containing gas relative to the total flow rate of the processing gas is not less than 13% by volume but less than 50% by volume in terms of hydrogen gas.

Description

基板處理方法Substrate processing methods

本發明係關於一種基板處理方法。The present invention relates to a substrate processing method.

目前,於半導體元件之製造製程中,例如,利用CF 4(全氟甲烷)氣體、c-C 4F 8(全氟環丁烷)氣體等氣體,進行乾式蝕刻或腔室內之清洗等。例如,於下述專利文獻1中,揭示有使用CF 4氣體、C 4F 8氣體等進行電漿蝕刻。該等半導體製造製程中使用之氣體之多數為導致全球暖化之溫室效應氣體,其中,包含以CO 2(二氧化碳)為基準表示促進暖化之能力之全球暖化指數(Global Warming Potential:GWP)較高之氣體。 [先前技術文獻] [專利文獻] Currently, in the manufacturing process of semiconductor devices, for example, gases such as CF 4 (perfluoromethane) gas and cC 4 F 8 (perfluorocyclobutane) gas are used to perform dry etching or cleaning in the chamber. For example, Patent Document 1 below discloses plasma etching using CF 4 gas, C 4 F 8 gas, or the like. Most of the gases used in these semiconductor manufacturing processes are greenhouse gases that contribute to global warming, including the Global Warming Potential (GWP), which uses CO 2 (carbon dioxide) as the basis to indicate the ability to promote warming. Higher gas. [Prior art documents] [Patent documents]

[專利文獻1]日本專利特開2008-28022號公報[Patent Document 1] Japanese Patent Application Publication No. 2008-28022

[發明所欲解決之問題][The problem that the invention aims to solve]

於本發明中,為了抑制全球暖化,提出以溫室效應較低之氣體來代替各種半導體製造製程中所使用之各種氣體。 [解決問題之技術手段] In the present invention, in order to suppress global warming, it is proposed to replace various gases used in various semiconductor manufacturing processes with gases with lower greenhouse effects. [Technical means to solve problems]

本發明之一態樣之基板處理方法包含以下步驟:將包括含矽膜、及積層於該含矽膜上之遮罩之基板搬入至腔室內;以及自包含COF 2氣體、及含氫氣體之處理氣體產生電漿,對上述含矽膜進行蝕刻;相對於上述處理氣體之總流量之上述含氫氣體之流量換算為氫氣,為13體積%以上且未達50體積%。 [發明之效果] A substrate processing method according to one aspect of the present invention includes the following steps: carrying a substrate including a silicon-containing film and a mask laminated on the silicon-containing film into a chamber; and removing COF 2 gas and hydrogen-containing gas from the chamber. The processing gas generates plasma to etch the silicon-containing film; the flow rate of the hydrogen-containing gas relative to the total flow rate of the processing gas, converted into hydrogen gas, is more than 13 volume % and less than 50 volume %. [Effects of the invention]

於各種半導體製造製程中,藉由利用使用本發明中提出之溫室效應較低之氣體之基板處理方法,可維持該半導體製造製程中所要求之性能,且可抑制全球暖化。In various semiconductor manufacturing processes, by utilizing the substrate processing method using gases with lower greenhouse effect proposed in the present invention, the performance required in the semiconductor manufacturing processes can be maintained and global warming can be suppressed.

以下,參照圖式,對本案揭示之成膜方法之實施方式詳細地進行說明。再者,並不由本實施方式限定揭示之成膜方法。又,於本說明書及圖式中,藉由對實質上具有相同之功能構成之構成要素標註相同之符號,而省略重複說明。Hereinafter, embodiments of the film forming method disclosed in this application will be described in detail with reference to the drawings. Furthermore, the disclosed film forming method is not limited to this embodiment. In addition, in this specification and the drawings, components having substantially the same functional configuration are assigned the same reference numerals, and repeated descriptions are omitted.

又,以下之說明中參照之圖式係用以促進本發明之一實施方式之說明與其理解之圖式,為了容易理解,有時圖中所示之形狀、尺寸、比等與實際不同。進而,圖中所示之構成可參考以下之說明與公知之技術而適當進行設計變更。In addition, the drawings referred to in the following description are used to facilitate the description and understanding of one embodiment of the present invention. In order to facilitate understanding, the shape, size, ratio, etc. shown in the drawings may be different from the actual ones. Furthermore, the structure shown in the drawings can be appropriately modified in design with reference to the following description and known techniques.

近年來,於以日本為首之發達國家中,作為對全球暖化之對策,要求削減CO 2氣體等溫室效應較高之氣體之排出。目前,於半導體元件之製造製程中,如上文所說明,利用CF 4氣體、c-C 4F 8氣體等氣體,進行乾式蝕刻或腔室內之清洗等。該等半導體製造製程中所使用之氣體之多數為導致全球暖化之溫室效應氣體,其中,包含GWP較高之氣體。因此,認為今後於半導體製造製程中抑制此種溫室效應較高之氣體之排出變得重要。具體而言,CF 4氣體係GWP:6630,c-C 4F 8氣體係GWP:9540,GWP越高,則溫室效應越高。 In recent years, in developed countries including Japan, as a countermeasure against global warming, it is required to reduce the emission of gases with high greenhouse effect such as CO 2 gas. Currently, in the manufacturing process of semiconductor devices, as explained above, gases such as CF 4 gas and cC 4 F 8 gas are used to perform dry etching or cleaning in the chamber. Most of the gases used in these semiconductor manufacturing processes are greenhouse gases that contribute to global warming, including gases with high GWPs. Therefore, it is considered important to suppress the emission of such gases with high greenhouse effect in the semiconductor manufacturing process in the future. Specifically, the GWP of the CF 4 gas system is: 6630, and the GWP of the cC 4 F 8 gas system is: 9540. The higher the GWP, the higher the greenhouse effect.

因此,於本發明中,研究為了抑制全球暖化,而以作為GWP為1000以下,較佳為100以下之溫室效應較低之氣體來代替各種半導體製造製程中所使用之各種氣體。以下,依次說明本發明之實施方式之詳細情況。Therefore, in the present invention, in order to suppress global warming, it is studied to replace various gases used in various semiconductor manufacturing processes with gases with a low greenhouse effect as a GWP of 1000 or less, preferably 100 or less. Hereinafter, details of the embodiments of the present invention will be described in sequence.

<第1實施方式> 首先,作為本發明之第1實施方式,研究於作為半導體元件製造製程之一的用以形成邏輯電路之配線層之乾式蝕刻步驟中,以溫室效應較低之氣體來代替。 <First Embodiment> First, as a first embodiment of the present invention, it is studied to replace the dry etching step of the wiring layer used to form the logic circuit, which is one of the semiconductor device manufacturing processes, with a gas with a lower greenhouse effect.

以下,參照圖1,對本實施方式之蝕刻步驟進行說明。圖1係表示本實施方式中處理之基板W之一例之剖視圖。於本實施方式中,例如,對如圖1所示之基板W進行蝕刻處理。詳細而言,如圖1所示,基板W包含基底層210、及積層於基底層210上且含有矽(Si)之膜(含矽膜),且具有成為蝕刻之對象之被處理層200、及積層於被處理層200上之遮罩220。Hereinafter, the etching steps of this embodiment will be described with reference to FIG. 1 . FIG. 1 is a cross-sectional view showing an example of the substrate W processed in this embodiment. In this embodiment, for example, the substrate W shown in FIG. 1 is etched. Specifically, as shown in FIG. 1 , the substrate W includes a base layer 210 and a film (silicon-containing film) laminated on the base layer 210 and containing silicon (Si), and has a target layer 200 to be etched. and a mask 220 laminated on the processed layer 200.

基底層210例如可為金屬膜或矽膜等導電體層。又,作為金屬膜,例如,可為鎢(W)、鋁(Al)、銅(Cu)等。進而,成為蝕刻對象之被處理層200可為氧化矽膜(SiO 2)或低介電常數(Low-k)膜。又,Low-k膜例如可為SiOC膜(含碳氧化矽膜)、氮碳化矽膜(SiCN)、SiOCH(含烴氧化矽膜)、及該等之組合等。 The base layer 210 may be a conductive layer such as a metal film or a silicon film. Moreover, as a metal film, for example, tungsten (W), aluminum (Al), copper (Cu), etc. can be used. Furthermore, the layer 200 to be etched may be a silicon oxide film (SiO 2 ) or a low dielectric constant (Low-k) film. In addition, the Low-k film may be, for example, a SiOC film (carbon-containing silicon oxide film), a silicon nitride carbide film (SiCN), SiOCH (hydrocarbon-containing silicon oxide film), and combinations thereof.

進而,於本實施方式中,基底層210並不限定為如上所述之導電體層。例如,有時期望基底層210相對於被處理層200具有高選擇比,且基底層210之損耗較少。更具體而言,例如,於形成自對準接觸(Self-Aligned Contact,SAC)構造之情形時,基底層210為氮化矽膜(SiN)等,被處理層200成為氧化矽膜等。又,於形成通孔(Via)構造之情形時,基底層210為碳化矽膜(SiC)或氮碳化矽膜等,被處理層200成為氧化矽膜或Low-k膜等。Furthermore, in this embodiment, the base layer 210 is not limited to the conductive layer as described above. For example, sometimes it is desired that the base layer 210 has a high selectivity relative to the processed layer 200 and the loss of the base layer 210 is small. More specifically, for example, when forming a self-aligned contact (SAC) structure, the base layer 210 is a silicon nitride film (SiN) or the like, and the processed layer 200 is a silicon oxide film or the like. In addition, when forming a via structure, the base layer 210 is a silicon carbide film (SiC), a silicon nitride film, or the like, and the processed layer 200 is a silicon oxide film, a Low-k film, or the like.

遮罩220具有所期望之開口圖案,且作為對被處理層200之所期望之部位進行蝕刻時之保護膜發揮功能。於本實施方式中,遮罩220包含碳及金屬中之至少一者。詳細而言,於本實施方式中,遮罩220亦可為含碳遮罩或含金屬遮罩。進而,於本實施方式中,含碳遮罩亦可為旋塗式碳(SOC)、碳化鎢、非晶形碳、碳化硼等、及該等之組合。又,於本實施方式中,含金屬遮罩亦可為氮化鈦膜(TiN)、碳化鎢膜(WC)等。The mask 220 has a desired opening pattern and functions as a protective film when etching a desired portion of the layer 200 to be processed. In this embodiment, the mask 220 includes at least one of carbon and metal. Specifically, in this embodiment, the mask 220 may also be a carbon-containing mask or a metal-containing mask. Furthermore, in this embodiment, the carbon-containing mask can also be spin-on carbon (SOC), tungsten carbide, amorphous carbon, boron carbide, etc., and combinations thereof. In addition, in this embodiment, the metal-containing mask may also be a titanium nitride film (TiN), a tungsten carbide film (WC), or the like.

以下,對對針對種基板W之蝕刻中將溫室效應較低之氣體用作代替氣體之本實施方式之基板處理方法進行說明。Hereinafter, the substrate processing method of this embodiment using a gas with a low greenhouse effect as a substitute gas for etching the seed substrate W will be described.

參照圖2,對本實施方式之基板處理方法之流程進行說明。圖2係用以說明本實施方式之基板處理方法之流程的說明圖。如圖2所示,本發明之實施方式之基板處理方法包含:步驟(S1),其將上文所說明之基板W搬送至電漿處理裝置(腔室)內;及步驟(S2),其自下述將說明之處理氣體產生電漿,對被處理層200進行蝕刻。詳細而言,於本實施方式中,例如,使用具有所期望之開口圖案之遮罩220,對被處理層200進行蝕刻而形成溝槽。Referring to FIG. 2 , the flow of the substrate processing method of this embodiment will be described. FIG. 2 is an explanatory diagram for explaining the flow of the substrate processing method of this embodiment. As shown in FIG. 2 , the substrate processing method according to the embodiment of the present invention includes: step (S1), which transports the substrate W described above into the plasma processing device (chamber); and step (S2), which Plasma is generated from a processing gas that will be described below, and the layer to be processed 200 is etched. Specifically, in this embodiment, for example, the mask 220 having a desired opening pattern is used to etch the layer to be processed 200 to form trenches.

本實施方式之蝕刻步驟之處理氣體包含COF 2(氟化羰基)氣體、及含氫氣體。 The processing gas in the etching step of this embodiment includes COF 2 (carbonyl fluoride) gas and hydrogen-containing gas.

COF 2氣體例如與用以形成邏輯電路之配線層之乾式蝕刻步驟中所使用之CF 4氣體(GWP:6630)等相比,暖化效果較低。因此,於本實施方式中,藉由使用溫室效應較低之COF 2氣體,可抑制全球暖化。 COF 2 gas, for example, has a lower warming effect than CF 4 gas (GWP: 6630) used in the dry etching step for forming wiring layers of logic circuits. Therefore, in this embodiment, global warming can be suppressed by using COF 2 gas with a lower greenhouse effect.

又,含氫氣體亦可為選自由氫氣(H 2)、氟化氫(HF)氣體、及氫氟烯烴氣體所組成之群中之1種氣體或選自該等中之複數種氣體之組合。又,氫氟烯烴氣體可為C 2H 2F 2(1,1-二氟乙烯)氣體、C 3H 2F 4(1,3,3,3-四氟丙烯)氣體、C 4H 2F 6(反式-1,1,1,4,4,4-六氟-2-丁烯)氣體或該等之組合。例如,C 2H 2F 2氣體、C 3H 2F 4氣體係GWP為1以下,C 4H 2F 6氣體係GWP為7以下。即,上述含氫氣體係溫室效應較低,與用以形成邏輯電路之配線層之乾式蝕刻步驟中所使用之CHF 3(三氟甲烷)(GWP:12400)等相比較低。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之含氫氣體,可抑制全球暖化。 In addition, the hydrogen-containing gas may be one gas selected from the group consisting of hydrogen gas (H 2 ), hydrogen fluoride (HF) gas, and hydrofluoroolefin gas, or a combination of a plurality of gases selected from these gases. In addition, the hydrofluoroolefin gas may be C 2 H 2 F 2 (1,1-difluoroethylene) gas, C 3 H 2 F 4 (1,3,3,3-tetrafluoropropene) gas, or C 4 H 2 F 6 (trans-1,1,1,4,4,4-hexafluoro-2-butene) gas or a combination thereof. For example, the GWP of the C 2 H 2 F 2 gas and C 3 H 2 F 4 gas systems is 1 or less, and the GWP of the C 4 H 2 F 6 gas system is 7 or less. That is, the greenhouse effect of the above-mentioned hydrogen-containing system is low, compared with CHF 3 (trifluoromethane) (GWP: 12400) used in the dry etching step for forming the wiring layer of the logic circuit. Therefore, in this embodiment, global warming can be suppressed by using hydrogen-containing gas with a lower greenhouse effect as described above.

又,於本實施方式中,含氫氣體亦可為C 3HF 5(五氟丙烯)氣體、C 4H 3F 5(3,3,4,4,4-五氟-1-丁烯等)氣體、C 4HF 5(1,1,2,3,4-五氟丁-1,3-二烯)氣體等。關於該等之氣體,亦由於溫室效應較低,故而藉由使用此種溫室效應較低之含氫氣體,可抑制全球暖化。 In addition, in this embodiment, the hydrogen-containing gas may also be C 3 HF 5 (pentafluoropropylene) gas, C 4 H 3 F 5 (3,3,4,4,4-pentafluoro-1-butene), etc. ) gas, C 4 HF 5 (1,1,2,3,4-pentafluorobut-1,3-diene) gas, etc. Regarding these gases, the greenhouse effect is also low. Therefore, global warming can be suppressed by using such hydrogen-containing gases with low greenhouse effect.

進而,本實施方式之蝕刻步驟之處理氣體亦可包含非活性氣體。非活性氣體可為氬氣(Ar)、氦氣(He)等稀有氣體、氮氣(N 2)或該等之組合。 Furthermore, the processing gas in the etching step of this embodiment may also include an inert gas. The inactive gas may be rare gases such as argon (Ar), helium (He), nitrogen (N 2 ), or a combination thereof.

而且,於本實施方式中,例如,藉由下述電漿處理裝置,使用上述遮罩220,藉由包含COF 2氣體、及含氫氣體之處理氣體之電漿而對基板W之被處理層200進行蝕刻。於本實施方式中,相對於處理氣體(於包含非活性氣體之情形時,除非活性氣體以外之處理氣體)之總流量之含氫氣體之流量換算為氫氣(H 2),為13體積%以上且未達50體積%。於本實施方式之蝕刻步驟中,含氫氣體係為了將COF 4氣體中所包含之氧以OH之形式奪出而發揮功能。於本實施方式中,藉由一併使用具有此種功能之含氫氣體,而COF 4氣體能夠以與先前以來使用之CF 4氣體之類的氣體同等水準,作為蝕刻氣體發揮功能。再者,於本實施方式中,含氫氣體之流量係將含氫氣體中所包含之氫換算為氫氣,作為換算後之氫氣之體積量定義。 Furthermore, in this embodiment, for example, the mask 220 is used by the following plasma processing apparatus to treat the layer to be processed on the substrate W with plasma containing a processing gas including COF 2 gas and a hydrogen-containing gas. 200 for etching. In this embodiment, the flow rate of the hydrogen-containing gas, converted into hydrogen gas (H 2 ), is 13 volume % or more relative to the total flow rate of the process gas (when an inert gas is included, the process gas other than the inert gas). And less than 50 volume%. In the etching step of this embodiment, the hydrogen-containing gas system functions to extract oxygen contained in the COF 4 gas in the form of OH. In this embodiment, by using a hydrogen-containing gas having such a function together, COF 4 gas can function as an etching gas at the same level as gases such as CF 4 gas that have been used heretofore. Furthermore, in this embodiment, the flow rate of the hydrogen-containing gas is defined as the volume of the hydrogen contained in the hydrogen-containing gas converted into hydrogen gas.

此處,參照圖3,研究本實施方式之蝕刻步驟之光阻劑、氧化矽膜、氮化矽膜之各蝕刻速率。圖3係表示與氫氣之流量比相對之各種層之蝕刻速率之結果的圖。詳細而言,圖3之橫軸表示氫氣相對於除非活性氣體以外之處理氣體(COF 2)之總流量之比,縱軸表示光阻劑(photoresist:PR)、氧化矽膜、氮化矽膜之各蝕刻速率(nm/min)。此處,作為處理氣體,使用COF 2氣體、氫氣、及氮氣,於壓力3 Pa、基板溫度20℃、RF(Radio Frequency,射頻)電力300 W之條件下,對光阻劑、氧化矽膜、氮化矽膜之3個膜進行蝕刻。 Here, referring to FIG. 3 , each etching rate of the photoresist, silicon oxide film, and silicon nitride film in the etching step of this embodiment is studied. FIG. 3 is a graph showing the results of the etching rate of various layers relative to the flow rate ratio of hydrogen gas. Specifically, the horizontal axis of FIG. 3 represents the ratio of the total flow rate of hydrogen to the process gas (COF 2 ) other than the non-reactive gas, and the vertical axis represents photoresist (photoresist: PR), silicon oxide film, and silicon nitride film. Each etching rate (nm/min). Here, as the processing gas, COF 2 gas, hydrogen gas, and nitrogen gas are used, and the photoresist, silicon oxide film, and Three of the silicon nitride films are etched.

根據圖3所示之結果可知,即便於使用COF 2氣體作為處理氣體之情形時,氧化矽膜及氮化矽膜亦以與使用CF 4氣體作為處理氣體之情形時同等之程度之蝕刻速率被蝕刻。即,根據本實施方式,即便於使用此種溫室效應較低之COF 2氣體之情形時,亦可獲得與該製程中迄今為止使用之CF 4氣體同等之製程性能。 From the results shown in Figure 3, it can be seen that even when COF 2 gas is used as the processing gas, the silicon oxide film and the silicon nitride film are etched at the same level as when CF 4 gas is used as the processing gas. etching. That is, according to this embodiment, even when COF 2 gas with a lower greenhouse effect is used, the same process performance as the CF 4 gas used so far in the process can be obtained.

又,如圖3所示,可知藉由使氫氣之流量相對於處理氣體之總流量之體積比為13%~50%(於圖3中,由箭頭所示之範圍),而氧化矽膜相對於光阻劑被選擇性地蝕刻。Furthermore, as shown in Figure 3, it can be seen that by setting the volume ratio of the hydrogen gas flow rate to the total flow rate of the process gas to be 13% to 50% (in the range indicated by the arrow in Figure 3), the silicon oxide film is relatively The photoresist is selectively etched.

如以上所述,於用以形成邏輯電路之配線層之乾式蝕刻步驟中,藉由使用本實施方式之溫室效應較低之處理氣體進行蝕刻,可抑制全球暖化。進而,根據本實施方式,即便於使用此種溫室效應較低之氣體之情形時,亦可獲得與該製程中迄今為止使用之處理氣體同等之製程性能。As described above, in the dry etching step for forming the wiring layer of the logic circuit, global warming can be suppressed by using the process gas with a lower greenhouse effect of the present embodiment for etching. Furthermore, according to this embodiment, even when such a gas with a low greenhouse effect is used, it is possible to obtain process performance equivalent to that of the process gas used hitherto in the process.

又,於其他實施方式之用以形成邏輯電路之配線層之乾式蝕刻步驟中,作為處理氣體,例如,亦可使用COF 2氣體、CF(氟碳)系氣體、及非活性氣體。於該其他實施方式中,CF系氣體可為C 3F 6(六氟丙烯)氣體、C 4F 8(八氟-1-丁烯、八氟-2-丁烯)氣體、直鏈狀C 4F 8O氣體或該等之組合。關於該等之氣體,亦由於溫室效應較低,故而藉由使用此種溫室效應較低之CF系氣體,可抑制全球暖化。 In addition, in the dry etching step for forming the wiring layer of the logic circuit in other embodiments, as the processing gas, for example, COF 2 gas, CF (fluorocarbon) gas, and inert gas can also be used. In this other embodiment, the CF-based gas may be C 3 F 6 (hexafluoropropylene) gas, C 4 F 8 (octafluoro-1-butene, octafluoro-2-butene) gas, linear C 4 F 8 O gas or a combination thereof. Since these gases have a low greenhouse effect, global warming can be suppressed by using CF gases with a low greenhouse effect.

又,於其他實施方式之用以形成邏輯電路之配線層之乾式蝕刻步驟中,作為處理氣體,例如,亦可使用COF 2氣體、CHF(氫氟碳)系氣體、及非活性氣體。於該其他實施方式中,CHF系氣體可為CH 2F 2(二氟甲烷)氣體、CH 3F(氟甲烷)氣體或該等之組合。例如,CH 2F 2氣體係GWP為677,CH 3F氣體係GWP為116,GWP均為1000以下。關於該等之氣體,亦由於溫室效應較低,故而藉由使用此種溫室效應較低之CHF系氣體,可抑制全球暖化。進而,作為上述蝕刻步驟之處理氣體,亦可代替CHF系氣體而使用氟化氫(HF)氣體,或者與CHF系氣體一起使用氟化氫(HF)氣體。 In addition, in the dry etching step for forming the wiring layer of the logic circuit in other embodiments, as the processing gas, for example, COF 2 gas, CHF (hydrofluorocarbon) gas, and inert gas may also be used. In this other embodiment, the CHF-based gas may be CH 2 F 2 (difluoromethane) gas, CH 3 F (fluoromethane) gas, or a combination thereof. For example, the GWP of the CH 2 F 2 gas system is 677, the GWP of the CH 3 F gas system is 116, and the GWP is below 1,000. Since these gases have a low greenhouse effect, global warming can be suppressed by using CHF gases with a low greenhouse effect. Furthermore, as the processing gas in the etching step, hydrogen fluoride (HF) gas may be used instead of the CHF-based gas, or hydrogen fluoride (HF) gas may be used together with the CHF-based gas.

<第2實施方式> 其次,作為本發明之第2實施方式,研究於用以形成DRAM(Dynamic Random Access Memory,動態隨機存取記憶體)元件之乾式蝕刻步驟中,以溫室效應較低之氣體來代替。 <Second Embodiment> Next, as a second embodiment of the present invention, it is studied to replace the dry etching step with a gas with a lower greenhouse effect in forming a DRAM (Dynamic Random Access Memory) element.

以下,參照圖4,對本實施方式之基板處理方法進行說明。圖4係表示本實施方式中處理之基板W之一例之剖視圖。於本實施方式中,基板處理方法例如包含對如圖4所示之基板W進行蝕刻處理之步驟。詳細而言,如圖4所示,基板W具有基底層212、積層於基底層212上且成為蝕刻之對象之被處理層200、及積層於被處理層200上之遮罩220。以下,對基板W之各層進行說明,但是,此處關於與上述實施方式共通之方面,則省略說明。Hereinafter, the substrate processing method of this embodiment will be described with reference to FIG. 4 . FIG. 4 is a cross-sectional view showing an example of the substrate W processed in this embodiment. In this embodiment, the substrate processing method includes, for example, the step of etching the substrate W as shown in FIG. 4 . Specifically, as shown in FIG. 4 , the substrate W has a base layer 212 , a to-be-processed layer 200 that is laminated on the base layer 212 and is a target of etching, and a mask 220 that is laminated on the to-be-processed layer 200 . Hereinafter, each layer of the substrate W will be described. However, description of the points common to the above-described embodiment will be omitted.

於本實施方式中,基底層212例如可為金屬膜、矽膜等,並不特別限定。In this embodiment, the base layer 212 can be, for example, a metal film, a silicon film, etc., and is not particularly limited.

又,於本實施方式中,被處理層200亦可包含1個氧化膜(例如,氧化矽膜)、及1個或複數個氮化膜(例如,氮化矽膜)。於本實施方式中,例如,如圖4所示,被處理層200具有2個氮化矽膜204、及由2個氮化矽膜204夾持之氧化矽膜202。例如,氧化矽膜202具有約800 nm~1200 nm之膜厚,氮化矽膜204具有約300 nm~400 nm之膜厚。Furthermore, in this embodiment, the layer to be processed 200 may also include one oxide film (for example, silicon oxide film) and one or more nitride films (for example, silicon nitride film). In this embodiment, for example, as shown in FIG. 4 , the layer to be processed 200 has two silicon nitride films 204 and a silicon oxide film 202 sandwiched between the two silicon nitride films 204 . For example, the silicon oxide film 202 has a film thickness of about 800 nm to 1200 nm, and the silicon nitride film 204 has a film thickness of about 300 nm to 400 nm.

於本實施方式中,使用具有所期望之開口圖案之遮罩220,對被處理層200進行蝕刻而形成溝槽。該溝槽例如可為具有約1 μm~3 μm之深度之大致圓筒形。又,該大致圓筒形例如亦可具有約20 nm~50 nm之直徑。而且,可於此種大致圓筒形之溝槽之內部,例如,形成電容器記憶胞。In this embodiment, a mask 220 with a desired opening pattern is used to etch the processed layer 200 to form trenches. The groove may be, for example, substantially cylindrical with a depth of about 1 μm to 3 μm. In addition, the substantially cylindrical shape may have a diameter of about 20 nm to 50 nm, for example. Moreover, a capacitor memory cell, for example, can be formed inside such a substantially cylindrical trench.

以下,對針對此種基板W之蝕刻中將溫室效應較低之氣體用作代替氣體之本實施方式之基板處理方法中所包含之蝕刻步驟進行說明。於本實施方式中,例如,使用具有所期望之開口圖案之遮罩220,對被處理層200進行蝕刻而形成溝槽。Hereinafter, the etching steps included in the substrate processing method of this embodiment using a gas with a low greenhouse effect as a substitute gas for etching such a substrate W will be described. In this embodiment, for example, a mask 220 having a desired opening pattern is used to etch the layer 200 to be processed to form a trench.

本實施方式之蝕刻步驟之處理氣體包含CF(氟碳)系氣體、及非活性氣體。CF系氣體可為C 3F 6(六氟丙烯)氣體、C 4F 8(八氟-1-丁烯、八氟-2-丁烯)氣體或該等之組合。例如,C 3F 6氣體係GWP為1以下,與用以形成DRAM元件之乾式蝕刻步驟中使用之C 4F 6(六氟-1,3-丁二烯)氣體(GWP:290)等相比,具有較低之GWP。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之含氫氣體,可抑制全球暖化。 The processing gas in the etching step of this embodiment includes CF (fluorocarbon) gas and inert gas. The CF-based gas may be C 3 F 6 (hexafluoropropylene) gas, C 4 F 8 (octafluoro-1-butene, octafluoro-2-butene) gas, or a combination thereof. For example, the GWP of the C 3 F 6 gas system is less than 1, which is equivalent to the C 4 F 6 (hexafluoro-1,3-butadiene) gas (GWP: 290) used in the dry etching step to form DRAM components. than, has a lower GWP. Therefore, in this embodiment, global warming can be suppressed by using hydrogen-containing gas with a lower greenhouse effect as described above.

又,非活性氣體可為氬氣、氦氣等稀有氣體、氮氣或該等之組合。In addition, the inert gas may be a rare gas such as argon or helium, nitrogen, or a combination thereof.

進而,於本實施方式中,處理氣體亦可包含氧氣(O 2)。 Furthermore, in this embodiment, the processing gas may also contain oxygen (O 2 ).

如以上所述,於用以形成DRAM元件之乾式蝕刻步驟中,藉由使用本實施方式之溫室效應較低之處理氣體進行蝕刻,可抑制全球暖化。進而,根據本實施方式,即便於使用此種溫室效應較低之氣體之情形時,亦可獲得與該製程中迄今為止使用之處理氣體同等之製程性能。As mentioned above, in the dry etching step for forming DRAM elements, global warming can be suppressed by using the process gas with a lower greenhouse effect of this embodiment for etching. Furthermore, according to this embodiment, even when such a gas with a low greenhouse effect is used, it is possible to obtain process performance equivalent to that of the process gas used hitherto in the process.

<第3實施方式> 其次,作為本發明之第3實施方式,研究於用以形成垂直NAND(Not AND,反及)型快閃記憶體元件之乾式蝕刻步驟中以溫室效應較低之氣體來代替。再者,垂直NAND構造亦稱為VNAND、3D-NAND構造。 <3rd Embodiment> Next, as a third embodiment of the present invention, it is studied to replace the dry etching step for forming a vertical NAND (Not AND) type flash memory device with a gas with a lower greenhouse effect. Furthermore, the vertical NAND structure is also called VNAND and 3D-NAND structure.

以下,參照圖5,對本實施方式之基板處理方法進行說明。圖5係表示本實施方式中處理之基板W之一例之剖視圖。於本實施方式中,基板處理方法例如包含對如圖5所示之基板W進行蝕刻處理之步驟。詳細而言,如圖5所示,基板W具有基底層212、積層於基底層212上且成為蝕刻之對象之被處理層200、及積層於被處理層200上之遮罩220。以下,對基板W之各層進行說明,但是,此處關於與上述實施方式共通之方面,則省略說明。Hereinafter, the substrate processing method of this embodiment will be described with reference to FIG. 5 . FIG. 5 is a cross-sectional view showing an example of the substrate W processed in this embodiment. In this embodiment, the substrate processing method includes, for example, the step of etching the substrate W as shown in FIG. 5 . Specifically, as shown in FIG. 5 , the substrate W has a base layer 212 , a to-be-processed layer 200 that is laminated on the base layer 212 and is a target of etching, and a mask 220 that is laminated on the to-be-processed layer 200 . Hereinafter, each layer of the substrate W will be described. However, description of the points common to the above-described embodiment will be omitted.

於本實施方式中,基底層212例如可為金屬膜、矽膜等,並不特別限定。In this embodiment, the base layer 212 can be, for example, a metal film, a silicon film, etc., and is not particularly limited.

於本實施方式中,被處理層200如圖5所示,亦可包含複數個包括1個氧化膜202(例如,氧化矽膜)與1個氮化膜204(例如,氮化矽膜)之積層構造。或者,被處理層200亦可包含複數個包括1個氧化膜(例如,氧化矽膜)與1個矽膜(例如,多晶矽膜)之積層構造。進而,被處理層200可包含至少約20個上述積層構造,亦可較佳為包含約40個,更佳為包含約60個,進而較佳為包含約70個。再者,於圖5中,為了方便起見,被處理層200被圖式為包含5個上述積層構造者,於本實施方式中,被處理層200只要包含至少約20個上述積層構造即可,其數量並不限定。In this embodiment, as shown in FIG. 5 , the processed layer 200 may also include a plurality of films including an oxide film 202 (for example, silicon oxide film) and a nitride film 204 (for example, silicon nitride film). Layered structure. Alternatively, the layer to be processed 200 may also include a plurality of laminated structures including one oxide film (eg, silicon oxide film) and one silicon film (eg, polycrystalline silicon film). Furthermore, the layer to be processed 200 may include at least about 20 of the above-described laminated structures, preferably about 40, more preferably about 60, and still more preferably about 70. Furthermore, in FIG. 5 , for the sake of convenience, the layer to be processed 200 is illustrated as including five of the above-mentioned layered structures. In this embodiment, the layer to be processed 200 only needs to include at least about 20 of the above-mentioned layered structures. , its quantity is not limited.

於本實施方式中,使用具有所期望之開口圖案之遮罩220,對被處理層200進行蝕刻而形成溝槽。該溝槽例如具有約2 μm~6 μm之深度。又,該溝槽,例如亦可具有約50 nm~150 nm之寬度。In this embodiment, a mask 220 with a desired opening pattern is used to etch the processed layer 200 to form trenches. The trench has a depth of about 2 μm to 6 μm, for example. In addition, the trench may have a width of about 50 nm to 150 nm, for example.

以下,對針對此種基板W之蝕刻中將溫室效應較低之氣體用作代替氣體之本實施方式之基板處理方法中所包含之蝕刻步驟進行說明。於本實施方式中,例如,使用具有所期望之開口圖案之遮罩220,對被處理層200進行蝕刻而形成溝槽。Hereinafter, the etching steps included in the substrate processing method of this embodiment using a gas with a low greenhouse effect as a substitute gas for etching the substrate W will be described. In this embodiment, for example, a mask 220 having a desired opening pattern is used to etch the layer 200 to be processed to form a trench.

本實施方式之蝕刻步驟之處理氣體包含CF系氣體、含氫氣體、及氧氣。CF系氣體可為C 3F 6(六氟丙烯)氣體、C 4F 8(八氟-1-丁烯、八氟-2-丁烯)氣體或該等之組合。如上文所說明,例如,C 3F 6氣體係GWP為1以下。而且,C 3F 6氣體等與用以形成垂直NAND型快閃記憶體元件之乾式蝕刻步驟中先前所使用之c-C 4F 8(全氟環丁烷)氣體(GWP:9540)相比,具有較低之GWP。進而,C 3F 6氣體等與先前使用之NF 3(三氟化氮)氣體(GWP:16100)、SF 6(六氟化硫)氣體(GWP:23500)相比,具有較低之GWP。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之CF系氣體,可抑制全球暖化。 The processing gas in the etching step of this embodiment includes CF-based gas, hydrogen-containing gas, and oxygen. The CF-based gas may be C 3 F 6 (hexafluoropropylene) gas, C 4 F 8 (octafluoro-1-butene, octafluoro-2-butene) gas, or a combination thereof. As explained above, for example, the GWP of the C 3 F 6 gas system is 1 or less. Moreover, C 3 F 6 gas and the like have better performance than the cC 4 F 8 (perfluorocyclobutane) gas (GWP: 9540) previously used in the dry etching step for forming vertical NAND flash memory devices. Lower GWP. Furthermore, C 3 F 6 gas and the like have a lower GWP than the previously used NF 3 (nitrogen trifluoride) gas (GWP: 16100) and SF 6 (sulfur hexafluoride) gas (GWP: 23500). Therefore, in this embodiment, global warming can be suppressed by using the CF-based gas with a low greenhouse effect as described above.

又,含氫氣體亦可為選自由氫氣、氟化氫氣體、及氫氟烯烴氣體所組成之群中之1種氣體或選自該等之複數種氣體之組合。又,氫氟烯烴氣體可為C 2H 2F 2(1,1-二氟乙烯)氣體、C 3H 2F 4(1,3,3,3-四氟丙烯)氣體、C 4H 2F 6(反式-1,1,1,4,4,4-六氟-2-丁烯)氣體或該等之組合。關於該等之氣體,亦如上文所說明,溫室效應較低,例如,C 3H 2F 4氣體係GWP為1以下,C 4H 2F 6氣體係GWP為7以下。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之含氫氣體,可抑制全球暖化。 Furthermore, the hydrogen-containing gas may be one gas selected from the group consisting of hydrogen gas, hydrogen fluoride gas, and hydrofluoroolefin gas, or a combination of a plurality of gases selected from these. In addition, the hydrofluoroolefin gas may be C 2 H 2 F 2 (1,1-difluoroethylene) gas, C 3 H 2 F 4 (1,3,3,3-tetrafluoropropene) gas, or C 4 H 2 F 6 (trans-1,1,1,4,4,4-hexafluoro-2-butene) gas or a combination thereof. Regarding these gases, as explained above, the greenhouse effect is low. For example, the GWP of the C 3 H 2 F 4 gas system is 1 or less, and the GWP of the C 4 H 2 F 6 gas system is 7 or less. Therefore, in this embodiment, global warming can be suppressed by using hydrogen-containing gas with a lower greenhouse effect as described above.

如以上所述,於用以形成垂直NAND型元件之乾式蝕刻步驟中,藉由使用本實施方式之溫室效應較低之處理氣體進行蝕刻,可抑制全球暖化。進而,根據本實施方式,即便於使用此種溫室效應較低之氣體之情形時,亦可獲得與該製程中迄今為止使用之處理氣體同等之製程性能。As mentioned above, in the dry etching step for forming the vertical NAND type device, global warming can be suppressed by using the process gas with a lower greenhouse effect of the present embodiment for etching. Furthermore, according to this embodiment, even when such a gas with a low greenhouse effect is used, it is possible to obtain process performance equivalent to that of the process gas used hitherto in the process.

<第4實施方式> 於半導體元件之製造製程中,形成微處理器、邏輯電路、及記憶體元件等各種半導體元件。此種半導體元件可藉由包含製成各種類型之遮罩之圖案化技術之製程而製造。詳細而言,於此種若干個製程中,對含有氧化矽膜、氮化矽膜、矽膜等之層進行蝕刻。以下,對將溫室效應較低之氣體用作代替氣體之蝕刻步驟進行說明。 <4th Embodiment> In the manufacturing process of semiconductor components, various semiconductor components such as microprocessors, logic circuits, and memory components are formed. Such semiconductor devices can be fabricated by processes involving patterning techniques that create various types of masks. Specifically, in such several processes, layers including silicon oxide film, silicon nitride film, silicon film, etc. are etched. Next, an etching step using a gas with a lower greenhouse effect as a substitute gas will be described.

(氧化矽膜) 本實施方式中之對氧化矽膜之蝕刻步驟之處理氣體包含CF系氣體、氧氣、及非活性氣體。CF系氣體可為C 3F 6(六氟丙烯)氣體、C 4F 8(八氟-1-丁烯、八氟-2-丁烯)氣體或該等之組合。如上文所說明,例如,C 3F 6氣體係GWP為1以下,與對氧化矽膜之蝕刻步驟中所使用之CF 4氣體(GWP:6630)、CHF 3(三氟甲烷)氣體(GWP:12400)等相比,具有較低之GWP。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之CF系氣體,可抑制全球暖化。 (Silicon Oxide Film) The process gas used in the etching step of the silicon oxide film in this embodiment includes CF-based gas, oxygen, and inert gas. The CF-based gas may be C 3 F 6 (hexafluoropropylene) gas, C 4 F 8 (octafluoro-1-butene, octafluoro-2-butene) gas, or a combination thereof. As explained above, for example, the GWP of the C 3 F 6 gas system is 1 or less, and the CF 4 gas (GWP: 6630) and CHF 3 (trifluoromethane) gas (GWP: 1) used in the etching step of the silicon oxide film are: 12400), has a lower GWP. Therefore, in this embodiment, global warming can be suppressed by using the CF-based gas with a low greenhouse effect as described above.

又,非活性氣體可為氬氣、氦氣等稀有氣體、氮氣或該等之組合。In addition, the inert gas may be a rare gas such as argon or helium, nitrogen, or a combination thereof.

又,本實施方式中之對氧化矽膜之蝕刻步驟之處理氣體亦可包含CF系氣體、及CHF(氫氟碳)系氣體。CF系氣體可為COF 2氣體、C 4F 8O(五氟乙基三氟乙烯醚)氣體、CF 3COF(1,2,2,2-四氟乙烷-1-酮)氣體或該等之組合。又,作為CHF系氣體,可例舉CHF 2COF(二氟乙酸氟)氣體等。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之CF系氣體及CHF系氣體,可抑制全球暖化。進而,於上述蝕刻步驟之處理氣體中,亦可代替CHF系氣體而使用氟化氫(HF)氣體,或者與CHF系氣體一起使用氟化氫(HF)氣體。 In addition, the processing gas in the etching step of the silicon oxide film in this embodiment may also include CF-based gas and CHF (hydrofluorocarbon)-based gas. The CF series gas may be COF 2 gas, C 4 F 8 O (pentafluoroethyl trifluoroethylene ether) gas, CF 3 COF (1,2,2,2-tetrafluoroethane-1-one) gas or the A combination of others. Examples of the CHF-based gas include CHF 2 COF (fluorine difluoroacetate) gas and the like. Therefore, in this embodiment, global warming can be suppressed by using CF-based gas and CHF-based gas with low greenhouse effect as described above. Furthermore, in the processing gas in the above-mentioned etching step, hydrogen fluoride (HF) gas may be used instead of CHF-based gas, or hydrogen fluoride (HF) gas may be used together with CHF-based gas.

(氮化矽膜) 本實施方式中之對氮化矽膜之蝕刻步驟之處理氣體包括含氫氣體、氧氣、及非活性氣體。含氫氣體可為選自由氫氣、氟化氫氣體、及氫氟烯烴氣體所組成之群中之1種氣體或選自該等之複數種氣體之組合。又,氫氟烯烴氣體可為C 2H 2F 2(1,1-二氟乙烯)氣體、C 3H 2F 4(1,3,3,3-四氟丙烯)氣體、C 4H 2F 6(反式-1,1,1,4,4,4-六氟-2-丁烯)氣體或該等之組合。例如,C 3H 2F 4氣體係GWP為1,C 4H 2F 6氣體係GWP為7以下,與對氮化矽膜之蝕刻步驟中所使用之CH 3F(氟甲烷)氣體(GWP:116)等相比,具有較低之GWP。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之含氫氣體,可抑制全球暖化。 (Silicon nitride film) In this embodiment, the processing gas in the etching step of the silicon nitride film includes hydrogen-containing gas, oxygen, and inert gas. The hydrogen-containing gas may be one gas selected from the group consisting of hydrogen gas, hydrogen fluoride gas, and hydrofluoroolefin gas, or a combination of a plurality of gases selected from these. In addition, the hydrofluoroolefin gas may be C 2 H 2 F 2 (1,1-difluoroethylene) gas, C 3 H 2 F 4 (1,3,3,3-tetrafluoropropene) gas, or C 4 H 2 F 6 (trans-1,1,1,4,4,4-hexafluoro-2-butene) gas or a combination thereof. For example, the GWP of the C 3 H 2 F 4 gas system is 1, the GWP of the C 4 H 2 F 6 gas system is 7 or less, and the CH 3 F (fluoromethane) gas (GWP) used in the etching step of the silicon nitride film is :116), has a lower GWP. Therefore, in this embodiment, global warming can be suppressed by using hydrogen-containing gas with a lower greenhouse effect as described above.

又,非活性氣體可為氬氣、氦氣等稀有氣體、氮氣或該等之組合。In addition, the inert gas may be a rare gas such as argon or helium, nitrogen, or a combination thereof.

(矽膜) 本實施方式中之對矽膜之蝕刻步驟之處理氣體包括含氫氣體、氧氣、及非活性氣體。含氫氣體可包含氟化氫氣體、溴化氫(HBr)氣體等。例如,HBr氣體與對矽膜之蝕刻步驟中所使用之NF 3(三氟化氮)氣體(GWP:16100)等相比,具有較低之GWP。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之含氫氣體,可抑制全球暖化。 (Silicon Film) In this embodiment, the processing gas used in the etching step of the silicon film includes hydrogen-containing gas, oxygen, and inert gas. The hydrogen-containing gas may include hydrogen fluoride gas, hydrogen bromide (HBr) gas, etc. For example, HBr gas has a lower GWP than NF 3 (nitrogen trifluoride) gas (GWP: 16100) used in the etching step of the silicon film. Therefore, in this embodiment, global warming can be suppressed by using hydrogen-containing gas with a lower greenhouse effect as described above.

又,非活性氣體可為氬氣、氦氣等稀有氣體、氮氣或該等之組合。In addition, the inert gas may be a rare gas such as argon or helium, nitrogen, or a combination thereof.

如以上所述,於用以對含有氧化矽膜、氮化矽膜、矽膜等之層進行圖案化之蝕刻步驟中,藉由使用本實施方式之溫室效應較低之處理氣體進行蝕刻,可抑制全球暖化。進而,根據本實施方式,即便於使用此種溫室效應較低之氣體之情形時,亦可獲得與該製程中迄今為止使用之處理氣體同等之製程性能。As described above, in the etching step for patterning a layer containing a silicon oxide film, a silicon nitride film, a silicon film, etc., by etching using a processing gas with a low greenhouse effect according to this embodiment, it is possible to Suppress global warming. Furthermore, according to this embodiment, even when such a gas with a low greenhouse effect is used, it is possible to obtain process performance equivalent to that of the process gas used hitherto in the process.

<第5實施方式> 於半導體元件之製造製程中,為了產生電漿,並利用所產生之電漿對基板進行處理,而使用各種腔室。於進行此種處理之過程中,因處理時產生之副產物附著於腔室之內壁等,進而副產物逐漸沈積,而生長為粒子。由於此種粒子有對穩定之電漿之產生或基板處理帶來不良影響之可能性,故而為了減少內壁等之粒子,以特定之週期對腔室進行乾式清洗。 <5th Embodiment> In the manufacturing process of semiconductor devices, various chambers are used in order to generate plasma and use the generated plasma to process substrates. During the process of such treatment, the by-products generated during the treatment adhere to the inner wall of the chamber, etc., and then the by-products gradually deposit and grow into particles. Since such particles may have adverse effects on stable plasma generation or substrate processing, in order to reduce particles on the inner walls, etc., the chamber is dry-cleaned at specific intervals.

詳細而言,於此種腔室之乾式清洗中,對腔室內供給清洗氣體、及非活性氣體,使用所供給之氣體產生電漿,藉由電漿對腔室之內壁等進行清洗。作為先前以來使用之清洗氣體,例如,可例舉NF 3(三氟化氮)氣體(GWP:16100)、SF 6(六氟化硫)氣體(GWP:23500)等,但該等之氣體係GWP較高,即,溫室效應較高。 Specifically, in dry cleaning of such a chamber, cleaning gas and inert gas are supplied into the chamber, plasma is generated using the supplied gas, and the inner wall of the chamber and the like are cleaned by the plasma. Examples of cleaning gases that have been used conventionally include NF 3 (nitrogen trifluoride) gas (GWP: 16100), SF 6 (sulfur hexafluoride) gas (GWP: 23500), etc., but these gas systems The GWP is higher, that is, the greenhouse effect is higher.

以下,對此種清洗中將溫室效應較低之氣體用作代替氣體之本實施方式之清洗進行說明。Hereinafter, cleaning according to this embodiment using a gas with a lower greenhouse effect as a substitute gas in such cleaning will be described.

於本實施方式中,清洗氣體可為COF 2氣體、HF(氟化氫)氣體、氟氣(F 2)、FNO(亞硝基氟)氣體、F 3NO(三氟氧化胺)氣體或該等之組合。該等之氣體與迄今為止用作清洗氣體之NF 3氣體(GWP16100)、SF 6氣體(GWP23500)等相比,溫室效應較低。因此,於本實施方式中,藉由使用如上所述之溫室效應較低之清洗氣體,可抑制全球暖化。 In this embodiment, the cleaning gas may be COF 2 gas, HF (hydrogen fluoride) gas, fluorine gas (F 2 ), FNO (nitroso fluorine) gas, F 3 NO (ammonium trifluoride oxide) gas, or any of these gases. combination. These gases have a lower greenhouse effect than NF 3 gas (GWP16100), SF 6 gas (GWP23500), etc., which have been used as cleaning gases so far. Therefore, in this embodiment, global warming can be suppressed by using a cleaning gas with a lower greenhouse effect as described above.

如以上所述,於腔室之乾式清洗中,藉由使用本實施方式之溫室效應較低之清洗氣體進行清洗,可抑制全球暖化。進而,根據本實施方式,即便於使用此種溫室效應較低之氣體之情形時,亦可獲得與該清洗中迄今為止使用之清洗氣體同等之清洗性能。As mentioned above, in the dry cleaning of the chamber, global warming can be suppressed by using the cleaning gas with lower greenhouse effect of this embodiment for cleaning. Furthermore, according to this embodiment, even when such a gas with a low greenhouse effect is used, it is possible to obtain cleaning performance equivalent to that of the cleaning gas used hitherto for this cleaning.

<電漿處理裝置> 其次,對可應用於本發明之各實施方式之基板處理方法之電漿處理裝置的一例進行說明。圖6係用以說明電容耦合型之電漿處理裝置之構成例之圖。 <Plasma treatment equipment> Next, an example of a plasma processing apparatus applicable to the substrate processing method of each embodiment of the present invention will be described. FIG. 6 is a diagram illustrating a configuration example of a capacitive coupling type plasma processing apparatus.

如圖6所示,電漿處理系統包含電容耦合型之電漿處理裝置1及控制部2。電容耦合型之電漿處理裝置1包含電漿處理腔室10、氣體供給部20、電源30及排氣系統40。又,電漿處理裝置1包含基板支持部11及氣體導入部。氣體導入部構成為將至少一種處理氣體導入電漿處理腔室10內。氣體導入部包含簇射頭13。基板支持部11配置於電漿處理腔室10內。簇射頭13配置於基板支持部11之上方。於一實施方式中,簇射頭13構成電漿處理腔室10之頂部(ceiling)之至少一部分。電漿處理腔室10具有由簇射頭13、電漿處理腔室10之側壁10a及基板支持部11而界定之電漿處理空間10s。電漿處理腔室10具有用以將至少一種處理氣體供給至電漿處理空間10s之至少1個氣體供給口、及用以將氣體自電漿處理空間排出之至少1個氣體排出口。電漿處理腔室10接地。簇射頭13及基板支持部11與電漿處理腔室10之殼體電性地絕緣。As shown in FIG. 6 , the plasma treatment system includes a capacitively coupled plasma treatment device 1 and a control unit 2 . The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10 , a gas supply unit 20 , a power supply 30 and an exhaust system 40 . Moreover, the plasma processing apparatus 1 includes a substrate support part 11 and a gas introduction part. The gas introduction part is configured to introduce at least one processing gas into the plasma processing chamber 10 . The gas introduction part includes the shower head 13 . The substrate support part 11 is arranged in the plasma processing chamber 10 . The shower head 13 is arranged above the substrate support part 11 . In one embodiment, the shower head 13 forms at least a portion of the ceiling of the plasma processing chamber 10 . The plasma processing chamber 10 has a plasma processing space 10 s defined by the shower head 13 , the side wall 10 a of the plasma processing chamber 10 and the substrate support 11 . The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s, and at least one gas exhaust port for discharging the gas from the plasma processing space. Plasma processing chamber 10 is grounded. The shower head 13 and the substrate support part 11 are electrically insulated from the casing of the plasma processing chamber 10 .

基板支持部11包含本體部111及環組件112。本體部111具有用以支持基板W之中央區域111a、及用以支持環組件112之環狀區域111b。晶圓為基板W之一例。本體部111之環狀區域111b於俯視時包圍本體部111之中央區域111a。基板W配置於本體部111之中央區域111a上,環組件112以包圍本體部111之中央區域111a上之基板W之方式配置於本體部111之環狀區域111b上。因此,中央區域111a亦被稱為用以支持基板W之基板支持面,環狀區域111b亦被稱為用以支持環組件112之環支持面。The substrate support part 11 includes a main body part 111 and a ring assembly 112 . The main body part 111 has a central area 111a for supporting the substrate W, and an annular area 111b for supporting the ring assembly 112. The wafer is an example of the substrate W. The annular area 111b of the main body part 111 surrounds the central area 111a of the main body part 111 when viewed from above. The substrate W is disposed on the central region 111 a of the main body 111 , and the ring component 112 is disposed on the annular region 111 b of the main body 111 to surround the substrate W on the central region 111 a of the main body 111 . Therefore, the central region 111 a is also called a substrate supporting surface for supporting the substrate W, and the annular region 111 b is also called a ring supporting surface for supporting the ring assembly 112 .

於一實施方式中,本體部111包含基台1110及靜電吸盤1111。基台1110包含導電性構件。基台1110之導電性構件可作為下部電極而發揮功能。靜電吸盤1111配置於基台1110之上。靜電吸盤1111包含陶瓷構件1111a及配置於陶瓷構件1111a內之靜電電極1111b。陶瓷構件1111a具有中央區域111a。於一實施方式中,陶瓷構件1111a亦具有環狀區域111b。再者,如環狀靜電吸盤或環狀絕緣構件般之包圍靜電吸盤1111之其他構件亦可具有環狀區域111b。於該情形時,環組件112亦可配置於環狀靜電吸盤或環狀絕緣構件之上,亦可配置於靜電吸盤1111與環狀絕緣構件之兩者之上。又,耦合於下述RF電源31及/或DC(Direct Current,直流)電源32之至少1個RF/DC電極亦可配置於陶瓷構件1111a內。於該情形時,至少1個RF/DC電極作為下部電極而發揮功能。於將下述偏壓RF信號及/或DC信號供給至至少1個RF/DC電極之情形時,RF/DC電極亦被稱為偏壓電極。再者,基台1110之導電性構件與至少1個RF/DC電極亦可作為複數個下部電極而發揮功能。又,靜電電極1111b亦可作為下部電極而發揮功能。因此,基板支持部11包含至少1個下部電極。In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is arranged on the base 1110 . The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b arranged in the ceramic member 1111a. Ceramic member 1111a has a central region 111a. In one embodiment, the ceramic component 1111a also has an annular region 111b. Furthermore, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may also have an annular region 111b. In this case, the ring component 112 may also be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. In addition, at least one RF/DC electrode coupled to the RF power supply 31 and/or the DC (Direct Current, DC) power supply 32 described below may be arranged in the ceramic member 1111a. In this case, at least one RF/DC electrode functions as the lower electrode. When the following bias RF signal and/or DC signal is supplied to at least one RF/DC electrode, the RF/DC electrode is also called a bias electrode. Furthermore, the conductive member and at least one RF/DC electrode of the base 1110 may also function as a plurality of lower electrodes. In addition, the electrostatic electrode 1111b may also function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.

環組件112包含1個或複數個環狀構件。於一實施方式中,1個或複數個環狀構件包含1個或複數個邊緣環及至少1個蓋環。邊緣環由導電性材料或絕緣材料形成,蓋環由絕緣材料形成。The ring assembly 112 includes one or a plurality of ring-shaped members. In one embodiment, one or more ring-shaped members include one or more edge rings and at least one cover ring. The edge ring is formed of conductive material or insulating material, and the cover ring is formed of insulating material.

又,基板支持部11亦可包含以將靜電吸盤1111、環組件112及基板中至少一者調節為目標溫度之方式構成之溫度調節模組。溫度調節模組亦可包含加熱器、傳熱介質、流路1110a、或該等之組合。對流路1110a流通如鹽水或氣體般之傳熱流體。於一實施方式中,流路1110a形成於基台1110內,1個或複數個加熱器配置於靜電吸盤1111之陶瓷構件1111a內。又,基板支持部11亦可包含以對基板W之背面與中央區域111a之間的間隙供給傳熱氣體之方式構成之傳熱氣體供給部。In addition, the substrate support part 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may also include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as salt water or gas flows through the counter flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or a plurality of heaters are arranged in the ceramic component 1111a of the electrostatic chuck 1111. In addition, the substrate support part 11 may include a heat transfer gas supply part configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

簇射頭13構成為將來自氣體供給部20之至少一種處理氣體導入至電漿處理空間10s內。簇射頭13具有至少1個氣體供給口13a、至少1個氣體擴散室13b、及複數個氣體導入口13c。供給至氣體供給口13a之處理氣體通過氣體擴散室13b自複數個氣體導入口13c導入至電漿處理空間10s內。又,簇射頭13包含至少1個上部電極。再者,氣體導入部除了包含簇射頭13以外,亦可包含安裝於形成於側壁10a之1個或複數個開口部之1個或複數個側氣體注入部(SGI:Side Gas Injector)。The shower head 13 is configured to introduce at least one kind of processing gas from the gas supply unit 20 into the plasma processing space 10 s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas introduction ports 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas introduction ports 13c through the gas diffusion chamber 13b. In addition, the shower head 13 includes at least one upper electrode. Furthermore, in addition to the shower head 13, the gas introduction part may also include one or a plurality of side gas injectors (SGI) installed in one or a plurality of openings formed in the side wall 10a.

氣體供給部20亦可包含至少1個氣體源21及至少1個流量控制器22。於一實施方式中,氣體供給部20構成為將至少一種處理氣體自分別對應之氣體源21經由分別對應之流量控制器22而供給至簇射頭13。各流量控制器22例如亦可包含質量流量控制器或壓力控制式之流量控制器。進而,氣體供給部20亦可包含將至少一種處理氣體之流量調變或脈衝化之1個或1個以上之流量調變元件。The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22 . In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from corresponding gas sources 21 to the shower heads 13 through corresponding flow controllers 22 . Each flow controller 22 may also include a mass flow controller or a pressure control type flow controller, for example. Furthermore, the gas supply unit 20 may include one or more flow rate modulating elements that modulate or pulse the flow rate of at least one processing gas.

電源30包含經由至少1個阻抗匹配電路而耦合於電漿處理腔室10之RF電源31。RF電源31構成為將至少1個RF信號(RF電力)供給至至少1個下部電極、及/或至少1個上部電極。藉此,自供給至電漿處理空間10s之至少一種處理氣體形成電漿。因此,RF電源31可作為以於電漿處理腔室10中自一種或一種以上之處理氣體產生電漿之方式構成的電漿產生部之至少一部分發揮功能。又,藉由將偏壓RF信號供給至至少1個下部電極,而於基板W產生偏壓電位,可將所形成之電漿中之離子成分饋入至基板W。Power supply 30 includes an RF power supply 31 coupled to plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and/or at least one upper electrode. Thereby, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least part of a plasma generating unit configured to generate plasma from one or more processing gases in the plasma processing chamber 10 . Furthermore, by supplying a bias RF signal to at least one lower electrode to generate a bias potential on the substrate W, the ion component in the formed plasma can be fed to the substrate W.

於一實施方式中,RF電源31包含第1RF產生部31a及第2RF產生部31b。第1RF產生部31a構成為經由至少1個阻抗匹配電路而耦合於至少1個下部電極、及/或至少1個上部電極,且產生電漿產生用之源RF信號(源RF電力)。於一實施方式中,源RF信號具有10 MHz~150 MHz之範圍內之頻率。於一實施方式中,第1RF產生部31a亦可構成為產生具有不同之頻率之複數個源RF信號。將所產生之1個或複數個源RF信號供給至至少1個下部電極、及/或至少1個上部電極。In one embodiment, the RF power supply 31 includes a first RF generating part 31a and a second RF generating part 31b. The first RF generating unit 31a is coupled to at least one lower electrode and/or at least one upper electrode via at least one impedance matching circuit, and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may also be configured to generate a plurality of source RF signals with different frequencies. The generated source RF signal or signals are supplied to at least one lower electrode and/or at least one upper electrode.

第2RF產生部31b構成為經由至少1個阻抗匹配電路而耦合於至少1個下部電極,且產生偏壓RF信號(偏壓RF電力)。偏壓RF信號之頻率可與源RF信號之頻率相同,亦可不同。於一實施方式中,偏壓RF信號具有較源RF信號之頻率低之頻率。於一實施方式中,偏壓RF信號具有100 kHz~60 MHz之範圍內之頻率。於一實施方式中,第2RF產生部31b亦可構成為產生具有不同之頻率之複數個偏壓RF信號。將所產生之1個或複數個偏壓RF信號供給至至少1個下部電極。又,於各種實施方式中,亦可將源RF信號及偏壓RF信號中至少一者脈衝化。The second RF generating unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal can be the same as the frequency of the source RF signal, or it can be different. In one embodiment, the bias RF signal has a lower frequency than the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generating unit 31b may also be configured to generate a plurality of bias RF signals with different frequencies. One or more of the generated bias RF signals are supplied to at least one lower electrode. Furthermore, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

又,電源30亦可包含耦合於電漿處理腔室10之DC電源32。DC電源32包含第1DC產生部32a及第2DC產生部32b。於一實施方式中,第1DC產生部32a構成為連接於至少1個下部電極,且產生第1DC信號。將所產生之第1偏壓DC信號施加至至少1個下部電極。於一實施方式中,第2DC產生部32b構成為連接於至少1個上部電極,且產生第2DC信號。將所產生之第2DC信號施加至至少1個上部電極。Alternatively, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10 . The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is connected to at least one lower electrode and is configured to generate a first DC signal. The generated first bias DC signal is applied to at least one lower electrode. In one embodiment, the second DC generating unit 32b is connected to at least one upper electrode and is configured to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

於各種實施方式中,亦可將第1及第2DC信號中至少一者脈衝化。於該情形時,將電壓脈衝之序列施加至至少1個下部電極、及/或至少1個上部電極。電壓脈衝亦可具有矩形、梯形、三角形或該等之組合之脈衝波形。於一實施方式中,用以自DC信號產生電壓脈衝之序列之波形產生部連接於第1DC產生部32a與至少1個下部電極之間。因此,第1DC產生部32a及波形產生部構成電壓脈衝產生部。於第2DC產生部32b及波形產生部構成電壓脈衝產生部之情形時,電壓脈衝產生部連接於至少1個上部電極。電壓脈衝可具有正極性,亦可具有負極性。又,電壓脈衝之序列亦可於1個週期內包含1個或複數個正極性電壓脈衝、及1個或複數個負極性電壓脈衝。再者,第1及第2DC產生部32a、32b可除了RF電源31以外設置,亦可第1DC產生部32a代替第2RF產生部31b而設置。In various embodiments, at least one of the first and second DC signals may also be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and/or at least one upper electrode. The voltage pulse may also have a rectangular, trapezoidal, triangular or a combination of these pulse waveforms. In one embodiment, a waveform generating part for generating a sequence of voltage pulses from a DC signal is connected between the first DC generating part 32a and at least one lower electrode. Therefore, the first DC generating unit 32a and the waveform generating unit constitute a voltage pulse generating unit. When the second DC generating part 32b and the waveform generating part constitute a voltage pulse generating part, the voltage pulse generating part is connected to at least one upper electrode. The voltage pulse can have positive or negative polarity. In addition, the sequence of voltage pulses may also include one or a plurality of positive polarity voltage pulses and one or a plurality of negative polarity voltage pulses within one cycle. Furthermore, the first and second DC generating parts 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating part 32a may be provided in place of the second RF generating part 31b.

排氣系統40例如可連接於設置於電漿處理腔室10之底部之氣體排出口10e。排氣系統40亦可包含壓力調整閥及真空泵。藉由壓力調整閥調整電漿處理空間10s內之壓力。真空泵亦可包含渦輪分子泵、乾式真空泵或該等之組合。For example, the exhaust system 40 may be connected to the gas exhaust port 10e provided at the bottom of the plasma processing chamber 10 . The exhaust system 40 may also include a pressure regulating valve and a vacuum pump. Use the pressure adjustment valve to adjust the pressure in the plasma processing space within 10 seconds. Vacuum pumps may also include turbomolecular pumps, dry vacuum pumps, or combinations thereof.

控制部2對使電漿處理裝置1執行本發明中敍述之各種步驟之電腦能夠執行之命令進行處理。控制部2可構成為對電漿處理裝置1之各要素進行控制以執行此處敍述之各種步驟。於一實施方式中,控制部2之一部分或全部亦可包含於電漿處理裝置1中。控制部2亦可包含處理部2a1、記憶部2a2及通信介面2a3。控制部2例如可藉由電腦2a而實現。處理部2a1可構成為藉由自記憶部2a2讀出程式,執行所讀出之程式而進行各種控制動作。該程式可預先儲存於記憶部2a2中,亦可於需要時經由媒體而取得。所取得之程式儲存於記憶部2a2中,藉由處理部2a1自記憶部2a2讀出後執行。媒體可為電腦2a能夠讀取之各種記憶媒體,亦可為連接於通信介面2a3通信線路。處理部2a1亦可為CPU(Central Processing Unit,中央處理單元)。記憶部2a2亦可包含RAM(Random Access Memory,隨機存取記憶體)、ROM(Read Only Memory,唯讀記憶體)、HDD(Hard Disk Drive,硬式磁碟機)、SSD(Solid State Drive,固態驅動器)、或該等之組合。通信介面2a3亦可經由LAN(Local Area Network,區域網路)等通信線路而與電漿處理裝置1之間進行通信。The control unit 2 processes computer-executable commands that cause the plasma processing device 1 to execute various steps described in the present invention. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to execute various steps described here. In one embodiment, part or all of the control unit 2 may also be included in the plasma processing device 1 . The control unit 2 may also include a processing unit 2a1, a memory unit 2a2, and a communication interface 2a3. The control unit 2 can be realized by a computer 2a, for example. The processing unit 2a1 may be configured to read a program from the memory unit 2a2 and execute the read program to perform various control operations. The program can be stored in the memory unit 2a2 in advance, or can be obtained through the media when needed. The obtained program is stored in the memory unit 2a2, and is read out from the memory unit 2a2 by the processing unit 2a1 and executed. The media may be various memory media that can be read by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may also be a CPU (Central Processing Unit). The memory unit 2a2 may also include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive) drive), or a combination of these. The communication interface 2a3 can also communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

再者,於本發明之各實施方式之基板處理方法中,並不限定為使用圖6所示之電漿處理裝置,能夠根據各製造製程來使用各種電漿處理裝置。例如,於圖6所示之電漿處理裝置中,作為電漿源,使用電容耦合型電漿(CCP),但是於本發明之實施方式中,並不限定於此。例如,除了電容耦合型電漿(CCP)以外,亦可為感應耦合電漿(ICP)、微波激發表面電漿(SWP)等。Furthermore, the substrate processing method according to each embodiment of the present invention is not limited to using the plasma processing apparatus shown in FIG. 6 , and various plasma processing apparatuses can be used according to each manufacturing process. For example, in the plasma processing apparatus shown in FIG. 6 , capacitively coupled plasma (CCP) is used as the plasma source, but the embodiment of the present invention is not limited to this. For example, in addition to capacitively coupled plasma (CCP), inductively coupled plasma (ICP), microwave excited surface plasma (SWP), etc. may also be used.

<總結> 如以上所述,本發明之實施方式之基板處理方法包含以下步驟:將包括含矽膜(被處理層200)、及積層於該含矽膜200上之遮罩220之基板W搬入至腔室內;以及自包含COF 2氣體、及含氫氣體之處理氣體產生電漿,對上述含矽膜200進行蝕刻;相對於上述處理氣體之總流量之上述含氫氣體之流量換算為氫氣,為13體積%以上且未達50體積%。藉此,根據本發明之實施方式之基板處理方法,可抑制全球暖化,且可獲得與該基板處理方法中迄今為止使用之處理氣體同等之製程性能。 <Summary> As described above, the substrate processing method according to the embodiment of the present invention includes the following steps: carrying in the substrate W including the silicon-containing film (the layer to be processed 200 ) and the mask 220 laminated on the silicon-containing film 200 into the chamber; and generate plasma from the processing gas including COF 2 gas and hydrogen-containing gas to etch the silicon-containing film 200; the flow rate of the hydrogen-containing gas relative to the total flow rate of the above-mentioned processing gas is converted into hydrogen gas, It is 13 volume% or more and less than 50 volume%. Thereby, the substrate processing method according to the embodiment of the present invention can suppress global warming and obtain the same process performance as the processing gas used in the substrate processing method hitherto.

又,根據本發明之實施方式,上述含氫氣體可包含選自由氫氣、氟化氫氣體、及氫氟烯烴氣體所組成之群中之至少一者。Furthermore, according to an embodiment of the present invention, the hydrogen-containing gas may include at least one selected from the group consisting of hydrogen gas, hydrogen fluoride gas, and hydrofluoroolefin gas.

又,根據本發明之實施方式,上述氫氟烯烴氣體可包含選自由C 2H 2F 2(1,1-二氟乙烯)氣體、C 3H 2F 4(1,3,3,3-四氟丙烯)氣體、及C 4H 2F 6(反式-1,1,1,4,4,4-六氟-2-丁烯)氣體所組成之群中之至少一者。 Furthermore, according to an embodiment of the present invention, the hydrofluoroolefin gas may include a gas selected from the group consisting of C 2 H 2 F 2 (1,1-vinylidene fluoride) gas, C 3 H 2 F 4 (1,3,3,3- At least one of the group consisting of tetrafluoropropylene) gas and C 4 H 2 F 6 (trans-1,1,1,4,4,4-hexafluoro-2-butene) gas.

又,根據本發明之實施方式,上述處理氣體可進而包含非活性氣體,上述非活性氣體可包含稀有氣體、及氮氣中之至少一者。Furthermore, according to the embodiment of the present invention, the processing gas may further include an inert gas, and the inert gas may include at least one of a rare gas and nitrogen.

又,根據本發明之實施方式,上述含矽膜(被處理層200)可包含氧化矽膜或Low-k膜。Furthermore, according to the embodiment of the present invention, the silicon-containing film (processed layer 200 ) may include a silicon oxide film or a Low-k film.

又,根據本發明之實施方式,上述Low-k膜可包含選自由SiOC膜、SiCN膜、及SiOCH膜所組成之群中之至少一者。Furthermore, according to an embodiment of the present invention, the Low-k film may include at least one selected from the group consisting of a SiOC film, a SiCN film, and a SiOCH film.

又,根據本發明之實施方式,上述遮罩220可包含碳及金屬中之至少一者。Furthermore, according to embodiments of the present invention, the mask 220 may include at least one of carbon and metal.

又,根據本發明之實施方式,上述含碳之遮罩可包含選自由旋塗式碳、碳化鎢、非晶形碳、及碳化硼所組成之群中之至少一者。Furthermore, according to an embodiment of the present invention, the carbon-containing mask may include at least one selected from the group consisting of spin-coated carbon, tungsten carbide, amorphous carbon, and boron carbide.

又,根據本發明之實施方式,蝕刻步驟可為用以形成邏輯電路之配線層之蝕刻步驟。Furthermore, according to an embodiment of the present invention, the etching step may be an etching step for forming a wiring layer of a logic circuit.

又,根據本發明之實施方式,上述電漿可為電容耦合型電漿。Furthermore, according to an embodiment of the present invention, the plasma may be capacitively coupled plasma.

<補充> 以上,對本發明之實施方式進行了說明,但是應認為此次所揭示之實施方式於所有方面為例示,並非限制性者。即,上述實施方式能夠以多樣之形態實現。又,上述實施方式亦可不脫離申請專利範圍及其主旨,以各種形態進行省略、置換、變更、組合。 <Supplement> The embodiments of the present invention have been described above, but it should be understood that the embodiments disclosed this time are illustrative in all respects and not restrictive. That is, the above-described embodiment can be implemented in various forms. In addition, the above-described embodiments may be omitted, replaced, changed, or combined in various forms without departing from the scope of the patent application and the gist thereof.

又,本說明書中記載之效果只不過為說明性或例示性者,並非限定性者。即,本發明之技術可與上述結果一起,或代替上述效果,發揮根據本說明書之記載而業者明瞭之其他效果。In addition, the effects described in this specification are merely illustrative or illustrative and not restrictive. That is, the technology of the present invention can exhibit other effects that are apparent to those skilled in the art from the description of this specification, together with or instead of the above-mentioned effects.

再者,本發明可採用如以下所述之構成。 (1) 一種基板處理方法,其包含以下步驟: 將包括含矽膜、及積層於該含矽膜上之遮罩之基板搬入至腔室內;及 自包含COF 2氣體、及含氫氣體之處理氣體產生電漿,對上述含矽膜進行蝕刻; 相對於上述處理氣體之總流量之上述含氫氣體之流量換算為氫氣,為13體積%以上且未達50體積%。 (2) 如上述(1)記載之基板處理方法,其中上述含氫氣體包含選自由氫氣、氟化氫氣體、及氫氟烯烴氣體所組成之群中之至少一者。 (3) 如上述(2)記載之基板處理方法,其中上述氫氟烯烴氣體包含選自由C 2H 2F 2(1,1-二氟乙烯)氣體、C 3H 2F 4(1,3,3,3-四氟丙烯)氣體、及C 4H 2F 6(反式-1,1,1,4,4,4-六氟-2-丁烯)氣體所組成之群中之至少一者。 (4) 如上述(1)至(3)中任一項記載之基板處理方法,其中上述處理氣體進而包含非活性氣體,上述非活性氣體包含稀有氣體、及氮氣中之至少一者。 (5) 如上述(1)至(4)中任一項記載之基板處理方法,其中上述含矽膜包含氧化矽膜或Low-k膜。 (6) 如上述(5)記載之基板處理方法,其中Low-k膜包含選自由SiOC膜、SiCN膜、及SiOCH膜所組成之群中之至少一者。 (7) 如上述(1)至(6)中任一項記載之基板處理方法,其中上述遮罩包含碳及金屬中之至少一者。 (8) 如上述(7)記載之基板處理方法,其中上述含碳之遮罩包含選自由旋塗式碳、碳化鎢、非晶形碳、及碳化硼所組成之群中之至少一者。 (9) 如上述(1)至(8)中任一項記載之基板處理方法,其中上述蝕刻步驟係用以形成邏輯電路之配線層之蝕刻步驟。 (10) 如上述(1)至(9)中任一項記載之基板處理方法,其中上述電漿為電容耦合型電漿。 Furthermore, the present invention may adopt the following configuration. (1) A substrate processing method, which includes the following steps: carrying a substrate including a silicon-containing film and a mask laminated on the silicon-containing film into a chamber; and processing self-contained COF 2 gas and hydrogen-containing gas. The gas generates plasma to etch the silicon-containing film; the flow rate of the hydrogen-containing gas relative to the total flow rate of the process gas, converted into hydrogen gas, is more than 13 volume % and less than 50 volume %. (2) The substrate processing method according to the above (1), wherein the hydrogen-containing gas contains at least one member selected from the group consisting of hydrogen gas, hydrogen fluoride gas, and hydrofluoroolefin gas. (3) The substrate processing method according to the above (2), wherein the hydrofluoroolefin gas contains a gas selected from the group consisting of C 2 H 2 F 2 (1,1-vinylidene fluoride) gas, C 3 H 2 F 4 (1,3 ,3,3-tetrafluoropropene) gas, and C 4 H 2 F 6 (trans-1,1,1,4,4,4-hexafluoro-2-butene) gas, at least one of the group consisting of One. (4) The substrate processing method according to any one of the above (1) to (3), wherein the processing gas further includes an inert gas, and the inert gas includes at least one of a rare gas and nitrogen. (5) The substrate processing method according to any one of the above (1) to (4), wherein the silicon-containing film includes a silicon oxide film or a Low-k film. (6) The substrate processing method according to the above (5), wherein the Low-k film contains at least one selected from the group consisting of SiOC film, SiCN film, and SiOCH film. (7) The substrate processing method according to any one of the above (1) to (6), wherein the mask contains at least one of carbon and metal. (8) The substrate processing method according to the above (7), wherein the carbon-containing mask contains at least one member selected from the group consisting of spin-coated carbon, tungsten carbide, amorphous carbon, and boron carbide. (9) The substrate processing method according to any one of the above (1) to (8), wherein the etching step is an etching step for forming a wiring layer of a logic circuit. (10) The substrate processing method according to any one of the above (1) to (9), wherein the plasma is a capacitively coupled plasma.

1:電漿處理裝置 2:控制部 2a:電腦 2a1:處理部 2a2:記憶部 2a3:通信介面 10:電漿處理腔室 10a:側壁 10e:氣體排出口 10s:電漿處理空間 11:基板支持部 13:簇射頭 13a:氣體供給口 13b:氣體擴散室 13c:氣體導入口 20:氣體供給部 21:氣體源 22:流量控制器 30:電源 31:RF電源 31a,31b:RF產生部 32:DC電源 32a,32b:DC產生部 40:排氣系統 111:本體部 111a:中央區域 111b:環狀區域 112:環組件 200:被處理層 202:氧化矽膜 204:氮化矽膜 210,212:基底層 220:遮罩 1110:基台 1110a:流路 1111:靜電吸盤 1111a:陶瓷構件 1111b:靜電電極 W:基板 1: Plasma treatment device 2:Control Department 2a:Computer 2a1:Processing Department 2a2:Memory Department 2a3: Communication interface 10:Plasma processing chamber 10a:Side wall 10e:Gas discharge port 10s: Plasma processing space 11:Substrate support department 13: shower head 13a:Gas supply port 13b: Gas diffusion chamber 13c:Gas inlet 20:Gas supply department 21:Gas source 22:Flow controller 30:Power supply 31:RF power supply 31a, 31b: RF generation part 32:DC power supply 32a, 32b: DC generation part 40:Exhaust system 111: Ontology Department 111a:Central area 111b: Ring area 112:Ring assembly 200: Processed layer 202:Silicon oxide film 204: Silicon nitride film 210,212: Basal layer 220:Mask 1110:Abutment 1110a: Flow path 1111:Electrostatic sucker 1111a: Ceramic components 1111b: Electrostatic electrode W: substrate

圖1係表示基板之一例之剖視圖。 圖2係用以說明本發明之第1實施方式之基板處理方法之流程的說明圖。 圖3係表示與氫氣之流量比相對之各種層之蝕刻速率之結果的圖。 圖4係表示基板之一例之剖視圖。 圖5係表示基板之一例之剖視圖。 圖6係用以說明電容耦合型之電漿處理裝置之構成例之圖。 FIG. 1 is a cross-sectional view showing an example of a substrate. FIG. 2 is an explanatory diagram for explaining the flow of the substrate processing method according to the first embodiment of the present invention. FIG. 3 is a graph showing the results of the etching rate of various layers relative to the flow rate ratio of hydrogen gas. FIG. 4 is a cross-sectional view showing an example of the substrate. FIG. 5 is a cross-sectional view showing an example of the substrate. FIG. 6 is a diagram illustrating a configuration example of a capacitive coupling type plasma processing apparatus.

Claims (10)

一種基板處理方法,其包含以下步驟: 將包括含矽膜、及積層於該含矽膜上之遮罩之基板搬入至腔室內;及 自包含COF 2氣體、及含氫氣體之處理氣體產生電漿,對上述含矽膜進行蝕刻; 相對於上述處理氣體之總流量之上述含氫氣體之流量換算為氫氣,為13體積%以上且未達50體積%。 A substrate processing method, which includes the following steps: moving a substrate including a silicon-containing film and a mask laminated on the silicon-containing film into a chamber; and generating electricity from a processing gas containing COF 2 gas and a hydrogen-containing gas. The slurry is used to etch the silicon-containing film; the flow rate of the hydrogen-containing gas relative to the total flow rate of the process gas, converted into hydrogen gas, is more than 13 volume % and less than 50 volume %. 如請求項1之基板處理方法,其中上述含氫氣體包含選自由氫氣、氟化氫氣體、及氫氟烯烴氣體所組成之群中之至少一者。The substrate processing method of claim 1, wherein the hydrogen-containing gas includes at least one member selected from the group consisting of hydrogen gas, hydrogen fluoride gas, and hydrofluoroolefin gas. 如請求項2之基板處理方法,其中上述氫氟烯烴氣體包含選自由C 2H 2F 2(1,1-二氟乙烯)氣體、C 3H 2F 4(1,3,3,3-四氟丙烯)氣體、及C 4H 2F 6(反式-1,1,1,4,4,4-六氟-2-丁烯)氣體所組成之群中之至少一者。 The substrate processing method of claim 2, wherein the hydrofluoroolefin gas includes a gas selected from the group consisting of C 2 H 2 F 2 (1,1-vinylidene fluoride) gas, C 3 H 2 F 4 (1,3,3,3- At least one of the group consisting of tetrafluoropropylene) gas and C 4 H 2 F 6 (trans-1,1,1,4,4,4-hexafluoro-2-butene) gas. 如請求項1之基板處理方法,其中上述處理氣體進而包含非活性氣體,上述非活性氣體包含稀有氣體、及氮氣中之至少一者。The substrate processing method of claim 1, wherein the processing gas further includes an inert gas, and the inert gas includes at least one of a rare gas and nitrogen. 如請求項1之基板處理方法,其中上述含矽膜包含氧化矽膜或Low-k膜。The substrate processing method of claim 1, wherein the silicon-containing film includes a silicon oxide film or a Low-k film. 如請求項5之基板處理方法,其中Low-k膜包含選自由SiOC膜、SiCN膜、及SiOCH膜所組成之群中之至少一者。The substrate processing method of claim 5, wherein the Low-k film includes at least one selected from the group consisting of SiOC film, SiCN film, and SiOCH film. 如請求項1之基板處理方法,其中上述遮罩包含碳及金屬中之至少一者。The substrate processing method of claim 1, wherein the mask contains at least one of carbon and metal. 如請求項7之基板處理方法,其中上述含碳之遮罩包含選自由旋塗式碳、碳化鎢、非晶形碳、及碳化硼所組成之群中之至少一者。The substrate processing method of claim 7, wherein the carbon-containing mask includes at least one member selected from the group consisting of spin-coated carbon, tungsten carbide, amorphous carbon, and boron carbide. 如請求項1之基板處理方法,其中上述蝕刻步驟係用以形成邏輯電路之配線層之蝕刻步驟。The substrate processing method of claim 1, wherein the etching step is an etching step used to form a wiring layer of a logic circuit. 如請求項1之基板處理方法,其中上述電漿為電容耦合型電漿。The substrate processing method of claim 1, wherein the plasma is a capacitively coupled plasma.
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