TW202349222A - Automatic usb 3 hub for detecting and changing link speed - Google Patents
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Abstract
Description
本申請案係有關於USB 3鏈路操作,具體地,係有關於偵測邊際USB 3鏈路操作及改變鏈路連接速度以提高整體性能的系統及方法。This application relates to USB 3 link operations, and specifically, to systems and methods for detecting marginal USB 3 link operations and changing the link connection speed to improve overall performance.
通用串列匯流排(USB)1.0規範最初在1990年代開發,目的在於提供匯流排及介面來標準化電腦與諸如鍵盤、印表機、游標定位裝置、外部驅動器等之類的週邊裝置之間的通信。USB 1.0支援高達1.5Mbps的速度,而USB 1.1支援高達12Mbps的速度。從那時起,USB已經進展到2.0及3.0版本,且在電腦以及諸如智慧型手機、平板電腦及MP3播放器之類的可攜式裝置中為無所不在。USB 2.0支援高達480Mbps的速度。後來,USB 3.0成為通用標準並支援高達5Gbps的速度。USB 3.0及/或USB 3.1開始具有Gen 1及Gen 2 能力。USB 3.1 Gen 1與USB 3.1 Gen 2之間的差異僅在於速度。USB 3.1 Gen 1支援高達5Gbps的速度,而USB 3.1 Gen 2支援高達10Gbps的速度。後來,USB 3.2成為通用標準。同樣地,USB 3.2 Gen 1與USB 3.2 Gen 2之間的差異僅在於速度。USB 3.2 Gen 1支援高達5 Gbps的速度,而USB 3.2 Gen 2支援高達10Gbps的速度。The Universal Serial Bus (USB) 1.0 specification was originally developed in the 1990s to provide a bus and interface to standardize communications between computers and peripheral devices such as keyboards, printers, cursor pointing devices, external drives, etc. . USB 1.0 supports speeds up to 1.5Mbps, while USB 1.1 supports speeds up to 12Mbps. Since then, USB has progressed to versions 2.0 and 3.0 and is ubiquitous in computers and portable devices such as smartphones, tablets and MP3 players. USB 2.0 supports speeds up to 480Mbps. Later, USB 3.0 became the universal standard and supported speeds up to 5Gbps. USB 3.0 and/or USB 3.1 begin to have Gen 1 and Gen 2 capabilities. The difference between USB 3.1 Gen 1 and USB 3.1 Gen 2 is only in speed. USB 3.1 Gen 1 supports speeds up to 5Gbps, while USB 3.1 Gen 2 supports speeds up to 10Gbps. Later, USB 3.2 became the universal standard. Again, the difference between USB 3.2 Gen 1 and USB 3.2 Gen 2 is simply speed. USB 3.2 Gen 1 supports speeds up to 5 Gbps, while USB 3.2 Gen 2 supports speeds up to 10 Gbps.
通常,在USB通信中,限定有一個主機,另一個週邊設備則作為透過匯流排以連接至主機的裝置。主機對匯流排供電、發出命令且整體地維持對其連接的控制。週邊裝置通常不會啟動用於任何匯流排控制的活動。例如,個人電腦充當作對於USB「拇指隨身碟(thumb drive)」裝置的主機。USB集線器是一種將單一USB埠擴展成數個USB埠的裝置,以致於有更多埠可用於將多個裝置連接至主機。Usually, in USB communication, there is a host, and another peripheral device is a device connected to the host through the bus. The host powers the bus, issues commands and overall maintains control of its connections. Peripheral devices typically do not initiate activity for any bus control. For example, a personal computer acts as a host for a USB "thumb drive" device. A USB hub is a device that expands a single USB port into several USB ports so that more ports can be used to connect multiple devices to the host.
USB Type-C連接器已開發成有助於實現更薄且更雅緻的產品設計,增強可用性,且為未來版本的USB提供性能增強的增長路徑。Type-C連接器係根據現有的USB 3.1及USB 2.0技術來構建。USB Type-C是一種具有旋轉對稱連接的24-接腳USB連接器系統。名稱C僅指涉連接器的實體配置或結構因數(form factor),而不應與由其傳輸規範所表明的連接器特定能力相混淆。The USB Type-C connector has been developed to help enable thinner and more elegant product designs, enhance usability, and provide a growth path for future versions of USB with enhanced performance. Type-C connectors are built based on existing USB 3.1 and USB 2.0 technologies. USB Type-C is a 24-pin USB connector system with rotationally symmetrical connections. The designation C refers only to the connector's physical configuration or form factor and should not be confused with the connector's specific capabilities as indicated by its transport specification.
當USB裝置透過USB線纜連接而連接至主機時,有時會遭遇不良品質通信。當前的USB規範沒有為不良品質連接提供解決方案,並認為USB裝置及主機會採取行動來減輕資料丟失問題。當前的USB裝置、主機及集線器幾乎無法處理不良的資料傳輸。具體地,當前的USB規範並未設想USB集線器在錯誤偵測及減輕方面伴演主動積極的角色。目前不存在任何機制,並且,在當前可用的USB集線器中尚未觀察到這種類型的功能。When a USB device is connected to a host via a USB cable, it sometimes encounters poor quality communication. The current USB specification does not provide a solution for poor quality connections and assumes that USB devices and hosts will take actions to mitigate data loss issues. Current USB devices, hosts and hubs can barely handle poor data transfers. Specifically, the current USB specification does not envision USB hubs playing a proactive role in error detection and mitigation. No mechanism currently exists, and this type of functionality has not been observed in currently available USB hubs.
需要一種USB集線器、主機或裝置,能夠自動偵測USB連接中的重大或關鍵資料丟失,並採取糾正措施,從而減少對終端使用者的影響。There is a need for a USB hub, host or device that can automatically detect significant or critical data loss in a USB connection and take corrective actions to reduce the impact on end users.
一種設備包括了含有諸多指令的非暫時性機器可讀取媒體。該等指令在被處理器載入及執行時會促使處理器執行自動USB集線器不良鏈路品質偵測及速度回降(speed roll-back)。USB主機可能會強制個別的USB集線器埠到達指定的USB速度(亦即,由於在Gen 2速度下操作時偵測到過多錯誤,故而強制將以Gen 2速度操作的USB埠切換至Gen 1速度)。A device includes non-transitory machine-readable media containing instructions. When loaded and executed by the processor, these instructions cause the processor to perform automatic USB hub bad link quality detection and speed roll-back. A USB host may force individual USB hub ports to a specified USB speed (i.e., force a USB port operating at Gen 2 speed to switch to Gen 1 speed due to excessive errors detected while operating at Gen 2 speed) .
依據一個態樣,提供一種方法,包括:對一USB連接所遭遇的錯誤進行計數;在一設定時框內將計數錯誤的數量與一錯誤數臨界值進行比較;識別用於該USB連接的一埠速度配置;以及,改變用於該USB連接的該埠速度配置至較該識別埠速度配置為慢的一埠速度配置。According to one aspect, a method is provided, including: counting errors encountered by a USB connection; comparing the number of counted errors with an error threshold within a set time frame; identifying an error number used for the USB connection. a port speed configuration; and, changing the port speed configuration for the USB connection to a port speed configuration that is slower than the identified port speed configuration.
另一個態樣提供一種設備,包括:一連接偵測器電路,其係對以一初始速度操作的一USB連接所遭遇的錯誤進行計數,將計數錯誤的數量與一預設錯誤臨界值進行比較,且識別用於該USB連接的一埠速度配置;以及,一控制電路,其係改變用於該USB連接的該埠速度配置至較該初始速度為慢的一速度。Another aspect provides an apparatus including: a connection detector circuit that counts errors encountered by a USB connection operating at an initial speed and compares the number of counted errors to a preset error threshold , and identify a port speed configuration for the USB connection; and, a control circuit that changes the port speed configuration for the USB connection to a speed slower than the initial speed.
依據另一個態樣,提供一種系統,包括:一USB集線器,其具有一上游埠、一下游埠及與該上游埠及該下游埠電通信的一開關;一USB主機,其係透過一第一USB連接以與該上游埠電通信;一USB裝置,其係透過一第二USB連接以與該下游埠電通信;一連接偵測器電路,其係對該第一USB連接或該第二USB連接所遭遇的錯誤進行計數,將計數錯誤的數量與一預設錯誤臨界值進行比較,且識別用於該第一USB連接或該第二USB連接的一埠速度配置;以及,一控制電路,其係改變用於該第一USB連接或該第二USB連接的該埠速度配置至一較慢速度。According to another aspect, a system is provided, including: a USB hub having an upstream port, a downstream port and a switch in electrical communication with the upstream port and the downstream port; a USB host through a first A USB connection for electrical communication with the upstream port; a USB device for electrical communication with the downstream port through a second USB connection; a connection detector circuit for the first USB connection or the second USB counting errors encountered by the connection, comparing the number of counted errors to a preset error threshold, and identifying a port speed configuration for the first USB connection or the second USB connection; and, a control circuit, It changes the port speed configuration for the first USB connection or the second USB connection to a slower speed.
諸圖式係說明用於偵測邊際USB 3鏈路操作及調節連接速度以提高整體性能並防止斷開連接的實例流程及系統。可以為每個埠採用各種錯誤計數器,並且當一計數器超過一配置臨界值時,可以採取特定措施來調節連接速度。出現在多個不同圖式中之任何一個圖示元件的元件符號在多個圖中具有相同的含義,並且,如果有的話,本文在任何一個特定圖式的內容中對任何一個圖示元件的引用或討論,亦適用於顯示有相同圖示元件的其它每個圖式。The figures illustrate example processes and systems for detecting marginal USB 3 link operations and adjusting connection speed to improve overall performance and prevent disconnections. Various error counters can be employed for each port, and when a counter exceeds a configured threshold, specific actions can be taken to regulate the connection speed. The element symbols for any illustrated element appearing in multiple different drawings have the same meaning in the multiple figures, and, if any, no reference is made herein to any illustrated element in the context of any particular drawing. References or discussions of , also apply to every other drawing showing the same illustrative element.
在此描述用於不良鏈路品質偵測及速度回降(speed roll-back)的自動USB主機、自動USB集線器及自動USB裝置。當使用者將USB裝置插入USB主機或USB集線器,就會建立自動連接,並且根據策略設定以配置諸多埠及速度。再者,藉由為每個埠實施各種錯誤計數器,且在一個計數器超過配置臨界值時採取特定措施來調節連接速度,自動USB主機、自動USB集線器及自動USB裝置可以用於具有Type-C功能的USB 3介面。例如,USB集線器能允許與不良品質線纜連接的不良品質裝置以降低的信號速率操作,以便防止完全故障。USB集線器可以微調其功能以滿足自訂規範。USB集線器可以與USB裝置及線纜相容,以便一起操作。當然,USB集線器功能可以用USB集線器之韌體來實施且可能不具有新的硬體設計,但是,諸種硬體實施仍是可能的,且可以減輕韌體負擔並提高可靠性。Automated USB hosts, automated USB hubs, and automated USB devices for poor link quality detection and speed roll-back are described here. When a user plugs a USB device into a USB host or USB hub, an automatic connection is established and multiple ports and speeds are configured based on policy settings. Furthermore, automatic USB hosts, automatic USB hubs, and automatic USB devices can be used with Type-C capabilities by implementing various error counters for each port and taking specific actions to regulate the connection speed when a counter exceeds a configured threshold. USB 3 interface. For example, a USB hub can allow a poor-quality device connected to a poor-quality cable to operate at a reduced signal rate to prevent complete failure. USB hubs can fine-tune their functionality to meet custom specifications. USB hubs are compatible with USB devices and cables to operate together. Of course, the USB hub function can be implemented using the USB hub's firmware and may not have a new hardware design, but various hardware implementations are still possible and can reduce the burden on the firmware and improve reliability.
一個態樣可以允許不良品質裝置或與不良品質線纜連接的裝置以降低的信號速率操作,以便防止完全故障。不良品質意指在一段給定時間內傳輸速率具有超過臨界錯誤數量。USB集線器可以微調其功能以滿足主機/集線器/裝置環境之規範/需求。不能以設定信號速率工作的裝置及線纜可以配置成用如本文所揭露的連接偵測器電路而以較慢的信號速率操作。其實例可以是在主機、集線器或裝置的韌體內實施,且可能不具有新的硬體設計。或者,如果用硬體實施的話,硬體實施亦可以減少韌體開發的負擔並提高可靠性。One aspect may allow poor quality devices or devices connected to poor quality cables to operate at reduced signal rates in order to prevent complete failure. Bad quality means that the transmission rate has more than a critical number of errors within a given period of time. A USB hub can fine-tune its functionality to meet the specifications/needs of the host/hub/device environment. Devices and cables that are unable to operate at a set signal rate can be configured to operate at a slower signal rate using connection detector circuitry as disclosed herein. Examples may be implemented within the firmware of the host, hub, or device, and may not feature new hardware designs. Alternatively, if implemented in hardware, hardware implementation can also reduce the burden of firmware development and improve reliability.
當透過USB線纜連接USB裝置時,有時會遭遇不良品質通信。例如,USB 3.2裝置,亦即,符合USB Implementers Forum (USB-IF)發布之USB 3.2標準的裝置,可能用不良品質USB線纜連接至USB集線器埠。更特別地,具有不良品質線纜的支援10Gbit/秒的USB 3 Gen 2裝置,在連接至支援5Gbit/秒的USB 3 Gen 1埠時,可能具有比相同裝置及線纜還低的總資料吞吐量。不良資料通信亦會發生在USB集線器上游埠,例如,在USB集線器與USB主機之間,導致與下游埠上所有的裝置的連接受到影響。在這種情況下,可能存在三種可能的資料丟失情境:(1)最小至中等程度的資料丟失,偶爾會出現損壞的封包;(2)大量資料丟失,頻繁損壞封包及USB 3鏈路復原啟動;(3)關鍵資料丟失,其中,三個封包連續失敗。一般使用者不太可能注意到第一種情境,即,最小至中等程度的資料丟失。然而,一般使用者可能會注意到第二種情境,因為總資料吞吐量會較低。在第三種情境下,一般使用者肯定會注意到連接問題,因為USB主機可能會藉由關閉USB裝置來採取行動。When connecting a USB device via a USB cable, you sometimes experience poor quality communication. For example, a USB 3.2 device, that is, a device that conforms to the USB 3.2 standard published by the USB Implementers Forum (USB-IF), may be connected to a USB hub port with a low-quality USB cable. More specifically, a 10Gbit/s capable USB 3 Gen 2 device with a poor-quality cable may have a lower overall data throughput than the same device and cable when connected to a 5Gbit/s capable USB 3 Gen 1 port. quantity. Bad data communication can also occur on the USB hub's upstream port, for example, between the USB hub and the USB host, causing connectivity to all devices on the downstream port to be affected. In this case, there may be three possible data loss scenarios: (1) minimal to moderate data loss with occasional corrupted packets; (2) massive data loss with frequent corrupted packets and USB 3 link recovery startup ; (3) Key data is lost, among which three packets failed consecutively. The average user is unlikely to notice the first scenario, which is minimal to moderate data loss. However, average users may notice the second scenario as the overall data throughput will be lower. In the third scenario, the average user will definitely notice the connection problem because the USB host may take action by turning off the USB device.
可以透過各種基於韌體或硬體的錯誤計數器,進行不良品質USB連接的偵測。所計數的錯誤之類型可能包括:鏈路復原的項數;接收到的暖重置(warm resets)次數;偵測到的重試次數;以及,接收到的LBAD(鏈路不良)鏈路命令之數量。例如,對於這些類型之錯誤中之任何一種,如果在一秒內計數十五個錯誤,則可以確定USB連接為不良品質。終端系統積分器可配置參數可包括:對錯誤類型的遮蔽運算(mask operation);錯誤計數器臨界值(每種錯誤類型1個臨界值),其中,使用者可以設定臨界值以定義「過多」的意思;模式選擇,無限的錯誤數持續模式或滾動的窗口模式(rolling window mode);以及,滾動窗口時序。用於偵測指示不良品質USB連接的錯誤條件之臨界值能以單一錯誤類型為基礎,亦能以錯誤類型之組合為基礎,並且亦能以每單位時間計數的錯誤數量為基礎。對於一個組合實例,可以為第一錯誤類型預設一個臨界值,為第二錯誤類型設定另一個臨界值,並且在確定USB連接之品質不良之前滿足兩個臨界值。新的硬體或USB裝置可在埠中運行,以實施錯誤計數器。連接品質可以由USB集線器、USB主機或USB裝置進行偵測/調節。Bad quality USB connections can be detected through various firmware- or hardware-based error counters. Types of errors counted may include: number of link recovery entries; number of warm resets received; number of retries detected; and, LBAD (link bad) link commands received quantity. For example, if you count fifteen errors in one second for any of these types of errors, you can determine that the USB connection is of poor quality. The configurable parameters of the terminal system integrator may include: mask operation for error types; error counter thresholds (one threshold for each error type), where the user can set the threshold to define "excessive" Meaning; mode selection, infinite error count persistence mode or rolling window mode (rolling window mode); and, rolling window timing. The threshold used to detect error conditions indicating a bad USB connection can be based on a single error type, can be based on a combination of error types, and can also be based on the number of errors counted per unit time. For a combined example, one threshold can be preset for the first error type, another threshold for the second error type, and both thresholds met before determining that the USB connection is of poor quality. New hardware or USB devices can be run in the port to implement error counters. Connection quality can be detected/adjusted by USB hub, USB host or USB device.
參照附圖,特別是注意圖1,顯示依據實例來說明示範性USB集線器環境的示意圖。如圖所示,系統100包括USB集線器102、USB主機112及USB裝置114。USB集線器102具有一個上游埠108及四個下游埠110a、110b、110c、110d。交換集線器104在下游埠110a、110b、110c、110d之間進行切換。控制電路105用於透過USB埠以接收及處理信號,並控制交換集線器104。控制電路105可以由處理器執行的媒體中之指令、函數、程式館呼叫、次常式、共享程式館、軟體即服務(software as a service)、類比電路、數位電路、控制邏輯、透過硬體描述語言程式化的數位邏輯電路、特定應用積體電路(ASIC)、現場可程式閘陣列(FPGA)、可程式邏輯裝置(PLD)、或其任何合適的組合或是任何其它合適的機制,無論是在單一裝置中還是分佈在多個裝置上實施。連接偵測器電路106偵測每單位時間的錯誤並識別埠速度。速度電路103將埠改變為較慢的速度配置。連接偵測器電路106及速度電路103都可以由處理器執行的媒體中之指令、函數、程式館呼叫、次常式、共享程式館、軟體即服務、類比電路、數位電路、控制邏輯、透過硬體描述語言程式化的數位邏輯電路、特定應用積體電路(ASIC)、現場可程式閘陣列(FPGA)、可程式邏輯裝置(PLD)、或其任何合適的組合或是任何其它合適的機制,無論是在單一裝置中還是分佈在多個裝置上實施。Referring to the drawings, with particular attention to FIG. 1 , a schematic diagram illustrating an exemplary USB hub environment is shown according to an example. As shown, system 100 includes USB hub 102, USB host 112, and USB device 114. The USB hub 102 has one upstream port 108 and four downstream ports 110a, 110b, 110c, and 110d. Switching hub 104 switches between downstream ports 110a, 110b, 110c, 110d. The control circuit 105 is used to receive and process signals through the USB port and control the switching hub 104 . The control circuit 105 may be executed by processor instructions, functions, library calls, subroutines, shared libraries, software as a service, analog circuits, digital circuits, control logic, through hardware Description language programmed digital logic circuits, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), or any suitable combination thereof or any other suitable mechanism, regardless of Whether implemented in a single device or distributed across multiple devices. Connection detector circuit 106 detects errors per unit time and identifies the port speed. Speed circuit 103 changes the port to a slower speed configuration. Both the connection detector circuit 106 and the speed circuit 103 can be executed by instructions, functions, library calls, subroutines, shared libraries, software as a service, analog circuits, digital circuits, control logic, etc. in the media executed by the processor. Hardware description language programmed digital logic circuits, application specific integrated circuits (ASIC), field programmable gate arrays (FPGA), programmable logic devices (PLD), or any suitable combination thereof or any other suitable mechanism , whether implemented in a single device or distributed across multiple devices.
如果修改成包含有本文所述之連接偵測器電路106及速度電路103,則從亞利桑那州錢德勒市的Microchip Technology Incorporated可獲得的USB46x4集線器可用來實施作為USB集線器102。在此例示中,USB主機112透過線纜109以連接至USB集線器102。USB裝置114亦可以透過下游埠110a、110b、110c、110d中之一者以連接至集線器102,其中,Type- C連接器可用於連接。在圖1中,USB集線器102具有連接偵測器電路106,其包含了基於硬體的錯誤計數器、韌體或兩者,以調節連接。連接偵測器電路106可以由處理器執行的媒體中之指令、函數、程式館呼叫、次常式、共享程式館、軟體即服務、類比電路、數位電路、控制邏輯、透過硬體描述語言程式化的數位邏輯電路、特定應用積體電路(ASIC)、現場可程式閘陣列(FPGA)、可程式邏輯裝置(PLD)、或其任何合適的組合或是任何其它合適的機制,無論是在單一裝置中還是分佈在多個裝置上實施。A USB46x4 hub available from Microchip Technology Incorporated of Chandler, Arizona can be implemented as USB hub 102 if modified to include connection detector circuit 106 and speed circuit 103 as described herein. In this example, USB host 112 is connected to USB hub 102 through cable 109 . The USB device 114 can also be connected to the hub 102 through one of the downstream ports 110a, 110b, 110c, and 110d, where a Type-C connector can be used for the connection. In Figure 1, USB hub 102 has connection detector circuitry 106, which includes hardware-based error counters, firmware, or both, to regulate connections. The connection detector circuit 106 may be implemented by processor-executed instructions, functions, library calls, subroutines, shared libraries, software as a service, analog circuits, digital circuits, control logic, through hardware description language programs ionized digital logic circuits, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), or any suitable combination thereof or any other suitable mechanism, whether in a single device or distributed across multiple devices.
圖2顯示關於圖1的連接偵測器電路106之演算法流程圖,藉此,USB集線器102偵測不良品質USB連接,並調節其連接以提高性能。在這種情況下,USB集線器102係透過上游埠108及線纜109連同下游埠110a至110d以監控USB連接,並檢查是與USB主機連接還是與USB裝置連接。其演算法從清除(202)所有錯誤計數器開始。然後,對錯誤進行計數(204),並確定錯誤數是否在設定時框內已超過錯誤數臨界值。如果在設定時框內沒有超過錯誤數臨界值,則演算法進行等待(206),清除(202)錯誤計數器,並且在新的設定時框內再次開始錯誤的另一個計數(204)。如果在設定時框內超過錯誤數臨界值,則演算法接著確定用於在設定時框內超過錯誤數臨界值的連接之埠速度(208):例如,USB 3.2 Gen 2(10G)或USB 3.2 Gen 1(5G)。在這兩種情況下,演算法接著確定(210A及210B)埠類型:(1)上游(例如,連接至USB主機112);或(2)下游(例如,連接至USB裝置114)。如果在設定時框內超過錯誤數臨界值(204)而可能指示在針對USB 3.2 Gen 2 (10G)速度配置的上游埠上之不良連接,則連接偵測器電路106或控制電路105或兩者暫時斷開(212)上游埠USB 3介面,並且在遮蔽Gen 2功能的情況下重新連接,從而強制較低的資料速度,即USB 3 Gen 1的吞吐量。此動作導致上游連接藉由USB主機112之相應的動作而下降到USB 3 Gen 1(5G)埠速度連接。如果在針對USB 3 Gen 1 (5G)速度配置的上游埠(例如,連接至USB主機112)上偵測到在設定時框內超過錯誤數臨界值的埠,則連接偵測器電路106斷開(214)上游埠USB 3介面,並發出USB 3暖重置(warm reset)至附接USB 3裝置的所有下游埠,然後斷開/停用所有的下游USB 3介面。此動作導致下游連接針對USB 2進行重新配置。如果在設定時框內超過錯誤數臨界值的埠是針對USB 3.2 Gen 2(10G)速度配置的下游埠,則連接偵測器電路106或控制電路105或兩者發出暖重置(216)至下游埠,並遮蔽Gen 2能力位元,然後在遮蔽Gen 2能力位元的情況下對埠進行重新連接。此動作導致其連接針對USB 3 Gen 1(5G)速度進行重新配置。如果在設定時框內超過錯誤數臨界值的埠是在針對USB 3.2 Gen 1(5G)速度配置的下游埠上,則連接偵測器電路106或控制電路105或兩者發出暖重置至該埠,並斷開/停用USB 3介面。此動作導致其連接針對USB 2速度進行重新配置。FIG. 2 shows an algorithm flow diagram for the connection detector circuit 106 of FIG. 1 , whereby the USB hub 102 detects a poor quality USB connection and adjusts the connection to improve performance. In this case, the USB hub 102 monitors the USB connection through the upstream port 108 and cable 109 together with the downstream ports 110a to 110d, and checks whether it is connected to a USB host or a USB device. The algorithm starts by clearing (202) all error counters. The errors are then counted (204) and it is determined whether the number of errors has exceeded the error threshold within the set time frame. If the error count threshold is not exceeded within the set time frame, the algorithm waits (206), clears (202) the error counter, and starts another count of errors again within the new set time frame (204). If the error threshold is exceeded within the set time frame, the algorithm then determines the port speed (208) for the connection that exceeds the error threshold within the set time frame: for example, USB 3.2 Gen 2 (10G) or USB 3.2 Gen 1(5G). In both cases, the algorithm then determines (210A and 210B) the port type: (1) upstream (eg, connected to USB host 112); or (2) downstream (eg, connected to USB device 114). If the error threshold (204) is exceeded within the setup time frame which may indicate a bad connection on the upstream port configured for USB 3.2 Gen 2 (10G) speed, then connection detector circuit 106 or control circuit 105 or both Temporarily disconnect (212) the upstream port USB 3 interface and reconnect it with Gen 2 functionality blocked, thereby forcing a lower data speed, i.e. USB 3 Gen 1 throughput. This action causes the upstream connection to drop to a USB 3 Gen 1 (5G) port speed connection through corresponding actions by the USB host 112. If a port that exceeds the error threshold within a set time frame is detected on an upstream port configured for USB 3 Gen 1 (5G) speed (eg, connected to the USB host 112 ), the connection detector circuit 106 disconnects (214) upstream port USB 3 interface, and issues a USB 3 warm reset to all downstream ports with attached USB 3 devices, and then disconnects/disables all downstream USB 3 interfaces. This action causes the downstream connection to be reconfigured for USB 2. If the port that exceeds the error threshold within the setup time frame is a downstream port configured for USB 3.2 Gen 2 (10G) speed, then connection detector circuit 106 or control circuit 105 or both issue a warm reset (216) to downstream port and mask the Gen 2 capability bits, then reconnect the port with the Gen 2 capability bits masked. This action causes its connection to be reconfigured for USB 3 Gen 1 (5G) speeds. If the port that exceeds the error threshold during the setup time frame is on a downstream port configured for USB 3.2 Gen 1 (5G) speed, then connection detector circuit 106 or control circuit 105 or both issue a warm reset to that port. port, and disconnect/disable the USB 3 interface. This action causes its connection to be reconfigured for USB 2 speeds.
對於用USB集線器進行的連接品質偵測,當錯誤數在設定時框內上升至超過特定臨界值時,可以啟動表1中所提供之一個或多個例行程序。
表1
除了連接偵測器電路106及速度電路103位在USB主機112中以外,圖3顯示與圖1所示之環境相似的實例USB集線器環境之示意圖。USB主機112具有連接偵測器電路106,其可以包含有基於硬體的錯誤計數器或韌體或兩者,以確定吞吐量之品質,並且,速度電路103可以包含有硬體或韌體或兩者,以調節其連接。USB主機112係透過上游埠108經由線纜109以連接至集線器102。在實例中,連接偵測器電路106可以在USB主機112中,而速度電路103可以在USB集線器102中。在實例中,連接偵測器電路106可以在USB集線器102中,而速度電路103可以在USB主機112中。FIG. 3 shows a schematic diagram of an example USB hub environment similar to that shown in FIG. 1 , except that the connection detector circuit 106 and the speed circuit 103 are located in the USB host 112 . USB host 112 has connection detector circuit 106, which may include hardware-based error counters or firmware, or both, to determine the quality of throughput, and speed circuit 103, which may include hardware or firmware, or both. or to regulate its connection. USB host 112 is connected to hub 102 via upstream port 108 via cable 109 . In an example, connection detector circuit 106 may be in USB host 112 and speed circuit 103 may be in USB hub 102 . In an example, connection detector circuit 106 may be in USB hub 102 and speed circuit 103 may be in USB host 112 .
圖4顯示關於圖3的連接偵測器電路106之演算法流程圖,藉此,USB主機112偵測不良品質USB連接(線纜109及上游埠108),並且調節其連接以提高性能。連接偵測器電路106從清除(402)所有的錯誤計數器開始。然後,對錯誤進行計數(404),並且確定錯誤數是否在設定時框內已超過錯誤數臨界值。如果在設定時框內未超過錯誤數臨界值,則演算法進行等待(406),清除錯誤計數器(402),並且,在設定時框內,亦即,在下一個設定時框內,開始進行錯誤的另一個計數(404)。如果在設定時框內超過錯誤數臨界值,則演算法接著確定(408)連接的埠速度:USB 3.2 Gen 2(10G)或USB 3.2 Gen 1(5G)。如果對於USB連接109在設定時框內超過錯誤數臨界值,則速度電路103之演算法便針對USB3 Gen 2 (10G)速度進行配置,其中速度電路103發出USB 3暖重置至其埠,並在遮蔽Gen 2能力位元的情況下重新連接。此動作導致其連接針對USB 3 Gen 1(5G)速度進行重新配置。如果對於針對USB 3.2 Gen 1(5G)速度配置的USB連接109在設定時框內超過錯誤數臨界值,則速度電路103發出USB 3暖重置(414)至該埠,並斷開/停用USB 3介面。此動作導致其連接針對USB 2速度進行重新配置,因為USB 3功能已經被斷開/停用。Figure 4 shows an algorithm flow diagram for the connection detector circuit 106 of Figure 3, whereby the USB host 112 detects poor quality USB connections (cable 109 and upstream port 108) and adjusts their connections to improve performance. Connection detector circuit 106 begins by clearing (402) all error counters. Errors are then counted (404) and it is determined whether the number of errors has exceeded the error threshold within the set time frame. If the error number threshold is not exceeded in the set time frame, the algorithm waits (406), clears the error counter (402), and starts error processing in the set time frame, that is, in the next set time frame. Another count of (404). If the error threshold is exceeded within the setup time frame, the algorithm then determines (408) the port speed of the connection: USB 3.2 Gen 2 (10G) or USB 3.2 Gen 1 (5G). If the error threshold is exceeded for the USB connection 109 within the set time frame, the algorithm of the speed circuit 103 is configured for USB3 Gen 2 (10G) speed, where the speed circuit 103 issues a USB 3 warm reset to its port, and Reconnect with Gen 2 capability bits obscured. This action causes its connection to be reconfigured for USB 3 Gen 1 (5G) speeds. If the error threshold is exceeded within the setup timeframe for a USB connection 109 configured for USB 3.2 Gen 1 (5G) speed, the speed circuit 103 issues a USB 3 Warm Reset (414) to the port and disconnects/disables USB 3 interface. This action causes its connection to be reconfigured for USB 2 speeds because USB 3 functionality has been disconnected/deactivated.
對於用USB主機進行的連接品質偵測,當錯誤數在設定時框內上升至超過特定臨界值時,可以啟動表2中所提供之一個或多個例行程序。
表2
圖5顯示連接偵測器電路106在實例USB集線器環境內的USB裝置114中的示意圖。如圖所示,系統100包括一集線器102、一或多個控制電路105、一USB主機112及一USB裝置114,其中,多個USB裝置114可以經由下游埠110a至110d連接至集線器102。USB裝置114具有包括基於硬體的錯誤計數器或基於韌體的錯誤計數器或是其兩者的連接偵測器電路116,以及用於調節連接的速度電路103。FIG. 5 shows a schematic diagram of connection detector circuit 106 in USB device 114 within an example USB hub environment. As shown in the figure, the system 100 includes a hub 102, one or more control circuits 105, a USB host 112 and a USB device 114, wherein a plurality of USB devices 114 can be connected to the hub 102 via downstream ports 110a to 110d. The USB device 114 has a connection detector circuit 116 including a hardware-based error counter or a firmware-based error counter or both, and a speed circuit 103 for regulating the connection.
圖6顯示關於圖5的連接偵測器電路106及速度電路103的演算法流程圖,藉此,USB裝置114偵測不良品質USB連接且調節其連接以提高性能。在這種情況下,USB裝置114監控USB連接。連接偵測器電路106從清除(602)所有錯誤計數器開始。然後,對錯誤進行計數(604),並確定錯誤數是否在設定時框內已超過錯誤數臨界值。如果在設定時框內未超過錯誤數臨界值,則演算法進行等待(606),清除錯誤計數器(602),並且在設定時框(亦即,在後續的設定時框)內開始錯誤之另一個計數(604)。如果在設定時框內超過錯誤數臨界值,則演算法接著確定(608)連接的埠速度:USB 3 Gen 2(10G)或USB 3 Gen 1(5G)。如果在USB連接配置成用於USB3.2 Gen 2(10G)速度的情況下,而在設定時框內超過錯誤數臨界值,則速度電路103暫時斷開(612)USB 3介面,並且在遮蔽Gen 2能力位元的情況下重新連接。此動作導致其連接下降到USB 3 Gen 1(5G)埠速度連接。如果在USB連接配置成用於USB 3.2 Gen 1(5G)速度的情況下,而在設定時框內超過錯誤數臨界值,則速度電路103斷開/停用(614)USB 3介面及發出USB 3暖重置至該埠。此動作導致連接針對USB 2進行重新配置。FIG. 6 shows an algorithm flow diagram for the connection detector circuit 106 and the speed circuit 103 of FIG. 5 , whereby the USB device 114 detects a poor quality USB connection and adjusts the connection to improve performance. In this case, USB device 114 monitors the USB connection. Connection detector circuit 106 begins by clearing (602) all error counters. The errors are then counted (604) and it is determined whether the number of errors has exceeded the error threshold within the set time frame. If the error threshold is not exceeded within the set time frame, the algorithm waits (606), clears the error counter (602), and starts erroring again in the set time frame (i.e., in a subsequent set time frame). A count (604). If the error threshold is exceeded within the setup time frame, the algorithm then determines (608) the port speed of the connection: USB 3 Gen 2 (10G) or USB 3 Gen 1 (5G). If the error threshold is exceeded within the setup time frame when the USB connection is configured for USB 3.2 Gen 2 (10G) speed, the speed circuit 103 temporarily disconnects (612) the USB 3 interface and blocks the Reconnect without Gen 2 capable bits. This action causes its connection to drop to a USB 3 Gen 1 (5G) port speed connection. If the error threshold is exceeded within the setup time frame when the USB connection is configured for USB 3.2 Gen 1 (5G) speed, speed circuit 103 disconnects/disables (614) the USB 3 interface and issues a USB 3 Warm reset to this port. This action causes the connection to be reconfigured for USB 2.
對於用USB裝置進行的連接品質偵測,當錯誤數在設定時框內上升至超過特定臨界值時,可以啟動表3中所提供之一個或多個例行程序。
表3
本文所揭露的連接偵測器電路106或速度電路103可以在為汽車工業設計的USB 3集線器、USB主機及USB裝置中實施,特別地,汽車工業幾乎普遍採用具有USB電力輸送的USB Type-C埠。The connection detector circuit 106 or the speed circuit 103 disclosed herein can be implemented in USB 3 hubs, USB hosts and USB devices designed for the automotive industry. In particular, the automotive industry almost universally adopts USB Type-C with USB power delivery. port.
圖7顯示連接偵測器及速度電路706之示意圖,其可以是連接偵測器電路106或速度電路103的一個實例。參見圖1、3及5。連接偵測器及速度電路706的實例具有處理器702及包括諸多指令708的非暫時性機器可讀取媒體704。指令708在由處理器702載入及執行時使處理器702執行自動USB集線器不良鏈路品質偵測及速度回降。其指令包括:對USB連接所遭遇的錯誤進行計數;將所計數的錯誤數量與預設的臨界錯誤數量進行比較;識別USB連接之埠速度配置;以及,將USB連接之埠速度配置更改成較慢的速度。這些功能亦可以被程式化成由速度電路103來執行。參見圖1、3及5。FIG. 7 shows a schematic diagram of a connection detector and speed circuit 706 , which may be an example of the connection detector circuit 106 or the speed circuit 103 . See Figures 1, 3 and 5. An example of connection detector and speed circuit 706 has processor 702 and non-transitory machine-readable medium 704 including instructions 708 . Instructions 708, when loaded and executed by processor 702, cause processor 702 to perform automatic USB hub bad link quality detection and speed rollback. The instructions include: counting errors encountered by the USB connection; comparing the number of counted errors with a preset critical number of errors; identifying the port speed configuration of the USB connection; and changing the port speed configuration of the USB connection to a higher slow speed. These functions may also be programmed to be performed by the speed circuit 103. See Figures 1, 3 and 5.
圖8顯示用於偵測不良品質USB連接並調節其連接以提高性能的示意圖,其包括連接偵測器電路806及速度電路803。Figure 8 shows a schematic diagram for detecting poor quality USB connections and adjusting the connection to improve performance, including a connection detector circuit 806 and a speed circuit 803.
雖然上面已經描述實例,但是在不脫離這些揭露實例的精神及範圍的情況下,可以從本揭露內容做出其它變型及實例。Although examples have been described above, other variations and examples may be made from this disclosure without departing from the spirit and scope of these disclosed examples.
相關專利申請案:本申請案主張2022年3月11日提出之一般所有的美國專利申請案第63/319,002號之優先權,茲一概以引用方式將其整個內容併入本文。Related Patent Applications: This application claims priority from generally owned U.S. Patent Application No. 63/319,002, filed on March 11, 2022, the entire contents of which are hereby incorporated by reference.
100:系統 102:(USB)集線器 103:速度電路 104:交換集線器 105:控制電路 106:連接偵測器電路 108:上游埠 109:線纜;USB連接 110a:下游埠 110b:下游埠 110c:下游埠 110d:下游埠 112:USB主機 114:USB裝置 202、204、206、208、210A、210B、212、214、216、218:(演算法)步驟 402、404、406、408、414、416:(演算法)步驟 602、604、606、608、612、614:(演算法)步驟 702:處理器 704:非暫時性機器可讀取媒體 706:連接偵測器及速度電路 708:指令 803:速度電路 806:連接偵測器電路 100:System 102: (USB) hub 103: Speed circuit 104:Switching hub 105:Control circuit 106: Connect the detector circuit 108: Upstream port 109: Cable; USB connection 110a: Downstream port 110b: Downstream port 110c: Downstream port 110d: Downstream port 112: USB host 114: USB device 202, 204, 206, 208, 210A, 210B, 212, 214, 216, 218: (algorithm) steps 402, 404, 406, 408, 414, 416: (algorithm) steps 602, 604, 606, 608, 612, 614: (algorithm) steps 702: Processor 704: Non-transitory machine-readable media 706: Connect the detector and speed circuit 708:Command 803: Speed circuit 806: Connect detector circuit
圖1係說明包括USB集線器、USB主機及USB裝置的實例USB環境的示意圖,其中,USB集線器具有連接偵測器電路及速度電路。 圖2顯示關於圖1的連接偵測器電路及速度電路的演算法流程圖,藉此,USB集線器可以偵測不良品質USB連接,並調節連接以提高性能。 圖3係說明包括集線器、USB主機及USB裝置的實例USB環境的示意圖,其中,USB主機具有連接偵測器電路,而USB集線器具有速度電路。 圖4顯示關於圖3的連接偵測器電路及速度電路之演算法流程圖,藉此,USB主機可以偵測不良品質USB連接,並調節連接以提高性能。 圖5係說明包括集線器、USB主機及USB裝置的實例USB環境的示意圖,其中,USB裝置具有連接偵測器電路,而USB集線器具有速度電路。 圖6顯示關於圖5的連接偵測器電路及速度電路之演算法流程圖,藉此,USB裝置可以偵測不良品質USB連接,並且速度電路可以調節連接以提高性能。 圖7顯示用於連接偵測器電路之軟體實施之示意圖。 圖8顯示用於偵測不良品質USB連接並調節連接以提高性能的示意圖,其包括連接偵測器電路及速度電路。 FIG. 1 is a schematic diagram illustrating an example USB environment including a USB hub with connection detector circuitry and speed circuitry, a USB host, and a USB device. Figure 2 shows an algorithm flow diagram for the connection detector circuit and speed circuit of Figure 1, whereby the USB hub can detect poor quality USB connections and adjust the connection to improve performance. Figure 3 is a schematic diagram illustrating an example USB environment including a hub, a USB host with connection detector circuitry, and a USB device with a USB hub having speed circuitry. Figure 4 shows an algorithm flow chart for the connection detector circuit and speed circuit of Figure 3, whereby the USB host can detect poor quality USB connections and adjust the connection to improve performance. Figure 5 is a schematic diagram illustrating an example USB environment including a hub, a USB host, and a USB device with connection detector circuitry and a USB hub with speed circuitry. Figure 6 shows an algorithm flow diagram for the connection detector circuit and the speed circuit of Figure 5, whereby the USB device can detect poor quality USB connections and the speed circuit can adjust the connection to improve performance. Figure 7 shows a schematic diagram of the software implementation used to connect the detector circuit. Figure 8 shows a schematic diagram for detecting poor quality USB connections and adjusting the connection to improve performance, including a connection detector circuit and a speed circuit.
100:系統 100:System
102:(USB)集線器 102: (USB) hub
103:速度電路 103: Speed circuit
104:交換集線器 104:Switching hub
105:控制電路 105:Control circuit
106:連接偵測器電路 106: Connect the detector circuit
108:上游埠 108: Upstream port
109:線纜;USB連接 109: Cable; USB connection
110a:下游埠 110a: Downstream port
110b:下游埠 110b: Downstream port
110c:下游埠 110c: Downstream port
110d:下游埠 110d: Downstream port
112:USB主機 112:USB host
114:USB裝置 114: USB device
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US202263319002P | 2022-03-11 | 2022-03-11 | |
US63/319,002 | 2022-03-11 | ||
US18/077,385 | 2022-12-08 | ||
US18/077,385 US20230289312A1 (en) | 2022-03-11 | 2022-12-08 | Automatic USB3 Hub for Detecting and Changing Link Speed |
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US6690650B1 (en) * | 1998-02-27 | 2004-02-10 | Advanced Micro Devices, Inc. | Arrangement in a network repeater for monitoring link integrity by monitoring symbol errors across multiple detection intervals |
JP5700514B2 (en) * | 2010-10-27 | 2015-04-15 | アルパイン株式会社 | Communication speed control device and communication speed control method |
US10725939B2 (en) * | 2017-02-13 | 2020-07-28 | Microchip Technology Incorporated | Host-detecting USB hub |
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