TW202345394A - Sic p-type, and low resistivity, crystals, boules, wafers and devices, and methods of making the same - Google Patents

Abstract

A doped SiOC liquid starting material provides a p-type polymer derived ceramic SiC crystalline materials, including boules and wafers. P-type SiC electronic devices. Low resistivity SiC crystals, wafers and boules, having phosphorous as a dopant. Polymer derived ceramic doped SiC shaped charge source materials for vapor deposition growth of doped SiC crystals.

Description

Crystals, ingots, wafers and components of P-type silicon carbide and low resistivity silicon carbide and manufacturing methods thereof

This application claims the priority and rights of U.S. Provisional Application No. 63/220,132 filed on July 9, 2021 and U.S. Provisional Application No. 63/337,088 filed on April 30, 2022, in accordance with the patent law. The entire disclosure of each of these applications is incorporated herein by reference.

The present invention relates to p-type SiC crystals, crystal ingots, crystal rods and wafers; low resistivity SiC crystals, crystal ingots, crystal rods and wafers; and methods for manufacturing p-type SiC crystals, crystal ingots, crystal rods and wafers. Methods; methods for manufacturing low resistivity SiC crystals, ingots, rods and wafers; as well as components made from such wafers and uses of such wafers.

Pure crystalline silicon carbide (SiC) is electrically neutral, that is, there is a balance of positive and negative charges in the crystalline material. Typically, to be useful in the fabrication of semiconductor diodes and transistors, impurities are added to SiC crystals during the SiC crystal growth process to create a charge imbalance within the crystal, which affects the conductivity of SiC. Impurity atoms that add a positive charge to SiC are called donor atoms. Generally speaking, donor atoms are identified by the column in the periodic table to the right of the column containing Si and C (eg, column 15 (VA)). Typical donor atoms for SiC are nitrogen (N) and phosphorus (P). Impurity atoms that add negative charge to SiC are called acceptor atoms. Generally, acceptor atoms are identified by the column in the periodic table to the left of the column containing Si and C (eg, 13 or IIIA). Typical acceptor atoms for SiC are boron (B) and aluminum (Al). SiC crystals will typically contain both donor and acceptor atomic impurities. In order for a donor or acceptor impurity atom to affect the net charge in the crystal and become electrically active (i.e., affect the conductivity/resistivity of the crystal), the impurity atom typically must replace the Si or C in its position in the crystal atoms, and in this case, the impurity atoms are called substituted impurities. Impurity atoms can also be located in positions between Si atoms and C atoms. In this case, the impurity atoms are called interstitial atoms and may not affect the net charge in the crystal, may have less effect on the charge, and in some cases do not affect the net charge in the crystal. Therefore, the terms "electroactive atomic impurity", "electroactive impurity" and "electroactive" are used to describe the addition of atoms to SiC crystalline materials that affect the net charge of the material (e.g., crystal), including substituted atoms and interstitials. type atom. Therefore, all substituted impurities are electroactive impurities, and interstitial impurities can be electroactive or non-electroactive impurities. Therefore, the atomic concentration of a donor or acceptor impurity (the ratio of the number of impurity atoms to the total number of atoms in the crystal) may be equal to or greater than the atomic concentration of an electroactive impurity (eg, substituted impurity atoms). When there are more electroactive (eg, substituted) donor atoms than electroactive (eg, substituted) acceptor atoms, the SiC crystal is n-type, where n represents negative, that is, there is an excess of negative charge. In contrast, when there are more electroactive (e.g., substituted) acceptor atoms than donor atoms, the SiC crystal is p-type, with p representing positive, that is, there is an excess of positive charge in the crystal.

Prior to the present invention, there were no industrially produced, commercially available p-type SiC substrates >100 mm in diameter that could be used for the fabrication of SiC semiconductor components. It is believed that existing prior attempts at fabricating p-type SiC crystals have not provided the means to produce high quality, low defect p-type SiC materials, such as SiC crystals, SiC ingots, and p-type SiC wafers cut from the same. Manufacturing process available. Therefore, prior to the present invention, the benefits of SiC semiconductor components with p-type SiC materials were essentially unavailable and unavailable.

As used herein, unless otherwise specified, there are two types of charge carriers in semiconductor materials: holes and electrons. A hole can be thought of as the "opposite" of an electron. Unlike electrons, which have a negative charge, holes have a positive charge equal in magnitude but opposite in polarity to the electron's charge. Holes can sometimes be confused because they are not physical particles like electrons, but rather the absence of electrons in atoms. When electrons leave their positions, holes can move from atom to atom in a semiconductor. So, by analogy, turn to the people standing in a line on a set of steps. If the person in front of the line walks up a step, that person leaves an electric hole. As each person walks up a step, the available steps (holes) move down the steps. A hole is formed in a semiconductor when electrons in an atom move from the atom's valence band (usually the outermost electron shell that is completely filled with electrons) into the conduction band (the region in the atom where electrons can easily escape). Everywhere.

As used herein, unless otherwise specified, the terms "p-type", "p-type wafer", "p-type crystal", "p-type ingot" and similar such terms shall be given the broadest possible meaning. meaning, and will include SiC crystal materials having more electroactive acceptor atomic impurities (eg, substituted acceptor atomic impurities) than electroactive donor atomic impurities (eg, substituted donor impurity atoms). Thus, for example, the net number of electroactive acceptor atoms per unit volume is 1x10 ¹⁰ /cm ³ to 1x10 ²² /cm ³ , about 1x10 ¹⁸ /cm ³ to 1x10 ²⁰ /cm ³ , and about 1x10 ¹⁸ /cm ³ to 1x10 ²³ / cm ³ , about 1x10 ¹⁸ /cm ³ to 1x10 ²⁴ /cm ³ , greater than about 1x10 ⁹ /cm ³ , greater than about 1x10 ¹⁵ /cm ³ , greater than about 1x10 ¹⁸ /cm ³ and greater than about 1x10 ¹⁹ /cm ³ SiC crystals The material is characterized as a p-type SiC crystal material.

Additionally, unless otherwise specified, in order to be considered a p-type SiC crystalline material, the net carrier concentration will have an excess of acceptor atomic impurities, as given by equation (1)

(1) Nc = N _D -N _A

where Nc is the net carrier concentration. _ND is the concentration of electroactive donor impurity atoms. _NA is the concentration of electroactive acceptor impurity atoms. By convention, Nc is negative for p-type materials, indicating a lack of electrons.

As used herein, unless otherwise specified, the terms "p-type element", "p-type semiconductor" and similar such terms shall be given the broadest possible meaning and include having p-type layers or being based on p-type crystals. Any semiconductor, microelectronic component or electronic component on a wafer, wafer or substrate.

As used herein, unless otherwise specified, the terms "p ⁺ ", "p ⁺ -type" and similar such terms refer to materials with high dopant counts (e.g., heavily doped, N _D > 10 ¹⁸ / cm ³ ) and therefore have low resistivity (<0.03 ohm-cm) p-type crystalline SiC materials, such as p-type crystal rods, wafers, etc. Therefore, a p ⁺ type material can have an _NA of 10 ¹⁸ /cm ³ to about 10 ²⁰ /cm ³ , an _NA of 10 ¹⁸ /cm ³ to about 10 ²¹ /cm ³ , >10 ¹⁹ /cm ³ , about 1x10 ¹⁸ /cm ³ to 1x10 ²³ /cm ³ , _ND of about 1x10 ¹⁸ /cm ³ to 1x10 ²⁴ /cm ³ , and N _A of about 10 ²⁰ /cm ³ . Typically, p ⁺ -type materials may have a resistivity at or below 0.03 ohm-cm, less than about 0.025 ohm-cm, less than about 0.020 ohm-cm, less than about 0.015 ohm-cm, about 0.030 ohm-cm to about 0.01 ohm-cm. cm, about 0.025 ohm-cm to about 0.008 ohm-cm, and about 0.020 ohm-cm to about 0.005 ohm-cm.

As used herein, unless otherwise specified, the terms " ^p- ", "p ^- type" and similar such terms refer to materials with low dopant quantities (e.g., lightly doped, N _D <10 ¹⁸ / cm ³ ) and therefore have higher resistivity p-type crystalline materials, such as p-type crystal rods, wafers, etc. Typically, these resistivities are above 0.03 ohm-cm. Thus, a p ^- type material may have an _NA from 10 ¹⁸ /cm ³ to about 10 ¹⁰ /cm ³ and similar values. Typically, the resistivity of p ^- type materials can range from 0.03 ohm-cm to ¹⁰ ohm-cm and larger.

As used herein, unless otherwise specified, the terms "n-type", "n-type wafer", "n-type crystal", "n-type ingot" and similar such terms shall be given the broadest possible meaning. meaning, and would include negatively charged SiC crystalline materials that have more electroactive donor atoms (eg, substituted donor atomic impurities) than other types of impurity atoms. Thus, for example, the net number of electroactive donor atoms per unit volume is 1x10 ¹⁰ /cm ³ to 1x10 ²² /cm ³ , about 1x10 ¹⁸ /cm ³ to 1x10 ²⁰ /cm ³ , greater than about 1x10 9 /cm 3 , greater than about 1x10 ⁹ /cm ³ SiC crystalline materials of 1x10 ¹⁵ /cm ³ , greater than about 1x10 ¹⁸ /cm ³ and greater than about 1x10 ¹⁹ /cm ³ are characterized as n-type SiC crystalline materials.

Additionally, unless otherwise specified, in order to be considered an n-type SiC crystalline material, the net carrier concentration will indicate an excess of donor atomic impurities, as given by Eq. By convention, Nc is positive for n-type materials, indicating an excess of electrons.

The terms "n ⁺ ", "n ⁺ type" and similar such terms refer to having a high doping dose (e.g., heavily doped, N _A >10 ¹⁸ /cm ³ ) and therefore having a low resistivity (<0.03 ohm-cm) n-type materials, such as n-type crystal rods, wafers, etc. Typically, these resistivities can be at or below 0.03 ohm-cm.

The terms "n ^- ", "n ^-type " and similar such terms refer to n having low doping dosage (e.g., lightly doped, N _A <10 ¹⁸ /cm ³ ) and therefore higher resistivity Type materials, such as n-type crystal rods, wafers, etc. Typically, these resistivities can be higher than 0.03 ohm-cm, and are typically at or above 0.03 ohm-cm.

As used herein, unless otherwise specified, the terms "physical pores," "physical voids," and "physical pockets" refer to physical properties rather than electrical properties, and are used in a common, ordinary way, such as to mean a solid or surface Hollows in structures, absences of material in structures or surfaces, and empty spaces within surfaces or solids.

As used herein, unless otherwise specified, the terms "Vapor Deposition" (VD), "Vapor Deposition Technology", "Vapor Deposition Process" and similar such terms shall be given their most appropriate meaning. A wide range of possible meanings, and would include, for example, processes in which a solid or liquid starting material is converted into a gas or vapor state and the gas or vapor is then deposited to form (eg, grow) the solid material. As used herein, vapor deposition techniques will include growth by epitaxy, where layers are provided from the vapor or gas phase. Other types of vapor deposition technologies include: chemical vapor deposition ("Chemical Vapor Deposition, CVD"); physical vapor deposition ("Physical Vapor Deposition, PVD"), plasma enhanced CVD, physical vapor transport ("Physical Vapor") Transport, PVT") and other technologies. Examples of vapor deposition elements would include hot wall chemical vapor deposition reactors, multi-wafer chemical vapor deposition reactors, chemical vapor deposition stack reactors. Physical Vapor Transport (PVT) means and requires the use of at least one solid starting material that sublimates to provide vapor (eg, flux) for growing crystals.

As used herein, unless otherwise specified, the term "vaporization temperature" shall be given its broadest possible meaning and includes the temperature at which a material transitions from a liquid to a gaseous state, from a solid to a gaseous state, or both ( For example, the solid-to-liquid-to-gas transition occurs over a small temperature range, eg, a range of less than about 20°C, less than about 10°C, and less than about 5°C). Unless otherwise specifically stated, the vaporization temperature will be the temperature corresponding to any specific pressure at which such transition occurs (eg, one atmosphere, 0.5 atmospheres). When the vaporization temperature of a material is discussed in a particular application, method, or for use in a particular element (such as a PVT element), unless expressly stated otherwise, the vaporization temperature will be that used or commonly used in that application, method, or element. under the pressure used.

Silicon carbide does not typically have a liquid phase and is not in a liquid phase under typical PVT process conditions, but rather sublimates under vacuum at temperatures above approximately 1,700°C. (It should be noted that at very high pressures, SiC can exist in the liquid phase.) Typically, in industrial and commercial applications, conditions are established so that sublimation occurs at temperatures of about 2,500°C and above. When silicon carbide sublimates, it typically forms a vapor flux composed of various silicon and carbon species, with the composition of the vapor flux varying with the source material as well as temperature and pressure. However, the present invention provides, among other things, control over the use of source materials (e.g., shaped charges) and the temperature and pressure during the PVT process through the selection of liquid starting materials (e.g., polysilica precursors) The ratio of these components.

As used herein, unless otherwise specified, the terms "crystal," "ingot," and "rod" and similar such terms shall be given their broadest possible meanings and shall refer to objects having a diameter of about 50 mm to About 250 mm in diameter, greater than 100 mm in diameter, greater than 250 mm in diameter, and typically about 150 mm in diameter; and having a height of about 25 mm to about 250 mm (i.e., the distance from the seed end to the tail end), about 75 Crystalline structures with a height of mm to about 150 mm, 75 mm and greater, about 100 mm and greater, about 150 mm and greater, and typically a height of about 100 mm to about 150 mm. The term "crystal" generally refers to a structure that is initially grown and subsequently removed from the growth device. The term "boule" generally refers to a crystal that has one or both of its ends treated (eg, planarized). The term "wafer ingot" generally refers to an ingot that has been further processed (eg, forming flat surfaces on the ingot) and is ready for a slicing process (ie, making wafers from the ingot). Typically, crystals are grown in a vapor deposition apparatus using a vapor deposition process (specifically, a PVT apparatus and process).

Unless otherwise expressly provided or obvious from the context, the terms crystal, ingot and rod are generally used interchangeably in this specification; and in particular, the nature, crystalline structure, macroscopic and microscopic nature of one is used in this specification. The descriptions of defects and compositions generally apply to others.

As used herein, unless otherwise specified, the terms "wafer", "SiC wafer", "p-type SiC wafer", "n-type SiC wafer" and similar such terms refer to crystalline material systems A structure cut from a larger structure of the same crystalline material (eg, a p-SiC wafer cut from a p-type SiC ingot). Typically, the wafer 700 is a disk-shaped structure, and may be circular or circular or semi-circular in shape 705, and may have one plane or more than one plane. A wafer has a top or bottom surface, a bottom or bottom surface, and a thickness. The outer edge of the wafer can be tapered, beveled, chamfered, square, round, etc.

Typically, SiC wafers are formed by cutting the wafer generally transversely to the c-axis (growth axis) of a larger crystal (eg, a wafer rod). Typically, the wafer may be on or off the growth axis (i.e., on-axis) by several degrees (i.e., off-axis), typically about 0.1 degrees to about 5 degrees from the growth axis for off-axis wafers. The wafer may have a thickness of about 80 μm to about 600 μm , and a diameter of about 50 mm to about 250 mm, with a diameter of about 150 mm being preferred. When cut on-axis or slightly off-axis, SiC wafers typically have a carbon side or surface and a silicon side or surface. The wafer can also be cut along the growth axis and in any other orientation relative to the growth axis.

Generally speaking, before the development of commercial SiC MOSFETs, the power industry (>500V) was mainly based on the use of silicon (Si) IGBTs. These are bipolar devices and have low conduction losses, allowing them to handle high currents (amps) and power (watts or W). However, they suffer high power losses during the cut-off phase (transition between conduction and blocking), thus limiting the frequencies at which they can be operated. The operating frequency is important because the higher the frequency, the smaller the passive components of the converter/inverter (for example, the inductor), which helps reduce the size and weight of the components. Reducing the size, weight and both of these components (MOSFETs and IGBTs) is a long-standing problem in this technology and an important metric for end users. MOFETs are unipolar components, so they offer lower switching losses (especially during the turn-off phase). However, they suffer from higher on-resistance (conduction losses), which increases with voltage, so at higher voltages (>500V for Si) IGBT systems are advantageous. Therefore, a long-standing and unsolved problem posed to this technology is optimizing (ie, minimizing) conduction losses and transition losses in semiconductor components.

In addition, the transition from silicon-based devices to SiC-based devices has faced substantial and long-standing problems. In particular, the transition from p-type silicon devices to SiC-type devices (e.g., n-type for these initial prior attempts) requires significant expense, time, and difficulty in redesigning the p-type silicon devices, e.g., circuit systems , masks, configurations, etc. so that n-type SiC can be used. The inability of previous technologies to provide high quality p-type SiC wafers has left this long-standing problem and need unsolved.

The history of power electronic components and circuits begins with semi-components made of silicon.

Many designs of power circuits use p-channel and n-channel field effect transistors. The most common transistors are MOSFETs or metal oxide semi-field effect transistors. As used herein, unless otherwise specified, a p-channel MOSFET is a type of MOSFET in which the MOSFET's channel consists of a majority of the holes as current carriers. When a MOSFET is activated and turned on, most of the current flowing is holes moving through the channel. Another type of MOSFET is the n-channel MOSFET, in which most of the current carriers are electrons. n-channel or p-channel MOSFETs can be made in two different ways: enhancement-mode MOSFET or depletion-mode MOSFET.

A depletion MOSFET usually turns on when there is no voltage difference between the gate and source terminals (maximum current flows from source to drain). However, if a voltage is applied to its gate lead, the drain-source channel becomes more resistive until the gate voltage is so high that the transistor shuts down completely. The opposite is true for enhancement mode MOSFETs. It usually cuts off when the gate-source voltage is 0V (VGS=0). However, if a voltage is applied to its gate lead, the drain-source channel becomes less resistive.

Typical applications of power components are the design and manufacturing of power circuits (ie, inverters, converters, and power supplies). Design these circuits using n-channel MOSFETs or p-channel MOSFETs, or both. An example of where two types are needed is an H-bridge power drive circuit where the function is to drive current through a load in either direction (i.e. drive a DC motor forward or backward such as in an electric automated guided vehicle or a motor in a fully electric vehicle ).

To increase energy efficiency in modern power management circuits, today's designs now use silicon carbide MOSFETs based on 4H-SiC crystalline substrates. Silicon carbide MOSFETs offer the possibility to design circuits that operate at higher voltages and frequencies than circuits using silicon MOSFETs. With SiC MOSFETs, typically the power circuits discussed above can operate in the voltage range of 600 V to greater than 10 kV and the amperage range of 5 A to greater than 200 A.

Today's MOSFETs made of SiC can only be made from n-type SiC substrates, as there is currently no commercial supply of p-type SiC substrates available. Therefore, most SiC MOSFETs are manufactured as n-channel components. Because only SiC MOSFETs using n-type substrates have been commercially available so far, SiC MOSFETs cannot be deployed in the full range of power circuit applications.

There is a long-standing need for commercially viable n-channel IGBTs (variants of MOSFET transistors) because this device offers lower on-resistance and/or higher blocking voltage than its p-channel counterpart. Furthermore, n-channel components with positive voltage polarity and similarity to conventional power MOSFETs may be more attractive from a system perspective. Until now, such devices have been manufactured using p-type SiC material formed as an epitaxial layer on an n-type SiC substrate and then removing the substrate by grinding. Such components have proven unsatisfactory for several reasons, including due to the difficulty of substrate removal required. Among other things, the present invention provides the ability to provide such SiC IGBT components that are easy to manufacture and commercially acceptable.

There is a long-standing need for SiC LDMOSFETs (lateral metal-oxide semi-field effect transistors). These components were developed in silicon for high power applications such as cellular and UHF broadcast transmissions have increased significantly. This is because Si LDMOSFETs provide higher gain and better linearity than bipolar components. However, prior to this invention, this design could not be implemented in SiC because there were only n-type SiC substrates and historically any p-type epitaxially formed SiC substrate had too high a resistivity compared to silicon, resulting in LDMOSFET elements Performance is unsatisfactory.

Generally, power MOSFETs tend to exhibit better performance when made from n-channel rather than p-channel. However, to achieve even greater performance, such devices typically require epitaxial growth on low-resistivity p-type substrates. However, currently available p-type 4H-SiC substrates have relatively high resistivities (~2.5 ohm-cm), which are approximately two orders of magnitude higher than those of n-type substrates. The advantages of n-channel SiC components have long been touted but have not been realized due to the high resistivity found in previous p-type substrates. The p-type wafers of the present invention therefore provide low resistivity that addresses this long-standing need and enables n-channel SiC devices with improved performance relative to devices made from n-type SiC substrates.

As used herein, unless otherwise specified, the term "specific gravity" (also known as "apparent density") shall be given its broadest possible meaning and generally means the weight per unit volume of a structure, e.g., the volume of a material shape. This property will include the internal porosity of the particle as a fraction of its volume. Among other techniques, low-viscosity fluids that wet the particle surface can be used to measure them.

As used herein, unless otherwise specified, the term "actual density" (also referred to as "true density") shall be given its broadest possible meaning and generally means the density of a material when voids are not present in the material. Weight per unit volume. This measurement and property essentially eliminates any internal porosity from the material (i.e., below detectable levels with standard measurement techniques), ie, does not include any voids in the material.

As used herein, "room temperature" is 25°C unless otherwise stated. And the "standard ambient temperature and pressure" is 25℃ and 1 atmosphere. Unless otherwise expressly stated, all tests, test results, physical properties and values related to temperature, pressure or both are provided at standard ambient temperature and pressure, which will include viscosity.

Generally, as used herein, unless otherwise stated, the term "about" and the symbol "~" are intended to encompass the greater of a variable or range of ±10% and the experimental or instrumental error associated with obtaining the stated value.

As used herein, unless otherwise specified, the terms %, weight %, and mass % are used interchangeably and refer to the weight of the first component as a whole (e.g., a formulation, mixture, preform, material, structure, or product) percentage of weight. Unless otherwise explicitly provided, use X/Y or XY to indicate the weight % of X and the weight % of Y in the formulation. Unless otherwise explicitly provided, use X/Y/Z or XYZ to indicate the weight % of X, the weight % of Y, and the weight % of Z in the formulation.

As used herein, unless otherwise specified, "% volume" and "% volume" and similar such terms refer to the first component as a whole (e.g., a formulation, mixture, preform, material, structure, or product) The volume as a percentage of the volume.

As used herein, unless otherwise expressly stated, the term "source material" shall be given its broadest possible definition when used in the context of ingot growth, vapor deposition apparatus, epitaxy, and crystal growth and deposition processes. , and refers to a powdered SiC material, SiC volume shape (e.g., formed charge) or other forms of solid SiC.

As used herein, terms such as "purity," "purity grade," "impurities," and "contaminants" are to be viewed in conjunction and generally are associated with undesirable and not intentionally added to SiC materials used to make SiC crystals or Material related to the polymer derivatization process. These terms do not include dopants (e.g., atomic impurities, atomic impurities, substituted impurities, interstitial impurities, electroactive impurities, and similar such terms) that are intentionally added to or incorporated into the SiC crystal to provide Or other elements or materials that realize the charge, semiconductor properties or other properties of SiC crystals. These terms do not include intentional incorporation into or combination with starting materials, polysilica precursors, cured materials, first ceramic materials, source materials, and one or more of these materials to contribute to SiC crystals (specifically SiC wafers) provide the characteristics of any predetermined material. When determining purity and purity levels, the amount of dopant will be considered (ie, counted as) part of the SiOC or SiC material. Therefore, when so defined, and as used herein, a dopant or doping material is not an "impurity." In this way, for example, a SiOC material doped (e.g., by atomic impurities) with dopants only and Si, O and C or dopants and only Si and C The SiC material will be 100% pure.

As used herein, unless expressly stated otherwise, the terms "existing materials", "prior materials", "current materials", "currently available materials", "existing vapor deposition apparatus", "current vapor deposition apparatus" and Similar such terms refer to source materials and devices that existed prior to the present invention. Use of this term should not be considered and is not an admission of prior art. It is intended merely to describe the current state of the art as a baseline or reference point against which significant and groundbreaking improvements to embodiments of the invention may be evaluated, compared, and measured.

This [Technical Field] section is intended to introduce various aspects of the invention, which may be associated with embodiments of the invention. Accordingly, the preceding discussion in this section provides a framework for better understanding the present invention and should not be considered an admission of prior art.

There is an unmet, long-standing and growing need for high temperature, high capacity and high performance semiconductor components, power components and electronic components. Silicon Carbide (SiC) wafers provide substrates that meet the preferred and required performance characteristics for these applications, such as high temperature, power, and band gap. However, prior to the present invention, p-type SiC crystals, p-SiC ingots, p-type SiC ingots and p-type SiC wafers made from such ingots were not commercially available and essentially unobtainable. Specifically, such p-type materials are not available through the PVT process. Therefore, the advantages, benefits and potential of semiconductor components based on p-type SiC wafers have not yet been realized and, in particular, have not been exploited in a commercially and economically acceptable manner.

An additional long-standing problem with previous attempts to dope SiC, including incorporating electroactive acceptor atoms into SiC crystals, is the lack of side-to-side and top-to-bottom uniformity in the crystal or wafer. The present invention resolves and solves this long-standing problem by providing methods and source materials in embodiments of doped SiC crystals and wafers of the present invention that provide crystals with electroactive atomic impurities. Very even distribution side to side and top to bottom.

The present invention addresses these long-standing needs by, among other things, providing formulations, methods and apparatus for obtaining p-type SiC materials and semiconductor devices utilizing them.

The present invention solves these problems and long-standing needs by, among other things, providing the compositions, materials, articles, components and processes taught, disclosed and claimed herein.

The present invention solves these problems and long-standing needs by, among other things, providing high quality, low defect p-type SiC materials, including p-type SiC crystals, p-type SiC ingots, p-type SiC type SiC ingots and p-type SiC wafers obtained from those ingots. The present invention addresses these problems and long-standing needs by, among other things, providing p-type SiC materials that are suitable or feasible for economical fabrication, commercial fabrication, or both of semiconductor devices, including p-type SiC crystal, p-type SiC ingot, p-type crystal rod and p-type wafer. The present invention addresses, among other things, the benefits of SiC semiconductor devices having p-type SiC material, and in particular, providing such devices in an economically and commercially viable manner so that their use and benefits are widely available. These issues and long-standing needs.

There is a long-standing and unsolved need for low-resistivity SiC materials, and specifically low-resistivity SiC wafers and devices that can be built on or from such wafers. Materials include low resistivity SiC crystals, SiC ingots, SiC ingots and SiC wafers obtained from these ingots. These low resistivity wafers may be p-type or n-type wafers. The present invention addresses these problems and long-standing needs by, among other things, providing low resistivity SiC materials that are suitable or feasible for economical fabrication, commercial fabrication, or both of semiconductor devices, including Low resistivity SiC crystal, SiC ingot, ingot and wafer.

Accordingly, a p-type SiC wafer is provided having a diameter of about 4" (100 mm) to about 6" (150 mm); a thickness of about 300 μm to about 600 μm ; acceptor atoms; and about 0.015 ohm-cm to about 0.028 ohm-cm resistivity.

Additionally, a p-type SiC wafer is provided, having a diameter of about 4" (100 mm) to about 6" (150 mm); a thickness of about 325 μm to about 500 μm ; acceptor atoms; and about 2.0 ohm-cm and smaller resistivity.

Additionally, a low resistivity n-type SiC wafer is provided, having a diameter of about 4" (100 mm) to about 6" (150 mm); a thickness of about 300 μm to about 600 μm ; donor atoms; and resistivity of 0.03 ohm-cm and less.

Additionally, a low resistivity n-type SiC wafer is provided, having a thickness of about 300 μm to about 600 μm ; containing donor atoms of phosphorus; a bend of <40 μm ; and a warpage of <60 μm ; and resistivity of 0.03 ohm-cm and less.

Still additionally, a p-type SiC ingot is provided having a diameter of at least about 4" (100 mm); and a height of at least about 1" (25 mm).

Additionally, a p-type ingot is provided having a diameter of about 4" (100 mm) to about 6" (150 mm) and a height of about 1" (25 mm) to about 6" (150 mm).

Additionally, a low resistivity n-type SiC rod is provided, having a diameter of at least about 4" (100 mm) and a height of at least about 1" (25 mm); and comprising donor atoms, wherein the donor atoms are substantially Composed of phosphorus.

Additionally, a low resistivity n-type crystal rod is provided having a diameter of about 4" (100 mm) to about 6" (150 mm); and a diameter of about 1" (25 mm) to about 6" (150 mm). height, and contains donor atoms, wherein the donor atoms consist essentially of phosphorus.

Additionally, a p-type SiC wafer is provided having a thickness of about 300 μm to about 600 μm ; acceptor atoms; bending of <40 μm ; warpage of <60 μm ; and 2.0 ohm-cm to Resistivity of approximately 0.004 ohm-cm.

Therefore, a method for manufacturing SiC crystals with predetermined electrical properties is provided. The method includes the following steps: placing SiC source material in a vapor deposition device; the SiC source material includes silicon, carbon and dopants; wherein doping The agent is selected to provide predetermined electrical properties to the SiC crystal; wherein the position of the dopant in the source material is fixed relative to the silicon and carbon; an inert gas is added to the vapor deposition device, and the dopant in the vapor deposition device is controlled. pressure; heating the SiC source material, thereby forming a flux, wherein the flux includes silicon, carbon and dopants; and depositing the flux on the growth surface of the SiC crystal, thereby growing the SiC crystal; wherein the SiC crystal has predetermined electrical properties .

In addition, a method for manufacturing p-type SiC crystals is provided, which method includes the following steps: placing a shaped charge SiC source material in a vapor deposition device; the shaped charge SiC source material is basically composed of silicon, carbon and a certain amount of The acceptor atoms are composed of acceptor atoms that remain in position in the shaped charge SiC source material; the position of the acceptor atoms relative to silicon and carbon in the shaped charge source material is fixed; the shaped charge is heated SiC source material, thereby forming a flux through sublimation of the shaped charge source material; wherein the flux includes silicon, carbon and a portion of the amount of acceptor atoms; and depositing the flux on the growth surface of the p-type SiC crystal, thereby A p-type SiC crystal is grown; wherein at least some of the acceptor atoms in the flux form substituted atomic impurities in the p-type SiC crystal.

In addition, a method for manufacturing low-resistivity n-type SiC crystals is provided, which method includes the following steps: placing a shaped charge SiC source material in a vapor deposition device; the shaped charge SiC source material is basically composed of silicon It consists of , carbon and a certain amount of donor atoms. These donor atoms are maintained in position in the shaped charge SiC source material; the position of the donor atoms in the shaped charge source material relative to silicon and carbon is fixed. ; heating the shaped charge SiC source material, thereby forming a flux via sublimation of the shaped charge source material; wherein the flux includes silicon, carbon and a portion of the donor atoms in that amount; and depositing the flux on an n-type SiC crystal on the growth surface, thereby growing n-type SiC crystal; at least some of the donor atoms in the flux form substituted atomic impurities in the n-type SiC crystal

Still further, a liquid-doped polysilica precursor material for manufacturing p-type SiC crystals is provided, the liquid-doped polysilica precursor material having: a dopant, wherein the dopant has a dopant selected from the periodic table. One or more elements of Group 13 whereby the selected element provides several acceptor atoms; silicon, carbon and oxygen; wherein the dopant is less than 10% by weight of the total weight of the liquid doped polysilica precursor material %; and the liquid-doped polysilica precursor material defines a negative potential net carrier concentration (pNc); where pNc = the number of donor atoms - the number of acceptor atoms.

In addition, a liquid-doped polysilicon precursor material for manufacturing low-resistivity n-type SiC crystals is provided. The liquid-doped polysilicon precursor material has: a dopant, wherein the dopant has a period selected from the group consisting of: One or more elements of Group 15 of the table, whereby the selected element provides several donor atoms; silicon, carbon and oxygen; wherein the dopant is less than the total weight of the liquid doped polysilica precursor material 10% by weight; and the liquid-doped polysilica precursor material defines a positive potential net carrier concentration (pNc); where pNc = the number of donor atoms - the number of acceptor atoms.

Further provided are such methods, composition materials, crystals, ingots and wafers having one or more of the following characteristics: further having a polytype selected from the group consisting of 4H and 6H; wherein the wafer is uniformly doped A hybrid wafer; wherein the ingot is a uniformly doped ingot; wherein the acceptor atoms comprise aluminum, boron, or a combination of aluminum and boron; wherein the wafer has an N _A of at least 10 ¹⁸ /cm ³ ; wherein the wafer has approximately 10 ¹⁸ /cm ³ to about 10 ²⁰ /cm ³ _NA ; wherein the wafer has an _NA of about 10 ¹⁸ /cm ³ to about 10 ²¹ /cm ³ ; further having an orientation of <0001> +/-0.5 degrees; Further having a bend of <40 μm ; further having a warp of <60 μm ; further having a TTV of <15 μm ; further having a SBIR (LTV) of <4 μm (10mm x 10mm average); further having MPD (microtubules) of 0.2 cm ^-2 ; further having a TSD (threaded screw density) of <500 cm ^-2 ; and further having a BPD (basal plane dislocation) of <500 cm ^-2 .

Additionally, such methods, composition materials, crystals, rods, and wafers are provided having one or more of the following characteristics: wherein the resistivity is from about 2.0 ohm-cm to about 0.1 ohm-cm; wherein the resistivity is 0.13 ohm-cm and less; wherein the resistivity is 0.013 ohm-cm to about 0.004 ohm-cm; wherein the resistivity is about 0.010 ohm-cm and less; wherein the resistivity is about 0.01 ohm-cm to about 0.001 ohm-cm cm; wherein the resistivity is from about 0.009 ohm-cm to about 0.004 ohm-cm; wherein the acceptor atoms comprise aluminum, boron, or a combination of aluminum and boron; wherein the wafer has an N _A of at least 10 ¹⁸ /cm ³ ; wherein the wafer Having an N _A of 10 ¹⁸ /cm ³ to about 10 ²⁰ /cm ³ ; wherein the wafer has an N A of 10 ¹⁸ /cm ³ to about 10 ²¹ /cm ³ ; wherein the wafer has an N _A of 10 ¹⁸ /cm ³ to about 10 ²² /cm ³ _NA ; wherein the wafer has an _NA 10 ¹⁸ /cm ³ to about 10 ²³ /cm ³ ; and, wherein the wafer has _an NA 10 ¹⁸ /cm ³ to about 10 ²⁴ /cm ³ .

Additionally, such methods, composition materials, crystals, rods, and wafers are provided having one or more of the following characteristics: wherein the resistivity is from about 0.01 ohm-cm to about 0.004 ohm-cm; wherein the resistivity is 0.010 ohm-cm and less; wherein the resistivity is from about 0.009 ohm-cm to about 0.002 ohm-cm; wherein the resistivity is from about 0.009 ohm-cm to about 0.004 ohm-cm; wherein the donor atoms comprise phosphorus, nitrogen or phosphorus and a combination of nitrogen; and wherein the substituted donor atoms consist essentially of phosphorus.

Additionally, such methods, composition materials, crystals, ingots, and wafers are provided having one or more of the following characteristics: wherein the wafer has an _ND of at least 10 ¹⁸ /cm ³ ; wherein the wafer has an ND of at least about _ND of 10 ¹⁹ /cm ³ ; where the wafer has an ND of 10 ¹⁸ /cm ³ to 10 ²¹ /cm ³ ; where the wafer has an _ND of 10 18 /cm 3 to 10 22 /cm 3 ; where the wafer has an _ND of 10 ¹⁸ /cm ³ to 10 ²¹ /cm ³ ; where the wafer has an ND having an _ND of 10 ¹⁸ /cm ³ to 10 ²³ /cm ³ ; and, wherein the wafer has an _ND of 10 ¹⁸ /cm ³ to 10 ²⁴ /cm ³ .

Additionally, such methods, composition materials, crystals, ingots, and wafers are provided having one or more of the following characteristics: wherein the polytype is selected from the group consisting of 4H and 6H; wherein the polytype The body remains the same throughout the entire area of the crystal, rod, or wafer; and, wherein there is no polytype body transformation in the crystal, rod, or wafer.

Additionally, such methods, composition materials, crystals, ingots and wafers are provided having one or more of the following characteristics: including p-type crystal growth on the C-face of the SiC seed crystal; including on the SiC seed crystal p-type crystal growth on the S face of the SiC seed crystal; including p-type crystal growth on the C face of the SiC seed crystal, where the SiC seed crystal has a 4H or 6H polytype; including p-type crystal growth on the S face of the SiC seed crystal Growth, in which SiC seed crystals have 4H or 6H polytypes.

Furthermore, a semiconductor component is provided that includes or is built on such wafers or portions of such wafers.

In addition, a semiconductor component is provided, which includes or is built on the wafers or a portion of the wafers, and wherein the component is selected from the group consisting of N-channel E-MOSFET, P-channel A group consisting of E-MOSFET and N-channel D-MOSFET.

In addition, a semiconductor component is provided, which includes or is built on the wafers or a portion of the wafers, and wherein the component is selected from the group consisting of P-channel D-MOSFET, IGBT, A group consisting of LDMOS, VMOS MOSFET, UMOS MOSFET and CMOS compound components.

Additionally, a flash memory device is provided that includes or is built on such wafers or portions of such current wafers.

Additionally, a method of manufacturing a p-type SiC semiconductor element configured to replace a silicon p-type semiconductor element is provided, the method comprising the steps of: evaluating a circuit floor plan defined for p-type silicon A circuit system for a semiconductor element; formulating a SiC circuit plan; wherein the SiC circuit plan defines a SiC circuit system operable for a p-type SiC semiconductor element; and wherein the SiC circuit plan consists essentially of the circuit plan.

Still additionally, a method of manufacturing a p-type SiC semiconductor element configured to replace a silicon p-type semiconductor element is provided, the method further comprising one or more of the following features: in the p-type SiC Materials or using p-type SiC material to manufacture SiC circuit systems, wherein the p-type SiC material includes at least a portion of such wafers; wherein the SiC circuit plan and the circuit plan are at least 90% identical; and, wherein the SiC circuit plan and the circuit plan are at least 90% identical %same.

Generally speaking, the present invention relates to silicon carbide (SiC) crystals, ingots, ingots and wafers, processes used to manufacture them, and products made from or based on these wafers. Round elements.

Generally speaking, embodiments of the present invention relate to such crystals, ingots, ingots, and wafers made using sublimation growth processes such as physical vapor transport (PVT), and for use in polymerization-based In the process of manufacturing material-derived ceramics, a starting material including a polysilica precursor material is used to perform a sublimation growth process (eg, a PVT device).

Generally speaking, embodiments of the present invention relate to p-type SiC crystals (which include ingots, rods, and wafers), processes for making those p-type articles, and devices made from those p-type wafers. or devices based on those p-type wafers. In particular, embodiments of the present invention relate to cubic p-type SiC crystals, ingots, ingots and wafers, processes for making the same p-type articles, and products made from the p-type wafers or devices based on their p-type wafers. Specifically, embodiments of the present invention relate to hexagonal p-type SiC crystals (including ingots, rods, and wafers), processes for making those p-type articles, and articles made from those p-type wafers. or devices based on those p-type wafers.

Generally speaking, embodiments of the present invention relate to low resistivity SiC crystals (including ingots, rods, and wafers), processes used to make the same, and articles made from or based on the same. wafer components. Specifically, in embodiments, the present invention relates to n-type and p-type SiC wafers having a resistivity of 0.010 ohm-cm and less, and preferably having a resistivity of 0.005 ohm-cm and less. These low resistivity wafers may be p-type or n-type wafers. In embodiments, these low resistivity wafers have cubic or hexagonal crystal structures, each of which is also a p-type or n-type wafer.

Generally speaking, embodiments of the present invention are based on or include polymer-derived ceramic ("PDC") materials and products and applications that use, are based on, or consist essentially of PDC materials. Examples of PDC materials, formulations, precursors, starting materials, and devices and methods for making such materials are found, for example, in U.S. Patent Nos. 9,657,409, 9,815,943, 10,091,370, 10,322,936, and 11,014,819, and in the U.S. Each of these is found in Patent Publication No. 2018/0290893, as well as U.S. Patent Nos. 9,499,677, 9,481,781, 8,742,008, 8,119,057, 7,714,092, 7,087,656, 5,153,295, and 4,657,991. The entire disclosure of is incorporated herein by reference.

The preferred PDC is "polysilicone" material, which is a PDC material containing silicon (Si), oxygen (O) and carbon (C). Polysilica materials and methods of making them are disclosed and disclosed in U.S. Patent Nos. 9,815,943, 9,657,409, 10,322,936, 10,753,010, 11,014,819, and 11,091,370, and U.S. Patent Publication No. 2018/0290893. teachings, the entire disclosure of each of which is incorporated herein by reference.

Generally speaking, embodiments of the invention relate to liquid-to-solid to ceramic-to-crystalline processes that use PDC liquid precursor materials that are then solidified into solid materials (eg, plastic-like materials, cured materials). The solidified PDC material is converted (eg, pyrolyzed) into a first PDC ceramic material, and the first ceramic material is then converted (eg, pyrolyzed) into a PDC SiC source material. Typically, these steps or transformations are performed as separate heating operations, however, they can be performed in a single heating operation. The PDC SiC source material can be further formed into a shaped charge source material. The PDC SiC source material can then be used to grow (eg, by vapor deposition and preferably PVT) PDC SiC crystals. Typically, precursor materials are liquids, however, they can be solids, dissolved solids, and melts.

In general, one or more dopants (eg, additive materials intended to impart one or more predetermined properties, such as atomic impurities) to SiC crystalline materials (eg, crystals, ingots, rods, and wafers) may be added to the PDC Material. Such dopants are selected to provide predetermined properties, characteristics, or both (e.g., electrical or semiconductor-related properties or characteristics) to SiC crystals grown or made from PDC precursors, which subsequently include crystals, ingots, Crystal ingots and wafers. In preferred embodiments, the predetermined electrical or semiconductor properties or characteristics include, for example: resistivity; conductivity; donor atoms (i.e., missing electrons) and crystal position (substituted or interstitial) and distribution of electrons; electrical conductivity; The concentration, crystal position and distribution of active atomic impurities; the concentration, crystal position, ratio and distribution of substituted atomic impurities and interstitial atomic impurities; Nc value; N _A value; and N _D value, carrier concentration Ne, Nh; And the change in the electronic band structure toward the valence band or conduction band energy or Fermi energy. Such characteristics would include p-type crystals, as well as low resistivity n-type or p-type crystals, and such items having cubic or hexagonal crystal structures.

Dopants can be added to the liquid PDC precursor material, the solid cured PDC material, the first PDC ceramic, and combinations and variations of these. Dopants may also be added to or part of the binder used to form a shaped charge, such as the volumetric shape of SiC, in a vapor deposition process (e.g., PVT) used to grow SiC crystals used as source material. The preparation and use of shaped charge SiC source materials for vapor deposition (eg, PVT) growth of SiC crystals is disclosed and taught in U.S. Patent Publication No. 2018/0290893, the entire disclosure of which is incorporated by reference. incorporated herein.

Generally speaking, in embodiments of the present invention, the dopant is preferably a PDC material, a SiC source material, or an integral part of both. Accordingly, the dopant may: (i) be chemically bonded to the PDC material (e.g., part of a polymer chain in a liquid PDC material, part of a cured polymer in a solid cured PDC material, or both); (ii) It can be maintained (chemically, mechanically, or both) within a matrix of PDC materials (e.g., nanocomposites) such as disclosed and taught in U.S. Patent No. 10,633,400, the entire disclosure of which is incorporated by reference. Incorporated herein; (iii) it can be retained (chemically, mechanically, or both) within the SiC source material; and (iv) combinations and variations of these.

Having dopants as an integral part of the SiC source material provides several benefits over previous ways of introducing dopants into the crystal growth vapor deposition process. For example, having the dopant as an integral part of the SiC source material allows the dopant to sublimate from the source material along with Si and C to create flux in vapor deposition processes and devices (eg, PVT). In this way, the dopants are not added to the flux separately after the flux is formed. Instead, the dopants are formed with the flux and are formed as part of the flux. Having the dopant during and as an integral part of the flux formation provides greater control over the overall process than adding the dopant to the flux after the flux has been formed (such as gas flow or separate sublimation of the dopant). Greater control. Therefore, in general, preferred embodiments of the present invention avoid the need to have a separate dopant source from the SiC source material. This would include avoiding the use of dopant-based gas flows into the vapor deposition apparatus, using separate solid dopant sources in the vapor deposition apparatus, and combinations thereof. However, it should be understood that in other embodiments, a separate dopant-based gas stream, for example with a second type of dopant, may be used.

Generally speaking, the location, distribution, and both of dopants (eg, atomic impurities) within and throughout the SiC source material (eg, shaped charge source material) are fixed. Additionally, and preferably, the dopants remain fixed in the predetermined location and distribution, and preferably are fixed throughout most and throughout the vapor deposition process used to grow the SiC crystal. In this way, dopants can be evenly distributed through the SiC source material. It can be varied in concentration, location and distribution within the SiC source material to account for changes in flux formation and SiC crystal growth. In this latter manner, the intended placement of the dopants is not uniform, but results in a uniform distribution of the dopants in the SiC crystal. In this manner, and in embodiments where the shaped charge source material is doped, a matrix of Si, C and atomic impurities (eg, donor atoms, acceptor atoms, or both) is provided. The doped shaped charge is such a porous matrix of Si, C and atomic impurities, where the matrix retains the atomic impurities, immobilizes the atomic impurities, or both.

When embodiments of shaped charge SiC source materials are used, the predetermined location and distribution of the dopants (eg, atomic impurities) remain fixed in the solid source material until the dopants sublime with the solid source. Therefore, for at least 60%, 70%, 80%, 90%, and 100% of the crystal growth cycle in the vapor deposition (eg, PVT) process and apparatus, the dopant can remain fixed in the solid source material such that Such solid source materials have not yet been sublimated. In other words, in these embodiments, the solid dopant does not change its position relative to the solid SiC in the shaped charge during the crystal growth cycle.

In addition, fixing dopants (eg, atomic impurities) at predetermined positions and distributions in SiC source materials (eg, SiC shaped charge source materials) provides for obtaining substitutional and interstitial impurities in SiC crystals. The ability to achieve high ratios (i.e., greater or more efficient use of atomic impurities). This more efficient use of atomic impurities reduces the adverse effects (eg, stress) that interstitial impurities can cause in the SiC crystal. Because SiC and doping elements co-sublimate when dopant atoms are exposed on the surface, incorporation into the growing ingot is better guaranteed at a uniform concentration throughout growth.

It will be understood that keeping dopants (eg, atomic impurities) "fixed" during a crystal growth cycle is relative to the non-sublimated portion of the source material (ie, remains the portion that has not yet sublimated). When the source material sublimates during the vapor deposition process, the dopants also sublimate. In this manner, the dopant is formed in the flux and as part of the flux together with the Si-based and C-based components of the flux. Additionally, in this manner, and preferably, the dopants are not added to the flux separately after formation of the flux. Rather, the dopant is an integral part of the flux and even of the formation of the flux.

Generally speaking, embodiments of the present invention relate to providing formulations and methods for doping source materials for fabricating predetermined types of SiC wafers. In such embodiments, the starting material (eg, precursor) is typically a liquid that is subsequently solidified into a solid material. Solid starting materials often contain dopants (eg, atomic impurities). The solid starting material is then pyrolyzed into a ceramic containing dopants. This ceramic is then further converted into SiC, which contains dopants and forms the basis of the source material for growing predetermined types of SiC crystals (eg, p-type, low resistivity p-type, and low resistivity n-type). Each of these predetermined crystal types are then fabricated into SiC wafers, for example, p-type, low resistivity p-type, and low resistivity n-type.

Generally speaking, preferred embodiments of the present invention relate to formulations using a liquid containing Si, O, and C to form a liquid precursor material having one or more than one dopants added thereto (e.g., , atomic impurities), so the liquid precursor material contains dopants. The dopant or dopants are selected from elements and compounds intended to provide specific electrical properties, semiconducting properties, or both properties to the SiC crystals and wafers ultimately made from this liquid precursor material.

The dopant may be or may be based on any element that can form electrically active atomic impurities in the SiC crystals and wafers, providing one or more of predetermined electrical, semiconducting or physical properties to the SiC crystals and wafers. any element. For example, the dopant may be or may be based on: an element selected from group 13 (IIIA) of the periodic table (boron (B), aluminum (Al), etc.), an element selected from group 2 (IIA) ( Beryllium (Be), etc.), and elements selected from Group 15 (VA) (nitrogen (N), phosphorus (P), arsenic (As), antimony (Ab), etc.). The dopant may also be selected from elements in Group 16 (VIA) (oxygen (O), sulfur (S), etc.). The dopant may be selected from transition metals such as Ti, Cr, Mn, Ni, Fe, Co, etc. In embodiments, transition metal elements can add properties to the crystalline material, and thus the doped SiC wafer, that provide a new class of performance in devices such as spintronics, photonic band gaps, and electrochemical devices.

The preferred dopant forms for manufacturing p-type SiC crystals, ingots, rods and wafers are aluminum and boron. Preferred dopants for making n-type low resistivity wafers are phosphorus, nitrogen, and in some cases sulfur and combinations of phosphorus, sulfur, and nitrogen.

Although this specification focuses on SiC vapor deposition technology, and specifically SiC PVT technology, it should be understood that the invention is not so limited and may be applied to other SiC crystal growth processes, bonding processes, and other applications. Precursors and source materials - in general

Embodiments of the present invention preferably use, are based on or constitute PDC, which is a "polysilicone" material, that is, a material containing silicon (Si), oxygen (O) and carbon (C), and such materials that have been cured , examples of such materials that have been pyrolyzed, and examples of such materials that have been converted to SiC for use as source materials. Unless specifically stated otherwise, silicon oxycarbide materials, SiOC compositions, and similar such terms refer to polysilica materials and will include liquid materials, solid uncured materials, cured materials, ceramic materials, and combinations thereof and changes. Polysilica materials and methods of making them are disclosed and disclosed in U.S. Patent Nos. 9,815,943, 9,657,409, 10,322,936, 10,753,010, 11,014,819, and 11,091,370, and U.S. Patent Publication No. 2018/0290893. teachings, the entire disclosure of each of which is incorporated herein by reference.

Polysilica materials can have high and exceptionally high purity. Therefore, they can be 99.99% pure, 99.999% pure and 99.9999% pure. Polysilica materials can also contain other elements. Specifically, in preferred embodiments, the polysilica material includes dopants (eg, atomic impurities). (The dopants are not counted as impurities in these percent purity calculations, but are counted as part of the SiC material for purposes of the percent purity calculations). Polysilica materials are made from one or more polysilica precursors or precursor formulations. Polysilica precursor formulations include one or more functionalized silicon polymers or monomers, non-silicon-based crosslinkers, and possibly other ingredients such as, for example, inhibitors, catalysts, dopants, and other additives. Dopants may include, for example, one or more of metals, metalloids, metal complexes, alloys, and non-metals, as well as combinations and variations thereof.

Thus, for example, the p-type dopant may include or may be based on one or more elements selected from Group 13 (boron, etc.). A particularly preferred dopant for making p-type SiC crystals, ingots, rods and wafers is aluminum.

In order to fabricate low resistivity p-type crystals and wafers, the amount of dopants contained in the starting polysilica material should be sufficient to advance in the process to provide sufficient dopants in the SiC source material to crystallize in the p-type Providing sufficient electrically active atomic impurities in the material to have low resistivity. As used herein, unless otherwise specified, "low resistivity" SiC p-type crystals, ingots, rods and wafers have 0.03 ohm-cm and less, about 0.010 ohm-cm and less, about 0.007 ohm -cm and smaller, about 0.005 ohm-cm and smaller, about 0.003 ohm-cm and smaller, about 0.01 ohm-cm to about 0.001 ohm-cm, about 0.009 ohm-cm to about 0.004 ohm-cm and about 0.006 ohm-cm to about 0.002 ohm-cm resistivity.

Preferred dopants for low resistivity n-type SiC crystalline materials are phosphorus, nitrogen and sulfur (as dual donors) and combinations thereof.

In order to fabricate low resistivity n-type crystals and wafers, the amount of dopants contained in the starting polysilica material should be sufficient to advance in the process to provide sufficient dopants in the SiC source material to crystallize in the n-type. Providing sufficient electrically active atomic impurities in the material to have low resistivity. As used herein, unless otherwise specified, "low resistivity" SiC n-type crystals, ingots, rods, and wafers have 0.03 ohm-cm and less, about 0.010 ohm-cm and less, about 0.007 ohm -cm and smaller, about 0.005 ohm-cm and smaller, about 0.003 ohm-cm and smaller, about 0.01 ohm-cm to about 0.001 ohm-cm, about 0.009 ohm-cm to about 0.004 ohm-cm and about 0.006 ohm-cm to about 0.002 ohm-cm resistivity.

Generally, silicone precursor formulations start out as liquids. The liquid precursor is solidified into solid or semi-solid SiOC (i.e., the "cured material"). The solid or semi-solid SiOC is then pyrolyzed into ceramic SiOC, which is then converted (further pyrolyzed) into SiC. These processes and transformations can occur in single steps, in separate or individual steps, and in combinations and variations of these.

Precursor formulations that can be used as starting materials, to which dopants (eg, donor atoms, acceptor atoms, or sources of both atoms) can be added, and methods of making the same are disclosed in U.S. Patent No. 11,091,370 All disclosures in this case are incorporated herein by reference. These formulations can provide carbon-rich SiC source materials and carbon-deficient SiC source materials. Depending on the type of donor or acceptor atoms and other conditions, a predetermined stoichiometry (e.g., carbon-rich, carbon-poor) in the source material may be beneficial, e.g., a predetermined stoichiometry may result in the incorporation of more energy into the SiC crystal. Many dopants act as interstitial impurities.

Precursor formulations can be made from a variety of precursors.

The precursor may be a siloxane backbone additive, such as methyl hydrogen (MH), the chemical formula of which is shown below.

MH may have a molecular weight of about 400 mw to about 10,000 mw, about 600 mw to about 3,000 mw ("mw", which may be measured as weight average molecular weight in amu, or measured as g/mol), and It can preferably have a viscosity of about 20 cps to about 60 cps. The percentage of methylsiloxane units "X" can range from 1% to 100%. The percentage of dimethylsiloxane units "Y" can range from 0% to 99%. This precursor can be used to provide the backbone of the cross-linked structure, as well as other features and properties, to cured preforms and ceramic materials. Such precursors may also be modified by reaction with unsaturated carbon compounds to produce new or additional precursors, among other things. Typically, methyl hydrogen fluid (MHF) has a minimal amount of "Y", and preferably, for all practical purposes, "Y" is zero.

The precursor may be vinyl-substituted polydimethylsiloxane, the chemical formula of which is shown below.

The precursor may have a molecular weight (mw) of about 400 mw to about 10,000 mw, and may preferably have a viscosity of about 50 cps to about 2,000 cps. The percentage of methylvinylsiloxane units "X" can range from 1% to 100%. The percentage of dimethylsiloxane units "Y" can range from 0% to 99%. Preferably, X is about 100%. This precursor can be used to reduce cross-link density and improve toughness, as well as other features and properties of cured preforms and ceramic materials.

The precursor may be vinyl-substituted and vinyl-terminated polydimethylsiloxane, the chemical formula of which is shown below.

The precursor may have a molecular weight (mw) of about 500 mw to about 15,000 mw, and preferably has a molecular weight of about 500 mw to 1,000 mw, and may have a viscosity of about 10 cps to about 200 cps. . The percentage of methylvinylsiloxane units "X" can range from 1% to 100%. The percentage of dimethylsiloxane units "Y" can range from 0% to 99%. This precursor can be used to provide branching and reduced curing temperatures, as well as other features and properties of cured preforms and ceramic materials.

The precursor may be tetravinylcyclotetrasiloxane (“TV”), the chemical formula of which is shown below.

The precursor can be a siloxane backbone additive, such as methyl-terminated phenethyl polysiloxane, (also known as styrene vinyl benzene dimethyl polysiloxane), the chemical formula of which is shown below.

The precursor may have a molecular weight (mw) of about 800 mw to at least about 10,000 mw to at least about 20,000 mw, and may preferably have a viscosity of about 50 cps to about 350 cps. The percentage of styrenevinylsiloxane units "X" can range from 1% to 60%. The percentage of dimethylsiloxane units "Y" can range from 40% to 99%. This precursor can be used to provide improved toughness, reduce reaction cure exotherms, can alter or alter the refractive index, tailor the refractive index of the polymer to match that of various types of glass, be used to provide, for example, transparent glass fibers, and cure Other characteristics and properties of prefabricated parts and ceramic materials.

The precursor may be divinylbenzene.

The precursor may also be any of the precursors and liquid starting materials disclosed and taught in US Pat. No. 11,091,370.

Precursor formulations to which dopants (eg, sources of donor atoms, acceptor atoms, or both atoms) can be added to provide a doped SiC source material include, for example, the following precursor formulations.

Precursor formulation made by mixing together 41 wt% linear methyl-hydrogen polysiloxane (MHF) and 59 wt% tetravinylcycloterasiloxane (TV) .

A precursor formulation made by mixing together 90% methyl-terminated phenethyl polysiloxane (with 27% X) and 10% TV at room temperature. This precursor formulation has 1.05 moles of hydride, 0.38 moles of vinyl, 0.26 moles of phenyl, and 1.17 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.17 20% C 3.47 60% O 1.17 20%

As calculated, the SiOC derived from this formulation would have a calculated mole of C of 2.31 after all CO has been removed, with 98% excess C.

A precursor formulation made by mixing together 70% methyl-terminated phenethyl polysiloxane (with 14% X) and 30% TV at room temperature. This precursor formulation has 0.93 moles of hydride, 0.48 moles of vinyl, 0.13 moles of phenyl, and 1.28 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.28 twenty three% C 3.05 54% O 1.28 twenty three%

As calculated, the SiOC derived from this formulation would have a calculated mole of C of 1.77 after all CO has been removed, with an excess of C of 38%.

A precursor formulation made by mixing together 50% methyl-terminated phenethyl polysiloxane (with 20% X) and 50% TV at room temperature. This precursor formulation has 0.67 moles of hydride, 0.68 moles of vinyl, 0.10 moles of phenyl, and 1.25 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.25 twenty two% C 3.18 56% O 1.25 twenty two%

As calculated, the SiOC derived from this formulation would have a calculated mole of C of 1.93, with 55% excess C after all CO has been removed.

A precursor formulation made by mixing together 65% methyl-terminated phenethyl polysiloxane (with 40% X) and 35% TV at room temperature. This precursor formulation has 0.65 moles of hydride, 0.66 moles of vinyl, 0.25 moles of phenyl, and 1.06 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.06 18% C 3.87 54% O 1.06 28%

As calculated, the SiOC derived from this formulation would have a calculated mole of C of 2.81 after all CO has been removed, with an excess of C of 166%.

A precursor formulation prepared by mixing 65% MHF and 35% dicyclopentadiene (DCPD) at room temperature. This precursor formulation has 1.08 moles of hydride, 0.53 moles of vinyl, 0.0 moles of phenyl, and 1.08 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.08 18% C 3.73 64% O 1.08 18%

As calculated, the SiOC derived from this formulation would have a calculated mole of C of 2.65 after all CO has been removed, with an excess of C of 144%.

A precursor formula prepared by mixing 82% MHF and 18% dicyclopentadiene (DCPD) at room temperature. This precursor formulation has 1.37 moles of hydride, 0.27 moles of vinyl, 0.0 moles of phenyl, and 1.37 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.37 25% C 2.73 50% O 1.37 25%

As calculated, the SiOC derived from this formulation would have a calculated mole of C of 1.37, with 0% excess C after all CO has been removed.

A precursor formulation made by mixing 46% MHF, 34% TV and 20% VT together at room temperature. This precursor formulation has 0.77 moles of hydride, 0.40 moles of vinyl, 0.0 moles of phenyl, and 1.43 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.43 30% C 1.95 40% O 1.43 30%

As calculated, the SiOC derived from this formulation would have a calculated C of 0.53 moles after all CO has been removed, with a 63% C deficiency or a 63% C deficiency.

A precursor formulation made by mixing 70% MHF, 20% TV and 10% VT together at room temperature. This precursor formulation has 1.17 moles of hydride, 0.23 moles of vinyl, 0.0 moles of phenyl, and 1.53 moles of methyl. The precursor formulation has the following molar amounts of Si, C and O based on 100 g of formulation. mole number Mol ratio of Si, C and O (% of total moles in the "Molar" column) Si 1.53 31% C 1.87 38% O 1.53 31%

As calculated, the SiOC derived from this formulation would have a calculated C of 0.33 moles after all CO has been removed, with either a 78% C deficiency or a 78% C deficiency.

Precursor formulation with 50% methyl-terminated phenethyl polysiloxane (with 20% X) and 50% TV, 95% MHF.

Precursor formulation with 54% methyl-terminated phenethyl polysiloxane (with 25% X) and 46% TV.

Precursor formulation with 57% methyl-terminated phenethyl polysiloxane (with 30% X) and 43% TV.

The precursor formula may also be any of the precursor formulas disclosed and taught in US Pat. No. 11,091,370.

One or more dopants (e.g., compositions or materials based on or including atomic impurities used to provide donor atoms or acceptor atoms during the crystal growth process) may be added to one or more of the liquid precursors, And thus added to the liquid precursor formulation, the dopant will now become part of the solidified SiOC material and therefore the SiOC ceramic and SiC. The dopant can react chemically in the liquid state, ie, chemically bond to components of the liquid precursor. The dopant may be part of a mixture (eg, a solution or suspension) of liquid polysilica precursors. In this case, the dopant may be chemically bonded to the polysilica material during the curing step, and thus to the cured SiOC material (pyrolysis step), and thus to the ceramic SiOC material (or converted to SiC steps) and thus remain (chemically or mechanically) in the doped SiC source material, as well as combinations and variations thereof. This will be the case for p-type doped SiC source materials (which provide or grow p-type crystals) or low-resistivity doped SiC source materials (which provide or grow low-resistivity crystals of n-type or p-type).

The dopant may be part of a mixture (e.g., a solid mixed with the cured material, the SiOC ceramic, or both), in which case the dopant may chemically bond to the SiOC material during one or more of the subsequent steps to Available in p-type doped SiC source material or low resistivity SiC source material.

Generally speaking, in embodiments of the present invention, the dopant is preferably a SiOC material, a SiC source material, or an integral part of both. Accordingly, the dopant may: (i) be chemically bonded to the SiOC material (e.g., a polymer chain or part of the composition of one or more of the liquid SiOC materials, a part of the cured polymer in the cured SiOC material, or both); (ii) it can be retained (chemically, mechanically, or both) within a matrix of SiOC materials (e.g., nanocomposites) such as disclosed and taught in U.S. Patent No. 10,633,400, all of which The disclosure is incorporated herein by reference; (iii) it can be retained (chemically, mechanically, or both) within the SiC source material; and (iv) combinations and variations of these.

In embodiments for providing starting materials, intermediate materials and processes for p-type SiC materials, the dopant is covalently bonded to one or more of Si, C, O atoms in the SiOC composition. Thus, for example, converting a solidified SiOC material to SiC results in the dopant being covalently bonded to Si, C, or both, uniformly throughout the SiC source material (i.e., powder), the SiC shaped charge (if used) Distributed so that p-type SiC crystals can be grown by a vapor deposition process (eg, PVT).

In general, two types of reactions can be used to covalently incorporate dopant molecules into the polymer network: hydrosiliconation reactions and condensation reactions. Generally speaking, the hydrosilication reaction will employ at least one alkenyl functionality in the dopant molecule. Preferred embodiments will, for example, have two such functional groups, most preferably 3 to 4. The condensation reaction will use an alkoxy, alcohol or hydroxyl group (-OR), where R is usually a small alkane or hydrogen.

In some embodiments, graphene structures, graphite structures, amorphous carbon structures, and combinations and variations thereof are present in the Si-OC ceramic after pyrolysis. The distribution of silicon species consisting of the SiOxCy structure (which yields SiO ₄ , SiO ₃ C, SiO ₂ C ₂ , SiOC ₃ and SiC ₄ ) forms in different ratios resulting from the choice of precursors and their processing history . In such embodiments, the dopants may be bound together with the amorphous carbon structure between adjacent carbon atoms and silicon atoms. Generally speaking, for SiOC, in the ceramic state, the carbon is essentially not coordinated with the oxygen atoms, so the oxygen is essentially coordinated with the silicon, and the dopant will be essentially coordinated with the silicon or carbon depending on its starting structure.

In a preferred embodiment, the starting material used for growing p-type crystals in a vapor deposition process (eg, PVT) has doping with one or more elements selected from group 13 of the periodic table (boron, etc.) agent. The dopant is covalently bonded to the Si, C, or both of the source material and is evenly distributed throughout the source material. In a more preferred embodiment, the starting material is configured as a shaped charge, wherein the dopant is distributed in a predetermined manner (eg, uniformly) throughout the shaped charge, layers of varying concentrations, and the like. This source material is then used to perform a vapor deposition process, for example, as described in the subsection "Crystal Growth - Generally" of this specification.

In a preferred embodiment, the starting material for growing low-resistivity n-type crystals using a vapor deposition process (eg, PVT) has one or more elements selected from Group 15 of the periodic table (nitrogen, etc.) of dopants. The dopant is covalently bonded to the Si, C, or both of the source material and is evenly distributed throughout the source material. In a more preferred embodiment, the starting material is configured as a shaped charge, wherein the dopant is distributed in a predetermined manner (eg, uniformly) throughout the shaped charge, layers of varying concentrations, and the like. This source material is then used to perform a vapor deposition process, for example, as described in the subsection "Crystal Growth - Generally" of this specification.

In current embodiments of p-type materials and processes, dopant, acceptor impurity atoms are part of the SiC source material, eg, chemically bonded to, covalently bonded to, or trapped in the SiC matrix. Furthermore, in this example, the dopant and its acceptor impurity atoms are not present in the starting material in the form of an alloy. For example, the dopant may be aluminum and the aluminum is present in the source material rather than as an alloy. Therefore, and in this manner, the dopant and acceptor impurity atoms are not alloyed or otherwise formed into an alloy during and after vapor deposition (eg, flux formation). It is believed that avoiding the use of alloys, this alloying step or alloy formation provides significant advantages over prior art and provides improved crystal growth, formation and properties. (As used herein, an alloy is a substance composed of two or more metals or metals and nonmetals that are not tightly bound (usually by fusing together and dissolving in each other when melted). An alloy may have Different metals present in ratios of 99:1, 90:10, 80:20 to 50:50). The term unalloyed or not alloyed will refer to any alloy that does not have or does not form with a ratio of 90:10, 80:20 to 50:50. In embodiments, alloys with ratios of 99:1 to 91:9 are also avoided and are therefore not present in the starting material and are not found or formed in the vapor deposition apparatus.

In embodiments, the dopant may be a high purity aluminum/silicon alloy or aluminum-doped silicon powder as a precursor component. The doped silicon powder may be reacted carbon to form Al-doped SiC powder. This powder can be made into shaped charge source material.

Turning to Figure 3, embodiments of systems and methods for fabricating doped SiC source materials (p-type doped source materials, low resistivity p-type doped source materials, or low resistivity n-type source materials) are provided. Schematic perspective flow diagram of doped SiC source material including a shaped charge (eg, volumetric shape) of doped SiC source material. SiC source materials are derived from doped SiOC precursors and intermediate materials. The doped SiC source material and shaped charge are preferably of high purity (eg, 3 nines, 4 nines, 5 nines and greater, and preferably 6 nines or greater). The lines, valves, and internal surfaces of the system containing precursors and other materials are made of or covered with materials that will not contaminate SiOC, derived SiC, and the bulk shape of SiC (e.g., provide a source of contamination thereto) .

In embodiments using only p-type dopants (i.e., dopants that provide a source of acceptor atoms), any materials that would be considered or be a source of donor atoms should be minimized, mitigated, and eliminated (such as nitrogen). (It should be noted that in other embodiments, nitrogen may be present in an amount less than the p-type dopant and still obtain a p-type source material, i.e., configured to grow a crystal with negative Nc.)

Similarly, in embodiments using only n-type dopants (i.e., dopants that provide a source of donor atoms), any dopants that would be considered or be a source of acceptor atoms should be minimized, mitigated, and eliminated. The presence of materials such as boron and aluminum. (It should be noted that in other embodiments, boron or aluminum may be present in an amount less than the n-type dopant and still obtain an n-type source material, i.e., configured to grow a crystal with positive Nc.)

Storage tanks 150a, 150b hold the liquid polysilica precursor, and the dopants may be contained in a separate storage tank, hopper or bin 150c. If multiple dopants are used, multiple tanks, hoppers or bins may also be present. Dopants may be added to storage tank or mixer 152. In this embodiment, one, both, or neither of the precursors may be passed through distillation device 151a and distillation device 151b to remove any contaminants from the liquid precursor. Care should be taken not to damage the dopants or otherwise affect their properties.

The liquid precursor and dopant are then transferred to mixing vessel 152 where they are mixed to form a doping precursor batch (eg, p-type, low resistivity p-type, or low resistivity n-type) and catalyzed. The precursor batch is then poured into container 153 (preferably in a clean room environment 157a) for placement in furnace 154. Furnace 154 may have a scavenge inlet 161 and an exhaust gas exhaust line 162 . Typically, the scavenge gas is an inert gas such as argon. The furnace solidifies the liquid polysilica material and reacts the dopant with the polysilica material to bond the dopant into or as part of the cured polysilica material.

The cured material, i.e., solid doped SiOC (eg, p-type, low resistivity p-type, or low resistivity n-type), is then transferred to one and preferably several pyrolysis furnaces, preferably under clean room conditions 155a, 155b, 155c, where it is converted from doped SiOC to doped SiC source material (eg, p-type, low resistivity p-type, or low resistivity n-type). (It should be noted that in this embodiment, the SiOC ceramic will be the phase formed when converted to SiC in a furnace such as 155a) The furnaces each have scavenge inlet lines 158a, 158b, 158c, and each has two exhaust exhausts. Lines 159a and 160a, 159b and 160b and 159c and 160c. Typically, the scavenge gas is an inert gas such as argon. The exhaust gases may be treated, cleaned, and starting materials recovered in an exhaust gas treatment assembly 163 having an inlet line 164 that collects exhaust gases from various units in the system.

The resulting doped SiC source material (eg, p-type, low-resistivity p-type, or low-resistivity n-type) as a powder is then transferred to a volume shape forming region 190, preferably under clean room conditions. In region 190, doped SiC material is provided to a mixing vessel 172 having mixing elements 173 (eg, blades, paddles, stirrers, etc.). Binder from binder tank 170 is added to container 172 via line 171 . In mixing vessel 172, the SiC is mixed with the binder to form a slurry or blend. The consistency of the slurry should be such as to facilitate subsequent forming operations. The SiC-binder slurry is then transferred to a forming device 175 where the slurry is formed into volumetric shapes, e.g., pellets, discs, cubes, etc., and preferably into doped shaped charge source materials (e.g., p-type, low-resistivity p-type or low-resistivity n-type) and feeds it to oven 177 where the binder is cured to give the desired strength to the volumetric shape and is preferably pyrolyzed.

The volumetric shapes can then also be transferred to packaging elements 180 where they are packaged. Preferably, these operations are performed under clean room conditions, and more preferably, the operations are performed in separate clean rooms or clean room areas 190a, 190b, 190c. The shaped charge can also be provided directly to a vapor deposition apparatus (eg, PVT) for growing doped SiC crystals (eg, p-type, low resistivity p-type, or low resistivity n-type).

Preferably, when manufacturing p-type doped SiC, low-resistivity p-type doping or low-resistivity n-type doped SiC source material, in a preferred embodiment, the source material can be made in clean air at about 1 atmosphere. Mix the polysilicon precursor and dopants.

Preferably, in making SiC and materials used to make SiC, the curing of the doped and preferably catalyzed precursor material occurs at a temperature in the following range: about 20°C to about 150°C, about 75°C to about 125°C and about 80°C to 90°C and variations and combinations of these temperatures, and all values within the range of such temperatures. Curing is carried out over a period of time which preferably results in a hard set material. Curing may occur in air or an inert atmosphere, and preferably curing occurs in an argon atmosphere at ambient pressure. Preferably, in order to obtain high purity materials, the furnaces, vessels, processing equipment and other components of the curing apparatus are clean, substantially free of and do not contribute any elements or materials to the cured material that would be considered impurities or contaminants. It should be noted that in preferred embodiments, depending on the type of crystal being grown, the source of donor atoms or the source of acceptor atoms may be considered a contaminant.

Preferably, when fabricating doped SiC source materials (eg, p-type, low-resistivity p-type, or low-resistivity n-type), pyrolysis occurs at a temperature in the following range: about 800°C to about 1300°C, about 900°C to about 1200°C and about 950°C to 1150°C, and all values within these temperature ranges. Pyrolysis is performed over a period of time which preferably results in complete pyrolysis of the cured doped SiOC material into p-type doped SiC source material. Preferably, pyrolysis occurs in an inert gas such as argon, and more preferably in flowing argon at or about atmospheric pressure. The gas may flow at about 1,200 cc/min to about 200 cc/min, about 800 cc/min to about 400 cc/min, and about 500 cc/min, and all values within such flow ranges. Preferably, initial evacuation of the treatment furnace is accomplished to a reduced pressure of at least less than 1x10 ^-3 Torr and repressurized to greater than or equal to 100 Torr using an inert gas such as argon. More preferably, evacuation is accomplished to less than 1x10 ^-5 Torr before repressurization with an inert gas. The evacuation process can be completed anywhere from zero to >4 times before moving forward. Preferably, in order to obtain high purity materials, the furnaces, vessels, processing equipment and other components of the curing unit are clean, substantially free of, do not contain and do not contribute to the pyrolytic material any elements that would be considered contaminants or Material.

Pyrolysis can be performed in any heating device that maintains the requested temperature and environmental controls. Thus, for example, pyrolysis can utilize high-pressure furnaces, box furnaces, tube furnaces, crystal growth furnaces, graphite box furnaces, arc melting furnaces, induction furnaces, kilns, MoSi ₂ heating element furnaces, carbon furnaces, vacuum furnaces, combustion furnaces Gas furnaces, electric furnaces, direct heating, indirect heating, fluidized beds, RF furnaces, kilns, tunnel kilns, box kilns, shuttle kilns, coking type units, lasers, microwaves, other electromagnetic radiation, and pyrolysis is available on request Combinations and changes in temperature of these and other heating devices and systems are carried out.

Preferably, when manufacturing the doped SiC source material, the ceramic doped SiOC is converted into SiC in a subsequent or continuing pyrolysis or conversion step. The step of converting from doped SiOC may be part of the pyrolysis of the doped SiOC cured material, for example, a continuation of pyrolysis, or it may be an entirely separate step in time, location, and both. Depending on the type of doped SiC desired, the conversion step (from SiOC to SiC) can be performed at about 1,200°C to about 2,550°C and about 1,300°C to 1,700°C, and all values within these temperature ranges.

Generally, the formation of the beta form is preferred over time at a temperature of about 1,600°C to about 1,900°C. At temperatures above 1900°C, the formation of the α form is preferred over time. Preferably, the conversion occurs in an inert gas such as argon, and more preferably in flowing argon at or about atmospheric pressure. The gas may have a flow rate of about 600 cc/min to about 10 cc/min, about 300 cc/min to about 50 cc/min, and about 80 cc/min to about 40 cc/min, and all values within such flow ranges. flow down. Preferably, in order to obtain high purity materials, the furnaces, vessels, processing equipment and other components of the curing apparatus are clean, substantially free of and do not contribute any elements or materials to the SiC that would be considered impurities or contaminants.

Subsequent yields of doped SiOC derived doped SiC are typically about 10% to 50%, typically 30% to 40%, but higher and lower ranges are available, and all within these percentage ranges value.

It should be further understood that when suppressing the amount of dopant that will be present in the doped SiOC precursor material (e.g., in mixer 152 or in cured solid SiOC), considerations should be made throughout the entire process, including during crystal growth. dopant loss during the period. Accordingly, sufficient dopant should be present in the SiC source material to achieve a predetermined dopant level, e.g., a predetermined amount of electrically active atoms in a crystal grown from the source material and therefore a wafer made from the crystal, To provide predetermined and expected electrical and semiconductor properties of crystals and wafers.

The binder used to form the volumetric doped shaped source material (eg, the doped shaped charge source material) can be any binder used to maintain the SiC in a predetermined shape during processing, curing, and subsequent use of the volumetric shape. Embodiments of the binder may preferably be oxygen-free. Embodiments of the binder may preferably be composed of materials having only carbon and hydrogen. Embodiments of the adhesive may be made of materials containing oxygen. An example of a binder may be any sintering aid used for sintering SiC. An example of a binder may be fused silica. Examples of binders may be polysilica precursor materials, including all liquid precursors stated in this specification. Combinations and variations of these and other materials can also be used as binders. The binder may also contain dopants, which may be the same or different from the dopants used to make the SiC powder of the shaped charge.

The binder may be cured and pyrolyzed to the desired temperature under conditions used to cure the polysilica precursor or under conditions required to convert the binder into a material that is hard enough (e.g., tough) to maintain the shape of the bulk shape. Degree. Curing, hardening, forming or structuring, as appropriate, should therefore be based on the properties of the binder.

Examples of embodiments of binders that do not have oxygen would include polyethylene, silicon metal, hydrocarbon waxes, polystyrene, and polypropylene, as well as combinations and variations of these.

Examples of embodiments of binders containing only carbon and hydrogen would include polyethylene, hydrocarbon waxes, carbon or graphite powders, carbon black, HDPE, LDPE, UHDPE and PP, as well as combinations and variations of these.

Examples of embodiments of oxygen-containing binders would include boric acid, boron oxide, silica, polyols, polylactic acid, cellulosic materials, sugars and sugars, polyesters, epoxy resins, siloxanes, silicates, Silanes, silsesquioxanes, acetates such as ethylvinylacetate (EVA), polyacrylates such as PMMA, and polymer-derived ceramic precursors, as well as combinations and variations of these.

Examples of embodiments of binders that are sintering aids would include silicon, boron oxide, boric acid, boron carbide, silicon and carbon powders, silica, silicate and polymer derived ceramic precursors, and combinations thereof. change.

The binder should be selected so as not to interfere with or otherwise inhibit the growth of the dopant, the doped SiC crystal, and the properties of the doped SiC crystal and wafer.

Examples of binders would include catalyzed and uncatalyzed precursor formulations such as U.S. Patent Nos. 9,815,943, 9,657,409, 10,322,936, 10,753,010, 11,014,819, and 11,091,370 and U.S. Patent Publication No. 2018 /0290893, the entire disclosure of each of which is incorporated herein by reference. Methods of curing such adhesives are disclosed and taught in these patents and published applications, the entire disclosures of each of which are incorporated herein by reference.

Ashbys catalysts and others may be essentially unaffected by aluminum-doped precursor formulations. Phosphorus-containing precursor formulations can cause some catalyst inhibition. Catalyst inhibition from dopants can be overcome by non-catalytic means (eg, driving the reaction despite the absence of a catalyst), such as by compensating for more thermal energy during the curing process.

In preferred embodiments, doped volume shaped (eg, shaped charge) source materials (eg, p-type, low resistivity p-type, or low resistivity n-type) are used in the patents and published applications listed above. Made from one or more of the polysilica precursor formulations disclosed and taught. The binder is pyrolyzed into SiC to provide a hard and durable doped shaped charge source material. The dopant in the shaped charge source material is fixed here.

In embodiments, the binder is the same polysilica precursor used to make the SiC source material, with or without dopants. Accordingly, the amount of dopant present in the binder may range from 0% to about 50%. Dopants in the binder can be used to adjust or fine-tune the amount of dopant present in a particular doped SiC shaped charge source material.

It will be appreciated that, although preferred, doped SiC crystals and rods may be grown without the use of shaped charges, such as directly from doped SiC polymer derived powder charges or starting materials. Additionally, less ideal SiC powder forms (eg, not made from polymer-derived ceramics) may be used to form doped SiC shaped charge source materials.

A precursor made from a doped liquid material (e.g., having essentially all the building blocks (e.g., Si and C and dopants) required to make a doped SiC source material powder (e.g., not made from a polymer-derived ceramic) The ability to start from batches of materials provides significant advantages in controlling contamination and forming predetermined ratios of Si, C and dopants in doping source materials to control and influence flux formation in PVT processes and devices. Crystal growth. Based in part on the current performance of polymer-derived p-type doped SiC in vapor deposition equipment and growing p-type crystals, it is also theorized that polymer-derived SiC differs from non-polymer-derived SiC, and that metal alloys, Previous use of metallic glasses or both in crystal growth processes. Therefore, synergistic benefits in crystal growth and purity, wafer yield, and device yield further arise from one or more of the individual benefits of the polymer-derived ceramic source material, including: bulk density, particle size, doping Phase (beta versus alpha), stoichiometry, oxygen content (very low to none, no oxide layer), high (e.g., 99.999% pure) and ultra-high (99.9999%) purity of SiC. Dopant Materials - Generally speaking

Generally speaking, the dopant can be one that can be used in a PDC process for forming the SiC source material (e.g., polysilica-based PDC) and does not interfere with the PDC process, providing predetermined atomic impurities in the SiC source material (e.g., polysilica-based PDC). , donor atoms, acceptor atoms, and combinations thereof), which material is subsequently used in a vapor deposition process to generate a flux with such atomic impurities and to grow crystals from the flux, wherein Crystals also have these atomic impurities as electrically active atomic impurities.

For p-type crystals, ingots, ingots, and wafers, and for p-type low resistivity crystals, ingots, ingots, and wafers, aluminum and boron are the better atomic impurities, and therefore the better dopants are available Those materials that provide these atomic impurities.

For example, dopant materials that provide aluminum in the source material (which can subsequently provide electroactive impurities of aluminum atoms into the SiC crystal structure) are typically: reactive aluminum materials, non-reactive aluminum materials, and pure aluminum materials.

Typically, reactive aluminum materials are added to liquid precursor materials (eg, precursor formulations) and then chemically react with those precursor materials during the curing step. Reactive aluminum materials include, for example: (i) Aluminum alkoxides: Al(OR) ₃ , where R is alkyl or phenyl. The reaction with polysilica precursor material is usually: 2 Al(OR) ₃ + 6 SiH → 2Al-(O-Si~) ₃ + 6 RH; (It should be noted that "~Si" and "Si~" are used here When used in a reaction, it means a reactive Si functional group attached to a larger structure such as a polymer backbone or a ligand backbone that is not shown in the reaction.) (ii) Aluminum hydroxide (R is hydrogen) . The reaction with polysilica precursor materials is usually: 2 Al(OH) ₃ + 6 SiH → 2Al- (O-Si~) ₃ + 3 H ₂ ; (iii) bauxite, gibbsite, allophane stone, diaspore. The reaction with polysilica precursor materials is typically: via the hydroxide functionality of such minerals, similar to (ii); and (iv) trimethylaluminum. The reaction with polysilica precursor material is usually: 2 (Al(Me) ₃ ) + 3 H ₂ O → Al ₂ O ₃ + 6 CH ₄ .

Typically, non-reactive aluminum materials are added to liquid precursor materials (eg, "precursor formulations"), but can be added to solidified materials, ceramic SiOC, SiC source materials, and combinations and variations of these. Non-reactive materials are retained by or incorporated into SiOC and SiC ceramic materials during pyrolysis. Non-reactive materials include, for example, aluminosilicate materials. Examples of such materials include: mullite, kyanite, sillimanite, andalusite, kyanite and other island silicate powders; kaolinite, halloysite and pyrophyllite; shelf silicate (feldspar); and zeolite.

Typically, pure aluminum material is added to liquid precursor materials (eg, precursor formulations), but can be added to solidified materials, ceramic SiOC, SiC source materials, and combinations and variations of these. Pure aluminum material is retained by or incorporated into SiOC and SiC ceramic materials during pyrolysis. Pure aluminum materials include, for example, alumina powder Al ₂ O ₃ and corundum (including sapphire, ruby, etc.).

All the aforementioned aluminum dopant materials provide aluminum in the SiC source material, for example in the form of ceramic oxides rather than as alloys.

For example, dopant materials that provide boron in the source material (which can subsequently provide boron atoms as electroactive impurities into the SiC crystal structure) are generally: reactive boron materials, non-reactive boron materials.

Typically, reactive boron materials are added to liquid precursor materials (eg, precursor formulation (1)) and then chemically react with those precursor materials during the curing step. Reactive boron materials include, for example: (i) Boric acid B(OH) ₃ . The reaction with polysilica precursor material is usually: 2 B(OH) ₃ + 6 SiH → 2B-(O-Si~) ₃ + 3 H ₂ ; (ii) Borax (Na ₂ B ₄ O ₇ ·10H ₂ O). The reaction with Si OC precursor material is usually: condensation reaction. (iii) Boric acid RB(OH) ₂ , where R is alkenyl, such as vinyl. The reaction with the polysilica precursor material is usually: condensation reaction; and (iv) divinylboronic acid Vi-B(OH)-Vi. The reaction with polysilica precursor materials is usually: B-Vi+ ~SiH → BCC-Si~.

Typically, non-reactive boron materials are added to liquid precursor materials (eg, precursor formulations), but can be added to solidified materials, ceramic SiOC, SiC source materials, and combinations and variations of these. Non-reactive materials are retained by or incorporated into SiOC and SiC ceramic materials during pyrolysis. Non-reactive materials include, _for example: borosilicate glass; _B2O3 ; boron carbide.

For n-type crystals, crystal ingots, crystal rods and wafers, and n-type low resistivity crystals, crystal ingots, crystal rods and wafers, nitrogen and phosphorus are better atomic impurities, among which phosphorus is a particularly better atomic impurity. And therefore preferred dopants are materials that can provide these atomic impurities.

Nitrogen-containing or nitrogen-providing materials may be added to the liquid precursor material (eg, precursor formulation). Such dopants would include amines; amides; azo and diazo; urethane; urethane; carboimide; C and N heterocycles; urea; isocyanate; as potential candidates Functional groups are incorporated. Nylon or other N-containing carbon-based polymers may also be added to the formulation to react during pyrolysis. However, it should be noted that adding too much nitrogen can introduce undesirable stresses, stacking, and related defects into the crystal.

Typically, reactive phosphorus materials are added to liquid precursor materials (eg, precursor formulations) and then chemically react with those precursor materials during the curing step. Reactive phosphorus materials include, for example:

(i) Reactive oxides of P, such as (R) ₃ -phosphine oxides (R = alkyl, phenyl, styryl), including triphenylphosphine oxides shown below and phosphorus pentoxide shown below. The reaction of polysilica precursor materials with these dopants is usually: R ₃ -P=O* + ~Si-H → ~Si-OPR ₃

(ii) Reactive organophosphines, such as (R1) _n - (R2) _3-n organophosphines (where R1 = alkenyl, styryl and R2 = alkyl, phenyl). For example, diphenylvinylphosphine shown below Divinylphenylphosphine shown below Diphenylstyrylphosphine shown below Triallylphosphine shown below is an example of a material where n=3 The reaction of the polysilica precursor material with these dopants is usually: R ₃ -PC=C + ~Si-H → ~Si-CCPR ₃

(iii) Phosphines, including PH ₃ , PCl ₃ , PF ₃ and PBr ₃ . The reaction of polysilica precursor materials with these dopants is usually: PX ₃ + 3 -SiH → P-(Si~) ₃ + 3 HX, where X is halogen or hydrogen

(iv) Acids, including phosphoric acid (H ₃ PO ₄ ); polyphosphoric acid (CAS# 8017-16-1); ammonium polyphosphate (CAS# 68333-79-9); P(OR) ₃ , where R is any alkane alkyl or phenyl or hydrogen; O=P(OR)3, where R is any alkyl or phenyl or hydrogen; triisopropyl phosphite shown below

Triisopropyl phosphate shown below

The reaction of polysilica precursor materials with these dopants is usually:

2(OH) ₃ P=O + 6~Si-H → 2 (~Si-O) ₃ -P=O +3 H ₂

Typically, non-reactive phosphorus materials are added to liquid precursor materials (eg, precursor formulations), but can be added to solidified materials, ceramic SiOC, SiC source materials, and combinations and variations of these. Non-reactive materials are retained by or incorporated into SiOC and SiC ceramic materials during pyrolysis. Non-reactive materials include, for example: phosphate compounds such as those shown below

Among them, M+ is sodium, potassium, calcium, lithium, ammonium, etc.

Phosphorus pentoxide shown below

Phosphate minerals such as (Ca ₅ (PO ₄ ) ₃ R, where R is F, Cl or OH) from the Apatitie family,

Inorganic dopants containing both N and P may also be used. These are added to liquid precursor materials (eg, precursor formulation (1)), but can be added to solidified materials, ceramic SiOC, SiC source materials, and combinations and variations of these. Inorganic materials are retained by or incorporated into SiOC and SiC ceramic materials during pyrolysis. These materials provide co-doping capabilities, providing both N and P from a single dopant source. Co-dopants include, for example, struvite ((NH ₄ )MgPO ₄ • 8H ₂ O), phosphorus nitride groups of the material, phosphorus pentanitride (P ₃ N ₅ ),

Other co-dopants (sources of N and P) are cyclophosphazene compounds, polyphosphazene compounds and hexachlorocyclotriphosphazene compounds. These co-dopants are added to a liquid precursor (eg, precursor formulation) and then chemically react with the precursor materials during the curing step, the pyrolysis step, or both steps.

Additionally, as previously described, any of the aforementioned dopants may be added to the binder used to form the doped SiC shaped charge source material.

The dopant may be about 1%, about 2%, about 2.5%, about 5%, about 2% to about 10%, about 1% to about 10%, less than 15%, less than 10%, less than 8%, and about 2 % to about 8% by weight is added to the precursor formulation. The dopant may be about 1%, about 1% to about 10%, about 2%, about 2.5%, about 5%, about 2% to about 10%, less than 15%, less than 10% and less than 8% and about 2 % to about 8% by weight is added to the binder.

There will be some material loss during the curing step and during each pyrolysis, for example, yield loss. These yield losses will include losses of dopant material. Therefore, a sufficient amount of dopant should be added to account for these yield losses to provide the required amount of dopant atoms in the SiC source used in flux formation and crystal growth. Doped crystal growth - in general

Silicon carbide generally does not have a liquid phase but sublimates under vacuum at temperatures above about 1,700°C to 1,800°C. Typically, in industrial and commercial applications, conditions are established so that sublimation occurs at temperatures of about 2,500°C and above. When silicon carbide sublimates, it typically forms a vapor composed of several different silicon and carbon species. In general, it is understood that the composition and form of the source material (eg, shaped charge), temperature, and pressure determine the ratio of gas phase components in the silicon carbide vapor.

Among other things, the present invention provides for predetermining, preselecting, and controlling the presence of dopants (e.g., additives, elements, compounds intended to provide specific predetermined properties to SiC wafers) in SiOC source materials, which The dopant is then present in the SiC source material (eg, the powder used in the vapor deposition crystal growth process).

When silicon carbide sublimates, it typically forms a vapor composed of several silicon and carbon species (eg, Si, C, SiC, _Si2C , and _SiC2 ).

Generally speaking, in order to grow current p-type crystals, low resistivity p-type crystals and low resistivity n-type crystals, the present invention uses PVT methods and equipment that are well understood and known in the art (e.g., the United States No. 4.866,005, the entire disclosure of which is incorporated herein by reference). During sublimation crystal growth, an elemental source consisting of silicon and carbon or SiC powder is typically sublimated to produce a vapor flux of Si and C atoms that subsequently condenses on the seed crystal and ultimately forms larger crystals. To control the electrical properties (eg, resistivity/conductivity) of the SiC crystal, impurity atoms are added to the vapor stream where they are incorporated into the crystal along with the silicon and carbon atoms. The incorporation of impurities into the crystal is affected by the seed temperature, pressure, seed face (silicon or carbon), and the carbon-to-silicon atomic ratio in the vapor stream. The carbon-to-silicon ratio in the vapor stream is related to the design of the source material, temperature and pressure at the source.

Silicon and aluminum have similar atomic sizes, and therefore the aluminum impurity atoms will be located primarily at silicon sites in the crystal (as electroactive atomic impurities), or at interstitial sites. To increase the likelihood of aluminum atoms being located at silicon sites, a vapor flow with an excess of carbon is required.

In typical sublimation growth of SiC using previously non-PDC source materials, the vapor stream typically has more silicon than carbon. Therefore, aluminum atoms must compete with silicon atoms to occupy silicon sites. This characteristic of SiC sublimation growth based on inorganic sources (such as silicon metal, graphite or SiC abrasive sources) makes it difficult to incorporate sufficient aluminum into the crystal, so the conductivity of wafers cut from the crystal is useful for semiconductor component manufacturing. .

Embodiments of the present invention overcome this problem by, among other things, having the ability to have source materials with excess carbon, and having dopants incorporated into and retained by the source materials. Therefore, such doped PDC source materials can unexpectedly provide better flux conditions for efficient incorporation of p-type dopants into SiC crystals. This in turn enhances the electrical properties of the p-type crystal, and enables wafers cut from this crystal to be useful, of higher quality and with excellent electrical properties, and in particular commercially useful for semiconductor device manufacturing.

In the embodiments, what is unexpected about the use of PDC shaped charge source materials is that their ability to influence and control the Si/C ratio of the flux provides the possibility of producing enhancements that are more likely to occur when at the C-plane of the crystal. The ability of the Si/C ratio to incorporate p-type dopant atomic impurities into the crystal during growth. Although the Si/C ratio in the flux at the seed can decrease with time, it cannot drop below a value of 1 while enhancement of p-type dopant incorporation still occurs. Therefore, current embodiments of shaped charge source materials provide the ability to grow p-type SiC crystals using C or Si face seeds in PVT processes. Specifically, p-type crystals can be grown on C or Si plane 4H or 6H seeds.

Preferred embodiments of the ingot are single crystals and have only a single polytype. It should be understood that this specification also contemplates embodiments of ingots having multiple polytypes, having multiple crystals, and both.

In embodiments, liquid PDC starting materials, preferably polysilica precursors, and more preferably liquid polysilica precursors, have added to them or comprise (e.g., chemically bonded, chemical complexes, Dopants are predetermined (in solution, in the backbone of the polymer, in a mixture, etc.) to provide predetermined properties to the SiC crystal.

Although it is preferred that the dopant be present in the liquid starting material, the dopant may also be added to (eg, combined or mixed with) the cured SiOC material, the ceramic SiOC material, and the shaped charge. In some cases, such as nitrogen, dopants may also be added as a gas during the SiC crystal growth process.

The dopant may be a single material, such as an element, or the dopant may be two, three or more elements, typically selected from the same column in the periodic table. It is believed that using a combination of different materials from the same column in the periodic table (and therefore having similar electron valence structures, but slightly different sizes) reduces stress in the SiC crystal. This in turn provides better, higher quality, more useful ingots and wafers.

Preferred dopants for manufacturing p-type SiC crystals, rods and wafers are elements selected from Group 13 (boron, etc.). The preferred dopant for manufacturing p-type SiC crystals, ingots and wafers is aluminum.

Preferred dopants for manufacturing n-type SiC crystals, rods and wafers are elements selected from Group 15 (nitrogen, etc.). Preferred dopants for making n-type SiC crystals, rods, and wafers are nitrogen, phosphorus, and combinations thereof.

The use of phosphorus and combinations of nitrogen and phosphorus as dopants (preferably in the liquid polysilica starting material) provides the ability to have low resistivity SiC wafers.

In less favorable embodiments of doped crystals (eg, p-type, low resistivity p-type, low resistivity n-type), the dopants are not uniform across the length of the crystal. In this embodiment, the concentration of the dopant (which is an electrically active atomic impurity) varies from the bottom of the seed (the side where crystal growth begins) to the top of the tail (the side where growth ends), where this variation can occur across the crystal. The radial variation in diameter ranges from approximately 300% to 5%.

In preferred embodiments, the use of embodiments of doped shaped charge source materials will reduce these variations both tail-to-seed (i.e., the length or height of the crystal) and radially (across the diameter of the crystal). Small is about 100% to 5%, less than 200%, less than 150%, less than 100%, less than 50% and less than 25% and less than 105. This reduction in variation can further be achieved in a consistent manner, with most and substantially all (ie, greater than 90%) of the crystals grown in the PVT device having the same lower variation.

In embodiments, doped SiC crystals (eg, p-type, low resistivity p-type, low resistivity n-type) have a substantially uniform distribution of dopants throughout the crystal structure by using predetermined doping A shaped charge source material is obtained that has a dopant distributed in the shaped charge in a manner that provides uniformity of incorporation of the dopant into the crystal. Accordingly, dopant concentrations or electroactive atomic impurity concentrations in embodiments of a crystal, ingot, ingot, or wafer span the length (e.g., tail side to seed side ("top to bottom")) and radial direction ( For example, the variation measured side-to-side ("side-to-side") when moving along the diameter is less than about 10%, less than about 5%, less than about 2%, and less than 1%. Accordingly, such crystalline materials as a whole exhibit expected electrical properties to the same extent (eg, p-type electrical behavior, p-type low resistivity electrical behavior, n-type low resistivity electrical behavior) to the same extent. This allows a crystal (eg, a rod) to be converted into a SiC wafer in which the expected electrical behavior exists throughout the entire wafer, and specifically throughout the thickness of the wafer. Such materials having dopants or electrically active impurities that are substantially uniformly distributed throughout the material (i.e., less than 10% variation top to bottom, side to side, as described above) will be referred to herein as " Uniformly or uniformly doped SiC wafers, ingots, crystals or rods.

Therefore, in embodiments, the p-type SiC wafer does not have any n-type material layer. In addition, in a preferred embodiment, the p-type SiC wafer (and p-type crystal and p-type ingot) has a structure that penetrates the entire wafer (and p-type crystal and p-type ingot), and specifically through the wafer Thickness distribution of electroactive donor atoms. In addition, in a preferred embodiment, the p-type SiC wafer (and p-type crystal and p-type ingot) has a structure that penetrates the entire wafer (and p-type crystal and p-type ingot), and specifically through the wafer The thickness distribution of electroactive atomic impurities. Such materials having dopants or electroactive impurities distributed substantially uniformly throughout the material (i.e., less than 10% variation top to bottom, side to side, as generally described above) will be referred to herein as "Uniform p-type SiC" wafer, ingot, crystal or rod. These uniform p-type SiC crystals, ingots, rods and wafers also include p+ and p- types.

Low resistivity SiC wafers can be n-type or p-type. Preferably, for n-type low resistivity SiC wafers, the dopant is phosphorus or a mixture of phosphorus and nitrogen. Preferably, the dopants in low-resistivity crystals, crystal ingots, crystal rods and wafers are distributed throughout the crystal matrix with changes of less than 100%, less than 50%, and less than 25%, and more preferably are uniformly low. Resistivity SiC material.

The present invention provides examples of methods and processes for growing crystal ingots, such as SiC vapor deposition for forming single crystal ingots of p-type SiC or low resistivity p-type or n-type SiC. The SiC vapor deposition Providing a very flat surface at the face of the crystal rod, for example, with a limited amount of curvature or camber. The very flat profile of the ingot is mainly achieved by using a pre-selected shape of the SiC wafer placed in the vapor deposition apparatus. The preselected shape (eg, shaped charge) is configured such that during the vapor deposition process, the area of flux and the flow rate within the area remain constant throughout the ingot growth process. In this manner, the rate and amount of SiC deposited on the face of the ingot as the ingot grows remains consistent and uniform during the ingot growth process. Therefore, for example, when growing a 6-inch diameter ingot, the area of flux flow would be 28.27 ^inches , and the flow rate and amount of SiC flowing across this area would be different from that of the ingot (e.g., a 3-inch length ingot, 4 inch length ingot, etc.) will be uniform across the entire area. Even when the amount and location of SiC available for sublimation changes within the wafer during the process, the shape of the wafer directs the flux in a manner that keeps the flux flow uniform across the area immediately adjacent to the face of the ingot (e.g., ""Directedflux"). Shaped charges for growing SiC crystals and their uses are disclosed and taught in U.S. Patent Publication No. 2018/0290893, the entire disclosure of which is incorporated herein by reference.

In embodiments, the flux does not remain constant throughout the growth process. Thus, in this embodiment, the rate, distribution of flux across the growth surface is managed (eg, controlled in a predetermined manner) to provide predetermined growth of a region or growth surface of the ingot. Thus, for example, in later growth stages, the flux can be directed in a predetermined manner to compensate for inhomogeneities that have occurred in the ingot growth. In this example, areas with greater flux in early growth stages have smaller fluxes in later growth stages; similarly, areas with smaller flux in early growth stages have greater flux in later growth stages. of flux. In this way, the final crystal rod growth surface minimizes the curvature of the crystal rod face, or maximizes the radius of curvature of the crystal rod face.

In embodiments, the use of controlled flux, and more preferably directional flux, can provide a 4 to 8 inch diameter p-type SiC or low resistivity SiC ingot that has the characteristics of when oriented over the seed end. A characteristic shape defined by a tail end with a positive radius of curvature. For SiC crystals with diameters of 4 to 8 inches, this radius typically ranges from 10 to 200 inches.

In embodiments, the radius of curvature (i.e., the reciprocal of the curvature) of the tail can be at least about 6 inches, at least about 8 inches, at least about 20 inches, at least about 60 inches, and approaching infinity (i.e., planar), and where All values within the range of equivalent values. In the embodiment of a 6-inch ingot, the radius of curvature (i.e., the reciprocal of curvature) will be at least about 10 inches, at least about 15 inches, at least about 25 inches, at least about 60 inches, and close to infinity (i.e., planar), and all values within this range of equivalent values. In an embodiment, the radius of curvature of the crystal rod face is at least 2 times the crystal rod length, at least 5 times the crystal rod length, at least 10 times the crystal rod length, and at least 25 times the crystal rod length, up to and including the crystal rod face. for the flat case, and all values within this range.

In embodiments, in addition to the composition and composition of the PDC source material, pressure and temperature may be utilized to manipulate flux. For a given growth temperature, growth can be slowed by increasing chamber pressure. The fastest rates are usually at "full" vacuum (i.e., the vacuum pump is on and the chamber pressure is kept as low as possible). Therefore, for example, to grow a crystal rod at 400 μm /hr, the growth can be at temperature T1, P1 in full vacuum, or can be at temperature T2>T1, with a few millibars to tens of millibars. Argon partial pressure (P2>P1). In this way, the flux and growth rate can be "tuned".

In embodiments, polymer-derived doped SiC gives better polytype stability in p-type SiC or low resistivity SiC ingots due to more consistent flux composition over time. This embodiment, i.e., controlled polytype stability, is valuable and important to the ingot manufacturer because the polytype transformation mid-growth means that only a portion of the ingot is the original polytype, which usually affects The electronic properties of the device performance of the thus constructed wafers are adversely affected.

Turning to Figure 4, a schematic cross-sectional representation of an apparatus for growing p-type, or low resistivity p-type or n-type SiC crystals and crystallographic structures is shown. Vapor deposition apparatus and processes, and specifically PVT apparatus and processes for use with PDC SiC source materials, are disclosed and taught in U.S. Patent No. 10,753,010 and Published Patent Application No. 2018/0290893, the entirety of each of which The disclosure is incorporated herein by reference. Vapor deposition element 1800 is a vessel having side walls 1808, a bottom or bottom wall 1809, and a top or top wall 1810. Walls 1808, 1809, 1810 may have ports 1806/1807/1805, which may be openings, nozzles, valves that may control or allow airflow into and out of element 1800. Element 1800 has associated therewith a heating element 1804 . The heating element may be configured and operated to provide a single temperature zone or multiple temperature zones within element 1800. Inside element 1800 there is a shaped charge 1801 made from doped SiC particles that have been collectively formed into the shape of a doped SiC volume (note that in embodiments, dopants may be incorporated into the doped materials used to make the SiC volumetric shape of the adhesive or as part of the adhesive).

The shaped charge 1801 may have a predetermined porosity and density. SiC particles can have predetermined porosity and density. The SiC particles are preferably held together by a binder. The shaped charge 1801 may be carbon rich, carbon poor, or stoichiometric. The shaped charge 1801 may have regions or layers that are carbon rich, carbon poor, or stoichiometric. Preferably, the SiC particles are SiOC polymer-derived SiC. Non-polymer derived SiC can also be used as part or all of the shaped charge. The shaped charge 1801 has a height shown by arrow 1821, and a cross-section or diameter 1820. The shaped charge 1801 has an upper or top surface 1823 and a bottom surface 1824. In this embodiment, the shaped charge 1801 is shown as a flat-top and flat-bottomed cylinder; it should be understood that any of the volumetric shapes contemplated by this specification may be used in the element 1800 .

At the top 1810 of the element 1800 there is a seed crystal 1802 that may have the same type and amount of doping that is intended to be found in the crystal grown on the seed crystal 1800 . Seed crystal 1800 has surface 1802a. The seed crystal 1802 has a cross-section or diameter 1822 and a height 1823. In some embodiments, the seed crystal can be mounted on the movable platform 1803 to adjust the distance between the surface 1802a and the surface 1823.

The diameter 1820 of the shaped charge 1801 may be larger, smaller, or the same as the diameter of the seed crystal 1802.

In operation, the heating element 1804 increases the temperature of the shaped charge 1801 to the point where the SiC and dopants sublime. This sublimation results in the formation of gases with various silicon and carbon species and dopants. This gas, the flux, exists in region 1850 between surface 1802a and surface 1823. Depending on porosity or other factors, flux may also be present in the shaped charge 1801. Flux rises in element 1800 through region 1850 where it deposits p-type SiC or n-type or p-type low resistivity SiC on surface 1802a. Surface 1802a must be maintained at a sufficiently cold temperature to allow gaseous silicon carbon species and dopant atomic impurities to be deposited on its surface, thereby forming a doped SiC crystal. In this manner, the seed crystal 1802 is grown into a p-type, or n-type, or p-type low resistivity SiC crystal by continuously adding growing SiC and dopants to its surface in a polytype body matching orientation. Therefore, unless adjusted by element 1803 (shown in the fully retracted position), during ingot growth, surface 1803 will grow toward bottom 1809 and thus reduce the distance between surface 1802a and bottom 1809. The shape of the shaped charge can be used to create a predetermined temperature difference within the shaped charge during the vapor deposition process. This predetermined temperature difference resolves, reduces, and eliminates the adverse effects of passivation, a condition in which matter is built into the shaped charge during the manufacturing process, which reduces or prevents vapor formation.

In embodiments using only p-type dopants, the presence of any material, such as nitrogen, that would be considered or be a source of donor atoms should be minimized, mitigated and eliminated. (It should be noted that in other embodiments, nitrogen may be present in an amount less than the p-type dopant and still obtain a p-type source material, i.e., configured to grow a crystal with negative Nc)

It has been theorized that the sublimation and deposition processes occur on and within the volumetric shape of the source material itself (e.g., a shaped charge) and follow thermal gradients in the source material that are naturally occurring or that The thermal gradient can be determined by the shape of the volume shape. In embodiments, the bonding material may preferably remain present and maintain the shape and integrity of the volumetric shape during the sublimation temperature, and therefore will not sublime at or below the sublimation temperature of SiC. This thermal gradient is usually from the outside to the inside and upward. It has been theorized that the material continues to sublimate and redeposit on adjacent particles, and in this way undergoes reflux or solid-state "fractionation" or "fractional sublimation" of Si-C species and dopants.

It is further theorized that in embodiments, the volume shape and its predetermined gradient may allow some of the heavier impurities to become trapped behind the bottom of the growth chamber, within the structure of the volume shape, while the lighter elements remain with the Si-C vapor Sublimated and brought to the seed crystal. This theoretically provides the ability to release dopants or other additives at predetermined times during the process or growth cycle.

In embodiments, the shaped charge provides a more consistent rate of flux formation for a given temperature. The shape of the shaped charge can be tailored to provide a more uniform temperature throughout the shape, thereby allowing a higher volume fraction of the shape to be sublimed at one time, driving the rate at the seed/vapor interface at a given temperature than standard powder piles or Cylindrical powder shape for high throughput. Therefore, the growth of polytypes that require lower temperature growth processes will not therefore be limited to slower growth rates.

Sublimation rate is measured in grams per hour. Flux is given in grams/cm ² -hr (ie, the rate of material passing through an area). Therefore, the critical area is the flux area corresponding to the instantaneous surface area of the ingot growth surface (eg, the ingot face where SiC is deposited). Typically, the flux area and the area of the ingot face are approximately the same, and these areas are usually slightly smaller than the cross-sectional area of the growth chamber of the vapor deposition apparatus.

For the purposes of calculations and this analysis, it is assumed for ease of calculation that the cross-sectional area of the growth chamber is the same as the area of the flux and the area of the rod face. Therefore, the growth rate of the crystal rod ( μ m/hr) can be equivalent to the vapor flux and μ m/hr -> g/hr (the density of fully dense SiC is 3.21g/cc), passing through the area of the rod surface (cm ² ). On-site measurement can be performed via X-ray imaging or X-ray computed tomography (CT). Additionally, the average growth rate can be determined by weighing the ingot before/after growth.

Typical commercial growth rates range from 200 μm /hr to 500 μm /hr. Current process and volumetric shape embodiments far exceed these current commercial rates while providing ingots of equivalent and superior quality. For example, embodiments of the present invention may have about 550 μm /hr to about 1,1000 μm /hr, about 800 μm /hr to about 1,000 μm /hr, and about 900 μm /hr under high temperature and low pressure. hr to a growth rate of about 1,100 μm /hr, about 700 μm /hr, about 800 μm /hr, about 900 μm /hr, about 1,000 μm /hr, 1,100 μm /hr. Higher rates are contemplated and slower rates may be used, as well as all rates within such ranges.

Typically, the growth rate is driven by 1) temperature and ₂ ) supply gas pressure (Ar, N, etc.). For any given temperature, greater gas pressure dilutes the vapor pressure of the silicon carbon species at the seed and rod faces and slows the growth rate. Therefore, pressure can be used to "dial in" the growth rate.

Thus, embodiments of volumetric shapes (e.g., shaped charges) can maintain a consistent flux generation rate, e.g., constant throughout the entire operation of p-type SiC or low resistivity SiC crystal growth given a constant temperature. , including those having a diameter of about 4 inches to about 10 inches, a diameter of about 6 inches to about 8 inches, a diameter of about 4 inches, a diameter of about 6 inches, a diameter of about 8 inches, and larger and smaller, and within the range of equivalents thereof of such crystals of all diameters. Embodiments of the volumetric shape can maintain flux generation rates and therefore ingot growth rates at a given constant temperature for the entire p-type SiC or low resistivity SiC crystal growth process. At a constant rate during crystal growth, at a constant rate, at a rate with a change of less than about 0.001%, at a rate with a change of less than about 0.01%, at a rate with a change of less than about 1%, at a rate with a change of less than about 5 % change, at a rate having a change of about 0.001% to about 15% change, at a rate having a change of about 0.01% to about 5% change, and combinations and changes thereof, and in the All values within the range of values. In embodiments, at constant temperature, the flux formation rate during ingot growth is maintained at: about 99.999% to about 60% of its maximum rate; about 99% to about 95% of its maximum rate; its maximum rate from about 99.99% to about 80% of its maximum speed; from about 99% to about 70% of its maximum speed; from about 95% to about 70% of its maximum speed; from about 99% to about 95% of its maximum speed; and combinations thereof and changes, and all values within the range of these percentages.

Examples provide different stoichiometry for powders, binder content, dopant content, and both through shapes (e.g., layers, regions with different types of powder starting materials, different binders, and combinations and variations of these). , region) distribution. This predetermined distribution of different stoichiometry, binder content, and both offers several advantages, including: Customization of the sublimation composition, since the source material is consumed externally, which enables changes in the composition from the beginning of the growth cycle By the end it could be less. Polymorph stability can also be enhanced due to a consistent composition of vapors, different stoichiometry, binder content, and such predetermined distribution of both.

Embodiments of the invention include the use of doped SiC in the fabrication of p-type SiC or low resistivity SiC wafers for use in electronic components and semiconductor applications. Doping (and preferably high purity) is required in both the vapor deposition apparatus and processes used to produce p-type SiC or low-resistivity SiC crystals and p-type SiC or low-resistivity SiC wafers for subsequent use. ) SiC.

Current implementation of polysilica p-SiC or low-resistivity SiC, and p-type SiC or low-resistivity SiC ingots, p-type SiC or low-resistivity SiC wafers, and other structures made from polysilica-derived SiC Examples exhibit polymorphism, and one-dimensional polymorphism is often referred to as polymorphism. Therefore, polysilica-derived p-type SiC or low-resistivity SiC can exist in many (theoretically infinite) different polytypes. As used herein, unless expressly provided otherwise, the terms polymorphism, polymorphism and similar such terms shall be given their broadest possible meanings and will include various different frameworks, structures or configurations used to assemble State silicon carbide tetrahedron (SiC ₄ ). Generally, these polytypes are divided into two categories: alpha ( α ) and beta ( β ).

Examples of alpha-type silicone-derived p-type SiC or low-resistivity SiC typically include hexagonal (H), rhombohedral (R), trigonal (T) structures and may include combinations of these. The beta category usually contains cubic (C) or sphalerite structures. So, for example, a polytype of polysilica-derived p-type SiC or low-resistivity SiC would include: 3C-SiC ( β -SiC or β3C -SiC ) , which has the stacking sequence ABCABC...; 2H-SiC, It has the stacking sequence ABAB...; 4H-SiC, which has the stacking sequence ABCBABCB...; and 6H-SiC (a common form of alpha silicon carbide, α6H -SiC), which has the stacking sequence ABCACBABCACB.... Other forms of alpha silicon carbide would include 8H, 10H, 16H, 18H, 19H, 15R, 21R, 24H, 33R, 39R, 27R, 48H and 51R.

Embodiments of polysilica-derived p-type SiC or low-resistivity SiC may be polycrystalline or single/mono-crystalline. Typically, grain boundaries exist in polycrystalline materials as the interface between two grains or crystallites of the material. These grain boundaries can be between the same polytype with different orientations, or between different polytypes with the same or different orientations, as well as combinations and variations of these. Single crystal structures consist of a single polytype and have essentially no grain boundaries. In preferred embodiments, p-type SiC or low resistivity SiC is single crystal.

Embodiments of the present method produce ingots, preferably monocrystalline p-type SiC or low resistivity SiC ingots. The ingots may have lengths of about ½ inch to about 5 inches, about ½ inch to about 3 inches, about 1 inch to about 2 inches, greater than about ½ inch, greater than about 1 inch, and greater than about 2 inches. Larger and smaller sizes and all values within the range of such sizes are contemplated. The crystal ingot can have a diameter of about ½ inch to about 9 inches, about 2 inches to about 8 inches, about 1 inch to about 6 inches, greater than about 1 inch, greater than about 2 inches, greater than about 4 inches, about 4 inches, about 6 inches. and cross-sections, such as diameters, of about 8 inches, about 12 inches, and about 18 inches. Other sizes and all values within the range of such sizes are contemplated. P -type and low-resistivity wafers - generally speaking

Generally speaking, processes for manufacturing electronic components from p-type SiC or low resistivity SiC ingots involve slicing p-type SiC or low resistivity SiC single crystal ingots into thin wafers. The resulting SiC wafers are the starting point for manufacturing SiC-based semiconductor components. SEMI (www.semi.org) has developed and published standards for SiC wafer specifications for various diameters up to 150 mm. These standards are well known and understood by those skilled in the art. Due to previous limitations of the SiC industry in commercializing p-type SiC crystals and wafers and only n-type nitrogen-doped SiC crystals and wafers, the most well-known The method is based on SiC n-type wafers and can be used to manufacture p-type, n-type low resistivity and p-type low resistivity wafers.

Embodiments of the doped wafers of the present invention have a diameter of the ingot from which the wafers are cut, and typically have a thickness of about 100 μm to about 500 μm . Preferably, the p-type electrical properties or low resistivity properties are distributed throughout the entire length of the ingot or the entire thickness of the wafer. More preferably, the p-type electrical properties or low resistivity properties are evenly distributed throughout the entire length of the ingot or the entire thickness of the wafer. The p-type SiC or low-resistivity SiC wafer is then polished on one or both sides. The polished wafers are then used as substrates for the fabrication of microelectronic semiconductor components. Therefore, p-type SiC or low-resistivity SiC wafers are used as substrates for microelectronic components built on the wafer. The fabrication of these microelectronic components includes microfabrication process steps such as epitaxial growth, doping or ion implantation, etching, deposition of various materials, and lithographic patterning, to name a few. Once made from a p-type SiC or low-resistivity SiC wafer, the wafer and therefore the individual microcircuits are separated into individual semiconductor components in a process called dicing. These components are then used to fabricate (eg, incorporated into) a variety of larger semiconductor and electronic components.

Examples of current methods and resulting p-type SiC or low-resistivity SiC wafers include, among other things: approximately 2-inch diameter wafers and smaller, approximately 3-inch diameter wafers, approximately 4-inch diameter wafers. Rounds, approximately 5-inch diameter wafers, approximately 6-inch diameter wafers, approximately 7-inch diameter wafers, approximately 12-inch diameter wafers, and possibly larger wafers with diameters from approximately 2 inches to approximately 8 inches Round, having a diameter of about 4 inches to about 6 inches, square, round and other shapes, about 1 square inch, about 4 square inches, about 8 square inches, about 10 square inches, about 12 square inches, about 30 square inches , approximately 50 square inches and larger and smaller surface areas per side, approximately 100 μm thickness, approximately 200 μm thickness, approximately 300 μm thickness, approximately 500 μm thickness, approximately 700 μm thickness , a thickness of about 50 μm to about 800 μm , a thickness of about 100 μm to about 700 μm , a thickness of about 100 μm to about 400 μm , a thickness of about 100 μm to about 300 μm , a thickness of about Wafers with thicknesses from 100 μm to about 200 μm and greater and smaller thicknesses, as well as combinations and variations of these and all values within the range of these sizes.

The current methods and embodiments of the resulting cut and polished p-type SiC or low resistivity SiC wafers may also include: used to initiate the growth of a crystal ingot (i.e., as a "seed") from which the ingot is grown. The rest of it matches the structure. Among other things, p-type SiC or low-resistivity SiC wafers and p-type SiC or low-resistivity SiC seeds may be: approximately 2-inch diameter wafers and smaller, approximately 3-inch diameter wafers, approximately 4 inch diameter wafers, approximately 5 inch diameter wafers, approximately 6 inch diameter wafers, approximately 7 inch diameter wafers, approximately 12 inch diameter wafers and possibly larger, with approximately 2 inches to approximately 8 inches wafers having diameters of about 4 inches to about 6 inches, squares, circles and other shapes, about 4 square inches, about 8 square inches, about 12 square inches, about 30 square inches, about 50 square inches and Larger and smaller surface area per side, thickness of about 100 μm , thickness of about 200 μm , thickness of about 300 μm , thickness of about 500 μm , thickness of about 1500 μm , thickness of about 2500 μm Thickness, thickness of about 50 μm to about 2000 μm , thickness of about 500 μm to about 1800 μm , thickness of about 800 μm to about 1500 μm , thickness of about 500 μm to about 1200 μm , Thicknesses from about 200 μm to about 2000 μm , thicknesses from about 50 μm to about 2500 μm and greater and smaller thicknesses, as well as combinations and variations of these and all values within the range of these dimensions of wafers.

Current embodiments of p-type SiC or low-resistivity SiC ingots, p-type SiC or low-resistivity SiC wafers and microelectronic components made from each other's wafers can be used in, among other things, diodes, broadband amplifiers, It is applied and utilized in military communications, radar, telecommunications, data links and tactical data links, satellite communications and point-to-point radio power electronic components, LEDs, lasers, lighting and sensors. In addition, these embodiments may be applied and used in transistors such as high-electron-mobility transistors (HEMTs), including HEMT-based monolithic microwave integrated circuits. , MMIC) and IGBT. These transistors can use distributed (traveling wave) amplifier design methods, and through the larger energy band gap of SiC, they can achieve extremely wide bandwidths in a small footprint. Accordingly, embodiments of the present invention will include such components and articles made from or otherwise based on current methods, vapor deposition techniques, and polymer-derived SiC, SiC ingots, and SiC wafers, and microelectronic components made from such wafers.

Embodiments of polysilica-derived p-type SiC or low-resistivity SiC, and in particular high-purity SiC, have a number of unique properties that make them advantageous and desirable for use in electronic components, radars, among other things and power transmission industries and applications. They serve as p-type or low-resistivity semiconductor materials that are very stable and suitable for certain high-demand applications, including high power, high frequency, high temperature and corrosive environments and uses. Polymer-derived p-type SiC or low-resistivity SiC is a very hard material with a Young's modulus of 424 GPa.

In embodiments, if dopants need to be added to the material, they can be added by precursors and thus present in a controlled manner and amount for growth into the ingot or other structure. Embodiments of precursor formulations may have dopants or complexes that carry and bond the dopants to the ceramic (and then to the converted SiC) so that after the vapor deposition process, the dopants are available and In a usable form.

Additionally, dopants or other additives are used to provide customized or predetermined properties to wafers, layers and structures made from polymer-derived SiC. In these examples, such property enhancing additives would not be considered impurities as they are intended to be, and need to be, in the final product. Property enhancing additives can be incorporated into the liquid precursor material. Depending on the nature of the property-enhancing additive, it can be part of the precursor backbone, it can be complexed or part of a complex to incorporate it into the liquid precursor, or it can be other elements that enable it to survive Form exists (e.g., in a form such that its function remains in the final material as intended). To name a few examples, property-enhancing additives can also be added to SiC or SiOC powder materials as a coating, can be added as a vapor or gas during processing, or can be in powder form and mixed with polymer-derived SiC or SiOC particles. In embodiments, the property enhancing additives comprise or are part of the binder for the volumetric shape. In embodiments, the property enhancing additive may be a coating on the volumetric shape. Furthermore, the property-enhancing additive should preferably be present in a form and in a manner such that it has minimal and preferably no adverse effect on processing conditions, processing time and quality of the final product. P -type components - generally speaking

These p-type SiC wafers provide the ability to fabricate circuits, semiconductor components and wafers previously designed using silicon p-type wafers, and do so with minimal need to rewrite or rework the circuit or wafer design. Thus, in embodiments, direct construction of circuits or components designed using p-type silicon substrates is provided, and instead components made from SiC p-type wafers are provided without the need to modify or configure or adapt the silicon-based components circuit.

In this manner, embodiments of the present invention resolve the gap faced by power circuit designers in leveraging the full range of benefits of using SiC components by providing a means for producing devices with low defectivity, resistivity properties and performance consistent with current requirements. Methods for fabricating 4H-SiC or 6H-SiC p-type substrates (e.g., wafers) with a substrate diameter to fabricate components such as Schottky barrier diodes (SBD), junction barrier Schottky diodes Junction barrier Schottky diode (JBS) and MOSFET, as well as transistors, such as gate-turn off transistor (GTO) and integrated gate bipolar transistor (IGBT) , as well as variations and other types of such transistors and components. Embodiments of the present invention enable the fabrication of p-type substrates with diameters and resistivities that match and preferably exceed today's substrates commercially produced from n-type SiC crystals. The p-type wafers disclosed and taught herein provide component manufacturers with the ability to, and thus enable, extend the utility of SiC to all voltage range and ampere range components today made from n-type SiC to p-type SiC. Based on the p-type wafers disclosed and taught in this article, power circuit designers will now be able to extend the benefits of SiC components to all voltage ranges, voltage polarities, and ampere circuit designs, as well as all other power management applications.

Embodiments of the present invention may have or utilize the precursors and source materials - generally speaking, dopant materials - generally speaking, doped crystal growth - generally speaking, P-type and low-resistivity type wafers described herein. - Generally speaking and P-type components - One or more of the embodiments, features, functions, parameters, components, processes or systems set forth in the teachings generally, and the embodiments, features, functions, One or more of a parameter, component, process, or system.

Example

The following examples are provided to illustrate various embodiments of the systems, processes, compositions, applications, and materials of the invention. These examples are for illustrative purposes, may be prophetic, and should not be considered and do not otherwise limit the scope of the invention. Unless otherwise explicitly provided, percentages used in the examples are weight percent of the totality (eg, formulation, mixture, product, or structure). Unless otherwise explicitly provided, use X/Y or XY to indicate the weight % of X and the weight % of Y in the formulation. Unless otherwise explicitly provided, use X/Y/Z or XYZ to indicate the weight % of X, the weight % of Y, and the weight % of Z in the formulation.

Example 1

In the example, a dispersion of 2.5 wt% of 5 μm mullite powder (MU-101, Micron Metal) was added to a precursor formulation of a 41% MHF 59% TV formulation with 30 ppb Pt as Ashbys catalyst. The doping precursor formulation is cured and then pyrolyzed to SiC. The SiC powder is then made into a shaped charge by using a doping precursor formulation as a shaped charge binder, molding into a shape, and then solidifying the shape into a green body. The green body is pyrolyzed and converted into a doped SiC shaped charge source material. Additional details are set forth in Examples 1A-1D.

Example 1A

Liquid Al-doped precursor formulations as set forth in Table 1 were used to make p-type SiC source materials for growing p-type SiC crystals. Table 1) liquid batch Precursor formula*weight (g) Mullite weight (g) Total weight before curing (g) Weight after curing (g) Curing yield 1 2043.6 51.090 2094.7 2042.6 97.5% 2 2042.4 51.080 2093.5 2045.8 97.7% 3 2051.9 51.395 2103.3 2032.1 96.6% 4 2046.3 51.109 2097.4 2044.9 97.5% 5 2036.2 50.987 2087.2 2031.9 97.4% The target ratio of mullite weight to precursor formulation weight is 2.5% * 41 wt% linear methyl-hydrogen polysiloxane (MHF) and 59 wt% tetravinylcyclotetrasiloxane (tetravinylcycloterasiloxane, TV).

Example 1B

The cured Al-doped precursor formulation from Example 1A was pyrolyzed to provide Al-doped SiC materials as set forth in Table 2. Table 2. Curing batch Material weight before operation (g) Material weight after operation (g) Yield 1 2844.0 1016.3 35.7% 2 2406.0 831.5 34.6% 3 3113.2 1042.5 33.5%

Example 1C

The ceramic Al-doped SiC material from Example 1B was formed into a volumetric shape and cured as shown in Table 3. Mullite is added along with the binder when forming the volumetric shape. table 3 Weight of adhesive* (g) Weight of mullite added to binder (g) Binder and mullite, combined weight (g) Weight of Al-doped SiC powder used (g) Shape weight before curing (g) Cured shape weight (g) Curing yield 421.2 10.8 432 2880 3312 3264.9 98.58% * 41 wt% linear methyl-hydrogen polysiloxane (MHF) and 59 wt% tetravinylcycloterasiloxane (TV)

Example 1D

The solidified volume shape of Example 1C was pyrolyzed, as set forth in Table 4, to provide an Al-doped SiC shaped charge source material for use in PVT growth of p-type SiC crystals. Table 4 Weight before pyrolysis (g) Weight after pyrolysis (g) Yield 3264.9 2925.4 89.60%

Example 2

The same general formulations and precursors of Examples 1A to 1D were followed except that in place of the aluminum dopant, triallylphosphine was added to the liquid precursor formulation (triallylphosphine comprised 1 to 15% by weight of the precursor formulation Weight %), and triallyl phosphine can also be added together with the binder (triallyl phosphine accounts for 1 to 15 weight % of the P-doped SiC powder and binder) to form the solidified P-doped SiC volume shape , which is then pyrolyzed to form a P-doped SiC shaped charge source material. P-doped SiC shaped charge source material is used in PVT growth of low resistivity n-type SiC crystals.

Example 3

Turning to Figure 1, a photograph of a p-type SiC crystal with a diameter of approximately 150 mm is shown. The crystals were grown using a PVT process and equipment using an Al-doped SiC shaped charge source material of the type in Example ID. The p-type crystal has 70 ppm Al. A p-type crystal has 5.5 x 10 ¹⁸ Al atoms/cc. The crystal has a length of approximately 23 mm. Thin sections of crystals were prepared and polished, and were blue/purple when viewed in transmission. No evidence of polytype switching from 4H to another polytype was observed.

Example 4

Turning to Figure 2A, a schematic plan view of a doped SiC wafer 700 is shown. Figure 2B is a cross-sectional view of wafer 700 along line B-B. Wafer 700 may be a p-type SiC wafer, wafer 700 may be a low resistivity p-type SiC wafer, or wafer 700 may be a low resistivity n-type SiC wafer. The wafer 700 has a disc-shaped crystal structure, and its shape 705 is semicircular and has a flat surface 706 . It should be understood that the wafer may be circular, or may have more than one plane. Wafer 700 has edge 730 . Wafer 700 has a top or bottom surface 710 , a bottom or bottom surface 711 and a thickness shown by arrow 712 . Both the top and bottom surfaces of wafer 700 and the entire thickness 712 are doped with SiC crystal. It will be understood that one surface is typically the C-face of the SiC crystal and the other surface is the Si-face of the SiC crystal. One or both surfaces can be polished and surface finished for component manufacturing. The outer edge 730 of the wafer 700 may be tapered, beveled, chamfered, square, rounded, etc.

Wafer 700 is cut from a doped SiC ingot having a length that is significantly greater (eg, 10x, 20x, 50x, 70x, and more) than thickness 712 of wafer 700 .

Therefore, wafer 700 does not have a thin doped SiC layer grown or deposited on a substrate layer of a different type of material, from which the substrate layer is then removed. Such thin (e.g., less than 1 mm, less than 0.5 mm) substrate-grown doped SiC layers (with the substrate removed) have electrical and physical properties that are significantly different from doped SiC wafers cut from self-doped SiC ingots. nature. Such substrates growing thin doped layers have unacceptable stresses within the material, exhibit warping and curvature, and are generally unsuitable for any kind of semiconductor device manufacturing.

Example 5

6” (150 mm) p-type SiC wafer. Polytype is 4H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.015 ohm-cm to 0.028 ohm-cm.

Example 6

6” (150 mm) low resistivity p-type SiC wafer. Polytype is 4H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 7

6” (150 mm) p-type SiC wafer. Polytype is 6H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm .Warp <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 .TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.015 ohm-cm to 0.028 ohm-cm.

Example 8

6” (150 mm) low resistivity p-type SiC wafer. Polytype is 6H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 9

6” (150 mm) low resistivity n-type SiC wafer. Polytype is 4H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 10

6” (150 mm) low resistivity n-type SiC wafer. Polytype is 6H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 11

Turning to Figure 5, an N-channel E-MOSFET device 500 using a p-type SiC wafer is shown. Component 500 has gate 512, metal electrode 505, and metal oxide layer 504. Component 500 has source 509, drain 508 and body 510. Circuit 511 is formed between element 509 and body 510 . Source 509 is connected to n-type SiC 502 via a metal electrode. Drain 508 is connected to n-type SiC 503 via a metal electrode. Component 500 has a p-type substrate 501 made from a p-type wafer cut from a p-type ingot. The metal oxide layer 507 is adjacent to the p-type substrate 501 . The main body 510 is connected to the p-type substrate 501 via electrodes 507 .

Example 12

Turning to Figure 6, a P-channel E-MOSFET device 600 using a p-type SiC wafer is shown. Component 600 has gate 612, metal electrode 605, and metal oxide layer 604. Component 600 has source 609, drain 608 and body 610. Circuit 611 is formed between source 609 and body 610 . Source 609 is connected to p-type SiC 602 via a metal electrode. Drain 608 is connected to p-type SiC 603 via a metal electrode. p-type SiC 602, 603 are made from p-type wafers cut from p-type ingots. The element 600 has an n-type substrate 601 . Metal oxide layer 607 is adjacent to n-type substrate 601 . The body 610 is connected to the n-type substrate 601 via electrodes 607 .

Example 13

Turning to Figure 7, an N-channel D-MOSFET device 750 using a p-type SiC wafer is shown. Component 750 has gate 762, metal electrode 755, and metal oxide layer 754. Component 750 has a source 759 , a drain 758 and a body 760 . Circuit 761 is formed between source 759 and body 760 . Source 759 is connected to n-type SiC 752 via a metal electrode. Drain 758 is connected to n-type SiC 753 via a metal electrode. Element 750 has N channels 751 with channel lengths as indicated by arrow 764. Component 750 has a p-type substrate 763 made from a p-type wafer cut from a p-type ingot. The metal oxide layer 756 is adjacent to the p-type substrate 763 and a portion of the N channel 751 . Body 760 is connected to p-type substrate 763 via electrode 757 .

Example 14

Turning to Figure 8, a P-channel D-MOSFET device 800 using a p-type SiC wafer is shown. Component 800 has gate 812, metal electrode 805, and metal oxide layer 804. Component 800 has a source 809 , a drain 808 and a body 810 . Circuit 811 is formed between source 809 and body 810 . Source 809 is connected to p-type SiC 802 via a metal electrode. Drain 808 is connected to p-type SiC 803 via a metal electrode. p-type SiC 802 and 803 are made from p-type wafers cut from p-type ingots. Component 800 has a P-channel 801 made from a p-type wafer cut from a p-type ingot. Arrow 814 indicates channel length. Element 800 has an n-type substrate 813 . Metal oxide layer 806 is adjacent to n-type substrate 813 and a portion of P channel 801 . Base 810 is connected to n-type substrate 813 via electrode 807 .

Example 15

Turning to Figure 9, a schematic cross-section of SiC IGBT element 900 is shown. Device 900 is based on a p+ type wafer cut from a p+ type ingot, which forms layer 901, as well as other p-type materials in the multi-layer structure of device 900. Other layers of the device can also be based on PDC n-type SiC wafers.

Example 16

Turning to Figure 10, a cross-sectional schematic diagram of a SiC laterally diffused MOSFET (LDMOS) device 1000 is shown. Device 1000 is based on a p+ type wafer cut from a p+ type ingot, which forms layer 1001, as well as other other p-type materials in the multilayer structure of device 1000. Other layers of the device can also be based on PDC n-type SiC wafers.

Example 17

Turning to Figure 11, a schematic cross-section of SiC VMOS MOSFET element 1100 is shown. Device 1100 is based on a p-type wafer cut from a p-type ingot, which forms the p-type material in the multi-layer structure of device 1100 . Other layers of the device can also be based on PDC n-type SiC wafers.

Example 18

Turning to Figure 12, a schematic cross-section of SiC UMOS MOSFET element 1200 is shown. Device 1200 is based on a p-type wafer cut from a p-type ingot, which forms the p-type material in the multi-layer structure of device 1200 . Other layers of the device can also be based on PDC n-type SiC wafers.

Example 19

Turning to Figure 13, a schematic cross-section of SiC IGBT element 1300 is shown. Device 1000 is based on a p-type wafer cut from a p-type ingot, which forms the p-substrate layer, as well as other other p-type materials in the multi-layer structure of device 1300. Other layers of the device can also be based on PDC n-type SiC wafers.

Example 20

Turning to Figure 14, a schematic cross-section of SiC CMOS compound device 1400 is shown. Device 1400 is based on a p-type wafer cut from a p-type ingot, which forms the p-substrate material in the multi-layer and component structure of device 1400. Here, the PMOS device and the NMOS device are built on a common p-type substrate, which is based on a p-type wafer cut from a p-type ingot. Shallow trench isolation (ST) provides electrical isolation between these components. Multiple levels of metal lines are routed to interconnect the components and thus form circuits on the wafer. Capacitors, resistors, and inductors may also be integrated into compound device 1400.

Example 21

Turning to Figure 15, a schematic cross-sectional view of SiC flash memory device 1500 is shown. Prior to this invention, it was believed that flash memory devices could not be constructed from SiC. The SiC flash memory device 1500 has a line source 1501, a bit line 1502, a word line control gate 1503, a floating gate 1504, an n-type SiC component 1505, a second n-type SiC component 1506 and a p-type layer 1507. Type layers are based on p-type wafers cut from p-type ingots.

Example 22

Turning to Figure 16, an embodiment of a SiC CMOS compound device 1600 is shown. Such components are used as analog and mixed-signal components. The device has a p-type substrate layer based on a p-type wafer cut from a p-type ingot.

Example 23

Low-resistivity SiC wafers offer significant advantages when used to produce devices by eliminating the need for costly processing steps (such as grinding or thinning the SiC substrate) while requiring circuitry improvements. Design changes are minimal and preferably no design changes are required.

Example 24

Low-resistivity SiC wafers also have a resistivity between 1 milliohm-cm and 5 milliohm-cm.

Example 25

Nitrogen is much smaller than silicon. Therefore, it has been theorized that in the crystal, smaller impurity atoms are likely to occupy carbon sites and larger impurity atoms occupy silicon sites. During SiC crystal growth, nitrogen can occupy either or both Si or C sites in the crystal.

Typically, doped SiC wafers can have 100 to 1,000 parts per million of nitrogen dopant. It has been theorized that only one out of every 100 nitrogen atoms supplied during growth is attracted into the crystal, i.e., becomes an electrically active atomic impurity. Therefore, the source must be significantly higher than the desired dopant level. (The "drawing" of dopants into the crystal lattice is called site competition). However, there is a limit to the amount of nitrogen that can be put into a crystal, and too much can distort the crystal, creating stress. In the past, higher concentrations of nitrogen doping to reduce resistivity have resulted in large amounts of stacking and other crystal quality defects that adversely affect epitaxy and device performance. Phosphorus is closer in size to silicon atoms. Therefore, it has been theorized that within the SiC crystal lattice, phosphorus will replace silicon (rather than nitrogen replacing carbon) and will introduce much less stress (and fewer defects, since defects are formed by stress in the crystal cause). Therefore, it has been theorized that based on the required dopants, the optimal amount of phosphorus dopant in the source material used to fabricate phosphorus doped n-type SiC wafers will be < 10%. In preferred embodiments, the process causes >1% of the phosphorus from the source material to enter the SiC crystal as an electrically active atomic impurity.

Example 26

In the sublimation process used to grow SiC crystals, there is usually more Si vapor than C vapor present, making it suitable for incorporation of nitrogen, but at the same time the high Si vapor concentration does not make itself suitable for incorporation of aluminum or boron for fabrication p-type material. However, it has been theorized that nitrogen or phosphorus (1 in 100 atoms) is incorporated as a dopant, and only 1 in 1,000 atoms for boron or aluminum is incorporated.

Therefore, for efficient incorporation, it has been theorized that the doping source should have a vapor pressure equal to or higher than that of silicon. Aluminum is a good dopant for p-type wafers because it has a higher vapor pressure than silicon. Aluminum and silicon are close to each other on the periodic table (actually the same size atoms).

Example 27

Previous 4H silicon carbide p-type materials that can be used to make n-channel IGBTs, grown as an epitaxial layer on a substrate (usually n-type SiC), generally lacked the quality and conductivity to work well in IGBTs, and in particular , lacks the quality and conductivity to be used as a commercially acceptable IGBT. The present invention resolves and solves this problem by, among other things, providing p-type SiC wafers cut from p-type SiC ingots that provide the ability to fabricate commercially acceptable and operable SiC IGBT devices. .

Example 28

There is a long-standing need for SiC LDMOSFETs (lateral metal-oxide semi-field effect transistors). These components were developed in silicon for high-power applications such as cellular and UHF broadcast transmissions, and the demand for such components continues to increase. This is because silicon LDMOSFETs provide higher gain and better linearity than bipolar components. However, prior to this invention, components of this design or type could not be made of or based on SiC because there were only n-type SiC substrates and historically any p-type epitaxially formed SiC substrates had too high a resistance compared to silicon. resistivity, resulting in unsatisfactory LDMOSFET device performance. The present invention resolves and solves this problem by, among other things, providing p-type SiC wafers cut from p-type SiC ingots that provide the ability to fabricate commercially acceptable and operable SiC LDMOSFET devices. .

Example 29

A polysilica precursor formulation with one or more dopants, which has a predetermined amount of acceptor impurity atoms and a predetermined amount of donor impurity atoms. In this manner, the SiC source material has a predetermined amount of acceptor and donor impurity atoms, and therefore a predetermined ratio of acceptor impurity atoms to donor impurity atoms. This predetermined ratio in turn provides a predetermined Nc value to the doped SiC grown from the source material.

Example 30

In embodiments of polysilica precursors, Si-OH functional siloxanes and silane are utilized for the majority incorporation of Al-OH, P-OH, or B-OH functional groups without the generation of hydrogen. For example, as shown in the following reaction:

~Si-OH + ~B-OH → ~Si-O-B~ + H2O

Example 31

SiC IGBT with voltage capacity greater than 10 kV and greater than 100 kV.

Example 32

Medium voltage SiC IGBT with voltage capacity of approximately 2 kV.

Example 33

4” (100 mm) p-type SiC wafer. Polytype is 4H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.015 ohm-cm to 0.028 ohm-cm.

Example 34

4r (100 mm) low resistivity p-type SiC wafer. The polytype is 4H. The dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness ranges from 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μ m. SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (microtubules) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity is 0.010 ohm-cm to 0.003 ohm-cm.

Example 35

6” (150 mm) p-type SiC wafer. Polytype is 6H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.015 ohm-cm to 0.028 ohm-cm.

Example 36

6” (150 mm) low resistivity p-type SiC wafer. Polytype is 6H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 37

4” (100 mm) p-type SiC wafer. Polytype is 4H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Wafer N _A is 10 ¹⁸ /cm ³ to about 10 ¹⁹ /cm ³ .

Example 38

6” (150 mm) p-type SiC wafer. Polytype is 4H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Wafer N _A is 10 ¹⁸ /cm ³ to about 10 ¹⁹ /cm ³ .

Example 39

6” (150 mm) p-type SiC wafer. Polytype is 6H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Wafer N _A is 10 ¹⁸ /cm ³ to about 10 ¹⁹ /cm ³ .

Example 40

4” (100 mm) p-type SiC wafer. Polytype is 4H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Wafer N _A is 10 ¹⁸ /cm ³ to about 10 ¹⁹ /cm ³ .

Example 41

4” (100 mm) p-type SiC wafer. Polytype is 6H. Dopant is Al. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm m. Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Wafer N _A is 10 ¹⁸ /cm ³ to about 10 ¹⁹ /cm ³ .

Example 42

4” (100 mm) low resistivity n-type SiC wafer. Polytype is 4H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 43

4” (100 mm) low resistivity p-type SiC wafer. Polytype is 6H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 44

6” (150 mm) low resistivity n-type SiC wafer. Polytype is 4H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 45

6” (150 mm) low resistivity p-type SiC wafer. Polytype is 6H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 46

4” (100 mm) low resistivity n-type SiC wafer. Polytype is 4H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 47

4” (100 mm) low resistivity p-type SiC wafer. Polytype is 6H. Dopant is p. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 48

6” (150 mm) low resistivity n-type SiC wafer. Polytype is 4H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm.

Example 49

6” (150 mm) low resistivity p-type SiC wafer. Polytype is 6H. Dopant is P. Orientation is <0001> +/-0.5 degrees. Thickness is 325 μm to 500 μm . Bend <40 μm . Warpage <60 μm . TTV <15 μm . SBIR (LTV) (average 10mm x 10mm) <4 μm . MPD (Microtube) <0.2 cm ^-2 . TSD (Threaded Screw Density) ) <500 cm ^-2 . BPD (basal plane dislocation) <500 cm ^-2 . Resistivity 0.010 ohm-cm to 0.003 ohm-cm. Title and Examples

It should be understood that headings are used in this specification for the sake of clarity and are not limiting in any way. Accordingly, the processes and disclosures described under the headings should be read in the context of the entirety of this specification, including the various examples. The use of headings in this specification shall not limit the scope of protection afforded to the invention.

It should be noted that there is no requirement to provide or resolve theories underlying the novel and groundbreaking processes, materials, performance, or other beneficial features and properties that are embodiments of the present invention. Subject matter may be associated with these embodiments. However, various theories are provided in this specification to further advance this technical field. These theories are presented in this specification and, unless expressly stated otherwise, in no way limit, limit, or narrow the scope of protection to be afforded to the claimed invention. No such theory may be required or practiced to utilize the invention. It should be further understood that the present invention may give rise to new and heretofore unknown theories to explain the functional characteristics of embodiments of the methods, articles, materials, components and systems of the present invention; and such subsequently developed theories should not limit the scope of the present invention. protection scope.

The various embodiments of formulations, compositions, articles, plastics, ceramics, materials, parts, wafers, ingots, volumetric structures, uses, applications, equipment, methods, activities and operations set forth in this specification may be used in a variety of other fields and for various other activities, uses and embodiments. Additionally, such embodiments may be used, for example, with existing systems, articles, compositions, materials, operations, or activities; with systems, articles, compositions, materials, operations, or activities that may be developed in the future; and with Such systems, articles, compositions, materials, operations, or activities may be used with modifications based in part on the teachings of this specification. Additionally, the various embodiments and examples set forth in this specification may be used with each other, in whole or in part, and in different and various combinations. Thus, for example, configurations provided in various embodiments of this specification may be used with each other. For example, in accordance with the teachings of this specification, components of the embodiments having A, A', and B and components of the embodiments having A'', C, and D may be combined in various combinations (e.g., A, C, D, and A, A' ', C and D, etc.) are used together with each other. Therefore, the scope of protection afforded to this invention should not be limited to the specific embodiments, configurations, or configurations set forth in the specific embodiments, examples, or embodiments in the specific figures.

The present invention may be embodied in other forms than those specifically disclosed herein without departing from the spirit or essential characteristics of the invention. The described embodiments are to be considered in all respects as illustrative only and not restrictive.

150a,150b: storage tank 150c: Separate storage tank, bucket or warehouse 151a,151b: Distillation device 152:Mixer 153:Container 154:furnace 155a, 155b, 155c: Pyrolysis furnace 157a: Clean room environment 158a, 158b, 158c: scavenging inlet line 159a, 159b, 159c, 160a, 160b, 160c: exhaust gas emission lines 161:Scavenging air inlet 162: Exhaust gas emission line 163: Exhaust gas treatment assembly 164: Entrance line 170:Binder tank 171:Line 172: Mixing container 173: Mixing element 175: Forming device 177:Oven 180:Packaging components 190:Volume shape forming area 190a, 190b, 190c: Clean room or clean room area 500:N-channel E-MOSFET component 501: p-type substrate 502:n-type SiC 503:n-type SiC 504: Metal oxide layer 505: Metal electrode 507:Electrode 508:Jiji 509:Source 510:Subject 511:Circuit 512: Gate 600:P channel E-MOSFET component 601: n-type substrate 602: p-type SiC 603: p-type SiC 604: Metal oxide layer 605: Metal electrode 607:Electrode 608:Jiji 609:Source 610:Subject 611:Circuit 612: Gate 700:wafer 705:Shape 706:Plane 710:Top or top surface 711: Bottom or bottom surface 712: Wafer thickness 730:Outer edge 750:N-channel D-MOSFET component 751:N channel 752:n-type SiC 753:n-type SiC 754: Metal oxide layer 755:Metal electrode 756: Metal oxide layer 757:Electrode 758:Jiji 759:Source 760:Subject 761:Circuit 762: p-type substrate 763: p-type substrate 764:Channel length 800:P channel D-MOSFET component 801:P channel 802: p-type SiC 803: p-type SiC 804: Metal oxide layer 805: Metal electrode 806: Metal oxide layer 807:Electrode 808: Drainage 809:Source 810:Subject 811:Circuit 812: Gate 813: n-type substrate 814:Channel length 900:SiC IGBT component 901:Layer 1000:SiC lateral diffusion MOSFET element 1001:Layer 1100:SiC VMOS MOSFET components 1200:SiC UMOS MOSFET components 1300:SiC IGBT components 1400:SiC CMOS compound element 1500:SiC flash memory device 1501: Line source 1502:Bit line 1503: Word line control gate 1504: Floating gate 1505: n-type SiC component 1506: Second n-type SiC component 1507: p-type layer 1600:SiC CMOS compound element 1800: Vapor deposition components 1801: shaped charge 1802:Seed crystal 1802a: Surface 1803:Mobile platform 1804:Heating element 1805,1806,1807:port 1808:Side wall 1809: Bottom or bottom wall 1810:Top or top wall 1820: Diameter of shaped charge 1821:Height of shaped charge 1822: Cross-section or diameter of seed crystal 1823: Upper surface or top surface 1824: Bottom surface 1850:Region

Figure 1 is a photograph of an embodiment of a 150 mm p-type SiC crystal according to the present invention.

Figure 2A is a schematic plan view of an embodiment of a doped SiC wafer according to the present invention.

Figure 2B is a schematic cross-sectional view of the wafer of Figure 2A taken along line B-B.

Figure 3 is a process flow diagram according to an embodiment of the system and method of the present invention.

Figure 4 is a schematic cross-sectional view of an embodiment of a vapor deposition apparatus and process according to the present invention.

Figure 5 is a schematic cross-sectional view of an embodiment of an N-channel E-MOSFET device using a p-type SiC wafer according to the present invention.

Figure 6 is a schematic cross-sectional view of an embodiment of a P-channel E-MOSFET device using a p-type SiC wafer according to the present invention.

Figure 7 is a schematic cross-sectional view of an embodiment of an N-channel D-MOSFET device using a p-type SiC wafer according to the present invention.

Figure 8 is a schematic cross-sectional view of an embodiment of a P-channel D-MOSFET device using a p-type SiC wafer according to the present invention.

Figure 9 is a schematic cross-sectional view of an embodiment of an IGBT element using a p-type SiC wafer according to the present invention.

Figure 10 is a schematic cross-sectional view of an embodiment of a Laterally Diffused MOSFET (LDMOS) device using a p-type SiC wafer according to the present invention.

FIG. 11 is a schematic cross-sectional view of an embodiment of a VMOS MOSFET device using a p-type SiC wafer according to the present invention.

FIG. 12 is a schematic cross-sectional view of an embodiment of a UMOS MOSFET device using a p-type SiC wafer according to the present invention.

Figure 13 is a schematic cross-sectional view of an embodiment of an IGTB device using a p-type SiC wafer according to the present invention.

Figure 14 is a schematic cross-sectional view of an embodiment of a CMOS compound device using a p-type SiC wafer according to the present invention.

Figure 15 is a schematic cross-sectional view of an embodiment of a flash memory device using a p-type SiC wafer according to the present invention.

Figure 16 is a schematic cross-sectional view of an f CMOS compound device using a p-type SiC wafer according to the present invention.

Domestic storage information (please note in order of storage institution, date and number) without Overseas storage information (please note in order of storage country, institution, date, and number) without

Claims (92)

A p-type SiC wafer having a diameter of about 4" (100 mm) to about 6" (150 mm); a thickness of about 300 μm to about 600 μm ; acceptor atoms; and about 0.015 ohm- cm to a resistivity of approximately 0.028 ohm-cm. The p-type SiC wafer of claim 1, further having a polytype selected from the group consisting of 4H and 6H. The p-type SiC wafer of claim 1 or 2, wherein the acceptor atoms include aluminum, boron or a combination of aluminum and boron. The p-type SiC wafer according to claim 1 or 2, wherein the wafer has an N _A of at least 10 ¹⁸ /cm ³ . The p-type SiC wafer of claim 1 or 2, wherein the wafer has an N _A of 10 ¹⁸ /cm ³ to about 10 ²⁰ /cm ³ . The p-type SiC wafer according to claim 1 or 2, wherein the wafer has an N _A of 10 ¹⁸ /cm ³ to 10 ²¹ /cm ³ . The p-type SiC wafer as described in claim 1 or 2 further has an orientation of <0001> +/-0.5 degrees. The p-type SiC wafer as described in claim 1 or 2 further has a bend of <40 μm . The p-type SiC wafer as described in claim 1 or 2 further has a warpage of <60 μm . The p-type SiC wafer as described in claim 1 or 2 further has a TTV of <15 μm . The p-type SiC wafer of claim 1 or 2, further having an SBIR (LTV) of <4 μm (average 10mm x 10mm). The p-type SiC wafer according to claim 1 or 2, further having an MPD (micropipe) of <0.2 cm ^-2 . The p-type SiC wafer according to claim 1 or 2, further having a TSD (thread screw density) of <500 cm ⁻² . The p-type SiC wafer according to claim 1 or 2, which further has a BPD (basal plane dislocation) of less than 500 cm ^-2 . A p-type SiC wafer having a diameter of about 4" (100 mm) to about 6" (150 mm); a thickness of about 325 μm to about 500 μm ; acceptor atoms; and 2.0 ohm-cm and smaller resistivity. The p-type SiC wafer of claim 15, wherein the resistivity is from 2.0 ohm-cm to about 0.1 ohm-cm. The p-type SiC wafer of claim 15, wherein the resistivity is 0.13 ohm-cm and less. The p-type SiC wafer of claim 15, wherein the resistivity is from 0.013 ohm-cm to about 0.004 ohm-cm. The p-type SiC wafer of claim 15, wherein the resistivity is about 0.010 ohm-cm and less. The p-type SiC wafer of claim 15, wherein the resistivity is about 0.01 ohm-cm to about 0.001 ohm-cm. The p-type SiC wafer of claim 15, wherein the resistivity is about 0.009 ohm-cm to about 0.004 ohm-cm. The p-type SiC wafer according to any one of claims 15 to 21, wherein the acceptor atoms include aluminum, boron or a combination of aluminum and boron. The p-type SiC wafer according to any one of claims 15 to 21, wherein the wafer has an N _A of at least 10 ¹⁸ /cm ³ . The p-type SiC wafer of any one of claims 15 to 21, wherein the wafer has an N _A of 10 ¹⁸ /cm ³ to about 10 ²⁰ /cm ³ . The p-type SiC wafer of any one of claims 15 to 21, wherein the wafer has an N _A of 10 ¹⁸ /cm ³ to about 10 ²¹ /cm ³ . The p-type SiC wafer according to any one of claims 15 to 21, further having an orientation of <0001> +/-0.5 degrees. The p-type SiC wafer according to any one of claims 15 to 21, further having a bend of <40 μm . The p-type SiC wafer according to any one of claims 15 to 21, further having a warpage of <60 μm . The p-type SiC wafer according to any one of claims 15 to 21, further having a TTV of <15 μm . The p-type SiC wafer of any one of claims 15 to 21, further having an SBIR (LTV) of <4 μm (average 10mm x 10mm). The p-type SiC wafer according to any one of claims 15 to 21, further having an MPD (micropipe) of <0.2 cm ⁻² . The p-type SiC wafer according to any one of claims 15 to 21, further having a TSD (thread screw density) of <500 cm ⁻² . The p-type SiC wafer according to any one of claims 15 to 21, further having a BPD (basal plane dislocation) of <500 cm ^-2 . A low resistivity n-type SiC wafer having a diameter of about 4" (100 mm) to about 6" (150 mm); a thickness of about 300 μm to about 600 μm ; donor atoms; and 0.03 ohm-cm and smaller resistivity. The low resistivity n-type SiC wafer of claim 34, wherein the resistivity is from 0.01 ohm-cm to about 0.004 ohm-cm. The low resistivity n-type SiC wafer of claim 34, wherein the resistivity is about 0.010 ohm-cm and less. The low resistivity n-type SiC wafer of claim 34, wherein the resistivity is about 0.09 ohm-cm to about 0.002 ohm-cm. The low resistivity n-type SiC wafer of claim 34, wherein the resistivity is about 0.009 ohm-cm to about 0.004 ohm-cm. The low resistivity n-type SiC wafer of any one of claims 34 to 38, wherein the donor atoms include phosphorus, nitrogen, or a combination of phosphorus and nitrogen. The low resistivity n-type SiC wafer according to any one of claims 34 to 38, wherein the substituted donor atoms consist essentially of phosphorus. The low resistivity n-type SiC wafer of any one of claims 34 to 38, wherein the wafer has an _ND of at least 10 ¹⁸ /cm ³ . The low resistivity n-type SiC wafer of any one of claims 34 to 38, wherein the wafer has an _ND of at least about 10 ¹⁹ /cm ³ . The low resistivity n-type SiC wafer according to any one of claims 34 to 38, wherein the wafer has an N _D of 10 ¹⁸ /cm ³ to 10 ²¹ /cm ³ . The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having an orientation of <0001> +/-0.5 degrees. The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having a bend of <40 μm . The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having a warpage of <60 μm . The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having a TTV of <15 μm . The low resistivity n-type SiC wafer of any one of claims 34 to 38, further having an SBIR (LTV) of <4 μm (average 10mm x 10mm). The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having an MPD (micropipe) of <0.2 cm ^-2 . The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having a TSD (thread screw density) of <500 cm ⁻² . The low resistivity n-type SiC wafer according to any one of claims 34 to 38, further having a BPD (basal plane dislocation) of <500 cm ^-2 . The p-type SiC wafer according to any one of claims 1, 2, or 15 to 21, wherein the acceptor atoms consist essentially of aluminum. The p-type SiC wafer according to any one of claims 1, 2, or 15 to 21, wherein the acceptor atoms are composed of aluminum. A p-type SiC wafer having a thickness of about 300 μm to about 600 μm ; acceptor atoms; a bend of <40 μm ; a warpage of <60 μm ; and 2.0 ohm-cm to about A resistivity of 0.004 ohm-cm. The p-type SiC wafer of claim 54, further having a polytype selected from the group consisting of 4H and 6H. The p-type SiC wafer of claim 54 or 55, wherein the substituted acceptor atoms include aluminum, boron or a combination of aluminum and boron. The p-type SiC wafer of claim 54 or 55, wherein the substituted acceptor atoms consist essentially of aluminum, boron, or a combination of aluminum and boron. The p-type SiC wafer of claim 54 or 55, wherein the wafer has an N _A of at least 10 ¹⁸ /cm ³ . The p-type SiC wafer of claim 54 or 55, wherein the wafer has an N _A of 10 ¹⁸ /cm ³ to 10 ²² /cm ³ . The p-type SiC wafer as described in claim 54 or 55 further has an orientation of <0001> +/-0.5 degrees. The p-type SiC wafer as described in claim 54 or 55, further having a TTV of <15 μm . A low resistivity n-type SiC wafer having a thickness of about 300 μm to about 600 μm ; donor atoms including phosphorus; a bend of <40 μm ; a warpage of <60 μm ; and 0.03 ohm-cm and smaller resistivity. The low resistivity n-type SiC wafer of claim 62, further having a polytype selected from the group consisting of 4H and 6H. The low resistivity n-type SiC wafer of claim 62 or 63, wherein the substituted donor atoms consist essentially of phosphorus. The low resistivity n-type SiC wafer of claim 62 or 63, wherein the substituted donor atoms are composed of phosphorus. The low resistivity n-type SiC wafer of claim 62 or 63, wherein the wafer has an N _D of at least 10 ¹⁸ /cm ³ . The low resistivity n-type SiC wafer of claim 62 or 63, wherein the wafer has an _ND of 10 ¹⁹ /cm ³ to about 10 ²³ /cm ³ . The low resistivity n-type SiC wafer as described in claim 62 or 63 further has an orientation of <0001> +/-0.5 degrees. The low resistivity n-type SiC wafer of claim 62 or 63 further has a TTV of <15 μm . A p-type SiC ingot having a diameter of at least about 4" (100 mm); and a height of at least about 1" (25 mm). The p-type SiC ingot of claim 70, wherein the diameter is from about 4” (100 mm) to about 6” (150 mm); and the height is from about 1” (25 mm) to about 6” (150 mm). mm). The p-type SiC crystal rod according to claim 70 or 71, which contains aluminum acceptor atoms. The p-type SiC crystal rod according to claim 70 or 71, which contains boron acceptor atoms. The p-type SiC ingot of claim 70 or 71, which includes a material having a resistivity of 2.0 ohm-cm and less. The p-type SiC ingot of claim 70 or 71, which includes a material having a resistivity of 2.0 ohm-cm to about 0.004 ohm-cm. A low resistivity n-type SiC rod having a diameter of at least about 4" (100 mm); a height of at least about 1" (25 mm); and containing donor atoms, wherein the donor atoms are substantially Composed of phosphorus. The low resistivity n-type SiC ingot of claim 76, wherein the diameter is from 4” (100 mm) to about 6” (150 mm); and the height is from about 1” (25 mm) to about 6” (150 mm). The low-resistivity n-type SiC ingot of claim 76 or 77 includes a material with a resistivity of 0.009 or less. The low-resistivity n-type SiC ingot of claim 76 or 77, which includes a material having a resistivity of 0.03 ohm-cm to about 0.004 ohm-cm. A semiconductor component comprising or built on a part of the wafer according to any one of claims 1 to 69. The semiconductor device of claim 80, wherein the device is selected from the group consisting of an N-channel E-MOSFET, a P-channel E-MOSFET and an N-channel D-MOSFET. The semiconductor device of claim 80, wherein the device is selected from the group consisting of a P-channel D-MOSFET, an IGBT, an LDMOS, a VMOS MOSFET, a UMOS MOSFET and a CMOS compound device. A flash memory device comprising or built on a part of the wafer according to any one of claims 1 to 33. A flash memory device comprising or built on a part of the wafer according to any one of claims 34 to 69. A method of manufacturing a p-type SiC semiconductor element configured to replace a silicon p-type semiconductor element, the method includes the following steps: a) Evaluate a circuit plan that defines a circuit system for a p-type silicon semiconductor device; b) develop a SiC circuit plan; wherein the SiC circuit plan defines a SiC circuit system operable for a p-type SiC semiconductor device; and, c) wherein the SiC circuit plan essentially consists of the circuit plan. The method of claim 85, further comprising manufacturing the SiC circuit system on or using a p-type SiC material, wherein the p-type SiC material includes any one of claims 1 to 31 at least a portion of the wafer. The method of claim 85, wherein the SiC circuit plan is at least 90% identical to the circuit plan. The method of claim 85, wherein the SiC circuit plan is at least 95% identical to the circuit plan. The method of claim 87 or 88, further comprising manufacturing the SiC circuit system on or using a p-type SiC material, wherein the p-type SiC material includes any one of claims 1 to 33 At least a portion of the wafer described in the item. The wafer as described in any one of claims 1, 2, 15 to 21, 34 to 38, 54, 55, 62 or 63, wherein the wafer is a uniformly doped wafer. The crystal rod as described in any one of claims 70, 71, 76 or 77, wherein the crystal rod is a uniformly doped crystal rod. The device of any one of claims 80 to 84, wherein the wafer is a uniformly doped wafer.