TW202343985A - Adaptive wireless configuration based on input power - Google Patents

Abstract

Disclosed herein are related to systems and methods for adaptively configuring various components of a wireless device. In one aspect, the wireless device includes a first low noise amplifier, a second low noise amplifier, and an attenuator coupled between the first low noise amplifier and the second low noise amplifier. In one aspect, the wireless device includes one or more processors configured to determine an input power level at the first low noise amplifier. In one aspect, the one or more processors are configured to determine a group of configurations of the first low noise amplifier, the attenuator, and the second low noise amplifier, according to the determined input power level at the first low noise amplifier. In one aspect, the one or more processors are configured to set the first low noise amplifier, the attenuator, and the second low noise amplifier, according to the determined group of configurations.

Description

Adaptive wireless configuration based on input power

The present disclosure generally relates to wireless communications, including but not limited to adaptively configuring various components of a wireless device. Cross-references to related applications

This application claims priority to U.S. Provisional Patent Application No. 63/307,829 filed on February 8, 2022, and U.S. Non-Provisional Patent Application No. 17/831,886 filed on June 3, 2022. The U.S. patent The application is incorporated by reference in its entirety.

Wireless devices can communicate with each other over a wireless medium (eg, air). Each wireless device may include a transmitter to send a wireless signal and a receiver to receive a wireless signal. A transmitter of a first wireless device may upconvert data for transmission at a baseband frequency to a radio frequency (RF) to generate a wireless signal and transmit the wireless signal. A receiver of a second wireless device may receive the wireless signal at the RF and downconvert the wireless signal to the baseband frequency to retrieve or obtain the data.

Various embodiments disclosed herein relate to a device for wireless communication. In some embodiments, the device includes a first low noise amplifier, a second low noise amplifier, and a circuit coupled between the first low noise amplifier and the second low noise amplifier. attenuator between. In some embodiments, the apparatus includes one or more processors configured to determine an input power level at the first low noise amplifier. In some embodiments, the one or more processors are configured to determine the first low noise amplifier, the attenuation amplifier, and a configuration group of the second low noise amplifier. In some embodiments, the one or more processors are configured to set the first low noise amplifier, the attenuator, and the second low noise amplifier according to the determined configuration group .

In some embodiments, the one or more processors are configured to obtain a plurality of configuration groups including the first low noise amplifier, the attenuator, and the second low noise amplifier. A table. Each of the plurality of configuration groups may be associated with a corresponding input power level. In some embodiments, the one or more processors are configured to apply the determined input power level to the table to determine the configuration group associated with the input power level.

In some embodiments, the first low noise amplifier is a first integrated circuit. In some embodiments, the second low-noise amplifier is a second integrated circuit. In some embodiments, the second low-noise amplifier is an integrated low-noise amplifier of a transceiver. In some embodiments, the first low-noise amplifier is an off-chip low-noise amplifier.

In some embodiments, the one or more processors are configured to set the first low noise amplifier to amplify the first low noise amplifier with a first gain according to a first configuration in the configuration group. An input signal to a low-noise amplifier. In some embodiments, the one or more processors are configured to set the attenuator to apply an attenuation to the first low noise amplifier according to a second configuration in the configuration group. a first output signal. In some embodiments, the one or more processors are configured to set the second low noise amplifier to amplify the attenuator with a second gain according to a third configuration in the configuration group a second output signal.

In some embodiments, the attenuator includes a gain ground grid, which may include an adjustable attenuator, a chip attenuator, a resistor network, or other devices. In some embodiments, the attenuator includes an adjustable attenuator, a chip attenuator, a resistor network between the first low noise amplifier and the second low noise amplifier. Or a bandpass filter.

Various embodiments disclosed herein relate to a method of configuring a device for wireless communications. In some embodiments, the method includes determining, by one or more processors, an input power level of a first low noise amplifier. In some embodiments, an attenuator is coupled between the first low-noise amplifier and a second low-noise amplifier. In some embodiments, the method includes determining, by the one or more processors, the first low-noise amplifier, The attenuator, and a configuration group of the second low noise amplifier. In some embodiments, the method includes setting, by the one or more processors, the first low noise amplifier, the attenuator, and the second low noise amplifier according to the determined configuration group. Noise amplifier.

In some embodiments, the method includes obtaining, by the one or more processors, a plurality of low-noise amplifiers including the first low-noise amplifier, the attenuator, and the second low-noise amplifier. A table that configures groups. Each of the plurality of configuration groups may be associated with a corresponding input power level. In some embodiments, the method includes applying, by the one or more processors, the determined input power level to the table to determine the configuration associated with the input power level. group.

In some embodiments, the first low noise amplifier is a first integrated circuit. In some embodiments, the second low-noise amplifier is a second integrated circuit. In some embodiments, the second low-noise amplifier is an integrated low-noise amplifier of a transceiver. In some embodiments, the first low-noise amplifier is an off-chip low-noise amplifier.

In some embodiments, setting the first low noise amplifier, the attenuator, and the second low noise amplifier by the one or more processors includes: by the one or more A plurality of processors configure the first low-noise amplifier to amplify an input signal of the first low-noise amplifier with a first gain according to a first configuration in the configuration group. or processors setting the attenuator to apply an attenuation to a first output signal of the first low noise amplifier according to a second configuration in the configuration group, and by the one or A plurality of processors configure the second low-noise amplifier to amplify a second output signal of the attenuator with a second gain according to a third configuration in the configuration group.

In some embodiments, the attenuator includes an adjustable attenuator, a chip attenuator, a resistor network between the first low noise amplifier and the second low noise amplifier. Or a bandpass filter.

Various embodiments disclosed herein relate to a non-transitory computer-readable medium for wireless communications. In some embodiments, the non-transitory computer readable media storage instructions, when executed by one or more processors, cause the one or more processors to determine a first An input power level for a low-noise amplifier. In some embodiments, an attenuator is coupled between the first low-noise amplifier and a second low-noise amplifier. In certain embodiments, the non-transitory computer-readable media storage instructions, when executed by the one or more processors, cause the one or more processors to perform The determined input power level of the first low-noise amplifier determines a configuration group of the first low-noise amplifier, the attenuator, and the second low-noise amplifier. In some embodiments, the non-transitory computer readable media storage instructions, when executed by the one or more processors, cause the one or more processors to determine A configuration group is used to set the first low noise amplifier, the attenuator, and the second low noise amplifier.

In some embodiments, the non-transitory computer readable media storage instructions, when executed by the one or more processors, cause the one or more processors to obtain information including the A table of a plurality of configuration groups of the first low-noise amplifier, the attenuator, and the second low-noise amplifier. Each of the plurality of configuration groups may be associated with a corresponding input power level. In some embodiments, the non-transitory computer-readable media storage instructions, when executed by the one or more processors, cause the one or more processors to convert the determined The input power level is applied to the table to determine the configuration group associated with the input power level.

In some embodiments, the first low noise amplifier is a first integrated circuit. In some embodiments, the second low-noise amplifier is a second integrated circuit. In some embodiments, the second low-noise amplifier is an integrated low-noise amplifier of a transceiver. In some embodiments, the first low-noise amplifier is an off-chip low-noise amplifier. In some embodiments, the attenuator is an adjustable attenuator.

In some embodiments, when executed by the one or more processors, the one or more processors are caused to set the first low noise amplifier, the attenuator, and the second low noise amplifier. The instructions of the noise amplifier include instructions that, when executed by the one or more processors, cause the one or more processors to: according to a first configuration in the configuration group Setting the first low-noise amplifier to amplify an input signal of the first low-noise amplifier with a first gain, and setting the attenuator to apply an attenuation according to a second configuration in the configuration group a first output signal to the first low-noise amplifier, and setting the second low-noise amplifier to amplify the attenuator with a second gain according to a third configuration in the configuration group a second output signal.

Before turning to the drawings, which depict certain embodiments in detail, it is to be understood that the present disclosure is not limited to the details or methodology set forth in the description or depicted in the drawings. It is also to be understood that the terminology used herein is for the purpose of description only and should not be regarded as limiting.

Disclosed herein are various components for adaptively configuring a wireless device. In one feature, the wireless device includes a first low noise amplifier (LNA), a second LNA, and an attenuator coupled between the first LNA and the second LNA. In one feature, the one or more processors are configured to determine, based on a determined input power level at the first low noise amplifier, the first low noise amplifier, the attenuator, and a configuration of/a group (eg, batch, set) of second low noise amplifiers therefor. Each configuration of the configuration group may indicate a bias/absolute/offset for a corresponding one of the first low noise amplifier, the attenuator, and the second low noise amplifier / Relative setting or a control parameter to provide a certain gain or attenuation. In one feature, the one or more processors are configured to set the first LNA, the attenuator, and the second LNA according to a determined configuration group.

In one feature, the one or more processors may obtain a table including a plurality of configuration groups of the first LNA, the attenuator, and the second LNA. Each of the plurality of configuration groups may be associated with a corresponding power level (eg, the input power level of the first LNA). In one embodiment, the wireless device includes a storage that stores the table, and the one or more processors may obtain or retrieve the table from the storage. In one embodiment, the one or more processors may store or maintain the table internally. The one or more processors may apply the determined input power levels to the table to determine (e.g., identify, select) a configuration group related to (e.g., corresponding to/assigned to) the input power levels. .

Advantageously, various components of the wireless device including the first LNA, the attenuator, and the second LNA may be adaptively/dynamically configured. In one aspect, implementing a two-stage LNA or cascaded LNA is subject to various considerations. For example, a two-stage LNA can be set or configured to have a high gain (eg, over 40dB~100dB) to provide high sensitivity with a low noise figure. However, a two-stage LNA with excessive gain may suffer from transmission leakage and/or low linearity and may fail blocking tests. At the same time, reducing the gain of one or more LNAs can make one or more LNAs less susceptible to the transmission leakage, can improve linearity, and can avoid failing blocking tests. However, reducing the gain of one or more LNAs may degrade sensitivity and/or noise figure. In one feature, the wireless device includes an attenuator (eg, gain ground device/circuit) coupled (eg, directly or indirectly) between the first LNA and the second LNA, wherein The configurations of the first LNA, the attenuator, and the second LNA may be adaptively adjusted/modified/changed according to the detected input power level. For example, for low input power levels detected, the attenuator can provide low attenuation and the LNA can provide high gain to achieve high sensitivity and low noise figure. For example, for high detected input power levels, the attenuator can provide high attenuation and the LNA can provide low gain to achieve high linearity. Therefore, by adaptively configuring (eg, gain and/or other states/settings of) the first LNA, the attenuator, and the second LNA based on the input power level, the wireless device High sensitivity and high linearity can be achieved while reducing the effects due to transmitter leakage and/or eliminating blocking test failures.

FIG. 1 is a diagram of an example wireless communication system 100 according to an example implementation of the present disclosure. In some embodiments, the wireless communication system 100 includes wireless devices 110A, 110B. Each of the wireless devices 110A, 110B may be any device that can communicate via a wireless link. Each of the wireless devices 110A, 110B may be an access point, a base station, a router, a smartphone, a laptop, a tablet PC, or the like. The wireless link may be a cellular communication link (eg, 3G, 4G, 5G), a Wi-Fi communication link, a Bluetooth communication link, a 60GHz communication link, or any communication link. In some embodiments, the wireless communication system 100 includes more wireless devices than shown in FIG. 1 .

In some embodiments, the wireless device 110A includes a wireless interface 112A, a processor 114A, a memory device 116A, and one or more antennas 118A. Similarly, the wireless device 110B includes a wireless interface 112B, a processor 114B, a memory device 116B, and one or more antennas 118B. These components may be embodied as hardware, software, firmware, or a combination thereof. In some embodiments, the wireless devices 110A, 110B include more, fewer, or different components than shown in FIG. 1 . For example, the wireless devices 110A and 110B may each include an electronic display and/or an input device. For example, the wireless devices 110A, 110B may each include one or more additional antennas 118 in addition to those shown in FIG. 1 .

The antenna 118 may be a component that receives a radio frequency (RF) signal and/or transmits an RF signal through a wireless medium (eg, air). The RF signal may be at a frequency between 200 MHz and 100 GHz. The RF signal may have packets, symbols or frames corresponding to data for communication. The antenna 118 may be a dipole antenna, a patch antenna, a loop antenna, a slot antenna, or any suitable antenna for wireless communications. In one feature, a single antenna 118 is utilized for transmitting an RF signal and receiving an RF signal. In one feature, different antennas 118 are utilized for transmitting the RF signals and receiving the RF signals. In one feature, multiple antennas 118 are utilized to support multiple-input multiple-output (MIMO) communications.

The wireless interface 112 includes or is embodied as a transceiver for transmitting and receiving RF signals through one or more antennas 118 . In one configuration, the wireless interface 112 is coupled to one or more antennas 118 . In one feature, the wireless interface 112 can receive the RF signal at RF received through an antenna 118 and downconvert the RF signal to a baseband frequency (eg, 0~1 GHz). The wireless interface 112 may provide the down-converted signal to the processor 114 . In one feature, the wireless interface 112 can receive a baseband signal for transmission at a baseband frequency from the processor 114 and upconvert the baseband signal to generate an RF signal. The wireless interface 112 may transmit the RF signal through the antenna 118 .

The processor 114 is a component that processes data. The processor 114 may be embodied as a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a logic circuit, or the like. The processor 114 may obtain instructions from the memory device 116 and execute the instructions. In one feature, the processor 114 may receive downconverted data at the baseband frequency from the wireless interface 112 and decode or process the downconverted data. For example, the processor 114 can generate audio data or image data according to the downconversion data, and present the audio pointed out by the audio data, and/or the image pointed out by the image data to the wireless The user of device 110. In one feature, the processor 114 may generate or obtain data for transmission at the baseband frequency and encode or process the data. For example, the processor 114 may encode or process image data or audio data at the baseband frequency, and provide the encoded or processed data to the wireless interface 112 for transmission.

The memory device 116 is a component that stores data. The memory device 116 may be embodied as random access memory (RAM), flash memory, read only memory (ROM), erasable programmable read only memory (EPROM), electrically erasable memory Except programmable read-only memory (EEPROM), register, hard disk, mobile disk, CD-ROM, or any device that can be used to store data. The memory device 116 may be embodied as a non-transitory computer-readable medium that stores instructions executable by the processor 114 to perform the various functions of the wireless device 110 disclosed herein. In some embodiments, the memory device 116 and the processor 114 are integrated into a single component.

FIG. 2 is a diagram of a wireless device 110 according to an example implementation of the present disclosure. In some embodiments, the wireless device 110 includes antennas 118R, 118T, the wireless interface 112, the processor 114, and/or the memory device 116. These components may operate together to receive or transmit RF signals at RF. In some embodiments, the wireless device 110 includes more, fewer, or different components than shown in FIG. 2 . For example, the wireless device 110 includes more antennas than shown in FIG. 2 .

In some embodiments, the antenna 118R may be a component that receives an RF signal through a wireless medium, and the antenna 118T may be a component that transmits an RF signal through the wireless medium. The RF signal may be at a frequency between 200 MHz and 100 GHz. The RF signal may have packets, symbols or frames corresponding to data for communication. The antennas 118R and 118T may be dipole antennas, patch antennas, loop antennas, slot antennas, or any suitable antennas for wireless communications. In certain embodiments, the antennas 118R, 118T may have the same structural configuration (eg, shape, size, dimensions) and may be tuned for the same frequency band. In certain embodiments, the antennas 118R, 118T may have different structural configurations and may be tuned for different frequency bands. In some embodiments, a single antenna 118 is implemented to receive and transmit, rather than two individual antennas 118R, 118T.

In some embodiments, the wireless interface 112 is a component that transmits and receives RF signals through one or more antennas 118R, 118T. In one feature, the wireless interface 112 includes an LNA 220, an attenuator 225, a transceiver 210, a power amplifier 280, and/or an RX power detector 290 (also referred to as a "downlink channel power detector 290"). In some embodiments, the transceiver 210 includes a receiver circuit 215 and a transmitter circuit 265. The receiver circuit 215 and the transmitter circuit 265 may be embodied as a single integrated circuit. Alternatively, in some embodiments, the receiver circuit 215 and the transmitter circuit 265 may be embodied as separate integrated circuits. In some embodiments, the transceiver 210, the processor 114, and the memory device 116 may be embodied as a single integrated circuit. Alternatively, in some embodiments, the transceiver 210 , the processor 114 , and the memory device 116 may be embodied as individual integrated circuits. In some embodiments, the wireless interface 112 includes more, fewer, or different components than shown in FIG. 2 . For example, the wireless interface 112 includes one or more additional transceivers, additional amplifiers, filters, or any combination thereof.

In one feature, the LNA 220, the attenuator 225, and the receiver circuit 215 can operate together to receive an RF signal through the antenna 118R. In some embodiments, the receiver circuit 215 includes an LNA 230, a mixer 240 (also referred to as a demodulator 240), and a receive (RX) baseband processor 250. In some embodiments, the receiver circuit 215 includes more, fewer, or different components than shown in FIG. 2 . For example, the receiver circuit 215 includes additional amplifiers, mixers, and/or filters. In one feature, the LNA 220, the attenuator 225, and the transceiver 210 are implemented as separate components and may be manufactured by different entities. Accordingly, the LNA 220 may be implemented as an off-chip or external LNA, and the LNA 230 may be implemented with other components of the transceiver 210 (eg, receiver circuitry 215 and transmitter circuitry 265) as One-chip/integrated LNA.

In one configuration, the LNA 220 includes an input coupled (eg, directly or indirectly) to the antenna 118R and an output coupled (eg, directly or indirectly) to the attenuator 225 . In one configuration, the attenuator 225 includes an output coupled (eg, directly or indirectly) to an input of the LNA 230 . Therefore, the attenuator 225 may be coupled between the LNA 220 and the LNA 230 . In one configuration, the LNA 230 includes an output coupled (eg, directly or indirectly) to an input of the mixer 240 . In one configuration, the mixer 240 includes an output coupled to an input of the RX baseband processor 250 . In one configuration, the RX baseband processor 250 includes an output coupled to the processor 114 .

In this configuration, the LNA 220 may receive an RF signal at an RF through the antenna 118R and may amplify the received RF signal to generate a first amplified RF RX signal. The LNA 220 may provide the first amplified RF RX signal to the attenuator 225 . The attenuator 225 may include a resistor network or a filter (eg, a bandpass filter). The attenuator 225 may be an adjustable attenuator. The attenuator 225 may be used to counter/balance/interface/match/convert between first and second circuits (eg, LNA 220 and LNA 230) connected to the input and output of the attenuator, respectively. Gain and/or other properties of devices or circuits. The attenuator 225 may attenuate and/or filter the first amplified RF RX signal from the LNA 220 for a specific frequency band and may provide the attenuated signal to the LNA 230 . The LNA 230 may receive the attenuated signal at RF from the attenuator 225 and may amplify the received attenuated RF signal to generate or obtain a second amplified RF RX signal. The LNA 230 may provide the second amplified RF RX signal to the mixer 240 . The mixer 240 may down-convert the second amplified RF RX signal to a fundamental frequency (eg, 0~1 GHz) to generate or obtain a down-frequency signal (also referred to as an RX fundamental frequency signal) . The mixer 240 may provide the downconverted signal to the RX baseband processor 250 . The RX baseband processor 250 can perform various methods to obtain or retrieve content data (eg, audio data, image data, text data, etc.) from the downconversion data. For example, the RX baseband processor 250 may perform filtering, decoding, decompression, error correction, etc. on the downconversion data to obtain or retrieve the content data. The RX baseband processor 250 may provide the obtained or retrieved content data to the processor 114 .

In one feature, the power amplifier 280 and the transmitter circuit 265 can operate together to transmit an RF signal through the antenna 118T. In some embodiments, the transmitter circuit 265 includes a preamplifier 270, a mixer 260 (also referred to as a modulator 260), and a transmit (TX) baseband processor 255. In some embodiments, the transmitter circuit 265 includes more, fewer, or different components than shown in FIG. 2 . For example, the transmitter circuit 265 may include additional amplifiers, mixers, and/or filters, or the preamplifier 270 may be omitted. In one feature, the power amplifier 280 and the transceiver 210 are implemented as separate components and may be manufactured by different entities.

In one configuration, the TX baseband processor 255 includes an input coupled to the processor 114 and an output coupled to an input of the mixer 260 . In one configuration, the mixer 260 includes an output coupled to an input of the preamplifier 270 . In one configuration, the preamplifier 270 includes an output coupled to an input of the power amplifier 280 . In one configuration, the power amplifier 280 includes an output coupled to the antenna 118T.

In this configuration, the TX baseband processor 255 can receive content data (eg, audio data, image data, text data, etc.) for transmission from the processor 114 and can perform various operations on the content data. processing. For example, the TX baseband processor 255 may perform filtering, encoding, compression, error correction, etc. to generate or obtain a TX baseband signal. The TX baseband processor 255 may provide the TX baseband signal to the mixer 260 . The mixer 260 may receive a TX baseband signal at a baseband frequency and may upconvert the TX baseband signal to generate an upconverted signal. The mixer 260 may provide the upconverted signal at RF to the preamplifier 270 . The preamplifier 270 may receive the upconverted signal from the mixer 260 and perform a first amplification on the upconverted signal from the mixer 260 to generate a first amplified RF TX signal. The preamplifier 270 may provide the first amplified RF TX signal to the power amplifier 280 . The power amplifier 280 may perform a second amplification on the first amplified RF TX signal to generate a second amplified RF TX signal. The power amplifier 280 may transmit the second amplified RF TX signal through the antenna 118T.

In some embodiments, the processor 114 is a component that sets or configures the operation of the wireless device 110 . The processor 114 may be embodied as an FPGA, an ASIC, or any logic circuit. The processor 114 may include one or more processors or computing units. The processor 114 may execute one or more instructions stored in the memory device 116 or a non-transitory computer-readable medium to perform various functions of the processor 114 or the wireless device 110 described herein. Function. In one feature, the processor 114 may receive content material from the receiver circuit 215 for reception. In one feature, the processor 114 may send or provide content material to the transmitter circuit 265 for transmission. In some embodiments, the processor 114, the RX baseband processor 250, and the TX baseband processor 255 may be embodied as a single integrated circuit.

In one feature, the processor 114 may determine an input power level of an RF signal at the input of the LNA 220 . In some embodiments, the RX power detector 290 detects an output at the LNA 220, an output at the attenuator 225, an output at the LNA 230, or the hybrid. A power level of a signal output from the frequency converter 240 is detected, and a power detection signal indicating the detected power level is generated. The processor 114 may receive a power detection signal from the RX power detector 290 and may determine the input of the RF signal at the input of the LNA 220 based on the power detection signal (eg, signal/electrical) power level. For example, the processor 114 may divide the detected power level by the amount of gain and/or attenuation applied between the input of the LNA 220 and a node at which the power level was detected. Reduction. For example, the RX power detector 290 may detect an amplitude or power of the fundamental frequency signal at the output of the mixer 240 and may generate a power detection signal indicating the detected power level. . The processor 114 may receive the power detection signal and may generate the signal by i) dividing the detected power level by the gain of the LNA 220 , the LNA 230 , and the mixer 240 , and ii) multiply the attenuation/gain of the attenuator 225 to determine (eg, measure, calculate) the input power level of the RF signal input to the LNA 220 .

The processor 114 may set/apply a configuration group of the wireless interface 112 based on the input power level of the input RF signal at the LNA 220 . For example, the memory device 116 may store a table including a plurality of (candidate) configuration groups of the LNA 220 , the attenuator 225 , and the LNA 230 . Each of the plurality of configuration groups may be associated with a corresponding power level. Each configuration of the configuration group may indicate a bias setting or a control parameter for a corresponding one of the LNA 220, the attenuator 225, and the second LNA 230 to provide a certain a gain or attenuation. For example, a first configuration in the configuration group for a specific input power level indicates a bias setting or a control parameter to enable or configure the first LNA 220 for the specific input power level. Provides a gain. For example, a second configuration in the configuration group for the specific input power level indicates a bias setting or a control parameter to enable or configure the attenuator 225 for the specific input power level. Provides an attenuation. For example, a third configuration of the specific input power level in the configuration group indicates a bias setting or a control parameter to enable or configure the second LNA 230 for the specific input power level. Provides a gain. In one embodiment, the processor 114 may obtain or retrieve the table from the memory device 116 . In one embodiment, the processor 114 stores or maintains the table internally. The processor 114 may apply the determined input power level to the table to determine the configuration group associated with the input power level. The processor 114 may generate a control signal corresponding to the determined configuration group according to the determined configuration group, and may apply the control signal to the LNA 220 , the attenuator 225 , and the LNA 230 to set the LNA 220, the attenuator 225, and the LNA 230.

Advantageously, the various components of the wireless device 110 can be adaptively configured. In one aspect, implementing two levels of LNAs 220, 230 or cascaded LNAs 220, 230 is subject to various considerations, such as when the LNAs 220, 230 are designed and implemented as individual integrated circuits by different entities . For example, a two-stage LNA 220, 230 may be set or configured with high gain to provide high sensitivity with a low noise figure. However, a two-stage LNA 220, 230 with excessive gain may suffer from transmission leakage and/or low linearity from a transmitter (eg, the transmitter circuit 265 and/or the power amplifier 280) and may Failed blocking test. At the same time, reducing the gain of one or more LNAs 220, 230 may be less susceptible to the transmission leakage, may improve linearity, and may avoid failing blocking tests. However, reducing the gain of one or more LNAs 220, 230 may degrade sensitivity and/or low noise figure. In one feature, the wireless device 110 includes an attenuator 225 coupled between the LNAs 220 and 230, wherein the configurations of the LNA 220, the attenuator 225, and the LNA 230 can be configured based on detection. The measured input power level is adaptively adjusted. For example, for a detected low input power level, the attenuator 225 can provide low attenuation and the LNAs 220, 230 can provide high gain to achieve high sensitivity and low noise figure. For example, for a detected high input power level, the attenuator 225 can provide high attenuation and the LNAs 220, 230 can provide low gain to achieve high linearity. Therefore, by adaptively configuring the LNA 220 , the attenuator 225 , and the LNA 230 according to the input power level, the wireless device 110 can achieve high sensitivity and high linearity while reducing transmitter Leakage caused by effect and/or elimination of barrier test failure.

FIG. 3 is a table 300 for different configuration groups corresponding to input power levels, according to an example implementation of the present disclosure. In one feature, the table 300 is stored by the memory device 116 . In some embodiments, each column of table 300 contains or corresponds to a configuration group associated with a corresponding power level. Each configuration of the configuration group may indicate a bias/offset/relative/absolute setting or a control for a corresponding one of the LNA 220, the attenuator 225, and the LNA 230. Parameter to provide a certain gain or attenuation. In one feature, the configuration of the LNA 220, the attenuator 225, and the LNA 230 is determined for a corresponding input power level (e.g., via a calibration on the wireless device and/or Characterization methods) to optimize sensitivity, noise index, linearity, etc. For example, configuring GC1-GC3 may indicate the bias setting or control parameter of the LNA 220, and set the gain amount of the LNA 220 in a descending order. For example, configuring GBO-GB2 can indicate the bias setting or control parameter of the attenuator 225, and set the attenuation amount of the attenuator 225 in an increasing order. For example, the configuration GA1-GA5 may indicate the bias setting or control parameter of the LNA 230, and set the gain amount of the LNA 230 in a descending order. For example, configurations GT0-GT5 may indicate or correspond to configurations of LNA 220, attenuator 225, and LNA 230 in the same column, respectively. The processor 114 may apply the determined input power level to the table 300 to determine the configuration group related to the input power level. For example, the processor 114, the baseband processor 250, and/or the baseband processor 255 may have a separate memory configuration to store the RX switching point or threshold value of the input power level to Used to determine which input level range corresponds to which configuration.

The processor 114, the baseband processor 250, and/or the baseband processor 255 may generate a control signal corresponding to the determined configuration group according to the determined configuration group, and may apply the The control signals are sent to the LNA 220, the attenuator 225, and the LNA 230 to set the LNA 220, the attenuator 225, and the LNA 230. For example, in response to the detected input power level being between -80dBm and -60dBm, the processor 114, the baseband processor 250, and/or the baseband processor 255 may generate a corresponding One or more control signals of GT1, GA1, GB1, GC1 are configured, and the one or more control signals may be applied to the LNA 220, the attenuator 225, and the LNA 230. For example, in response to the detected input power level being between -60dBm and -40dBm, the processor 114, the baseband processor 250, and/or the baseband processor 255 may generate a corresponding One or more control signals are configured in GT2, GA2, GB1, GC1, and the one or more control signals may be applied to the LNA 220, the attenuator 225, and the LNA 230. Thus, the wireless device 110 can be adaptively configured for a wide range of input power levels to meet various considerations such as sensitivity, noise figure, and linearity.

FIG. 4 is a flowchart illustrating a method 400 for adaptively configuring a wireless device 110 according to a detected input power level, according to an example implementation of the present disclosure. In some embodiments, the method 400 is performed by the wireless device 110 . In some embodiments, the method 400 is performed by other entities. In some embodiments, the method 400 includes more, fewer, or different steps than shown in FIG. 4 .

In one approach, the wireless device 110 determines 410 an input power level at an input of a LNA 220 . In one approach, the RX power detector 290 detects an output at the LNA 220, an output at the attenuator 225, an output at the LNA 230, or the mixer. An output of 240 is a power level of a signal, and a power detection signal indicating the detected power level can be generated. The processor 114 may receive the power detection signal, and may determine the input power level of the RF signal input to the LNA 220 according to the power detection signal. For example, the processor 114 may divide the detected power level by the amount of gain and/or attenuation applied between the input of the LNA 220 and a node at which the power level was detected. Reduction. For example, the RX power detector 290 may detect an amplitude or power of the fundamental frequency signal at the output of the mixer 240 and may generate a power detection signal indicating the detected power level. . The processor 114 may receive the power detection signal and may detect the power level by i) dividing the detected power level by the gain of the LNA 220, the LNA 230, the mixer 240, and ii) multiply the attenuation of the attenuator 225 to determine the input power level of the RF signal input to the LNA 220 .

In one method, the wireless device 110 determines 420 a configuration group of the LNA 220, the attenuator 225, and the LNA 230 based on the determined input power level. For example, the memory device 116 may store a table including a plurality of configuration groups of the LNA 220 , the attenuator 225 , and the LNA 230 . Each of the plurality of configuration groups may be associated with a corresponding power level. Each configuration of the configuration group may indicate a bias setting or a control parameter for a corresponding one of the LNA 220, the attenuator 225, and the second LNA 230 to provide a certain A gain or attenuation. In one embodiment, the processor 114 may obtain or retrieve the table from the memory device 116 . In one embodiment, the processor 114 stores or maintains the table. The processor 114 may apply the determined input power level to the table to determine the configuration group associated with the input power level.

In one method, the wireless device 110 configures 430 the LNA 220, the attenuator 225, and the LNA 230 according to the determined configuration group. The processor 114, the baseband processor 250, and/or the baseband processor 255 may generate one or more control signals corresponding to the determined configuration group, and apply the one or more control signals. Control signals to the LNA 220, the attenuator 225, and the LNA 230.

Now that certain illustrative embodiments have been described, it is apparent that the foregoing is illustrative and not limiting, having been presented by way of example. In particular, although many of the examples presented herein involve specific combinations of method acts or system elements, those acts and those elements may be combined in other ways to achieve the same goals. Acts, components, and features discussed with respect to one embodiment are not intended to be excluded from similar roles in other embodiments.

The hardware and data processing components used to implement the various processes, operations, illustrative logic, logic blocks, modules and circuits described in connection with the embodiments disclosed herein may utilize general purpose single or multi-chip processing. processor, digital signal processor (DSP), application special integrated circuit (ASIC), field programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic, discrete Implemented or performed by hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration. In some embodiments, specific procedures and methods may be performed by circuitry dedicated to a given function. The memory (e.g., memory, memory unit, storage device, etc.) may include one or more devices (e.g., RAM, ROM, flash memory, hard drive storage, etc.) for storing data and/or computer code to implement or facilitate the various processes, layers and modules described in this disclosure. The memory may be or include volatile memory or non-volatile memory, and may include database components, object code components, text components, or any other type of information structure for supporting the content in this disclosure. The various activities and information structures described in . According to an example embodiment, the memory is communicatively connected to the processor via processing circuitry and includes computer code for execution (e.g., by the processing circuitry and/or the processor) on one or more of the procedures described here.

This disclosure contemplates methods, systems, and program products on any machine-readable medium for performing various operations. Embodiments of the present disclosure may be implemented using existing computer processors, or with special purpose computer processors incorporated for this or other purposes in suitable systems, or with hardwired systems. Embodiments within the scope of the present disclosure include program products that include machine-readable media for carrying or having machine-executable instructions or data structures stored thereon. Such machine-readable media can be any available media that can be accessed by a general purpose or special purpose computer, or other machine with a processor. For example, such machine-readable media may include RAM, ROM, EPROM, EEPROM, or other optical disk storage, magnetic disk storage, or other magnetic storage devices, or any other media that can be utilized to Contains or stores the required program code in the form of machine-executable instructions or data structures that can be accessed by a general or special purpose computer, or other machine with a processor. The above combinations are also included in the category of machine-readable media. Machine-executable instructions include, for example, instructions and data that cause a general-purpose computer, a special-purpose computer, or a special-purpose processing machine to perform a certain function or group of functions.

The phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting. The use of "comprises", "includes", "having", "contains", "involving", "characterized by", "characterized by" and variations thereof herein are meant to cover the items listed thereafter, their Equivalents, additional items, and alternative embodiments consist only of the items listed next. In one embodiment, the systems and methods described herein are composed of one, every combination of more than one, or all of the elements, actions, or components.

Any singular reference herein to an embodiment or element or act of the systems and methods described may also encompass embodiments that include a plurality of such elements, and any plural reference herein to any embodiment or element or act may also encompass Includes embodiments containing only a single element. References to the singular or plural form are not intended to limit the presently disclosed system or method, its components, actions, or elements to a single or plural configuration. References to any act or element based on any information, act, or element may include implementations in which the act or element is based, at least in part, on any information, act, or element.

Any embodiment disclosed herein may be combined with any other embodiment or example, and references to "an embodiment," "certain embodiments," "an embodiment," or the like are not necessarily mutually exclusive. , and it is intended to point out that a specific feature, structure or characteristic described in relation to the described embodiments may be included in at least one embodiment or example. Such terms as used herein are not necessarily all referring to the same embodiment. Any embodiment may be included or exclusively combined with any other embodiment in any manner consistent with the features and embodiments disclosed herein.

In the case where a technical feature in the drawings, detailed description, or any claim is followed by an element symbol, the element symbol is added to increase the understandability of the drawing, detailed description, and claim. Thus, the presence or absence of the reference symbol does not have any limiting effect on the scope of any claim element.

The systems and methods described herein may be embodied in other specific forms without departing from their characteristics. Unless expressly stated otherwise, references to terms such as "approximately", "approximately", "substantially" or other degrees include a variation of +/-10% from the given measure, unit or range. Coupled components may be electrically, mechanically, or physically coupled to each other directly or through intervening components. Accordingly, the scope of the systems and methods described herein is indicated by the appended claims, rather than the preceding description, and changes that fall within the equal meaning and scope of the claims are intended to be embraced. included in it.

The term "coupled" and its variations include the direct or indirect engagement of two components with each other. Such engagement may be static (eg, permanent or fixed), or removable (eg, removable or releasable). Such engagement may occur where the two members are coupled directly to each other or to each other, where the two members are coupled to each other using an intervening member, respectively, and any additional intervening members that are coupled to each other. , or the two components are coupled to each other using an intermediate component, which is achieved by being integrated with one of the two components into a single body. If "coupled" or its variations are modified by an additional term (e.g., directly coupled), then the upper definition of "coupled" set forth above is modified by the ordinary language meaning of the additional term (e.g., directly coupled) , "directly coupled" means the joining of two components without any intervening components), which results in a narrower definition than the general definition of "coupled" proposed above. Such coupling may be mechanical, electrical, or fluid.

References to "or" are to be construed as inclusive such that any item recited with "or" may refer to either a single, more than one, or all of the item. References to "at least one of 'A' and 'B'" may include only 'A', only 'B', and both 'A' and 'B'. Such references used in conjunction with "including" or other open-ended terms may include additional items.

Modifications of the components and actions, such as changes in the size, dimensions, structure, shape and proportion, parameter values, installation configurations, use of materials, colors, and orientations of various components, may be made without materially departing from the subject matter disclosed herein. Produced based on the teachings and advantages. For example, elements shown as integrally formed may be constructed from multiple parts or elements, the positions of elements may be reversed or varied, and the nature or number or position of discrete elements may be altered or varied. Other substitutions, modifications, changes and omissions may be made in the design, operating conditions and configuration of the disclosed components and operations without departing from the scope of the present disclosure.

References herein to the position of elements (eg, "top," "bottom," "above," "below") are only used to describe the orientation of the various elements in the drawings. The orientation of various elements may be different according to other example embodiments, and such variations are intended to be covered by this disclosure.

100:Wireless communication system 110:Wireless device 110A: Wireless device 110B: Wireless device 112:Wireless interface 112A: Wireless interface 112B: Wireless interface 114: Processor 114A: Processor 114B: Processor 116:Memory device 116A: Memory device 116B: Memory device 118:Antenna 118A:Antenna 118B:Antenna 118R:Antenna 118T:Antenna 210:Transceiver 215:Receiver circuit 220:LNA 225:Attenuator 230:LNA 240:Mixer/Demodulator 250: Receive (RX) baseband processor 255: Transmit (TX) baseband processor 260:Mixer/Modulator 265: Transmitter circuit 270: Preamplifier 280:Power amplifier 290:RX power detector/downlink power detector 300:Table 400:Method 410: Steps 420: Steps 430: Steps

The accompanying drawings are not intended to be drawn to scale. The same reference symbols and nomenclature in the various drawings identify similar elements. For purposes of clarity, not every component may be labeled in every figure.

[FIG. 1] is a diagram of an example wireless communication system according to an example implementation of the present disclosure.

[FIG. 2] is a diagram of a wireless device according to an example implementation of the present disclosure.

[FIG. 3] is a table for different configurations corresponding to input power levels according to an example embodiment of the present disclosure.

[Fig. 4] is a flowchart illustrating a method of adaptively configuring a wireless device according to input power level according to an example implementation of the present disclosure.

400:Method

410: Steps

420: Steps

430: Steps

Claims (20)

A device comprising: The first low-noise amplifier; second low-noise amplifier; an attenuator coupled between the first low-noise amplifier and the second low-noise amplifier; and One or more processors configured to: Determine the input power level at the first low noise amplifier, determining a configuration group of the first low-noise amplifier, the attenuator, and the second low-noise amplifier based on the determined input power level of the first low-noise amplifier, and The first low-noise amplifier, the attenuator, and the second low-noise amplifier are set according to the determined configuration group. Such as the device of request item 1, wherein the one or more processors are configured to obtain a table including a plurality of configuration groups of the first low-noise amplifier, the attenuator, and the second low-noise amplifier, the plurality of Each configuration group in the configuration group is related to the corresponding input power level, wherein the one or more processors are configured to apply the determined input power level to the table to determine the configuration group associated with the input power level. Such as the device of request item 1, wherein said first low noise amplifier is a first integrated circuit, and The second low noise amplifier is a second integrated circuit. Such as the device of request item 1, wherein said second low-noise amplifier is an integrated low-noise amplifier of the transceiver, and The first low-noise amplifier is an off-chip low-noise amplifier. The device of claim 1, wherein the attenuator is an adjustable attenuator. The device of claim 1, wherein the one or more processors are configured to: setting the first low-noise amplifier to amplify the input signal of the first low-noise amplifier with a first gain according to the first configuration in the configuration group, setting the attenuator to apply attenuation to a first output signal of the first low noise amplifier according to a second configuration in the configuration group, and The second low-noise amplifier is configured to amplify the second output signal of the attenuator with a second gain according to a third configuration in the configuration group. The device of claim 1, wherein the attenuator includes an adjustable attenuator, a chip attenuator, a resistor network, or an adjustable attenuator between the first low noise amplifier and the second low noise amplifier. Band pass filter. A method including: Determining the input power level at the first low-noise amplifier by one or more processors, wherein an attenuator is coupled between the first low-noise amplifier and a second low-noise amplifier; The one or more processors determine the first low noise amplifier, the attenuator, the second low noise amplifier based on the determined input power level of the first low noise amplifier. Configuration groups of low-noise amplifiers; and The first low-noise amplifier, the attenuator, and the second low-noise amplifier are configured by the one or more processors according to the determined configuration group. The method of claim 8 further includes: A table including a plurality of configuration groups of the first low-noise amplifier, the attenuator, and the second low-noise amplifier is obtained by the one or more processors, the plurality of configurations Each configuration group in the groups is associated with the corresponding input power level; and The determined input power level is applied to the table by the one or more processors to determine the configuration group associated with the input power level. Such as the method of request item 8, wherein said first low noise amplifier is a first integrated circuit, and The second low noise amplifier is a second integrated circuit. Such as the method of request item 8, wherein said second low-noise amplifier is an integrated low-noise amplifier of the transceiver, and The first low-noise amplifier is an off-chip low-noise amplifier. The method of claim 8, wherein the attenuator is an adjustable attenuator. The method of claim 8, wherein setting the first low-noise amplifier, the attenuator, and the second low-noise amplifier by the one or more processors includes: setting the first low-noise amplifier to amplify the input signal of the first low-noise amplifier with a first gain according to the first configuration in the configuration group by the one or more processors, setting the attenuator to apply attenuation to a first output signal of the first low noise amplifier according to a second configuration in the configuration group by the one or more processors, and The second low-noise amplifier is configured to amplify the second output signal of the attenuator with a second gain according to a third configuration in the configuration group by the one or more processors. The method of claim 8, wherein the attenuator includes an adjustable attenuator, a chip attenuator, a resistor network, or an adjustable attenuator between the first low noise amplifier and the second low noise amplifier. Band pass filter. A non-transitory computer-readable medium that stores instructions that, when executed by one or more processors, cause the one or more processors to: Determining the input power level at a first low-noise amplifier, wherein an attenuator is coupled between the first low-noise amplifier and a second low-noise amplifier; Determining a configuration group of the first low-noise amplifier, the attenuator, and the second low-noise amplifier based on the determined input power level of the first low-noise amplifier; and The first low-noise amplifier, the attenuator, and the second low-noise amplifier are set according to the determined configuration group. For non-transitory computer-readable media as requested in item 15, The instructions, when executed by the one or more processors, cause the one or more processors to obtain the first low noise amplifier, the attenuator, and the second low noise amplifier. a table of a plurality of configuration groups of the signal amplifier, each configuration group of the plurality of configuration groups being associated with the corresponding input power level, and wherein the instructions, when executed by the one or more processors, cause the one or more processors to apply the determined input power level to the table to determine and the input power level Quasi-related configuration groups. For non-transitory computer-readable media as requested in item 15, wherein said first low noise amplifier is a first integrated circuit, and The second low noise amplifier is a second integrated circuit. For non-transitory computer-readable media as requested in item 15, wherein said second low-noise amplifier is an integrated low-noise amplifier of the transceiver, and The first low-noise amplifier is an off-chip low-noise amplifier. The non-transitory computer-readable medium of claim 15, wherein the attenuator is an adjustable attenuator. The non-transitory computer-readable medium of claim 15, wherein the instructions, when executed by the one or more processors, cause the one or more processors to perform the following operations: setting the first low-noise amplifier to amplify the input signal of the first low-noise amplifier with a first gain according to the first configuration in the configuration group, setting the attenuator to apply attenuation to a first output signal of the first low noise amplifier according to a second configuration in the configuration group, and The second low-noise amplifier is configured to amplify the second output signal of the attenuator with a second gain according to a third configuration in the configuration group.

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