TW202338607A - Alternate raid coding method - Google Patents
Alternate raid coding method Download PDFInfo
- Publication number
- TW202338607A TW202338607A TW111111958A TW111111958A TW202338607A TW 202338607 A TW202338607 A TW 202338607A TW 111111958 A TW111111958 A TW 111111958A TW 111111958 A TW111111958 A TW 111111958A TW 202338607 A TW202338607 A TW 202338607A
- Authority
- TW
- Taiwan
- Prior art keywords
- check code
- calculate
- writes
- tuples
- bytes
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 23
Images
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Error Detection And Correction (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
Description
本發明關於記憶體的資料的保護,尤其關於一種交錯式RAID編碼法,其控制SBLK的數量並避免字元線(“Word Line”:“WL”)短路(“short”)的問題。 The present invention relates to the protection of memory data, and in particular to an interleaved RAID encoding method that controls the number of SBLKs and avoids the problem of word line ("Word Line": "WL") short circuit ("short").
為保護記憶體的資料,原只設計每頁(“page”)的ECC(“Error-Correcting Code”),但隨著製程微縮,且結構由平面轉向立體,只用ECC不足以保護資料。最終,有人參考既有的硬碟的設計,提出RAID(“Redundant Array of Independent Disks”),也有人稱之為RAIN(“Redundant Array of Independent NAND”)。 In order to protect the data in the memory, only ECC ("Error-Correcting Code") for each page ("page") was originally designed. However, as the process shrinks and the structure changes from flat to three-dimensional, ECC alone is not enough to protect the data. Finally, some people proposed RAID ("Redundant Array of Independent Disks") by referring to the design of existing hard disks, and some people called it RAIN ("Redundant Array of Independent NAND").
RAID是一種保護資料的方式,用多儲存校驗碼(“Parity”)還原遺失的資料。保護的通則是(2n-1):1。但7:1的成本過高,故不常見此比例。常見的比例是15:1或31:1。這16或32塊(“Block”)被稱為RAID block(“RBLK”),可能包含數個stripe block(“SBLK”)。 RAID is a method of protecting data by using multi-storage parity ("Parity") to restore lost data. The general rule of protection is (2n-1):1. However, the cost of 7:1 is too high, so this ratio is not common. Common ratios are 15:1 or 31:1. These 16 or 32 blocks ("Block") are called RAID blocks ("RBLK") and may contain several stripe blocks ("SBLK").
如表1所示,31份有效資料,多儲存1份冗餘資料,可容許遺失32份資料中的一份資料。在表1中,”P0”代表”Plane
0”,”P1”代表”Plane 1”。
As shown in Table 1, with 31 pieces of valid data, storing one more piece of redundant data can allow one of the 32 pieces of data to be lost. In Table 1, "P0" represents "Plane
0", "P1" represents "
隨NAND快閃記憶體演進,現在一個晶粒(“Die”:“CE”)所囊括的空間越來越大,相同容量的記憶體所需的晶粒的量愈來愈少。為避免浪費太多使用者空間,最佳狀況是維持31:1。因此,比同時用好幾個SBLK維持31:1,這情況會導致FTL管理不易,GC增加難度。 With the evolution of NAND flash memory, the space covered by one die ("Die": "CE") is getting larger and larger, and the number of die required for the same capacity of memory is getting smaller and smaller. To avoid wasting too much user space, the optimal situation is to maintain 31:1. Therefore, using several SBLKs at the same time to maintain 31:1 ratio will make FTL management difficult and GC more difficult.
目前,在存取NAND快閃記憶體時,為了保證存取到最大頻寬,經常會定義存取單位SBLK為CH*CE*PL,在這個存取單位下,只要以此單位做存取,就保證每次存取用這個單位能達到最大頻寬,並保證主機存取的效能。 Currently, when accessing NAND flash memory, in order to ensure access to the maximum bandwidth, the access unit SBLK is often defined as CH*CE*PL. Under this access unit, as long as the access is performed in this unit, This ensures that each access using this unit can achieve the maximum bandwidth and ensures the performance of host access.
參考圖2,以下將描述一般RAID編碼法。 Referring to Figure 2, a general RAID encoding method will be described below.
在S10,初始化多個變數。在此,設CH=0,CE=0,page=0,寫次數(“write count”)=0,並把校驗碼0(“parity 0”)及校驗碼1(“parity 1”)都寫為0。然後,到S12。
At S10, multiple variables are initialized. Here, assume CH=0, CE=0, page=0, write count ("write count")=0, and put check code 0 ("parity 0") and check code 1 ("
在S12,等一個主機把資料寫入該NAND快閃記憶體。該NAND快閃記憶體收到32K位元組後,到S14。 In S12, wait for a host to write data into the NAND flash memory. After the NAND flash memory receives 32K bytes, it goes to S14.
在S14,分派資料。把一部分資料(前16K位元組)送到S16,把其餘資料(後16K位元組)送到S18,並把全部資料(32K位元組)送到S20。 At S14, data is distributed. Send part of the data (the first 16K bytes) to S16, send the rest of the data (the last 16K bytes) to S18, and send all the data (32K bytes) to S20.
在S16,計算校驗碼0。 At S16, check code 0 is calculated.
在S18,計算校驗碼1。
At S18,
在S20,寫全部資料到該地址ch/ce/page,單位是NVML(32K位元組),並把寫次數加1。然後,到S22。 In S20, write all data to the address ch/ce/page, the unit is NVML (32K bytes), and add 1 to the number of writes. Then, go to S22.
在S22,用寫次數重新計算該地址ch/ce/page,供下回合的S20或S26所用。然後,到S24。 In S22, the address ch/ce/page is recalculated using the number of writes for use in the next round of S20 or S26. Then, go to S24.
在S24,判斷寫次數是否2n-1(例如25-1),亦即是否第2n 筆NVML。若是,則到S26。若否,則回到S12。 In S24, determine whether the number of writes is 2n-1 (for example, 25-1), that is, whether it is the 2nth Pen NVML. If yes, go to S26. If not, return to S12.
在S26,把在S16與S18所算資料寫入該地址ch/ce/page。然後,到S28。 In S26, write the data calculated in S16 and S18 to the address ch/ce/page. Then, go to S28.
在S28,用寫次數重新計算該地址ch/ce/page,並清校驗碼0及校驗碼1,就是把校驗碼0及校驗碼1都寫為0。然後,回到S12。
In S28, the address ch/ce/page is recalculated based on the number of writes, and check code 0 and check
然而,前述之NAND結構3D化導致若干問題,例如字元線短路。這些問題使習知的做法難順利進行。 However, the aforementioned 3D NAND structure has caused several problems, such as word line short circuits. These problems make it difficult for Xi Zhi's practice to proceed smoothly.
有鑑於上述習知技藝之問題,本發明之目的是提供一種NAND快閃記憶體所用的交錯式RAID編碼法,其控制SBLK數量,並避免字元線短路的問題。 In view of the above-mentioned problems in the prior art, the object of the present invention is to provide an interleaved RAID encoding method for NAND flash memory, which controls the number of SBLKs and avoids the problem of word line short circuit.
為達成上述目的,該交錯式RAID編碼法包括包括初始化地址及寫次數,等一個主機把32K位元組的資料寫入該NAND快閃記憶體,同步執行二子程序。在第一子程序,判斷寫次數是偶數或奇數,並判斷字元線是偶數或奇數。若寫次數及字元線都是偶數或都是奇數,則用前16K位元組計算校驗碼0並用後16K元組計算校驗碼1,否則用前16K元組計算校驗碼1並用後16K元組計算校驗碼0。在第二子程序,寫全部資料到該NAND快閃記憶體的該地址並把寫次數加1,用寫次數重新計算該地址供下回合的第二子程序之用,判斷寫次數是否2n-1。若寫次數非2n-1,則回到等主機把資料寫入該NAND快閃記憶體的步驟。若寫次數是2n-1,則把前16K位元組的校驗碼0及後16K元組的校驗碼1寫入該地址。然後,把寫次數加1,用寫次數重新計算該地址,並回到等該主機把資料寫入該NAND快閃記憶體的步驟。
In order to achieve the above purpose, the interleaved RAID encoding method includes an initialization address and a write count, and waits for a host to write 32K bytes of data into the NAND flash memory and execute two subroutines simultaneously. In the first subroutine, it is judged whether the number of writes is an even number or an odd number, and whether the word line is an even number or an odd number. If the number of writes and word lines are both even or odd, use the first 16K bytes to calculate check code 0 and the last 16K tuples to calculate
S10:初始化變數 S10: Initialize variables
S12:主機寫32K位元組 S12: Host writes 32K bytes
S14:分派資料 S14: Distribute data
S16:計算校驗碼0 S16: Calculate check code 0
S18:計算校驗碼1
S18: Calculate
S20:寫全部資料並把寫次數加1 S20: Write all the information and add 1 to the number of writes
S22:用寫次數重新計算地址 S22: Recalculate the address using the number of writes
S24:寫次數是否2n-1 S24: Whether the number of writes is 2n-1
S26:把校驗碼寫入該地址 S26: Write the check code to the address
S28:用寫次數重新計算該地址 S28: Recalculate the address using the number of writes
S30:寫次數是否偶數 S30: Is the number of writes even?
S32:字元線是否偶數 S32: Is the character line an even number?
S34:字元線是否奇數 S34: Is the character line an odd number?
S36:用前16K元組計算校驗碼0 S36: Use the first 16K tuples to calculate check code 0
S38:用後16K元組計算校驗碼1
S38: Calculate
S40:用前16K元組計算校驗碼1
S40: Use the first 16K tuples to calculate
S42:用後16K元組計算校驗碼0 S42: Use the last 16K tuples to calculate the check code 0
〔圖1〕是本發明的較佳實施例的交錯式RAID編碼法的流程圖。 [Fig. 1] is a flow chart of the interleaved RAID encoding method according to the preferred embodiment of the present invention.
〔圖2〕是習知的RAID編碼法。 [Figure 2] is a conventional RAID encoding method.
如圖1所示,本發明的較佳實施例的交錯式RAID編碼法包括2部分。第一部分是以最佳方式(以NVML為單位)把資料寫入RAID。第二部分是解決方法一所帶來的字元線短路的問題。 As shown in Figure 1, the interleaved RAID encoding method of the preferred embodiment of the present invention includes two parts. The first part is to write the data to the RAID in the best way (in NVML). The second part is to solve the problem of character line short circuit caused by method one.
在減少每一個RBLK所含SBLK的情況下,增加一群WL,並在同個SBLK內操作多於1個字元線/頁,使RAID達到較佳比例31:1。 By reducing the SBLK contained in each RBLK, adding a group of WLs and operating more than 1 word line/page within the same SBLK, the RAID reaches a better ratio of 31:1.
本方法的交錯式RAID編碼法可控制SBLK數量,避免字元線短路的問題,又不須上層提供操作單一頁,並透過簡單的通用公式可在每一個NVML個別算出本次應位於哪一個RBLK的哪一頁(“page”)。 The interleaved RAID encoding method of this method can control the number of SBLKs to avoid the problem of word line short circuit, and does not require the upper layer to provide a single page for operation. Through a simple general formula, each NVML can individually calculate which RBLK should be located this time. Which page ("page").
在S10,初始化多個變數。在此,設CH=0,CE=0,page=0,寫次數=0,並清校驗碼0及校驗碼1,就是把校驗碼0及校驗碼1都寫為0。然後,到S12。
At S10, multiple variables are initialized. Here, assume CH=0, CE=0, page=0, write count=0, and clear check code 0 and check
在S12,等一個主機把32K位元組的資料寫入該NAND 快閃記憶體。然後,到S14。 In S12, wait for a host to write 32K bytes of data to the NAND Flash memory. Then, go to S14.
在S14,分派資料。然後,分成兩路,其一到S20,其二到S30。 At S14, data is distributed. Then, it is divided into two routes, one to S20 and the other to S30.
在S30,判斷寫次數是否偶數。若是,則到S32。若否,則到S34。 In S30, it is determined whether the number of writes is even. If yes, go to S32. If not, go to S34.
在S32,判斷字元線是否偶數。若字元線是偶數,則分為兩路,其一到S36,其二到S38。若字元線是奇數,則分為兩路,其一到S40,其二到S42。 In S32, it is determined whether the word lines are even. If the character lines are an even number, they are divided into two paths, one of which goes to S36 and the other of which goes to S38. If the character lines are an odd number, they are divided into two paths, one of which goes to S40 and the other of which goes to S42.
在S34,判斷字元線是否奇數。若字元線是奇數,則分為兩路,其一到S36,其二到S38。若字元線是偶數,則分為兩路,其一到S40,其二到S42。 In S34, it is determined whether the number of character lines is odd. If the character lines are an odd number, they are divided into two paths, one of which goes to S36 and the other of which goes to S38. If the character lines are an even number, they are divided into two paths, one of which goes to S40 and the other of which goes to S42.
在S36,用前16K元組計算校驗碼0。 At S36, the first 16K tuples are used to calculate check code 0.
在S38,用後16K元組計算校驗碼1。
At S38, the last 16K tuples are used to calculate
可同時或先後執行S36及S38。不論如何,須在S26以前執行S36及S38。 S36 and S38 can be executed simultaneously or successively. In any case, S36 and S38 must be executed before S26.
在S40,用前16K元組計算校驗碼1。
At S40, the first 16K tuples are used to calculate
在S42,用後16K元組計算校驗碼0。 In S42, the last 16K tuples are used to calculate check code 0.
可同時或先後執行S40及S42。不論如何,須在S26以先執行S40及S42。 S40 and S42 can be executed simultaneously or successively. In any case, S40 and S42 must be executed before S26.
在S20,寫全部資料到該NAND快閃記憶體的該地址ch/ce/page,單位是NVML(32K位元組),並把寫次數(“write count”)加1。然後,到S22。 In S20, write all data to the address ch/ce/page of the NAND flash memory, the unit is NVML (32K bytes), and add 1 to the number of writes ("write count"). Then, go to S22.
在S22,用寫次數重新計算該地址ch/ce/page,以便在下回合的S20使用。然後,到S24。 In S22, the address ch/ce/page is recalculated with the number of writes for use in the next round of S20. Then, go to S24.
在S24,判斷寫次數是否2n-1(例如25-1=31),就是判斷是否為第2n(例如32)筆NVML。若是,則到S26。若,否則回 到S12。 In S24, it is judged whether the number of writes is 2n-1 (for example, 25-1=31), that is, whether it is the 2nth (for example, 32nd) NVML. If yes, go to S26. If, otherwise return to S12.
在S26,把在S36與S38所算資料或在S40與S42所算資料寫入該地址ch/ce/page。然後,到S28。 In S26, write the data calculated in S36 and S38 or the data calculated in S40 and S42 to the address ch/ce/page. Then, go to S28.
在S28,用寫次數重新計算該地址ch/ce/page,並清校驗碼0及校驗碼1,就是把校驗碼0及校驗碼1都寫為0。然後,回到S12。
In S28, the address ch/ce/page is recalculated based on the number of writes, and check code 0 and check
本發明的交錯式RAID編碼法呈現若干優點。其一,RBLK只須用等量或較少的SBLK。其二,無字元線短路的問題。其三,可用NVML(2 plane pages)為單位寫入。 The interleaved RAID encoding method of the present invention presents several advantages. First, RBLK only needs to use the same amount or less SBLK. Secondly, there is no problem of character line short circuit. Third, it can be written in NVML (2 plane pages) units.
以上僅為描述本發明的較佳實施方式,非用以限定本發明的範圍。本技術領域內的一般技術人員根據上述實施例所作的均等變化,以及本領域內技術人員熟知的改變,仍在本發明的範圍內。 The above is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Equivalent changes made by those skilled in the art based on the above embodiments, as well as changes well known to those skilled in the art, are still within the scope of the present invention.
S10:初始化變數 S10: Initialize variables
S12:等主機寫32K位元組 S12: Wait for the host to write 32K bytes
S14:分派資料 S14: Distribute data
S20:寫全部資料並把寫次數加1 S20: Write all the information and add 1 to the number of writes
S22:用寫次數重新計算地址 S22: Recalculate the address using the number of writes
S24:寫次數是否2n-1 S24: Whether the number of writes is 2n-1
S26:把校驗碼寫入該地址 S26: Write the check code to the address
S28:用寫次數重新計算該地址 S28: Recalculate the address using the number of writes
S30:寫次數是否偶數 S30: Is the number of writes even?
S32:字元線是否偶數 S32: Is the character line an even number?
S34:字元線是否奇數 S34: Is the character line an odd number?
S36:用前16K元組計算校驗碼0 S36: Use the first 16K tuples to calculate check code 0
S38:用後16K元組計算校驗碼1
S38: Calculate
S40:用前16K元組計算校驗碼1
S40: Use the first 16K tuples to calculate
S42:用後16K元組計算校驗碼0 S42: Use the last 16K tuples to calculate the check code 0
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW111111958A TWI810871B (en) | 2022-03-29 | 2022-03-29 | Alternate raid coding method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW111111958A TWI810871B (en) | 2022-03-29 | 2022-03-29 | Alternate raid coding method |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI810871B TWI810871B (en) | 2023-08-01 |
TW202338607A true TW202338607A (en) | 2023-10-01 |
Family
ID=88585511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW111111958A TWI810871B (en) | 2022-03-29 | 2022-03-29 | Alternate raid coding method |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI810871B (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7979771B2 (en) * | 2006-04-04 | 2011-07-12 | Permabit Technology Corporation | Erasure coding technique for scalable and fault tolerant storage system |
US9003264B1 (en) * | 2012-12-31 | 2015-04-07 | Sandisk Enterprise Ip Llc | Systems, methods, and devices for multi-dimensional flash RAID data protection |
US10367605B2 (en) * | 2015-07-02 | 2019-07-30 | Intel Corporation | High speed interconnect symbol stream forward error-correction |
US20220083657A1 (en) * | 2019-11-22 | 2022-03-17 | Pure Storage, Inc. | Independent Security Threat Detection and Remediation by Storage Systems in a Synchronous Replication Arrangement |
-
2022
- 2022-03-29 TW TW111111958A patent/TWI810871B/en active
Also Published As
Publication number | Publication date |
---|---|
TWI810871B (en) | 2023-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8397023B2 (en) | System and method for handling IO to drives in a memory constrained environment | |
US20190146911A1 (en) | Memory system and operating method thereof | |
JP6053078B2 (en) | Physical page, logical page, and codeword correspondence | |
US20110231713A1 (en) | Flash memory module | |
US20150169230A1 (en) | Method of lun management in a solid state disk array | |
CN111538676B (en) | Data storage device and data access method thereof | |
TW201545167A (en) | Method of handling error correcting code in non-volatile memory and non-volatile storage device using the same | |
US11580030B2 (en) | Devices, systems, and methods of logical-to-physical address mapping | |
US20090172244A1 (en) | Hierarchical secondary raid stripe mapping | |
CN112463647A (en) | Reducing the size of the forward mapping table using hashing | |
CN112988044A (en) | Memory system and data processing system including the same | |
CN109426584B (en) | System and method for redundant array of independent disks based on logical block address | |
CN111124262A (en) | Management method, apparatus and computer readable medium for Redundant Array of Independent Disks (RAID) | |
CN110908930A (en) | Memory controller, operating method thereof and memory device | |
CN110569000A (en) | Host RAID (redundant array of independent disk) management method and device based on solid state disk array | |
US8533549B2 (en) | Memory system and computer system | |
KR101823983B1 (en) | Memory devices and methods | |
CN114974366A (en) | Storage device, flash memory controller and control method thereof | |
US10783034B2 (en) | Memory system and control method | |
TWI810871B (en) | Alternate raid coding method | |
JP7407230B2 (en) | ecc parity bias for key value data storage devices | |
US9390008B2 (en) | Data encoding for non-volatile memory | |
CN110609660A (en) | Host end mapping method and device of SSD array, computer equipment and storage medium | |
US10095424B2 (en) | Apparatus and method for programming non-volatile memory using a multi-cell storage cell group | |
US20200183605A1 (en) | Extent based raid encoding |