TW202324333A - Display module - Google Patents
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- TW202324333A TW202324333A TW110145954A TW110145954A TW202324333A TW 202324333 A TW202324333 A TW 202324333A TW 110145954 A TW110145954 A TW 110145954A TW 110145954 A TW110145954 A TW 110145954A TW 202324333 A TW202324333 A TW 202324333A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
- G09F9/3026—Video wall, i.e. stackable semiconductor matrix display modules
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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Abstract
Description
本發明是有關於一種顯示模組。The invention relates to a display module.
隨著顯示科技的發達,人們對顯示設備的需求日益增加,應用範圍也更加多元。例如,在大型展場或百貨賣場,越來越多大尺寸顯示設備被設置以顯示公共訊息或提供廣告。為了降低這些大型顯示設備的設置成本及維護成本,採用多片顯示面板拼接而成的拼接式顯示設備已成為這類大型顯示看板常見的架設方式之一。With the development of display technology, people's demand for display devices is increasing day by day, and the scope of application is also more diverse. For example, in large exhibition halls or department stores, more and more large-size display devices are installed to display public information or provide advertisements. In order to reduce the installation cost and maintenance cost of these large display devices, a spliced display device formed by splicing multiple display panels has become one of the common erection methods for such large display panels.
然而,拼接多個顯示面板的方式在本質上卻存在著許多問題。例如,由於相鄰兩顯示面板之間的拼接縫是可視的(visible),而造成視覺上的不連續感。以陣列形式設置多片顯示面板容易累積對位公差。此外,拼接式的顯示設備除了電路基板外還會具備一層對位基板與一層保護蓋板,造成整體厚度太大的狀況。However, there are essentially many problems in the way of splicing multiple display panels. For example, a visual sense of discontinuity is caused because the seam between two adjacent display panels is visible. Arranging multiple display panels in an array is easy to accumulate alignment tolerances. In addition, in addition to the circuit substrate, the spliced display device also has a layer of alignment substrate and a layer of protective cover, resulting in a situation where the overall thickness is too large.
本發明提供一種顯示模組,屬拼接式顯示設備,其拼接縫的可視度低,不會累積對位公差,且厚度薄。The invention provides a display module, belonging to a splicing display device, whose splicing seams have low visibility, do not accumulate alignment tolerances, and are thin in thickness.
根據本發明一實施例,提供一種顯示模組,包括透光基板、多個光吸收體以及多個顯示面板。這些光吸收體設置於透光基板上。這些顯示面板以陣列形式設置於透光基板上,並設置於這些光吸收體相反於透光基板之一側。這些光吸收體分別對應兩兩相鄰的顯示面板之間的間隙。According to an embodiment of the present invention, a display module is provided, including a light-transmitting substrate, a plurality of light absorbers, and a plurality of display panels. These light absorbers are disposed on the transparent substrate. The display panels are arranged on the light-transmitting substrate in array form, and are arranged on the side of the light absorbers opposite to the light-transmitting substrate. These light absorbers respectively correspond to the gaps between two adjacent display panels.
基於上述,本發明實施例提供的顯示模組將光吸收體對應兩兩相鄰的顯示面板之間的拼接縫設置,降低拼接縫的可視度。光吸收體還可做為各顯示面板的對位標記,避免累積對位公差。此外,顯示模組的透光基板同時被用做為對位基板與保護蓋板,減少了一層基板的使用,大幅降低顯示模組的整體厚度。Based on the above, in the display module provided by the embodiment of the present invention, the light absorber is arranged corresponding to the seam between two adjacent display panels, so as to reduce the visibility of the seam. The light absorber can also be used as an alignment mark for each display panel to avoid accumulating alignment tolerances. In addition, the light-transmitting substrate of the display module is also used as an alignment substrate and a protective cover, which reduces the use of one substrate and greatly reduces the overall thickness of the display module.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.
參照圖1,其繪示根據本發明一實施例的顯示模組的示意圖。顯示模組100包括透光基板101、多個光吸收體120以及多個顯示面板110。光吸收體120設置於透光基板101上。顯示面板110以陣列形式設置於透光基板101上,並設置於光吸收體120相反於透光基板101之一側。光吸收體120分別對應兩兩相鄰的顯示面板110之間的間隙100G。Referring to FIG. 1 , it shows a schematic diagram of a display module according to an embodiment of the present invention. The
顯示模組100為拼接式顯示設備。在根據本發明一實施例的顯示模組製程工序中,顯示模組100的製程方法包括:設置透光基板101,透光基板101可以是玻璃基板或是包括有聚乙烯對苯二甲酸酯(polyethylene terephthalate,PET)、聚酰亞胺(polyimide,PI)等材料的可撓性基板;在透光基板101上以陣列形式設置多個光吸收體120,光吸收體120可以是光固或熱固性材料,以例如熱成型(Thermoforming)的方式設置於透光基板101上;以光吸收體120做為對位標記,將多個顯示面板110以拼接方式設置於透光基板101上,其中光吸收體120設置於透光基板101與顯示面板110之間,且對應兩兩相鄰的顯示面板110之間的間隙100G。具體而言,相較於習知技藝在拼接多個顯示面板時容易累積對位公差的情況,根據本實施例的顯示模組100的製程方法以光吸收體120做為設置顯示面板110時的對位標記,而得以避免累積對位公差。再者,具備光吸收功能的光吸收體120對應兩兩相鄰的顯示面板110之間的間隙100G設置,降低了多個顯示面板110之間的拼接縫(間隙100G)的可視度。The
在本發明一實施例中,顯示面板110包括多個發光元件111以及電路基板112,多個發光元件111可以例如是包括紅色發光二極體、綠色發光二極體以及藍色發光二極體。顯示面板110的發光面110L朝向透光基板101,發光面110L設置於透光基板101與電路基板112之間。In an embodiment of the present invention, the display panel 110 includes a plurality of
在一未繪示的比較例中,顯示面板110的發光面110L朝向遠離透光基板101的方向,電路基板112設置於透光基板101與發光面110L之間,需要設置另一個保護蓋板,以將顯示面板110夾設於保護蓋板與透光基板101之間,造成此根據比較例的顯示面板110的整體厚度太大。相對的,根據本發明實施例於圖1所示的顯示模組100不需設置保護蓋板,大幅降低顯示模組100的整體厚度。In an unillustrated comparative example, the light-emitting
為了充分說明本發明的各種實施態樣,將在下文描述本發明的其他實施例。在此必須說明的是,下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,下述實施例不再重複贅述。In order to fully illustrate various implementation aspects of the present invention, other embodiments of the present invention will be described below. It must be noted here that the following embodiments use the component numbers and part of the content of the previous embodiments, wherein the same numbers are used to denote the same or similar components, and descriptions of the same technical content are omitted. For the description of omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.
圖2A繪示根據本發明一實施例的顯示模組的示意圖,圖2B為圖2A所示顯示模組的橫截面示意圖。FIG. 2A is a schematic diagram of a display module according to an embodiment of the present invention, and FIG. 2B is a schematic cross-sectional view of the display module shown in FIG. 2A .
先參照圖2A,顯示模組200包括透光基板101、多個光吸收體120、多個顯示面板210以及黏著層200A。光吸收體120與黏著層200A同層設置,且光吸收體120對應兩兩相鄰的顯示面板210之間的間隙200G。黏著層200A配置於透光基板101以及顯示面板210之間,以將顯示面板210黏合至透光基板101。顯示面板210包括多個發光元件211,且顯示面板210的發光面210L朝向透光基板101。在本實施例中,顯示面板210利用薄膜覆晶封裝(Chip On Film;COF)技術,將顯示面板210的驅動晶片整合在可撓性電路板240上,以節省空間。Referring first to FIG. 2A , the
接下來請參照圖2B,顯示面板210還包括電路基板220,電路基板220包括基底層221以及電路層222。基底層221具可撓性,可以包括PET或PI等材料。發光元件211配置於電路基板220朝向透光基板101的一面。通孔230貫穿電路基板220,通孔230內設置有導電金屬,發光元件211藉由通孔230內的導電金屬電性連接可撓性電路板240。應當說明的是,本發明實施例的各顯示面板210並不限於以圖2A所示的背接合(backside bonding)方式設置可撓性電路板240。在一些實施例中,各顯示面板210是以側接合(side bonding)方式來設置可撓性電路板240。在一些實施例中,各顯示面板210是側配線(side wiring)的雙面走線面板。Next please refer to FIG. 2B , the
顯示面板210還包括封裝膠層210M,設置於電路基板220上並覆蓋發光元件211,且封裝膠層210M配置於黏著層200A以及發光元件211之間。在圖2B中,封裝膠層210M還接觸基底層221以及電路層222的側面,但是本發明不以此為限,在其他實施例中,封裝膠層210M不接觸基底層221以及電路層222的側面。The
在圖2B中,封裝膠層210M的頂面210MT朝向透光基板101,且與顯示面板210的發光面210L共面。封裝膠層210M的頂面210MT實質上接觸黏著層200A,且實質上接觸對應的光吸收體120遠離透光基板101的頂面120T。因此,在透光基板101的法線方向上,封裝膠層210M的頂面210MT與透光基板101之間的距離H1等於對應的光吸收體120的頂面120T與透光基板101之間的距離H2。具體而言,由於光吸收體120與黏著層200A同層設置,具備封裝膠層210M的顯示面板210得以藉由將封裝膠層210M黏附至黏著層200A的製程工序,同時完成以光吸收體120遮擋兩兩相鄰的顯示面板210間的間隙200G的目的。In FIG. 2B , the top surface 210MT of the
如圖2A及圖2B所示,光吸收體120於透光基板101上的垂直投影不重疊發光元件211於透光基板101上的垂直投影。光吸收體120於透光基板101上的垂直投影部分重疊對應的封裝膠層210M於透光基板101上的垂直投影。但是本發明不限於此,在一實施例中,封裝膠層210M的頂面210MT接觸黏著層200A,但是不接觸對應的光吸收體120的頂面120T,光吸收體120於透光基板101上的垂直投影相鄰對應的封裝膠層210M於透光基板101上的垂直投影但不與其重疊。As shown in FIG. 2A and FIG. 2B , the vertical projection of the
參照圖2B,在本實施例中,光吸收體120與封裝膠層210M具備類似的光學特性,以降低顯示模組200的拼接縫(間隙200G)的可視度。具體而言,在光學的表現方面,光吸收體120的光密度為封裝膠層210M的光密度的80%至120%。並且,光吸收體120在包含鏡面反射光(Specular Component Include, SCI)的反射率為該封裝膠層210M在包含鏡面反射光的反射率的95%至105%。Referring to FIG. 2B , in this embodiment, the
綜上所述,本發明實施例提供的顯示模組將光吸收體對應兩兩相鄰的顯示面板之間的間隙(拼接縫)設置,降低拼接縫的可視度。各光吸收體還可做為各顯示面板的對位標記,避免累積對位公差。此外,顯示模組的透光基板同時被用做為對位基板與保護蓋板,減少了一層基板的使用,大幅降低顯示模組的整體厚度。To sum up, in the display module provided by the embodiment of the present invention, the light absorber is arranged corresponding to the gap (joint seam) between two adjacent display panels, so as to reduce the visibility of the joint seam. Each light absorber can also be used as an alignment mark for each display panel to avoid accumulating alignment tolerances. In addition, the light-transmitting substrate of the display module is also used as an alignment substrate and a protective cover, which reduces the use of one substrate and greatly reduces the overall thickness of the display module.
100、200:顯示模組
100G、200G:間隙
101:透光基板
110、210:顯示面板
110L、210L:發光面
111、211:發光元件
112、220:電路基板
120:光吸收體
200A:黏著層
210M:封裝膠層
210MT、120T:頂面
221:基底層
222:電路層
230:通孔
240:可撓性電路板
H1、H2:距離
100, 200:
圖1是根據本發明一實施例的顯示模組的示意圖。 圖2A是根據本發明一實施例的顯示模組的示意圖。 圖2B為圖2A所示的顯示模組的橫截面示意圖。 FIG. 1 is a schematic diagram of a display module according to an embodiment of the invention. FIG. 2A is a schematic diagram of a display module according to an embodiment of the invention. FIG. 2B is a schematic cross-sectional view of the display module shown in FIG. 2A .
100:顯示模組 100: display module
100G:間隙 100G: Gap
101:透光基板 101: Transparent substrate
110:顯示面板 110: display panel
110L:發光面 110L: Luminous surface
111:發光元件 111: Light emitting element
112:電路基板 112: circuit substrate
120:光吸收體 120: light absorber
Claims (10)
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TW110145954A TWI807524B (en) | 2021-12-08 | 2021-12-08 | Display module |
CN202210078251.6A CN114447183A (en) | 2021-12-08 | 2022-01-24 | Display module |
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TW110145954A TWI807524B (en) | 2021-12-08 | 2021-12-08 | Display module |
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JP4059153B2 (en) * | 2003-06-23 | 2008-03-12 | ソニー株式会社 | Manufacturing method of display device |
US11263933B2 (en) * | 2017-10-25 | 2022-03-01 | Samsung Electronics Co., Ltd. | LED panel and display apparatus having the same |
CN111105720A (en) * | 2018-10-09 | 2020-05-05 | 财团法人工业技术研究院 | Tiled display device |
CN115775502A (en) * | 2019-08-29 | 2023-03-10 | 群创光电股份有限公司 | Display device |
KR20210034977A (en) * | 2019-09-23 | 2021-03-31 | 삼성전자주식회사 | Display appartus and manufacturing method thereof |
JP7420533B2 (en) * | 2019-11-11 | 2024-01-23 | 日東電工株式会社 | Double-sided adhesive sheet and image display device |
CN113707043A (en) * | 2020-05-22 | 2021-11-26 | 重庆康佳光电技术研究院有限公司 | Spliced display panel and display device |
JP7418568B2 (en) * | 2020-05-26 | 2024-01-19 | 京セラ株式会社 | Display devices and composite display devices |
CN113053972B (en) * | 2021-03-11 | 2023-02-07 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
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