TW202322026A - Fast lookup device and transaction risk control device - Google Patents

Abstract

A fast lookup device is used for receiving a packet and includes a tag deserializer, a SRAM pool and a mapping table device. The tag deserializer is used for deserializing the packet to obtain a tag in the packet and a packet information corresponding to the tag. The tag or the packet information is a product identification code. The SRAM pool stores a product information in a memory address. The mapping table device utilizes a logic circuit to store a mapping table. The mapping table is a file containing the correspondence between the product identification code and a memory address in the SRAM pool. The fast lookup device further outputs the product information according to the memory address.

Description

Quick search device and transaction risk control device

The present invention relates to a transaction risk control device, in particular to a transaction risk control device including a quick search device.

In the field of financial transactions, the transaction amount of financial products is changing rapidly. When the transmission of transaction information or financial product information is delayed, it is easy to cause huge losses to users. Therefore, how to quickly transmit customer transaction information in the field of financial transactions where every second counts has become important. topic.

However, in the current field of futures trading, when a user submits a transaction request to a futures exchange through a futures broker, the communication protocol used between the user and the futures broker is different from the communication protocol used between the futures broker and the futures exchange. , resulting in the user’s transaction request must first target the futures brokerage, through the forwarding of the futures brokerage and modify the writing method of the transaction request, so that the futures exchange can receive and read the transaction request. However, the conventional method relies heavily on the equipment of the futures broker. Once the computing power of the equipment of the futures broker is insufficient, it is easy to cause delays in transaction requests.

The purpose of an embodiment of the present invention is to provide a fast search device, which can quickly provide a piece of product information corresponding to the package after receiving a package. More specifically, the aforementioned fast search device is capable of deserializing a packet, obtaining the label and packet information in the packet, and according to the label or packet information, from the mapping table device that stores a mapping table using a logic circuit, quickly Obtain a memory address, and then output product information corresponding to the package according to the memory address of the SRAM pool. The purpose of another embodiment is to provide a transaction risk control device including the aforementioned quick search device.

According to an embodiment of the present invention, a fast lookup device is used for receiving a packet and includes a tag deserializer, an SRAM pool and a mapping table device. The tag deserializer is used for deserializing the packet to obtain a tag in the packet and a packet of information corresponding to the tag, wherein the tag or the packet information is a product identification code. The SRAM pool stores a product information in a memory address. The mapping table device uses a logic circuit to store a mapping table, and the mapping table is a correspondence table between the product identification code and a memory address of the SRAM pool. Wherein, the quick search device outputs the product information according to the memory address.

In one embodiment, the quick search device further obtains the memory address according to the product identification code, and then outputs the product information according to the memory address. In one embodiment, the mapping table device includes a comparison circuit group storing the mapping table. Preferably, the comparison circuit group includes multiple sets of comparison circuits, and a majority of comparison values have been preset in these comparison circuits. In one embodiment, the mapping table device further includes a configurable register for storing changed data of the mapping table.

In one embodiment, a transaction risk control device is used to receive a packet and includes a fast search device and a risk assessment engine. The fast lookup device includes a tag deserializer, an SRAM pool and a mapping table device. The tag deserializer is used for deserializing the packet to obtain a tag in the packet and a packet of information corresponding to the tag, wherein the tag or the packet information is a product identification code. The SRAM pool stores a product information in a memory address. The mapping table device uses a logic circuit to store a mapping table, and the mapping table is a correspondence table between the product identification code and the memory address of the SRAM pool. The risk assessment engine receives the product information from the SRAM pool according to the memory address, and then performs risk control processing on the transaction information contained in the packet according to the product information and a risk control condition stored in the risk assessment engine .

In one embodiment, the quick search device further obtains the memory address according to the product identification code, and then outputs the product information according to the memory address. In one embodiment, the mapping table device includes a comparison circuit group storing the mapping table. Preferably, the comparison circuit group includes multiple sets of comparison circuits, and a majority of comparison values have been preset in these comparison circuits. In one embodiment, the mapping table device further includes a configurable register for storing changed data of the mapping table.

According to an embodiment of the present invention, since the fast lookup device includes a mapping table device using a logic circuit to store a mapping table, the effect of the fast operation of the logic circuit can be fully utilized, and a memory address addr can be output more quickly, so that it can be accessed more quickly. The SRAM pool obtains product information (Info of Product), which in turn can speed up transaction processing and reduce transaction delays.

FIG. 1 shows a schematic diagram of the structure of a trading system according to an embodiment of the present invention. As shown in FIG. 1 , the transaction system 100 includes an operation center host 151 , a transaction risk control device 120 and a user device 153 . The transaction risk control device 120 is connected to an operation center host 151 and a user device 153, for example, the operation center host 151 and the transaction risk control device 120 can be connected through the network 111, and the transaction risk control device 120 and the user device can be connected through the line 112 153. The transaction risk control device 120 can be connected to a network transmission device of the user device 153 . The user device 153 and the operation center host 151 transmit data packets through the transaction risk control device 120 for transaction. In actual application, the user can send a transaction message to the operation center host 151 through the user device 153 through the transaction risk control device 120 .

The transaction risk control device 120 can reduce transaction delay and provide risk control. After receiving a package 113, the transaction risk control device 120 can quickly deserialize the package 113, find out the label in the package 113 and the product information corresponding to the label, and quickly perform risk control processing on the package 113, and It can solve the situation that the transaction is delayed due to risk control in the usual transaction method. In one embodiment, the packet 113 may be a transaction packet or a reply packet.

FIG. 2 shows a schematic diagram of a transaction risk control device according to an embodiment of the present invention. FIG. 3 shows a schematic diagram of the connection between the mapping table device and the SRAM pool in the transaction risk control device according to an embodiment of the present invention. As shown in FIG. 2 , the transaction risk control device 120 includes a fast search device 210 , a tag M-2 deserializer 221 , a tag M-1 deserializer 231 and a risk assessment engine 222 . In one embodiment, the tag M-2 deserializer 221 and the tag M-1 deserializer 231 are respectively used to deserialize the packet 113 to obtain the tag in the packet 113 and the packet information corresponding to the tag. The risk assessment engine 222 uses the tag and the packet information to obtain information of a product, and then performs risk control processing on the transaction information included in the packet 113 according to the product information and the risk control conditions stored therein.

In order to speed up the processing of transaction information, in one embodiment, the transaction risk control device 120 enables the fast search device 210 to receive the package 113, and uses the fast search device 210 to obtain the label and package information in the package 113, and then uses the label and the package Information, so as to obtain a product information more quickly. The risk assessment engine 222 receives the product information, and performs risk control processing on the transaction information included in the packet 113 according to the product information and the risk control conditions stored therein. Hereinafter, the operation of the quick search device 210 will be described in more detail.

As shown in FIGS. 2 and 3 , the fast lookup device 210 includes a tag N deserializer 211 , a mapping table device 212 and a static random access memory pool (Static Random Access Memory Pool, SRAM pool) 213 . The tag N deserializer 211 deserializes the packet 113 to obtain the tag in the packet 113 and the packet information corresponding to the tag. In one embodiment, the tag or packet information in the packet 113 may be a product identification code (product ID), and the packet 113 is deserialized by the tag N deserializer 211 to output the product ID. As shown in FIG. 3 , after receiving the product ID, the mapping table device 212 outputs an address addr, which is a memory address addr in the SRAM pool 213 storing product information corresponding to the product ID. The risk assessment engine 222 obtains product information (Info of Product) from the SRAM pool 213 according to the memory address addr. Then, according to the product information and the risk control conditions stored therein, risk control processing is performed on the transaction information contained in the packet 113 .

Preferably, the mapping table device 212 is a logic device, and uses a logic circuit to store a mapping table, and the mapping table is a corresponding table of a product ID to the memory address addr of the SRAM pool 213 . In one embodiment, the mapping table device 212 includes a comparison circuit group 241 , and the comparison circuit group 241 includes tens of thousands of parallel processing comparison circuits, and the mapping table is stored in the comparison circuit group 241 . Preferably, in these tens of thousands of comparison circuits, most of the predetermined comparison values have been preset. In one embodiment, for the sake of simplicity in circuit design and reduction of the size of the circuit, most of the comparison values are set as fixed value, that is, written in these circuits immutably. Therefore, the mapping table stored in the comparison circuit group 241 is data that cannot be modified. More specifically, the comparison circuits of the comparison circuit group 241 having the comparison values are configured to allow the mapping table device 212 to output the address addr after receiving the product ID, and because those skilled in the art can rely on In the foregoing description, the circuits of the comparison circuit group 241 are designed, so the description of the specific design of the circuits is omitted. In addition, the comparison circuit group 241 can use existing or future technologies. In this embodiment, in order to perform a fast search function, a logic circuit is used to perform a fast search, so that the risk assessment engine 222 can receive the product information from the SRAM pool 213 more quickly, and then according to the product information and The risk control conditions stored therein perform risk control processing on the transaction information contained in the packet 113 .

According to the conventional technology, the user device 153 uses software to deserialize the packet 113 and search for product information. However, such a method requires a microprocessor or a computer's central processing unit (CPU) to perform calculations, and then obtain the product information from a database stored in a hard disk, which increases transaction delays. In contrast, according to an embodiment of the present invention, a quick search device 210 is provided, which can directly deserialize a packet 113, obtain the label and packet information in the packet 113, and use a logic based on the label or packet information The mapping table device 212 that stores a mapping table in the circuit quickly obtains a memory address addr, and then outputs the product information (Info of Product) corresponding to the package according to the memory address addr of the SRAM pool 213 . Therefore, compared with the prior art, transaction processing can be accelerated, and transaction delays can be reduced.

In the stock market, listed companies may be added or withdrawn due to various reasons. However, in the embodiment where the mapping table device 212 only includes the comparison circuit group 241, the data of the mapping table cannot be changed, which lacks adaptability. In an embodiment, preferably, the mapping table device 212 may further include a configurable register (Register) 242 for storing newly added, modified or future changeable data. That is, the information of future changes can be stored in the configurable register (Register) 242 .

According to an embodiment of the present invention, since the fast lookup device 210 includes a mapping table device 212 using a logic circuit to store a mapping table, it can make full use of the effect of the fast operation of the logic circuit to output a memory address addr more quickly, so that it can be more quickly The product information (Info of Product) can be obtained from the SRAM pool 213 in a timely manner, thereby speeding up transaction processing and reducing transaction delay.

100: Trading System 111: Network 112: line 113: packet 120: Trading risk control device 151: Operation center host 153: user device 210:Quick search device 211: Tag N deserializer 212: mapping table device 213: SRAM pool 221: Tag M-2 deserializer 222:Risk assessment engine 231: Tag M-1 deserializer 241: Comparison circuit group 242: Configurable scratchpad

FIG. 1 shows a schematic diagram of the structure of a trading system according to an embodiment of the present invention. FIG. 2 shows a schematic diagram of a transaction risk control device according to an embodiment of the present invention. FIG. 3 shows a schematic diagram of the connection between the mapping table device and the SRAM pool in the fast lookup device according to an embodiment of the present invention.

113: packet

120: Trading risk control device

210:Quick search device

211: Tag N deserializer

212: mapping table device

213: SRAM pool

221: Tag M-2 deserializer

222:Risk assessment engine

231: Tag M-1 deserializer

Claims (10)

A quick search device, used to output a product information corresponding to the package after receiving a package, the quick search device includes: A tag deserializer, used to deserialize the packet to obtain a tag in the packet and a packet of information corresponding to the tag, wherein the tag or the packet information is a product identification code; a SRAM pool, the product information is stored in a memory address of the SRAM pool; and A mapping table device, using a logic circuit to store a mapping table, the mapping table is a correspondence table between the product identification code and the memory address of the SRAM pool, Wherein, the quick search device outputs the product information according to the memory address. According to the quick search device described in claim 1, wherein the quick search device further obtains the memory address according to the product identification code, and then outputs the product information according to the memory address. According to the fast lookup device described in Claim 2, wherein the mapping table device includes a comparison circuit group storing the mapping table. According to the fast search device described in Claim 3, wherein the comparison circuit group includes multiple sets of comparison circuits, and a majority of comparison values are preset in these comparison circuits. According to the fast search device described in claim 3, wherein the mapping table device further includes a configurable register for storing changed data of the mapping table. A transaction risk control device, used to receive a package, and includes: A quick finder includes: A tag deserializer, used to deserialize the packet to obtain a tag in the packet and a packet of information corresponding to the tag, wherein the tag or the packet information is a product identification code; a SRAM pool, the product information is stored in a memory address of the SRAM pool; and A mapping table device, using a logic circuit to store a mapping table, the mapping table is a correspondence table between the product identification code and the memory address of the SRAM pool; and A risk assessment engine receives the product information from the SRAM pool according to the memory address, and then performs risk control on the transaction information contained in the packet according to the product information and a risk control condition stored in the risk assessment engine tube processing. According to the transaction risk control device described in claim 6, wherein the quick search device further obtains the memory address according to the product identification code, and then outputs the product information according to the memory address. The transaction risk control device according to claim 7, wherein the mapping table device includes a comparison circuit group storing the mapping table. According to the transaction risk control device described in Claim 8, wherein the comparison circuit group includes multiple sets of comparison circuits, and a majority of comparison values have been preset in these comparison circuits. According to the transaction risk control device described in Claim 8, wherein the mapping table device further includes a configurable register for storing changed data of the mapping table.

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