TW202306195A - Led epitaxy structure and manufacturing method thereof, and led device - Google Patents

Abstract

An LED epitaxial structure (100), comprising an n-type semiconductor layer (20), a multi-quantum well active layer (30), and a p-type semiconductor layer (40) which are stacked sequentially. The multi-quantum well active layer (30) comprises at least three barrier layers (31) and at least two potential well layers (32), and the barrier layers (31) and the potential well layers (32) are stacked alternately, wherein the barrier layer (31) comprises a first barrier sub-layer (311), a second barrier sub-layer (312), and a third barrier sub-layer (313) which are stacked sequentially, and the second barrier sub-layer (312) comprises an AlyGa1-yAs oxide layer (3121). Also disclosed are an LED device and a method for manufacturing an LED epitaxial structure.

Description

LED epitaxial structure and manufacturing method thereof, LED device

The invention relates to the technical field of semiconductor light emitting, in particular to an LED epitaxial structure, a manufacturing method thereof, and an LED device.

Due to the advantages of low power consumption, small size, long life, low driving voltage, durability and good monochromaticity, LED devices are widely used in display technology, signal lights, automotive interior and exterior lights, traffic lights, mobile phones, electronic instruments, Indoor and outdoor display, information processing, communication and other fields.

The epitaxial structure of red LED devices includes multi-quantum well active layers. At present, the barrier layer of most multi-quantum well active layers is (Al _x Ga _1-x ) _0.5 In _0.5 P layer, and the range of x is 0.5≤ x≤1.0, as x increases, that is, the content of Al in (Al _x Ga _1-x ) _0.5 In _0.5 P increases, impurities such as oxygen and carbon in the barrier layer will increase significantly, resulting in an increase in the probability of non-radiative recombination , reducing the luminous efficiency of the multi-quantum well active layer; in addition, even if the value of x is 1.0, the forbidden band width of (Al _x Ga _1-x ) _0.5 In _0.5 P is about 2.26eV, and the barrier layer and potential well layer The energy level difference is small, and the electronic barrier to the transition barrier layer is limited, which leads to serious attenuation of luminous efficiency, low reverse bias resistance, and poor antistatic ability in red LED devices.

In view of the deficiencies in the prior art above, the purpose of this application is to provide a method for manufacturing an LED epitaxial structure, an LED device, and an LED epitaxial structure, aiming at increasing the equivalent band gap of the barrier layer, and effectively improving the barrier layer and the potential well. The energy level difference of the layer enhances the confinement of electrons by the barrier layer and strengthens the quantization effect of the multi-quantum well active layer, thereby improving the internal quantum efficiency, light extraction efficiency, reverse bias resistance and antistatic ability of LED devices, etc. .

An LED epitaxial structure, the LED epitaxial structure includes: an n-type semiconductor layer, a multi-quantum well active layer and a p-type semiconductor layer stacked in sequence, the multi-quantum well active layer includes at least three barrier layers and at least Two layers of potential well layers, the potential barrier layers and the potential well layers are alternately stacked, wherein the potential barrier layer includes the first sublayer of the potential barrier, the second sublayer of the potential barrier and the second sublayer of the potential barrier that are sequentially stacked. Three sublayers, the second sublayer of the potential barrier includes an oxide layer of _{AlyGa1 -yAs} .

In the above-mentioned LED epitaxial structure, the barrier layer of the multi-quantum well active layer includes an oxide layer of _{AlyGa1 -yAs} , and the oxide of _{AlyGa1 -yAs} is a wide bandgap material, so that the The energy level difference between the barrier layer and the potential well layer is larger, which can effectively enhance the confinement of electrons by the barrier layer and enhance the quantization effect of the multi-quantum well active layer, thereby effectively improving the light extraction efficiency of the LED device , internal quantum efficiency, reverse bias resistance and antistatic ability.

Optionally, the range of y in the _{AlyGa 1-y} As oxide is 0.8≤y≤1.0.

Optionally, the thickness of the _{AlyGa1 -yAs} oxide layer ranges from 0.5nm to 3nm.

Optionally, both the first barrier sublayer and the third barrier sublayer include (Al _x Ga _1-x ) _0.5 In _0.5 P layers.

Optionally, the value range of x in (Al _x Ga _1-x ) _0.5 In _0.5 P is 0.5≤x≤0.8.

Optionally, the (Al _x Ga _1-x ) _0.5 In _0.5 P layer has a thickness ranging from 1 nm to 6 nm.

Optionally, the potential well layer includes a (Al _m Ga _1-m ) _0.5 In _0.5 P layer.

Optionally, the (Al _m Ga _1-m ) _0.5 In _0.5 P layer has a thickness ranging from 3 nm to 10 nm.

Optionally, the multi-quantum well active layer includes 3 to 21 layers of the potential barrier layer and 2 to 20 layers of the potential well layer, wherein the number of layers of the potential barrier layer is greater than that of the potential well layer One more layer.

Based on the same inventive concept, the present application also provides an LED device, which includes an n-electrode, a p-electrode and the aforementioned LED epitaxial structure, the n-electrode is electrically connected to the n-type semiconductor layer, and the p-electrode is connected to the n-type semiconductor layer. The p-type semiconductor layers are electrically connected.

Based on the same inventive concept, the present application also provides a method for manufacturing an LED epitaxial structure. The method for manufacturing an LED epitaxial structure includes the following steps: providing a substrate; forming an n-type semiconductor layer on the substrate; A multi-quantum well active layer is formed on the side of the multi-quantum well active layer away from the substrate; a p-type semiconductor layer is formed on the side of the multi-quantum well active layer away from the n-type semiconductor layer; wherein, the multi-quantum well active layer is formed on the side away from the n-type semiconductor layer; The quantum well active layer includes forming a potential barrier layer on the side of the n-type semiconductor layer away from the substrate, forming a potential well layer on the side of the barrier layer away from the n-type semiconductor layer, and repeating alternately Forming the barrier layer and the potential well layer to form at least three barrier layers and at least two potential well layers, the barrier layer includes the first sub-layer of the potential barrier and the second sub-layer of the potential barrier formed sequentially. layer and a third sublayer of the barrier, the second sublayer of the barrier includes an oxide layer of _{AlyGa1 -yAs} .

In the manufacturing method of the above-mentioned LED epitaxial structure, the barrier layer of the multi-quantum well active layer formed includes an oxide layer of _{AlyGa1 -} yAs, and the oxide layer of _{AlyGa1 -yAs} is a wide range of band material, so that the energy level difference between the barrier layer and the potential well layer is larger, which can effectively enhance the confinement of electrons by the barrier layer and enhance the quantization effect of the multi-quantum well active layer, thereby effectively improving The internal quantum efficiency, light extraction efficiency, reverse bias resistance performance and antistatic ability of LED devices.

Optionally, both the first barrier sublayer and the third barrier sublayer include a (Al _x Ga _1-x ) _0.5 In _0.5 P layer, and the A barrier layer is formed on one side, including: passing through phosphine and a first proportion of trimethylgallium, trimethylaluminum, and trimethylindium, so as to be formed on the side of the n-type semiconductor layer away from the substrate (Al _x Ga _{1-x ) 0.5 In 0.5} P layer; arsine _, trimethylgallium and _{trimethylaluminum} are introduced to deviate from the n A layer of A _y Ga _1-y As is formed on one side of the type semiconductor layer; phosphine and a first ratio of trimethylgallium, trimethylaluminum, and trimethylindium are introduced to form an AlyGa 1-y As layer on the _{AlyGa 1-y} forming (Al _x Ga _1-x ) _0.5 In _0.5 P layer on the As layer; performing oxidation treatment on the Aly _{Ga 1-y} As layer to oxidize the Aly _{Ga 1-y} As layer to form A _y Ga Oxide layer of _1-y As.

Optionally, the formation of a potential well layer on the side of the barrier layer away from the n-type semiconductor layer includes: introducing phosphine and a second proportion of trimethylgallium, trimethylaluminum, trimethyl Indium-based, to form a (Al _m Ga _1-m ) _0.5 In _0.5 P layer on the side of the barrier layer away from the n-type semiconductor layer.

In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Preferred embodiments of the application are shown in the accompanying drawings. However, the present application can be embodied in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the application more thorough and comprehensive.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terminology used herein in the description of the application is only for the purpose of describing specific embodiments, and is not intended to limit the application.

In the description of the present application, the terms "first", "second", "third", etc. are used to distinguish different items, rather than to describe a specific order. In addition, the terms "upper", "inner", "outer ” and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, which are only for the convenience of describing the application and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, use a specific configuration and operation, and therefore should not be construed as limiting the application.

It should be noted that the diagrams provided in the embodiments of the application are only schematically illustrating the basic idea of the application, although the diagrams only show components related to the application rather than the number and shape of elements in actual implementation and dimensional drawing, the shape, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the layout of the components may also be more complicated.

Please refer to FIG. 1 . FIG. 1 is a schematic cross-sectional structure diagram of an LED epitaxial structure 100 provided by an embodiment of the present application. As shown in FIG. 1 , the LED epitaxial structure 100 includes an n-type semiconductor layer 20, a multi-quantum well active layer 30 and a p-type semiconductor layer 40 stacked in sequence, and the multi-quantum well active layer 30 includes at least three layers of barriers. Layer 31 and at least two layers of potential well layers 32, the barrier layers 31 and the potential well layers 32 are alternately stacked, wherein the barrier layer 31 includes the first sub-layer 311 of the potential barrier, the potential The barrier second sublayer 312 and the barrier third sublayer 313, the barrier second sublayer 312 includes an oxide layer 3121 of _{AlyGa1 -yAs} . In this embodiment, the first barrier sublayer 311 is arranged closer to the n-type semiconductor layer 20 than the third barrier sublayer 313 .

In the LED epitaxial structure 100 provided in the embodiment of the present application, the barrier layer 31 of the multi-quantum well active layer 30 includes an oxide layer 3121 of _{AlyGa1 -yAs} , and the oxide layer of _{AlyGa1 -yAs} is The wide bandgap material makes the energy level difference between the barrier layer 31 and the potential well layer 32 larger, which can effectively enhance the confinement of the barrier layer 31 to electrons and enhance the quantization effect of the multi-quantum well active layer, thereby effectively Improve the luminous efficiency, reverse bias resistance performance and antistatic ability of LED devices.

Wherein, the value range of y in the oxide of Al _y Ga _1-y As is 0.8≤y≤1.0.

Wherein, the thickness range of the oxide layer 3121 of _{AlyGa1 -yAs} is 0.5nm-3nm, and the thickness of the oxide layer 3121 of _{AlyGa1 -} yAs is the oxide layer 3121 of _{AlyGa1 -yAs} Dimensions parallel to the lamination direction. When the thickness of the oxide layer 3121 of _{AlyGa 1-y} As exceeds 3nm, the barrier layer 31 will seriously block the transition of carriers and affect the radiative recombination between carriers; when _{AlyGa 1-y} When the thickness of the As oxide layer 3121 is less than 0.5 nm, the restriction effect of the barrier layer 31 on electrons is limited. In some embodiments, the oxide of _{AlyGa 1-y} As is an oxide of non-actively doped _{AlyGa 1-y} As, and the oxide of non-actively doped _{AlyGa 1-yAs} supports The absorption of the carrier is weak, which can improve the luminous efficiency.

Wherein, both the first barrier sublayer 311 and the third barrier sublayer 313 include (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111, and the range of x is 0.5≤x≤0.8, (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 has a thickness ranging from 1 nm to 6 nm, and the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 has a thickness of (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 in Dimensions parallel to the lamination direction. When the thickness of the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 exceeds 6 nm, the barrier layer 31 will seriously block the transition of carriers and affect the radiative recombination between carriers; when (Al _x Ga _1-x ) When the thickness of _{the 0.5} In _0.5 P layer 3111 is less than 1 nm, the barrier layer 31 has a limited effect on electron confinement. In some embodiments, (Al _x Ga _1-x ) _0.5 In _0.5 P is non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P, non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P has weak carrier absorption, which can improve the luminous efficiency.

Wherein, the potential well layer 32 includes (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321, the thickness range of (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 is 3 nm-10 nm, (Al _m Ga _1- The thickness of _{the m} ) _0.5 In _0.5 P layer 321 is the dimension of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 parallel to the stacking direction. When the thickness of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 exceeds 10 nm, the wave function overlap of the multi-quantum well active layer 30 is small, which blocks the migration of carriers and reduces the efficiency of the internal quantum well; when When the thickness of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 is less than 3 nm, the carriers are likely to overflow the potential well layer 32 , thereby reducing the radiation recombination efficiency. Wherein, the value of m can be set according to the wavelength of light emitted by the LED device, and the longer the wavelength, the smaller the value of m. In some embodiments, (Al _m Ga _1-m ) _0.5 In _0.5 P is non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P, non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P has weak absorption of carriers and photons, which can improve the luminous efficiency.

Wherein, the multi-quantum well active layer 30 includes 3 to 21 barrier layers 31 and 2 to 20 potential well layers 32 , wherein the number of barrier layers 31 is one more than the number of potential well layers 32 . Each barrier layer 31 and an adjacent potential well layer 32 form a multi-quantum well period, and the aforementioned multi-quantum well active layer 30 includes 2 to 20 multi-quantum well periods. The number of multi-quantum well periods is generally no more than 20. When the number of multi-quantum well periods is too large, the overall thickness of the multi-quantum well active layer 30 will increase the non-radiative recombination of carriers in the multi-quantum well active layer 30, and Affect luminous efficiency; when the number of multi-quantum well periods is too small, the barrier layer 31 of the multi-quantum well active layer 30 and the electron blocking layer of the LED device cannot confine most electrons in the multi-quantum well active layer 30, causing electron overflow to cause Luminous efficiency decreases.

Among them, the oxides of Al _y Ga _1-y As include aluminum oxide and gallium oxide, and aluminum oxide has a wide bandgap, which can effectively increase the energy level difference between the barrier layer 31 and the potential well layer 32, and enhance the potential barrier Confinement effect of layer 31 on electrons.

Please refer to FIG. 2 . FIG. 2 is a schematic cross-sectional structure diagram of an LED epitaxial structure 100 provided in another embodiment of the present application. As shown in FIG. 2 , in some embodiments, the n-type semiconductor layer 20 of the LED epitaxial structure 100 includes a buffer layer 21 , an n-type ohmic contact layer 22 , an n-type current spreading layer 23 , and an n-type confinement layer 24 which are sequentially stacked. And the n-type waveguide layer 25 , wherein the buffer layer 21 is arranged farther away from the multi-quantum well active layer 30 than the n-type waveguide layer 25 .

Wherein, the buffer layer 21 may be a GaAs layer, which is used to isolate and block impurities from entering the n-type ohmic contact layer 22 .

Wherein, the n-type ohmic contact layer 22 can be an (Al _a Ga _1-a ) _0.5 In _0.5 P layer, and the range of a is 0.3≤a≤0.6, which is used to form an ohmic contact with the n-electrode.

Wherein, the n-type current spreading layer 23 can be an (Al _b Ga _1-b ) _0.5 In _0.5 P layer, and the value range of b is 0.5≤b≤1.0. In the active layer 30, the n-type current spreading layer 23 can make the current density reaching the multi-quantum well active layer 30 uniform, and the uniform current distribution can improve the luminous efficiency.

Wherein, the n-type confinement layer 24 can be an AlInP layer, and the band gap of the n-type confinement layer 24 is greater than the multi-quantum well active layer 30, holes can be confined in the multi-quantum well active layer 30, and the uniformity of electron expansion can be improved. properties, so that electrons and holes radiatively recombine in the MQW active layer 30 .

Wherein, the n-type waveguide layer 25 may be an (Al _c Ga _1-c ) _0.5 In _0.5 P layer, and the range of c is 0.5≤c≤1.0. The refractive index of the n-type waveguide layer 25 is lower than that of the multi-quantum well active layer 30, so that the light beam emitted by the multi-quantum well active layer 30 is totally reflected at the junction of the n-type waveguide layer 25 and the multi-quantum well active layer 30, Therefore, the light beam can be emitted in a concentrated manner, thereby improving the light extraction efficiency.

In some embodiments, the p-type semiconductor layer 40 includes a p-type waveguide layer 41, a p-type confinement layer 42, a transition layer 43, a p type current spreading layer 44 and p-type ohmic contact layer 45.

Wherein, the p-type waveguide layer 41 can be (Al _d Ga _1-d ) _0.5 In _0.5 P layer, the value range of d is 0.5≤d≤1.0, and the refractive index of the p-type waveguide layer 41 is lower than that of the multiple quantum well active layer 30, so that the light beam emitted by the multi-quantum well active layer 30 is totally reflected at the junction of the p-type waveguide layer 41 and the multi-quantum well active layer 30, so that the light beam can be emitted concentratedly, thereby improving the light extraction efficiency.

Wherein, the p-type confinement layer 42 can be an AlInP layer, and the band gap of the p-type confinement layer 42 is greater than the multi-quantum well active layer 30, and electrons can be confined in the multi-quantum well active layer 30, so that electrons and holes are Radiative recombination in the multiple quantum well active layer 30 .

Wherein, the p-type current spreading layer 44 may be a GaP layer for forming an ohmic contact with the p-electrode.

Wherein, the transition layer 43 can be an (Al _e Ga _1-e ) _0.5 In _0.5 P layer, which is arranged between the p-type confinement layer 42 and the p-type current spreading layer 44, and acts as a lattice transition to reduce the p-type confinement layer. The lattice mismatch between the layer 42 and the p-type current spreading layer 44 reduces the defect density of the p-type current spreading layer 44 .

Wherein, the p-type ohmic contact layer 45 may be a GaP layer for forming an ohmic contact with the p-electrode.

To sum up, in the LED epitaxial structure provided by the embodiment of the present application, the barrier layer 31 of the multi-quantum well active layer 30 includes the oxide layer 3121 of _{AlyGa 1-y} As, and the oxide layer 3121 of _{AlyGa 1-y} As The substance is a wide bandgap material, so that the energy level difference between the potential barrier layer 31 and the potential well layer 32 is larger, which can effectively enhance the confinement of the barrier layer 31 to electrons and enhance the quantization effect of the multi-quantum well active layer 30 , so as to effectively improve the internal quantum efficiency, light extraction efficiency, reverse bias resistance performance and antistatic ability of LED devices.

The embodiment of the present application also provides an LED device, the LED device includes the LED epitaxial structure provided by any of the foregoing embodiments, wherein the LED device further includes an n-electrode and a p-electrode, the n-electrode is electrically connected to the n-type semiconductor layer 20, and the p-electrode It is electrically connected to the p-type semiconductor layer 40 .

Wherein, in some embodiments, the n-type semiconductor layer 20 includes an n-type ohmic contact layer 22, and the n-electrode is electrically connected to the n-type ohmic contact layer 22; the p-type semiconductor layer 40 includes a p-type ohmic contact layer 45, and the p-electrode is electrically connected to the p-type semiconductor layer 45. Type ohmic contact layer 45 is electrically connected.

Please refer to FIG. 1 to FIG. 3 together. FIG. 3 is a flowchart of a method for manufacturing an LED epitaxial structure provided in an embodiment of the present application. The method for manufacturing an LED epitaxial structure is used to manufacture an LED epitaxial structure provided in any of the foregoing embodiments. As shown in Figure 3, the manufacturing method of the LED epitaxial structure includes the following steps:

S101: Provide a substrate.

S102: forming an n-type semiconductor layer 20 on the substrate.

S103: Forming the multi-quantum well active layer 30 on the side of the n-type semiconductor layer 20 away from the substrate, wherein forming the multi-quantum well active layer 30 includes forming a barrier layer on the side of the n-type semiconductor layer 20 away from the substrate 31, forming a potential well layer 32 on the side of the barrier layer 31 away from the n-type semiconductor layer 20, and repeatedly forming the potential barrier layer 31 and the potential well layer 32 alternately to form at least three barrier layers 31 and at least two layers of potential wells Layer 32, the barrier layer 31 includes the first barrier sublayer 311, the second barrier sublayer 312 and the third barrier sublayer 313 formed sequentially, the second barrier sublayer 312 includes Al _y Ga _1-y As oxide layer 3121 .

S104: forming a p-type semiconductor layer 40 on a side of the multi-quantum well active layer 30 away from the n-type semiconductor layer 20 .

In the manufacturing method of the LED epitaxial structure provided in the embodiment of the present application, the barrier layer 31 of the multi-quantum well active layer 30 formed includes the oxide layer 3121 of _{AlyGa 1-y} As, and the oxide layer 3121 of _{AlyGa 1-y} As The substance is a wide bandgap material, so that the energy level difference between the potential barrier layer 31 and the potential well layer 32 is larger, which can effectively enhance the confinement of the barrier layer 31 to electrons and enhance the quantization effect of the multi-quantum well active layer 30 , so as to effectively improve the internal quantum efficiency, light extraction efficiency, reverse bias resistance performance and antistatic ability of LED devices.

Wherein, the material of the substrate may be GaAs, which provides support for other film layers.

Wherein, the value range of y in the oxide of Al _y Ga _1-y As is 0.8≤y≤1.0.

Wherein, the thickness range of the oxide layer 3121 of _{AlyGa1 -yAs} is 0.5nm-3nm, and the thickness of the oxide layer 3121 of _{AlyGa1 -} yAs is the oxide layer 3121 of _{AlyGa1 -yAs} Dimensions parallel to the lamination direction. When the thickness of the oxide layer 3121 of _{AlyGa1 -yAs} exceeds 3nm, the barrier layer 31 will seriously block the transition of carriers and affect the radiative recombination between carriers. In some embodiments, the oxide of _{AlyGa 1-y} As is an oxide of non-actively doped _{AlyGa 1-y} As, and the oxide of non-actively doped _{AlyGa 1-yAs} supports The absorption of the carrier is weak, which can improve the luminous efficiency.

Wherein, both the first barrier sublayer 311 and the third barrier sublayer 313 include (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111, and the range of x is 0.5≤x≤0.8, (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 has a thickness ranging from 1 nm to 6 nm, and the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 has a thickness of (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 in Dimensions parallel to the stacking direction. When the thickness of the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 exceeds 6 nm, the barrier layer 31 will seriously block the transition of carriers and affect the radiative recombination between carriers; when (Al _x Ga _1-x ) When the thickness of _{the 0.5} In _0.5 P layer 3111 is less than 1 nm, the barrier layer 31 has a limited effect on electron confinement. In some embodiments, (Al _x Ga _1-x ) _0.5 In _0.5 P is non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P, non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P has weak carrier absorption, which can improve the luminous efficiency.

Wherein, the potential well layer 32 includes (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321, the thickness range of (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 is 3 nm-10 nm, (Al _m Ga _1- The thickness of _{the m} ) _0.5 In _0.5 P layer 321 is the dimension of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 parallel to the stacking direction. When the thickness of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 exceeds 10 nm, the wave function overlap of the multi-quantum well active layer 30 is small, which blocks the migration of carriers and reduces the efficiency of the internal quantum well; when When the thickness of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 is less than 3 nm, the carriers are likely to overflow the potential well layer 32 , thereby reducing the radiation recombination efficiency. Wherein, the value of m can be set according to the wavelength of light emitted by the LED device, and the longer the wavelength, the smaller the value of m. In some embodiments, (Al _m Ga _1-m ) _0.5 In _0.5 P is non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P, non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P has weak absorption of carriers and photons, which can improve the luminous efficiency.

Wherein, the MQW active layer 30 includes 3 to 21 barrier layers 31 and 2 to 20 potential well layers 32 , wherein the number of barrier layers 31 is one more than the number of potential well layers 32 . Each barrier layer 31 and an adjacent potential well layer 32 form a multi-quantum well period, and the aforementioned multi-quantum well active layer 30 includes 2 to 20 multi-quantum well periods. The number of multi-quantum well periods generally does not exceed 20. When the number of multi-quantum well periods is too large, the overall thickness of the multi-quantum well active layer 30 will increase the non-radiative recombination of carriers in the multi-quantum well active layer 30, and Affect luminous efficiency; when the number of MQW periods is too small, the barrier layer 31 of the MQW active layer 30 and the electron blocking layer of the LED device cannot confine most electrons in the MQW active layer 30, so that electrons overflow to The p-type semiconductor layer 40 causes reduction in luminous efficiency.

Please refer to FIG. 1 and FIG. 4 together. FIG. 4 is a flow chart of the method for forming the barrier layer 31 provided by the embodiment of the present application. As shown in FIG. 4 , both the first barrier sublayer 311 and the third barrier sublayer 313 include an (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111, on the side of the n-type semiconductor layer 20 away from the substrate Forming the barrier layer 31 includes the following steps:

S1031: Passing phosphine and a first ratio of trimethylgallium, trimethylaluminum, and trimethylindium to form (Al _x Ga _1-x ) _0.5 In on the side of the n-type semiconductor layer 20 away from the substrate _0.5 P layer 3111.

S1032: Passing arsine, trimethylgallium and trimethylaluminum to form _{AlyGa1 -yAs} on the side _of the ( _{AlxGa1 -x} ) _0.5In0.5P layer 3111 away from the n-type semiconductor layer 20 layer.

S1033: Passing phosphine and the first ratio of trimethylgallium, trimethylaluminum, and trimethylindium to form ( _{Al x Ga 1-x} ) _0.5 In _0.5 P on the AlyGa _1-y As layer Layer 3111.

S1034: Perform oxidation treatment on the _{AlyGa1 -yAs} layer to form an _{AlyGa1 -yAs} oxide layer 3121 by oxidizing the _{AlyGa1 -yAs} layer.

Among them, arsine, trimethylgallium and trimethylaluminum undergo a thermal decomposition reaction to generate _{AlyGa 1-y} As, and the oxide of _{AlyGa 1-y} As is generated by oxidizing _{AlyGa 1-y} As. Among them, the oxides of Al _y Ga _1-y As include aluminum oxide and gallium oxide, and aluminum oxide has a wide bandgap, which can effectively increase the energy level difference between the barrier layer 31 and the potential well layer 32, and enhance the potential barrier Confinement effect of layer 31 on electrons. Moreover, when the carriers pass through the oxide layer 3121 of _{AlyGa1 -yAs} , they mainly transition through tunneling, which can shield defects and conduct electricity, and can reduce the transient increase of current, thereby improving the reverse bias resistance performance of LED devices and antistatic properties.

Wherein, the value range of y in the oxide of Al _y Ga _1-y As is 0.8≤y≤1.0.

Wherein, the thickness range of the oxide layer 3121 of _{AlyGa1 -yAs} is 0.5nm-3nm, and the thickness of the oxide layer 3121 of _{AlyGa1 -} yAs is the oxide layer 3121 of _{AlyGa1 -yAs} Dimensions parallel to the lamination direction. When the thickness of the oxide layer 3121 of _{AlyGa1 -yAs} exceeds 3nm, the barrier layer 31 will seriously block the transition of carriers and affect the radiative recombination between carriers. In some embodiments, the oxide of _{AlyGa 1-y} As is an oxide of non-actively doped _{AlyGa 1-y} As, and the oxide of non-actively doped _{AlyGa 1-yAs} has a positive effect on the carrier The absorption of sub-substances is weak, which can improve the luminous efficiency.

Wherein, the value range of x in (Al _x Ga _1-x ) _0.5 In _0.5 P is 0.5≤x≤0.8.

Wherein, the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 has a thickness ranging from 1 nm to 6 nm, and the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 has a thickness of (Al _x Ga _1-x ) _0.5 The dimensions of the In _0.5 P layer 3111 parallel to the stacking direction. When the thickness of the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 exceeds 6 nm, the barrier layer 31 will seriously block the transition of carriers and affect the radiative recombination between carriers; when (Al _x Ga _1-x ) When the thickness of _{the 0.5} In _0.5 P layer 3111 is less than 3 nm, the restriction effect of the barrier layer 31 on electrons is limited.

Among them, the conditions for forming the _{AlyGa 1-y} As layer include: the temperature is 650°C-700°C, the pressure is 50mbar-80mbar, and V/III is 50-100, wherein, V/III is the source of Group V and the source of Group III The ratio of the gas flow rate, the group V source includes arsine, and the group III source includes at least one of trimethylgallium and trimethylaluminum. Under this process condition, it is beneficial to form an _{AlyGa1 -yAs} layer with uniform thickness. In some embodiments, the _{AlyGa 1-y} As layer is a non-actively doped _{AlyGa 1-y} As layer, and the thermal decomposition reaction of arsine, trimethylgallium and trimethylaluminum will generate _{AlyGa 1-y} As and by-product carbon, and by controlling the process conditions such as temperature, pressure and Ⅴ/Ⅲ, the carbon in the by-product can enter _{AlyGa 1-yAs} to form non-actively doped _{AlyGa 1- y} As. The non-actively doped _{AlyGa 1-y} As is oxidized to form the non-actively doped _{AlyGa 1-yAs} oxide, and the non-actively doped _{AlyGa 1-yAs} oxide supports The absorption of the carrier is weak, which can improve the luminous efficiency.

Wherein, the conditions for forming the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 include: a temperature of 680°C-730°C, and a pressure of 50mbar-80mbar. Under this process condition, it is favorable to form the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 with uniform thickness. In some embodiments, the (Al _x Ga _1-x ) _0.5 In _0.5 P layer 3111 is a non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P layer, phosphine, trimethylgallium, trimethylgallium (Al _x Ga _1-x ) _0.5 In _0.5 P and the by-product carbon will be generated by the thermal decomposition reaction of base aluminum and trimethyl indium, and by controlling the process conditions such as temperature, pressure and Ⅴ/Ⅲ, the by-product can be made Carbon enters (Al _x Ga _1-x ) _0.5 In _0.5 P to form non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P. Non-actively doped (Al _x Ga _1-x ) _0.5 In _0.5 P has weak carrier absorption and can improve luminous efficiency.

Among them, the Al _y Ga _1-y As layer is oxidized, specifically, a mixed gas of oxygen or water vapor and nitrogen is introduced, the oxidation temperature is controlled at 400°C-500°C, and the gas flow rate of oxygen and water vapor is 5 sccm- 20sccm, while the _{AlyGa1 -yAs} layer is oxidized. Among them, when the oxidation treatment temperature is lower than 400°C, the oxidation rate is low, and the formation rate of the oxide of _{AlyGa 1-y} As is low, resulting in low production efficiency of LED devices; when the oxidation treatment temperature is higher than 500°C, the LED will be destroyed. The structure of the device. Under the conditions of 400°C-500°C and oxygen, Al _and Ga in AlyGa _1-yAs are easily oxidized to form alumina and gallium oxide.

In some embodiments, the aforementioned formation of the potential well layer 32 on the side of the barrier layer 31 away from the n-type semiconductor layer 20 includes: introducing phosphine and a second ratio of trimethylgallium, trimethylaluminum, trimethylgallium, and trimethylgallium. methyl indium, to form a (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 on the side of the barrier layer 31 away from the n-type semiconductor layer 20 .

Wherein, the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 has a thickness ranging from 3 nm to 10 nm, and the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 has a thickness of (Al _m Ga _1-m ) _0.5 The dimensions of the In _0.5 P layer 321 parallel to the stacking direction. When the thickness of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 exceeds 10 nm, the wave function overlap of the multi-quantum well active layer 30 is small, which blocks the migration of carriers and reduces the efficiency of the internal quantum well; when When the thickness of the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 is less than 3 nm, the carriers are likely to overflow the potential well layer 32 , thereby reducing the radiation recombination efficiency.

Wherein, the conditions for forming the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 include: the temperature is 680° C.-730° C., the pressure is 50 mbar-80 mbar and V/III is 100-200. Under this process condition, it is favorable to form the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 with a uniform thickness. In some embodiments, the (Al _m Ga _1-m ) _0.5 In _0.5 P layer 321 is a non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P layer, phosphine, trimethylgallium, trimethylgallium (Al _m Ga _1-m ) _0.5 In _0.5 P and the by-product carbon will be generated by the thermal decomposition reaction of base aluminum and trimethyl indium, and by controlling the temperature, pressure and Ⅴ/Ⅲ process conditions, the by-products can be made Carbon enters (Al _m Ga _1-m ) _0.5 In _0.5 P to form non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P. Non-actively doped (Al _m Ga _1-m ) _0.5 In _0.5 P has weak absorption of carriers and photons, which can improve luminous efficiency.

Please refer to FIG. 2 and FIG. 5 together. FIG. 5 is a subflow chart of step S102 in FIG. 3 . As shown in FIG. 5, in some embodiments, forming an n-type semiconductor layer 20 on a substrate includes the following steps:

S1021: Form a buffer layer 21 on the substrate.

S1022: Form an n-type ohmic contact layer 22 on a side of the buffer layer 21 away from the substrate.

S1023: Form an n-type current spreading layer 23 on a side of the n-type ohmic contact layer 22 away from the buffer layer 21 .

S1024: Form an n-type confinement layer 24 on a side of the n-type current spreading layer 23 away from the n-type ohmic contact layer 22 .

S1025: Form an n-type waveguide layer 25 on a side of the n-type confinement layer 24 away from the n-type current spreading layer 23 .

Among them, the buffer layer 21 , n-type ohmic contact layer 22 , n-type current spreading layer 23 , n-type confinement layer 24 and n-type waveguide layer 25 can be formed by MOCVD, PVD and other processes.

Wherein, the buffer layer 21 may be a GaAs layer, which is used to isolate and block defects and impurities on the substrate surface from entering the n-type ohmic contact layer 22 .

Wherein, the n-type ohmic contact layer 22 can be an (Al _a Ga _1-a ) _0.5 In _0.5 P layer, and the range of a is 0.3≤a≤0.6, which is used to form an ohmic contact with the n-electrode.

Wherein, the n-type current spreading layer 23 can be an (Al _b Ga _1-b ) _0.5 In _0.5 P layer, and the value range of b is 0.5≤b≤1.0. In the active layer 30, the n-type current spreading layer 23 can make the current density reaching the multi-quantum well active layer 30 uniform, and the uniform current distribution can improve the luminous efficiency.

Wherein, the n-type confinement layer 24 can be an AlInP layer, and the band gap of the n-type confinement layer 24 is greater than the multi-quantum well active layer 30, holes can be confined in the multi-quantum well active layer 30, and the uniformity of electron expansion can be improved. properties, so that electrons and holes radiatively recombine in the MQW active layer 30 .

Wherein, the n-type waveguide layer 25 may be an (Al _c Ga _1-c ) _0.5 In _0.5 P layer, and the range of c is 0.5≤c≤1.0. The refractive index of the n-type waveguide layer 25 is lower than that of the multi-quantum well active layer 30, so that the light beam emitted by the multi-quantum well active layer 30 is totally reflected at the junction of the n-type waveguide layer 25 and the multi-quantum well active layer 30, Therefore, the light beam can be emitted in a concentrated manner, thereby improving the light extraction efficiency.

Please refer to FIG. 2 and FIG. 6 together. FIG. 6 is a subflow chart of step S104 in FIG. 3 . As shown in FIG. 6, in some embodiments, forming a p-type semiconductor layer 40 on the side of the multi-quantum well active layer 30 away from the n-type semiconductor layer 20 includes the following steps:

S1041: Form a p-type waveguide layer 41 on a side of the multi-quantum well active layer 30 away from the n-type semiconductor layer 20 .

S1042: Form a p-type confinement layer 42 on a side of the p-type waveguide layer 41 away from the MQW active layer 30 .

S1043: Form a transition layer 43 on a side of the p-type confinement layer 42 away from the p-type waveguide layer 41 .

S1044: Form a p-type current spreading layer 44 on a side of the transition layer 43 away from the p-type confinement layer 42 .

S1045 : Form a p-type ohmic contact layer 45 on a side of the p-type current spreading layer 44 away from the transition layer 43 .

Among them, the p-type waveguide layer 41 , p-type confinement layer 42 , transition layer 43 , p-type current spreading layer 44 and p-type ohmic contact layer 45 can be formed by MOCVD, PVD and other processes.

Wherein, the p-type waveguide layer 41 can be (Al _d Ga _1-d ) _0.5 In _0.5 P layer, the value range of d is 0.5≤d≤1.0, and the refractive index of the p-type waveguide sublayer 41 is lower than that of multiple quantum wells The source layer 30 makes the light beam emitted by the multi-quantum well active layer 30 undergo total reflection at the junction of the p-type waveguide layer 41 and the multi-quantum well active layer 30, so that the light beam can be emitted concentratedly, thereby improving the light extraction efficiency.

Wherein, the p-type confinement layer 42 can be an AlInP layer, and the band gap of the p-type confinement layer 42 is greater than the multi-quantum well active layer 30, and electrons can be confined in the multi-quantum well active layer 30, so that electrons and holes are Radiative recombination in the multiple quantum well active layer 30 .

Wherein, the p-type current spreading layer 44 may be a GaP layer for forming an ohmic contact with the p-electrode.

Wherein, the transition layer 43 can be an (Al _e Ga _1-e ) _0.5 In _0.5 P layer, which is arranged between the p-type confinement layer 42 and the p-type current spreading layer 44, and acts as a lattice transition to reduce the p-type confinement layer. The lattice mismatch between the layer 42 and the p-type current spreading layer 44 reduces the defect density of the p-type current spreading layer 44 .

Wherein, the p-type ohmic contact layer 45 may be a GaP layer for forming an ohmic contact with the p-electrode.

To sum up, in the manufacturing method of the LED epitaxial structure provided by the embodiment of the present application, the formed multi-quantum well active layer 30 includes the oxide layer 3121 of _{AlyGa 1-y} As, and the oxide layer 3121 of _{AlyGa 1-y} As Aluminum oxide is a wide bandgap material, so that the energy level difference between the barrier layer 31 and the potential well layer 32 is larger, which can effectively enhance the confinement of electrons by the barrier layer 31 and enhance the quantum of the multi-quantum well active layer 30. The chemical effect can effectively improve the internal quantum efficiency, light extraction efficiency, reverse bias resistance performance and antistatic ability of LED devices.

The manufacturing method of the LED epitaxial structure provided in the foregoing embodiments corresponds to the above-mentioned LED epitaxial structure, and reference may be made to each other for relevant parts.

It should be noted that for the foregoing method embodiments, for the sake of simple description, they are expressed as a series of action combinations, but those skilled in the art should know that the present application is not limited by the described action sequence. Depending on the application, certain steps may be performed in other orders or simultaneously.

In the above-mentioned embodiments, the descriptions of each embodiment have their own emphases, and for parts not described in detail in a certain embodiment, reference may be made to relevant descriptions of other embodiments.

It should be understood that the application of the present invention is not limited to the above examples, and those skilled in the art can make improvements or changes according to the above descriptions, and all these improvements and changes should belong to the scope of protection of the appended claims of the present invention.

20: n-type semiconductor layer 21: buffer layer 22: n-type ohmic contact layer 23: n-type current spreading layer 24: n-type confinement layer 25: n-type waveguide layer 30: multiple quantum well active layer 31: barrier layer 32 : potential well layer 40: p-type semiconductor layer 41: p-type waveguide layer 42: p-type confinement layer 43: transition layer 44: p-type current spreading layer 45: p-type ohmic contact layer 100: LED epitaxial structure 311: potential barrier First sublayer 312: potential barrier second sublayer 313: potential barrier third sublayer 3121: Al _y Ga _{1: y} As oxide layer 3111: (Al _x Ga _{1: x} ) _0.5 In _0.5 P layer 321: ( Al _m Ga _1:m ) _0.5 In _0.5 P layer

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that need to be used in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application. Those of ordinary skill in the art can also obtain other drawings based on these drawings without any creative effort.

FIG. 1 is a schematic cross-sectional structure diagram of an LED epitaxial structure provided by an embodiment of the present application.

FIG. 2 is a schematic cross-sectional structure diagram of an LED epitaxial structure provided by another embodiment of the present application.

FIG. 3 is a flowchart of a method for manufacturing an LED epitaxial structure provided by an embodiment of the present application.

FIG. 4 is a flowchart of a method for forming a barrier layer provided by an embodiment of the present application.

FIG. 5 is a sub-flow chart of step S102 in FIG. 3 .

FIG. 6 is a sub-flow chart of step S104 in FIG. 3 .

20: n-type semiconductor layer

30: Multi-quantum well active layer

31: Barrier layer

32: Potential well layer

40: p-type semiconductor layer

100: LED epitaxial structure

311: The first sublayer of the potential barrier

312: The second sublayer of the potential barrier

313: The third sublayer of the potential barrier

3121: Al _y Ga _{1: y} As oxide layer

3111: (Al _x Ga _{1: x} ) _0.5 In _0.5 P layer

321: (Al _m Ga _{1: m} ) _0.5 In _0.5 P layer

Claims (13)

An LED epitaxial structure, the LED epitaxial structure includes an n-type semiconductor layer, a multi-quantum well active layer and a p-type semiconductor layer stacked in sequence, wherein the multi-quantum well active layer includes at least three layers of barriers layer and at least two layers of potential well layers, the barrier layers and the potential well layers are alternately stacked, wherein the barrier layer includes the first sublayer of the potential barrier, the second sublayer of the potential barrier and the The third sublayer of the potential barrier, the second sublayer of the potential barrier includes an oxide layer of _{AlyGa1 -yAs} . The LED epitaxial structure according to Claim 1, characterized in that the range of y in the _{AlyGa 1-y} As oxide is 0.8≤y≤1.0. The LED epitaxial structure according to Claim 1, wherein the thickness of the _{AlyGa 1-y} As oxide layer is in the range of 0.5nm-3nm. The LED epitaxial structure according to Claim 1, wherein the first barrier sublayer and the third barrier sublayer both comprise (Al _x Ga _1-x ) _0.5 In _0.5 P layers. The LED epitaxial structure according to Claim 4, wherein the value range of x in (Al _x Ga _1-x ) _0.5 In _0.5 P is 0.5≤x≤0.8. The LED epitaxial structure according to Claim 4, wherein the thickness of the (Al _x Ga _1-x ) _0.5 In _0.5 P layer is in the range of 1nm-6nm. The LED epitaxial structure according to claim 1, wherein the potential well layer comprises (Al _m Ga _1-m ) _0.5 In _0.5 P layer. The LED epitaxial structure according to Claim 7, characterized in that the (Al _m Ga _1-m ) _0.5 In _0.5 P layer has a thickness ranging from 3nm to 10nm. The LED epitaxial structure according to Claim 1, wherein the multi-quantum well active layer includes 3 to 21 barrier layers and 2 to 20 potential well layers, wherein the ratio of the number of barrier layers to the potential The number of well layers is one more. An LED device, characterized in that the LED device includes an n-electrode, a p-electrode, and the LED epitaxial structure according to any one of claims 1-9, the n-electrode is electrically connected to the n-type semiconductor layer, and the The p-electrode is electrically connected to the p-type semiconductor layer. A method for manufacturing an LED epitaxial structure, characterized in that the method for manufacturing an LED epitaxial structure includes the following steps: providing a substrate; forming an n-type semiconductor layer on the substrate; A multi-quantum well active layer is formed on one side of the substrate; a p-type semiconductor layer is formed on the side of the multi-quantum well active layer away from the n-type semiconductor layer; wherein, forming the multi-quantum well active layer includes Forming a barrier layer on the side of the n-type semiconductor layer away from the substrate, forming a potential well layer on the side of the barrier layer away from the n-type semiconductor layer, and repeatedly forming the barrier layers alternately and the potential well layer to form at least three barrier layers and at least two potential well layers, the barrier layer includes the first sublayer of the potential barrier, the second sublayer of the potential barrier and the third A sublayer, the barrier second sublayer includes an oxide layer of _{AlyGa1 -yAs} . The method for manufacturing an LED epitaxial structure according to Claim 11, wherein the first sublayer of the potential barrier and the third sublayer of the potential barrier both include (Al _x Ga _1-x ) _0.5 In _0.5 P layers, so The formation of a barrier layer on the side of the n-type semiconductor layer away from the substrate includes: introducing phosphine and a first proportion of trimethylgallium, trimethylaluminum, and trimethylindium, so that the Form (Al _x Ga _1-x ) _0.5 In _0.5 P layer on the side of the n-type semiconductor layer away from the substrate _; Ga _1-x ) _0.5 In _0.5 P layer forms an _{AlyGa 1-y} As layer on the side away from the n-type semiconductor layer; feeds phosphine and a first proportion of trimethylgallium, trimethylaluminum, trimethyl methyl indium to form a (Al _{x Ga 1- x} ) _0.5 In _0.5 P layer on the AlyGa 1-y As layer; performing oxidation treatment on the _{AlyGa 1-y} As layer to oxidize the The above-mentioned _{AlyGa1 -yAs} layer is formed to form an _{AlyGa1 -yAs} oxide layer. The method for manufacturing an LED epitaxial structure according to Claim 11, wherein the formation of a potential well layer on the side of the barrier layer away from the n-type semiconductor layer includes: introducing phosphine and a second Trimethylgallium, trimethylaluminum, and trimethylindium in proportion to form a (Al _m Ga _1-m ) _0.5 In _0.5 P layer on the side of the barrier layer away from the n-type semiconductor layer.

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