TW202245056A - Substrate processing method and substrate processing apparatus in which a plasma is generated from a reactant gas including HF and CxHyFz for etching a dielectric film on a substrate - Google Patents
Substrate processing method and substrate processing apparatus in which a plasma is generated from a reactant gas including HF and CxHyFz for etching a dielectric film on a substrate Download PDFInfo
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Abstract
Description
本發明之例示性實施方式係關於一種基板處理方法及基板處理裝置。Exemplary embodiments of the present invention relate to a substrate processing method and a substrate processing apparatus.
例如,於專利文獻1中記載有對氧化矽膜進行蝕刻之技術。
先前技術文獻
專利文獻
For example,
專利文獻1:日本專利特開2016-122774號公報Patent Document 1: Japanese Patent Laid-Open No. 2016-122774
[發明所欲解決之問題][Problem to be solved by the invention]
本發明提供一種使對於遮罩蝕刻之介電膜之蝕刻選擇比提高之技術。 [解決問題之技術手段] The present invention provides a technique for improving the etching selectivity of a dielectric film for mask etching. [Technical means to solve the problem]
於本發明之一個例示性實施方式中,提供一種基板處理方法,其包含如下工序:於腔室內之基板支持器上準備具有介電膜之基板;及自包含HF氣體與選自由C 4H 2F 6氣體、C 4H 2F 8氣體、C 3H 2F 4氣體及C 3H 2F 6氣體所組成之群中之至少1種C xH yF z氣體之反應氣體生成電漿,對上述介電膜進行蝕刻;且於上述蝕刻工序中,上述基板支持器之溫度設定為0℃以下,上述HF氣體之流量多於上述C xH yF z氣體之流量。 [發明之效果] In an exemplary embodiment of the present invention, a substrate processing method is provided, which includes the following steps: preparing a substrate with a dielectric film on a substrate holder in a chamber; and self - contained HF gas and The reaction gas of at least one C x H y F z gas in the group consisting of F 6 gas, C 4 H 2 F 8 gas, C 3 H 2 F 4 gas and C 3 H 2 F 6 gas generates plasma, Etching the above-mentioned dielectric film; and in the above-mentioned etching process, the temperature of the above-mentioned substrate holder is set below 0° C., and the flow rate of the above-mentioned HF gas is greater than the flow rate of the above-mentioned C x H y F z gas. [Effect of Invention]
根據本發明之一個例示性實施方式,可提供一種使對於遮罩蝕刻之介電膜之蝕刻選擇比提高之技術。According to an exemplary embodiment of the present invention, it is possible to provide a technique for improving the etching selectivity of a dielectric film for mask etching.
以下,對本發明之各實施方式進行說明。Hereinafter, various embodiments of the present invention will be described.
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有介電膜之基板;及自包含HF氣體與選自由C 4H 2F 6氣體、C 4H 2F 8氣體、C 3H 2F 4氣體及C 3H 2F 6氣體所組成之群中之至少1種C xH yF z氣體之反應氣體生成電漿,對介電膜進行蝕刻;於蝕刻工序中,基板支持器之溫度設定為0℃以下,且HF氣體之流量多於上述C xH yF z氣體之流量。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the following steps: preparing a substrate with a dielectric film on a substrate holder in a chamber ; The reaction gas of at least one C x H y F z gas in the group consisting of 2 F 4 gas and C 3 H 2 F 6 gas generates plasma to etch the dielectric film; in the etching process, the substrate holder The temperature is set below 0°C, and the flow rate of the HF gas is greater than that of the above-mentioned C x H y F z gas.
於一個例示性實施方式中,C xH yF z氣體之流量相對於反應氣體之總流量為20體積%以下。 In an exemplary embodiment, the flow rate of the C x H y F z gas relative to the total flow rate of the reaction gas is 20% by volume or less.
於一個例示性實施方式中,HF氣體之流量相對於反應氣體之總流量為70體積%以上。In an exemplary embodiment, the flow rate of the HF gas is more than 70% by volume relative to the total flow rate of the reaction gas.
於一個例示性實施方式中,反應氣體進而包含含有鹵素之氣體。In an exemplary embodiment, the reaction gas further includes a halogen-containing gas.
於一個例示性實施方式中,含有鹵素之氣體係選自由含氯氣體、含溴氣體及含碘氣體所組成之群中之至少1種。In an exemplary embodiment, the halogen-containing gas system is at least one selected from the group consisting of chlorine-containing gas, bromine-containing gas, and iodine-containing gas.
於一個例示性實施方式中,含有鹵素之氣體係選自由Cl 2、SiCl 2、SiCl 4、CCl 4、SiH 2Cl 2、Si 2Cl 6、CHCl 3、SO 2Cl 2、BCl 3、PCl 3、PCl 5、POCl 3、Br 2、HBr、CBr 2F 2、C 2F 5Br、PBr 3、PBr 5、POBr 3、BBr 3、HI、CF 3I、C 2F 5I、C 3F 7I、IF 5、IF 7、I 2及PI 3所組成之群中之至少1種氣體。 In an exemplary embodiment, the gas system containing halogen is selected from Cl 2 , SiCl 2 , SiCl 4 , CCl 4 , SiH 2 Cl 2 , Si 2 Cl 6 , CHCl 3 , SO 2 Cl 2 , BCl 3 , PCl 3 , PCl 5 , POCl 3 , Br 2 , HBr, CBr 2 F 2 , C 2 F 5 Br, PBr 3 , PBr 5 , POBr 3 , BBr 3 , HI, CF 3 I, C 2 F 5 I, C 3 F 7 At least one gas from the group consisting of I, IF 5 , IF 7 , I 2 and PI 3 .
於一個例示性實施方式中,反應氣體包含含磷氣體。In an exemplary embodiment, the reaction gas includes a phosphorus-containing gas.
於一個例示性實施方式中,反應氣體包含含氧氣體。In an exemplary embodiment, the reaction gas includes an oxygen-containing gas.
於一個例示性實施方式中,反應氣體進而包含選自由含硼氣體及含硫氣體所組成之群中之至少1種。In an exemplary embodiment, the reaction gas further includes at least one selected from the group consisting of boron-containing gas and sulfur-containing gas.
於一個例示性實施方式中,電漿係自包含反應氣體與惰性氣體之處理氣體生成。In an exemplary embodiment, a plasma is generated from a process gas comprising a reactive gas and an inert gas.
於一個例示性實施方式中,介電膜係含矽膜。In an exemplary embodiment, the dielectric film is a silicon-containing film.
於一個例示性實施方式中,含矽膜包含選自由氧化矽膜、氮化矽膜及多晶矽膜所組成之群中之至少1種。In an exemplary embodiment, the silicon-containing film includes at least one selected from the group consisting of a silicon oxide film, a silicon nitride film, and a polysilicon film.
於一個例示性實施方式中,基板具有遮罩,該遮罩於介電膜上規定至少一個開口且包含有機膜或含金屬膜。In one exemplary embodiment, the substrate has a mask defining at least one opening in the dielectric film and comprising an organic film or a metal-containing film.
於一個例示性實施方式中,蝕刻工序包含對基板支持器賦予電氣偏壓之步驟,對基板支持器賦予電氣偏壓之期間包含第1期間、及與上述第1期間交替之第2期間,第1期間內之電氣偏壓為0或第1位準,且第2期間內之電氣偏壓為大於第1位準之第2位準。In an exemplary embodiment, the etching process includes a step of applying an electrical bias to the substrate holder, and the period of applying the electrical bias to the substrate holder includes a first period and a second period alternately with the above-mentioned first period. The electrical bias voltage in the first period is 0 or the first level, and the electrical bias voltage in the second period is the second level greater than the first level.
於一個例示性實施方式中,蝕刻工序包含對基板支持器或與基板支持器對向之上部電極供給用以生成電漿之高頻電力,供給高頻電力之期間包含第3期間、及與第3期間交替之第4期間,第3期間之高頻電力之位準為0或第3位準,第4期間之高頻電力之位準為大於第3位準之第4位準,且第2期間與第4期間係至少一部分重疊。In one exemplary embodiment, the etching step includes supplying high-frequency power for generating plasma to the substrate holder or the upper electrode facing the substrate holder, and the period of supplying the high-frequency power includes the third period and the second period. In the fourth period in which the three periods alternate, the level of the high-frequency power in the third period is 0 or the third level, and the level of the high-frequency power in the fourth period is the fourth level greater than the third level, and the level of the high-frequency power in the third period The 2nd period and the 4th period overlap at least a part.
於一個例示性實施方式中,電氣偏壓係脈衝電壓。In an exemplary embodiment, the electrical bias is a pulsed voltage.
於一個例示性實施方式中,蝕刻工序包含對與基板支持器對向之上部電極供給直流電壓或低頻電力之步驟。In an exemplary embodiment, the etching step includes a step of supplying a DC voltage or low-frequency power to an upper electrode facing the substrate holder.
於一個例示性實施方式中,蝕刻工序包含:第1工序,其係將腔室內設為第1壓力,對基板支持器供給第1電氣偏壓而對介電膜進行蝕刻;及第2工序,其係將腔室內設為第2壓力,對基板支持器供給第2電氣偏壓而對介電膜進行蝕刻;且第1壓力與第2壓力不同及/或第1電氣偏壓與第2電氣偏壓不同。In an exemplary embodiment, the etching step includes: a first step of setting the inside of the chamber to a first pressure, supplying a first electrical bias to the substrate holder to etch the dielectric film; and a second step, It sets the chamber as the second pressure, supplies the second electrical bias to the substrate holder to etch the dielectric film; and the first pressure is different from the second pressure and/or the first electrical bias is different from the second electrical bias. The bias voltage is different.
於一個例示性實施方式中,第1壓力大於第2壓力。In an exemplary embodiment, the first pressure is greater than the second pressure.
於一個例示性實施方式中,第1電氣偏壓之大小之絕對值大於第2電氣偏壓之大小之絕對值。In an exemplary embodiment, the absolute value of the magnitude of the first electrical bias is greater than the absolute value of the magnitude of the second electrical bias.
於一個例示性實施方式中,交替地重複第1工序與第2工序。In one exemplary embodiment, the first step and the second step are alternately repeated.
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有包含氧化矽膜之含矽膜之基板;及自包含含氟氣體及C xH yF z(係與上述含氟氣體不同之氣體,x為2以上之整數,y及z為1以上之整數)之反應氣體生成電漿,對含矽膜進行蝕刻;且於蝕刻工序中,基板支持器之溫度設定為0℃以下,C xH yF z氣體之流量相對於反應氣體之總流量為20體積%以下。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the following steps: preparing a substrate having a silicon -containing film including a silicon oxide film on a substrate holder in a chamber; gas, x is an integer of 2 or more, y and z are an integer of 1 or more) the reaction gas generates plasma to etch the silicon-containing film; and in the etching process, the temperature of the substrate holder is set below 0°C, C The flow rate of the x H y F z gas is 20% by volume or less relative to the total flow rate of the reaction gas.
於一個例示性實施方式中,含氟氣體係可於上述腔室內生成HF物種之氣體。In an exemplary embodiment, the fluorine-containing gas system can generate gas of HF species in the chamber.
於一個例示性實施方式中,C xH yF z氣體具有1個以上之CF 3基。 In an exemplary embodiment, the C x H y F z gas has more than one CF 3 group.
於一個例示性實施方式中,C xH yF z氣體包含選自由C 3H 2F 4氣體、C 3H 2F 6氣體、C 4H 2F 6氣體、C 4H 2F 8氣體及C 5H 2F 6氣體所組成之群中之至少1種。 In an exemplary embodiment, the C x H y F z gas comprises a gas selected from C 3 H 2 F 4 gas, C 3 H 2 F 6 gas, C 4 H 2 F 6 gas, C 4 H 2 F 8 gas and At least one of the group consisting of C 5 H 2 F 6 gases.
於一個例示性實施方式中,於反應氣體中,含氟氣體之流量最多。In an exemplary embodiment, among the reaction gases, the flow rate of the fluorine-containing gas is the largest.
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有包含氧化矽膜之含矽膜之基板;於腔室內生成電漿;及使用電漿中包含之HF物種與C xH yF z(x為2以上之整數,y及z為1以上之整數)物種對含矽膜進行蝕刻;且電漿中HF物種之量最多。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the steps of: preparing a substrate having a silicon-containing film including a silicon oxide film on a substrate holder in a chamber; generating plasma in the chamber; and using HF species and C x H y F contained in the plasma The species z (x is an integer greater than 2, and y and z are integers greater than 1) etches the silicon-containing film; and the amount of HF species in the plasma is the largest.
於一個例示性實施方式中,提供一種基板處理裝置。基板處理裝置具備腔室、設置於腔室內且構成為能夠調整溫度之基板支持器、供給用以於腔室內生成電漿之電力之電漿生成部、及控制部,控制部為了對基板支持器上所支持之基板之介電膜進行蝕刻而執行如下控制,即,藉由自電漿生成部供給之電力,將包含HF氣體與選自由C 4H 2F 6氣體、C 4H 2F 8氣體、C 3H 2F 4氣體及C 3H 2F 6氣體所組成之群中之至少1種C xH yF z氣體之反應氣體導入至腔室內而生成電漿,且於控制中,基板支持器之溫度設定為0℃以下,且HF氣體之流量多於C xH yF z氣體之流量。 In an exemplary embodiment, a substrate processing apparatus is provided. The substrate processing apparatus includes a chamber, a substrate holder installed in the chamber and configured to be capable of adjusting temperature, a plasma generation unit that supplies power for generating plasma in the chamber, and a control unit. The control unit controls the substrate holder The dielectric film of the substrate supported on the substrate is etched to perform the following control, that is, by the power supplied from the plasma generating part, the gas containing HF and the gas selected from C 4 H 2 F 6 , C 4 H 2 F 8 The reaction gas of at least one C x H y F z gas in the group consisting of gas, C 3 H 2 F 4 gas and C 3 H 2 F 6 gas is introduced into the chamber to generate plasma, and under control, The temperature of the substrate holder is set below 0°C, and the flow rate of HF gas is higher than that of C x H y F z gas.
以下,參照圖式對本發明之各實施方式詳細地進行說明。再者,於各圖式中對相同或同樣之要素標註相同符號,並省略重複之說明。只要事先未特別說明,則基於圖式所示之位置關係說明上下左右等之位置關係。圖式之尺寸比率並不表示實際之比率,又,實際之比率並不限於圖示之比率。Hereinafter, various embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same code|symbol is attached|subjected to the same or similar element in each figure, and the description which overlaps is abbreviate|omitted. Unless otherwise specified, positional relationships such as up, down, left, and right will be described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent the actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.
<基板處理裝置1之構成>
圖1係概略性地表示一個例示性實施方式之基板處理裝置1之圖。一個例示性實施方式之基板處理方法(以下稱為「本處理方法」)可使用基板處理裝置1而執行。
<Structure of
圖1所示之基板處理裝置1具備腔室10。腔室10於其內部提供內部空間10s。腔室10包含腔室本體12。腔室本體12具有大致圓筒形狀。腔室本體12例如由鋁形成。於腔室本體12之內壁面上設置有具有耐腐蝕性之膜。具有耐腐蝕性之膜可由氧化鋁、氧化釔等陶瓷形成。A
於腔室本體12之側壁形成有通路12p。基板W通過通路12p在內部空間10s與腔室10之外部之間被搬送。通路12p由閘閥12g開閉。閘閥12g沿著腔室本體12之側壁設置。A
於腔室本體12之底部上設置有支持部13。支持部13由絕緣材料形成。支持部13具有大致圓筒形狀。支持部13於內部空間10s中自腔室本體12之底部向上方延伸。支持部13支持基板支持器14。基板支持器14構成為於內部空間10s中支持基板W。A supporting
基板支持器14具有下部電極18及靜電吸盤20。基板支持器14可進而具有電極板16。電極板16由鋁等之導體形成,且具有大致圓盤形狀。下部電極18設置於電極板16上。下部電極18由鋁等之導體形成,且具有大致圓盤形狀。下部電極18電性連接於電極板16。The
靜電吸盤20設置於下部電極18上。基板W載置於靜電吸盤20之上表面上。靜電吸盤20具有本體及電極。靜電吸盤20之本體具有大致圓盤形狀,由介電體形成。靜電吸盤20之電極係膜狀電極,設置於靜電吸盤20之本體內。靜電吸盤20之電極經由開關20s而連接於直流電源20p。若對靜電吸盤20之電極施加來自直流電源20p之電壓,則於靜電吸盤20與基板W之間產生靜電引力。基板W藉由其靜電引力而被吸引至靜電吸盤20,並由靜電吸盤20保持。The
於基板支持器14上配置邊緣環25。邊緣環25係環狀構件。邊緣環25可由矽、碳化矽或石英等形成。基板W配置於靜電吸盤20上且由邊緣環25包圍之區域內。An
於下部電極18之內部設置有流路18f。對於流路18f,自設置於腔室10之外部之冷卻器單元經由配管22a供給熱交換介質(例如冷媒)。供給至流路18f之熱交換介質經由配管22b返回至冷卻器單元。於基板處理裝置1中,載置於靜電吸盤20上之基板W之溫度藉由熱交換介質與下部電極18之熱交換而進行調整。Inside the
於基板處理裝置1設置有氣體供給管線24。氣體供給管線24將來自傳熱氣體供給機構之傳熱氣體(例如He氣體)供給至靜電吸盤20之上表面與基板W之背面之間之間隙。A
基板處理裝置1進而具備上部電極30。上部電極30設置於基板支持器14之上方。上部電極30介隔構件32而支持於腔室本體12之上部。構件32由具有絕緣性之9材料形成。上部電極30與構件32將腔室本體12之上部開口封閉。The
上部電極30可包含頂板34及支持體36。頂板34之下表面係內部空間10s側之下表面,劃分形成內部空間10s。頂板34可由產生之焦耳熱較少之低電阻之導電體或半導體形成。頂板34具有沿其板厚方向貫通頂板34之複數個氣體噴出孔34a。The
支持體36將頂板34裝卸自如地支持。支持體36由鋁等導電性材料形成。於支持體36之內部設置有氣體擴散室36a。支持體36具有自氣體擴散室36a向下方延伸之複數個氣孔36b。複數個氣孔36b分別與複數個氣體噴出孔34a連通。於支持體36形成有氣體導入口36c。氣體導入口36c連接於氣體擴散室36a。於氣體導入口36c連接有氣體供給管38。The
於氣體供給管38經由流量控制器群41及閥群42而連接有氣體源群40。流量控制器群41及閥群42構成氣體供給部。氣體供給部亦可進而包含氣體源群40。氣體源群40包含複數個氣體源。複數個氣體源包含本處理方法中使用之處理氣體之源。流量控制器群41包含複數個流量控制器。流量控制器群41之複數個流量控制器分別係質量流量控制器或壓力控制式之流量控制器。閥群42包含複數個開閉閥。氣體源群40之複數個氣體源分別經由流量控制器群41之對應之流量控制器及閥群42之對應之開閉閥而連接於氣體供給管38。A
於基板處理裝置1中,沿著腔室本體12之內壁面及支持部13之外周,裝卸自如地設置有護罩46。護罩46防止反應副產物附著於腔室本體12。護罩46例如藉由在由鋁形成之母材之表面形成具有耐腐蝕性之膜而構成。具有耐腐蝕性之膜可由氧化釔等陶瓷形成。In the
於支持部13與腔室本體12之側壁之間設置有擋板48。擋板48例如藉由在由鋁形成之構件之表面形成具有耐腐蝕性之膜(氧化釔等之膜)而構成。於擋板48形成有複數個貫通孔。於擋板48之下方且腔室本體12之底部設置有排氣口12e。於排氣口12e經由排氣管52連接有排氣裝置50。排氣裝置50包含壓力調整閥及渦輪分子泵等真空泵。A
基板處理裝置1具備高頻電源62及偏壓電源64。高頻電源62係產生高頻電力HF之電源。高頻電力HF具有適於生成電漿之第1頻率。第1頻率係例如27 MHz~100 MHz之範圍內之頻率。高頻電源62經由匹配器66及電極板16而連接於下部電極18。匹配器66具有用以使高頻電源62之負載側(下部電極18側)之阻抗與高頻電源62之輸出阻抗匹配之電路。再者,高頻電源62亦可經由匹配器66而連接於上部電極30。高頻電源62構成一例之電漿生成部。The
偏壓電源64係產生電氣偏壓之電源。偏壓電源64電性連接於下部電極18。電氣偏壓具有第2頻率。第2頻率低於第1頻率。第2頻率係例如400 kHz~13.56 MHz之範圍內之頻率。電氣偏壓與高頻電力HF一起使用之情形時,被賦予至基板支持器14,以將離子饋入至基板W。於一例中,電氣偏壓被賦予至下部電極18。若電氣偏壓被賦予至下部電極18,則載置於基板支持器14上之基板W之電位於由第2頻率規定之週期內變動。再者,電氣偏壓亦可被賦予至設置於靜電吸盤20內之偏壓電極。The
於一實施方式中,電氣偏壓亦可為具有第2頻率之高頻電力LF。高頻電力LF與高頻電力HF一起使用之情形時,用作用以將離子饋入至基板W之高頻偏壓電力。構成為產生高頻電力LF之偏壓電源64經由匹配器68及電極板16而連接於下部電極18。匹配器68具有用以使偏壓電源64之負載側(下部電極18側)之阻抗與偏壓電源64之輸出阻抗匹配之電路。In one embodiment, the electric bias voltage may be high-frequency electric power LF having the second frequency. When the high-frequency power LF is used together with the high-frequency power HF, it is used as a high-frequency bias power for feeding ions into the substrate W. A bias
再者,亦可不使用高頻電力HF,而使用高頻電力LF,即,僅使用單一之高頻電力生成電漿。於該情形時,高頻電力LF之頻率亦可為大於13.56 MHz之頻率、例如40 MHz。又,於該情形時,基板處理裝置1亦可不具備高頻電源62及匹配器66。於該情形時,偏壓電源64構成一例之電漿生成部。In addition, instead of using high-frequency power HF, high-frequency power LF may be used, that is, only a single high-frequency power may be used to generate plasma. In this case, the frequency of the high-frequency power LF may be greater than 13.56 MHz, for example, 40 MHz. In addition, in this case, the
於另一實施方式中,電氣偏壓亦可為脈衝狀之電壓(脈衝電壓)。於該情形時,偏壓電源可為直流電源。偏壓電源可構成為電源本身供給脈衝電壓,亦可構成為於偏壓電源之下游側具備使電壓脈衝化之器件。於一例中,脈衝電壓以於基板W產生負電位之方式被賦予至下部電極18。脈衝電壓可為矩形波,亦可為三角波,亦可為沖波,或者亦可具有其他波形。In another embodiment, the electrical bias voltage can also be a pulsed voltage (pulse voltage). In this case, the bias power supply can be a DC power supply. The bias power supply may be configured to supply a pulse voltage to the power supply itself, or may be configured to include a device for making a voltage pulse on the downstream side of the bias power supply. In one example, a pulse voltage is applied to the
脈衝電壓之週期由第2頻率規定。脈衝電壓之週期包含兩個期間。兩個期間中之一期間之脈衝電壓係負極性之電壓。兩個期間中之一期間之電壓之位準(即絕對值)高於兩個期間中之另一期間之電壓之位準(即絕對值)。另一期間之電壓可為負極性、正極性之任一種。另一期間之負極性之電壓之位準可大於零,亦可為零。於本實施方式中,偏壓電源64經由低通濾波器及電極板16而連接於下部電極18。再者,偏壓電源64亦可連接於設置於靜電吸盤20內之偏壓電極而代替下部電極18。The period of the pulse voltage is specified by the second frequency. The cycle of the pulse voltage includes two periods. The pulse voltage in one of the two periods is a negative polarity voltage. The voltage level (ie, the absolute value) of one of the two periods is higher than the voltage level (ie, the absolute value) of the other period of the two periods. The voltage in the other period can be either negative polarity or positive polarity. The voltage level of the negative polarity in another period can be greater than zero or zero. In this embodiment, the
於一實施方式中,偏壓電源64亦可對下部電極18賦予電氣偏壓之連續波。即,偏壓電源64亦可將電氣偏壓連續地賦予至下部電極18。In one embodiment, the
於另一實施方式中,偏壓電源64亦可將電氣偏壓之脈衝波賦予至下部電極18。電氣偏壓之脈衝波可週期性地賦予至下部電極18。電氣偏壓之脈衝波之週期由第3頻率規定。第3頻率低於第2頻率。第3頻率為例如1 Hz以上且200 kHz以下。於另一例中,第3頻率亦可為5 Hz以上且100 kHz以下。In another embodiment, the
電氣偏壓之脈衝波之週期包含兩個期間、即H期間及L期間。H期間內之電氣偏壓之位準(即,電氣偏壓之脈衝之位準)高於L期間內之電氣偏壓之位準。即,亦可藉由使電氣偏壓之位準增減而將電氣偏壓之脈衝波賦予至下部電極18。L期間內之電氣偏壓之位準亦可大於零。或者,L期間內之電氣偏壓之位準亦可為零。即,電氣偏壓之脈衝波亦可藉由交替地切換電氣偏壓對下部電極18之供給與供給停止而賦予至下部電極18。此處,於電氣偏壓為高頻電力LF之情形時,電氣偏壓之位準係高頻電力LF之電力位準。於電氣偏壓為高頻電力LF之情形時,電氣偏壓之脈衝中之高頻電力LF之位準亦可為2 kW以上。於電氣偏壓為負極性之直流電壓之脈衝波之情形時,電氣偏壓之位準係負極性之直流電壓之絕對值之有效值。電氣偏壓之脈衝波之工作比、即H期間於電氣偏壓之脈衝波之週期中所占之比率例如為1%以上且80%以下。於另一例中,電氣偏壓之脈衝波之工作比可為5%以上且50%以下。或者,電氣偏壓之脈衝波之工作比亦可為50%以上且99%以下。再者,供給電氣偏壓之期間中,L期間相當於上述之第1期間,H期間相當於上述之第2期間。又,L期間內之電氣偏壓之位準相當於上述之0或第1位準,H期間內之電氣偏壓之位準相當於上述之第2位準。The period of the pulse wave of the electrical bias includes two periods, ie, the H period and the L period. The level of the electrical bias voltage (ie, the level of the pulse of the electrical bias voltage) in the H period is higher than the level of the electrical bias voltage in the L period. That is, the pulse wave of the electrical bias can also be given to the
於一實施方式中,高頻電源62亦可供給高頻電力HF之連續波。即,高頻電源62亦可連續地供給高頻電力HF。In one embodiment, the high-
於另一實施方式中,高頻電源62亦可供給高頻電力HF之脈衝波。高頻電力HF之脈衝波可週期性地供給。高頻電力HF之脈衝波之週期由第4頻率規定。第4頻率低於第2頻率。於一實施方式中,第4頻率與第3頻率相同。高頻電力HF之脈衝波之週期包含兩個期間、即H期間及L期間。H期間之高頻電力HF之電力位準高於兩個期間中之L期間之高頻電力HF之電力位準。L期間之高頻電力HF之電力位準可大於零,亦可為零。再者,供給高頻電力HF之期間中,L期間相當於上述之第3期間,H期間相當於上述之第4期間。又,L期間之高頻電力HF之位準相當於上述之0或第3位準,H期間內之電氣偏壓之位準相當於上述之第4位準。In another embodiment, the high-
再者,高頻電力HF之脈衝波之週期亦可與電氣偏壓之脈衝波之週期同步。高頻電力HF之脈衝波之週期中之H期間亦可與電氣偏壓之脈衝波之週期中之H期間同步。或者,高頻電力HF之脈衝波之週期中之H期間亦可與電氣偏壓之脈衝波之週期中之H期間不同步。高頻電力HF之脈衝波之週期中之H期間之時間長既可與電氣偏壓之脈衝波之週期中之H期間之時間長相同,亦可不同。高頻電力HF之脈衝波之週期中之H期間之一部分或全部亦可與電氣偏壓之脈衝波之週期中之H期間重疊。Furthermore, the period of the pulse wave of the high-frequency power HF may also be synchronized with the period of the pulse wave of the electrical bias voltage. The H period in the cycle of the pulse wave of the high-frequency power HF may also be synchronized with the H period in the cycle of the pulse wave of the electrical bias voltage. Alternatively, the H period in the cycle of the pulse wave of the high-frequency power HF may not be synchronized with the H period in the cycle of the pulse wave of the electrical bias voltage. The time length of the H period in the cycle of the pulse wave of the high-frequency power HF may be the same as or different from the time length of the H period in the cycle of the pulse wave of the electric bias voltage. Part or all of the H period in the cycle of the pulse wave of the high-frequency power HF may overlap with the H period in the cycle of the pulse wave of the electrical bias voltage.
圖2係表示高頻電力HF及電氣偏壓之一例之時序圖。圖2係高頻電力HF及電氣偏壓均使用脈衝波之例。於圖2中,橫軸表示時間。於圖2中,縱軸表示高頻電力HF及電氣偏壓之電力位準。高頻電力HF之「L1」表示未供給高頻電力HF或者低於以「H1」表示之電力位準。電氣偏壓之「L2」表示未供給電氣偏壓或者低於以「H2」表示之電力位準。於電氣偏壓為負極性之直流電壓之脈衝波之情形時,電氣偏壓之位準係負極性之直流電壓之絕對值之有效值。再者,圖2之高頻電力HF及電氣偏壓之電力位準之大小並不表示兩者之相對關係,可任意地設定。圖2係高頻電力HF之脈衝波之週期與電氣偏壓之脈衝波之週期同步且高頻電力HF之脈衝波之H期間及L期間之時間長與電氣偏壓之脈衝波之H期間及L期間之時間長相同之例。Fig. 2 is a timing chart showing an example of high-frequency power HF and electric bias. Figure 2 is an example of using pulse waves for both high-frequency power HF and electrical bias. In FIG. 2, the horizontal axis represents time. In FIG. 2 , the vertical axis represents the electric power levels of the high-frequency electric power HF and the electric bias voltage. "L1" of the high-frequency power HF indicates that the high-frequency power HF is not supplied or is lower than the power level indicated by "H1". "L2" of the electrical bias indicates that no electrical bias is supplied or is lower than the power level indicated by "H2". When the electrical bias is a pulse wave of a negative DC voltage, the level of the electrical bias is the effective value of the absolute value of the negative DC voltage. Furthermore, the power levels of the high-frequency power HF and the electrical bias voltage in FIG. 2 do not represent the relative relationship between the two, and can be set arbitrarily. Figure 2 shows that the cycle of the pulse wave of high-frequency power HF is synchronized with the cycle of the pulse wave of electrical bias, and the time length of the H period and L period of the pulse wave of high-frequency power HF is the same as the H period and period of the pulse wave of electrical bias. An example where the length of the L period is the same.
返回至圖1繼續說明。基板處理裝置1進而具備電源70。電源70連接於上部電極30。於一例中,電源70可構成為於電漿處理中對上部電極30供給直流電壓或低頻電力。例如,電源70可對上部電極30供給負極性之直流電壓,亦可週期性地供給低頻電力。直流電壓或低頻電力可以脈衝波之形式供給,亦可以連續波之形式供給。於本實施方式中,存在於電漿處理空間10s內之正離子被饋入至上部電極30並與之發生碰撞。藉此,自上部電極30釋放二次電子。所釋放之二次電子將遮罩膜MK改質,使遮罩膜MK之耐蝕刻性提高。又,二次電子有助於提高電漿密度。又,藉由二次電子之照射而基板W之帶電狀態得以中和,因此,可提高離子朝藉由蝕刻所形成之凹部內之直進性。進而,於上部電極30包含含矽材料之情形時,藉由正離子之碰撞而矽與二次電子一起被釋放。所釋放之矽係與電漿中之氧鍵結而形成為氧化矽化合物,並沈積於遮罩上而作為保護膜發揮功能。根據以上,藉由對上部電極30供給直流電壓或低頻電力,不僅改善選擇比,還可獲得抑制藉由蝕刻所形成之凹部處之形狀異常、改善蝕刻速率等效果。Return to FIG. 1 to continue the description. The
於基板處理裝置1中進行電漿處理之情形時,自氣體供給部向內部空間10s供給氣體。又,藉由供給高頻電力HF及/或電氣偏壓,於上部電極30與下部電極18之間生成高頻電場。所生成之高頻電場自內部空間10s中之氣體生成電漿。When plasma processing is performed in the
基板處理裝置1可進而具備控制部80。控制部80可為具備處理器、記憶體等記憶部、輸入裝置、顯示裝置、信號之輸入輸出介面等之電腦。控制部80控制基板處理裝置1之各部。於控制部80,操作員可使用輸入裝置進行指令之輸入操作等,以對基板處理裝置1進行管理。又,於控制部80,可藉由顯示裝置使基板處理裝置1之運轉狀況可視化並加以顯示。進而,於記憶部儲存有控制程式及製程配方資料。控制程式由處理器執行,以於基板處理裝置1中執行各種處理。處理器執行控制程式,根據製程配方資料控制基板處理裝置1之各部。於一個例示性實施方式中,控制部80之一部分或全部可設置成基板處理裝置1之外部之裝置之構成之一部分。The
<基板處理系統PS之構成> 圖3係概略性地表示1個例示性實施方式之基板處理系統PS之圖。本處理方法亦可使用基板處理系統PS而執行。 <Substrate processing system PS structure> FIG. 3 is a diagram schematically showing a substrate processing system PS according to an exemplary embodiment. The processing method can also be performed using the substrate processing system PS.
基板處理系統PS具有基板處理室PM1~PM6(以下,亦統稱為「基板處理模組PM」)、搬送模組TM、裝載閉鎖模組LLM1及LLM2(以下,亦統稱為「裝載閉鎖模組LLM」)、承載器模組LM、及裝載埠LP1至LP3(以下,亦統稱為「裝載埠LP」)。控制部CT控制基板處理系統PS之各構成,對基板W執行特定處理。The substrate processing system PS includes substrate processing chambers PM1 to PM6 (hereinafter, also collectively referred to as "substrate processing module PM"), transfer module TM, load lock modules LLM1 and LLM2 (hereinafter, also collectively referred to as "load lock module LLM"). ”), the carrier module LM, and the load ports LP1 to LP3 (hereinafter, also collectively referred to as “load ports LP”). The control unit CT controls each component of the substrate processing system PS, and executes a specific process on the substrate W.
基板處理模組PM係於其內部對基板W執行蝕刻處理、修整處理、成膜處理、退火處理、摻雜處理、微影處理、清洗處理、灰化處理等處理。基板處理模組PM之一部分可為測定模組,亦可測定形成於基板W上之膜之膜厚或形成於基板W上之圖案之尺寸等。圖1所示之基板處理裝置1係基板處理模組PM之一例。The substrate processing module PM performs etching, trimming, film forming, annealing, doping, lithography, cleaning, ashing, etc. on the substrate W inside. A part of the substrate processing module PM may be a measurement module, which may also measure the film thickness of the film formed on the substrate W or the size of the pattern formed on the substrate W. The
搬送模組TM具有搬送基板W之搬送裝置,於基板處理模組PM間或基板處理模組PM與裝載閉鎖模組LLM之間搬送基板W。基板處理模組PM及裝載閉鎖模組LLM係與搬送模組TM鄰接地配置。搬送模組TM與基板處理模組PM及裝載閉鎖模組LLM藉由可開閉之閘閥而於空間上隔離或連結。The transfer module TM has a transfer device for transferring the substrate W, and transfers the substrate W between the substrate processing modules PM or between the substrate processing module PM and the load lock module LLM. The substrate processing module PM and the load lock module LLM are arranged adjacent to the transfer module TM. The transfer module TM, the substrate processing module PM, and the load lock module LLM are spatially separated or connected by openable and closable gate valves.
裝載閉鎖模組LLM1及LLM2設置於搬送模組TM與承載器模組LM之間。裝載閉鎖模組LLM可將其內部之壓力切換成大氣壓或真空。裝載閉鎖模組LLM將基板W自為大氣壓之承載器模組LM搬送至為真空之搬送模組TM,又,自為真空之搬送模組TM搬送至為大氣壓之承載器模組LM。The load lock modules LLM1 and LLM2 are disposed between the transfer module TM and the carrier module LM. The load lock module LLM can switch its internal pressure to atmospheric pressure or vacuum. The load lock module LLM transfers the substrate W from the atmospheric pressure carrier module LM to the vacuum transfer module TM, and from the vacuum transfer module TM to the atmospheric pressure carrier module LM.
承載器模組LM具有搬送基板W之搬送裝置,於裝載閉鎖模組LLM與裝載埠LP之間搬送基板W。裝載埠LP內之內部可供載置例如能夠收納25片基板W之FOUP(Front Opening Unified Pod,前開式晶圓傳送盒)或空的FOUP。承載器模組LM自裝載埠LP內之FOUP取出基板W,並搬送至裝載閉鎖模組LLM。又,承載器模組LM自裝載閉鎖模組LLM取出基板W,並搬送至裝載埠LP內之FOUP。The carrier module LM has a transfer device for transferring the substrate W, and transfers the substrate W between the load lock module LLM and the load port LP. The inside of the load port LP can be loaded with, for example, a FOUP (Front Opening Unified Pod, Front Opening Unified Pod) capable of accommodating 25 substrates W or an empty FOUP. The carrier module LM takes out the substrate W from the FOUP in the load port LP, and transfers it to the load lock module LLM. Moreover, the carrier module LM takes out the substrate W from the load lock module LLM, and transfers it to the FOUP in the load port LP.
控制部CT控制基板處理系統PS之各構成,對基板W執行特定處理。控制部CT儲存有設定有製程之步序、製程之條件、搬送條件等之製程配方,根據該製程配方控制基板處理系統PS之各構成,以對基板W執行特定處理。控制部CT亦可兼具圖1所示之基板處理裝置1之控制部80之一部分或全部之功能。The control unit CT controls each component of the substrate processing system PS, and executes a specific process on the substrate W. The control unit CT stores a recipe that sets the steps of the manufacturing procedure, the conditions of the manufacturing procedure, and the transfer conditions, etc., and controls each component of the substrate processing system PS according to the recipe to perform specific processing on the substrate W. The control unit CT may also have a part or all of the functions of the
<基板W之一例> 圖4係表示基板W之剖面構造之一例之圖。基板W係可應用本處理方法之基板之一例。基板W具有介電膜DF。基板W可具有基底膜UF及遮罩膜MK。如圖4所示,基板W可將基底膜UF、介電膜DF及遮罩膜MK依序積層而形成。 <Example of Substrate W> FIG. 4 is a diagram showing an example of the cross-sectional structure of the substrate W. As shown in FIG. The substrate W is an example of a substrate to which this processing method can be applied. The substrate W has a dielectric film DF. The substrate W may have a base film UF and a mask film MK. As shown in FIG. 4 , the substrate W can be formed by sequentially laminating the base film UF, the dielectric film DF and the mask film MK.
基底膜UF例如可為矽晶圓或形成於矽晶圓上之有機膜、介電膜、金屬膜、半導體膜等。基底膜UF可由複數個膜積層而構成。The base film UF can be, for example, a silicon wafer or an organic film, a dielectric film, a metal film, a semiconductor film, etc. formed on the silicon wafer. The base film UF may be formed by laminating a plurality of films.
介電膜DF可為含矽膜。含矽膜例如為氧化矽膜、氮化矽膜、氮氧化矽膜(SiON膜)、Si-ARC膜。介電膜DF可包含多晶矽膜。介電膜DF可由複數個膜積層而構成。例如,介電膜DF可由氧化矽膜與多晶矽膜交替地積層而構成。於一例中,介電膜DF係由氧化矽膜與氮化矽膜交替地積層所得之積層膜。The dielectric film DF may be a silicon-containing film. The silicon-containing film is, for example, a silicon oxide film, a silicon nitride film, a silicon oxynitride film (SiON film), and a Si-ARC film. The dielectric film DF may include a polysilicon film. The dielectric film DF may be formed by laminating a plurality of films. For example, the dielectric film DF may be formed by alternately laminating silicon oxide films and polysilicon films. In one example, the dielectric film DF is a laminated film in which silicon oxide films and silicon nitride films are alternately laminated.
基底膜UF及/或介電膜DF可利用CVD(Chemical Vapor Deposition,化學氣相沈積)法、旋轉塗佈法等形成。基底膜UF及/或介電膜DF可為平坦之膜,又,亦可為具有凹凸之膜。The base film UF and/or the dielectric film DF can be formed by a CVD (Chemical Vapor Deposition, chemical vapor deposition) method, a spin coating method, or the like. The base film UF and/or the dielectric film DF may be a flat film, or may have unevenness.
遮罩膜MK形成於介電膜DF上。遮罩膜MK於介電膜DF上規定至少1個開口OP。開口OP係介電膜DF上之空間,且由遮罩膜MK之側壁S1包圍。即,於圖4中,介電膜DF具有由遮罩膜MK覆蓋之區域、及於開口OP之底部露出之區域。A mask film MK is formed on the dielectric film DF. The mask film MK defines at least one opening OP on the dielectric film DF. The opening OP is a space on the dielectric film DF, and is surrounded by the sidewall S1 of the mask film MK. That is, in FIG. 4 , the dielectric film DF has a region covered by the mask film MK and a region exposed at the bottom of the opening OP.
開口OP於俯視基板W時(於圖4之自上往下之方向上觀察基板W時),可具有任意之形狀。該形狀例如可為孔形狀或線形狀、孔形狀與線形狀之組合。遮罩膜MK亦可具有複數個側壁S1,且由複數個側壁S1規定複數個開口OP。複數個開口OP亦可分別具有線形狀,且以固定間隔排列而構成線與間隙圖案。又,複數個開口OP亦可分別具有孔形狀,且構成陣列圖案。The opening OP may have any shape when the substrate W is viewed from above (when the substrate W is viewed from the top to the bottom in FIG. 4 ). The shape can be, for example, a hole shape or a line shape, a combination of a hole shape and a line shape. The mask film MK may also have a plurality of sidewalls S1, and a plurality of openings OP are defined by the plurality of sidewalls S1. The plurality of openings OP may respectively have a line shape and be arranged at regular intervals to form a line-and-space pattern. Also, the plurality of openings OP may each have a hole shape and form an array pattern.
遮罩膜MK例如為有機膜或含金屬膜。有機膜例如可為旋塗式碳膜(SOC)、非晶形碳膜、光阻膜。含金屬膜例如可包含鎢、碳化鎢、氮化鈦。遮罩膜MK可利用CVD法、旋轉塗佈法等形成。開口OP可藉由對遮罩膜MK進行蝕刻而形成。遮罩膜MK亦可藉由微影術而形成。The mask film MK is, for example, an organic film or a metal-containing film. The organic film can be, for example, a spin-on carbon film (SOC), an amorphous carbon film, or a photoresist film. Metal-containing films may include, for example, tungsten, tungsten carbide, and titanium nitride. The mask film MK can be formed by a CVD method, a spin coating method, or the like. The opening OP can be formed by etching the mask film MK. The mask film MK can also be formed by lithography.
於一例中,基板W可於基底膜UF上具有由氧化矽膜與氮化矽膜積層所得之積層膜作為介電膜DF。又,於一例中,基板W可於該氮化矽膜上具有多晶矽膜、硼化矽或碳化鎢作為遮罩膜MK。又,遮罩膜MK可為包含多晶矽膜、硼化矽或碳化鎢之多層抗蝕劑。於一例中,該多層抗蝕劑於多晶矽膜上具有包含硬質遮罩之遮罩。於一例中,硬質遮罩具有氧化矽膜(TEOS(tetraethoxysilane,四乙氧基矽烷)膜)。該積層膜中包含之氮化矽膜可將硬質遮罩作為遮罩而進行蝕刻,又,該積層膜中包含之氧化矽膜可將多晶矽膜作為遮罩而進行蝕刻。In one example, the substrate W may have a laminated film obtained by laminating a silicon oxide film and a silicon nitride film as the dielectric film DF on the base film UF. Also, in one example, the substrate W may have a polysilicon film, silicon boride, or tungsten carbide as the mask film MK on the silicon nitride film. In addition, the mask film MK may be a multi-layer resist including polysilicon film, silicon boride or tungsten carbide. In one example, the multilayer resist has a mask including a hard mask on the polysilicon film. In one example, the hard mask has a silicon oxide film (TEOS (tetraethoxysilane, tetraethoxysilane) film). The silicon nitride film included in the laminated film can be etched using the hard mask as a mask, and the silicon oxide film included in the laminated film can be etched using the polysilicon film as a mask.
<本處理方法之一例>
圖5係表示本處理方法之流程圖。本處理方法包含準備基板之工序(步驟ST1)、及蝕刻工序(步驟ST2)。以下,以圖1所示之控制部80控制基板處理裝置1之各部而對圖4所示之基板W執行本處理方法之情形為例進行說明。
<An example of this processing method>
Fig. 5 is a flowchart showing the processing method. This processing method includes a step of preparing a substrate (step ST1 ), and an etching step (step ST2 ). Hereinafter, a case where the
(步驟ST1:基板之準備)
於步驟ST1中,於腔室10之內部空間10s內準備基板W。於內部空間10s內,基板W配置於基板支持器14之上表面,並由靜電吸盤20保持。形成基板W之各構成之製程之至少一部分可於內部空間10s內進行。又,亦可在基板W之各構成之全部或一部分於基板處理裝置1之外部之裝置或腔室內形成之後,將基板W搬入至內部空間10s內,並配置於基板支持器14之上表面。
(Step ST1: Preparation of substrate)
In step ST1 , the substrate W is prepared in the
(步驟ST2:蝕刻工序) 於步驟ST2中,執行基板W之介電膜DF之蝕刻。步驟ST2包含供給處理氣體之工序(步驟ST21)、及生成電漿之工序(步驟ST22)。藉由自處理氣體生成之電漿之活性種(離子、自由基),對介電膜DF進行蝕刻。 (Step ST2: etching process) In step ST2, etching of the dielectric film DF of the substrate W is performed. Step ST2 includes a step of supplying a process gas (step ST21 ) and a step of generating plasma (step ST22 ). The dielectric film DF is etched by the active species (ions, radicals) of the plasma generated from the process gas.
於步驟ST21中,自氣體供給部向內部空間10s內供給處理氣體。處理氣體包含含有含氟氣體及C
xH
yF
z(係與上述之含氟氣體不同之氣體,x為2以上之整數,y及z為1以上之整數)氣體(以下,亦將該氣體稱為「C
xH
yF
z氣體」)之反應氣體。於本實施方式中,除非另有記載,否則反應氣體中不包含Ar等高貴氣體。
In step ST21, the processing gas is supplied from the gas supply unit into the
含氟氣體可為能夠於電漿處理中在腔室10內生成氟化氫(HF)物種之氣體。HF物種包含氟化氫之氣體、自由基及離子之至少任一種。於一例中,含氟氣體可為HF氣體或氫氟碳氣體。又,含氟氣體亦可為包含氫源及氟源之混合氣體。氫源例如可為H
2、NH
3、H
2O、H
2O
2或烴(CH
4、C
3H
6等)。氟源可為NF
3、SF
6、WF
6、XeF
2、氟碳或氫氟碳。以下,亦將該等含氟氣體稱為「HF系氣體」。自包含HF系氣體之處理氣體生成之電漿包含大量HF物種(蝕刻劑)。HF系氣體之流量可多於C
xH
yF
z氣體之流量。HF系氣體亦可為主蝕刻劑氣體。HF系氣體於反應氣體之總流量中所占之流量比率可為最大,例如,相對於反應氣體之總流量可為70體積%以上。又,HF系氣體相對於反應氣體之總流量可為96體積%以下。
The fluorine-containing gas may be a gas capable of generating hydrogen fluoride (HF) species within the
C xH yF z氣體例如可使用C xH yF z(x為2以上之整數,y及z為1以上之整數)氣體。作為C xH yF z(x為2以上之整數,y及z為1以上之整數)氣體,具體而言,可使用選自由C 2HF 5氣體、C 2H 2F 4氣體、C 2H 3F 3氣體、C 2H 4F 2氣體、C 3HF 7氣體、C 3H 2F 2氣體、C 3H 2F 4氣體、C 3H 2F 6氣體、C 3H 3F 5氣體、C 4H 2F 6氣體、C 4H 5F 5氣體、C 4H 2F 8氣體、C 5H 2F 6氣體、C 5H 2F 10氣體及C 5H 3F 7氣體所組成之群中之至少1種。於一例中,作為C xH yF z氣體,使用選自由C 3H 2F 4氣體、C 3H 2F 6氣體、C 4H 2F 6氣體及C 4H 2F 8氣體所組成之群中之至少1種。於另一例中,作為C xH yF z氣體,使用選自由C 3H 2F 4氣體、C 3H 2F 6氣體、C 4H 2F 6氣體、C 4H 2F 8氣體及C 5H 2F 6氣體所組成之群中之至少1種。作為C xH yF z氣體,例如使用C 4H 2F 6氣體時,C 4H 2F 6可為直鏈狀,亦可為環狀。 C x Hy F z gas, for example, C x Hy F z (x is an integer of 2 or more, and y and z are integers of 1 or more) gas can be used. As the C x H y F z (x is an integer of 2 or more, y and z are an integer of 1 or more) gas, specifically, a gas selected from C 2 HF 5 , C 2 H 2 F 4 gas, C 2 H 3 F 3 gas, C 2 H 4 F 2 gas, C 3 HF 7 gas, C 3 H 2 F 2 gas, C 3 H 2 F 4 gas, C 3 H 2 F 6 gas, C 3 H 3 F 5 gas, C 4 H 2 F 6 gas, C 4 H 5 F 5 gas, C 4 H 2 F 8 gas, C 5 H 2 F 6 gas, C 5 H 2 F 10 gas and C 5 H 3 F 7 gas At least one of the group formed. In one example, as the C x H y F z gas, a gas selected from C 3 H 2 F 4 gas, C 3 H 2 F 6 gas, C 4 H 2 F 6 gas and C 4 H 2 F 8 gas is used. At least 1 species in the group. In another example, as C x H y F z gas, use is selected from C 3 H 2 F 4 gas, C 3 H 2 F 6 gas, C 4 H 2 F 6 gas, C 4 H 2 F 8 gas and C At least one of the group consisting of 5 H 2 F 6 gases. As the C x H y F z gas, for example, when using C 4 H 2 F 6 gas, C 4 H 2 F 6 may be linear or cyclic.
自包含C xH yF z氣體之處理氣體生成之電漿中包含自C xH yF z氣體解離之C xH yF z物種。於該C xH yF z物種中包含大量的含有2個以上之碳原子之C xH yF z自由基(例如,C 2H 2F自由基、C 2H 2F 2自由基、C 3HF 3自由基,以下稱為「C xH yF z系自由基」)。C xH yF z自由基係於遮罩膜MK之表面形成保護該表面之保護膜。該保護膜可抑制介電膜DF之蝕刻時的遮罩膜MK之蝕刻。因此,C xH yF z系自由基可於介電膜DF之蝕刻中提高介電膜DF相對於遮罩膜MK之選擇比(係將介電膜DF之蝕刻速率除以遮罩MK之蝕刻速率所得之值)。 The plasma generated from the process gas comprising the CxHyFz gas comprises CxHyFz species dissociated from the CxHyFz gas . A large number of C x H y F z free radicals ( for example, C 2 H 2 F free radicals, C 2 H 2 F 2 free radicals, C 2 H 2 F free radicals, C 3 HF 3 free radicals, hereinafter referred to as "C x H y F z free radicals"). The C x H y F z free radicals form a protective film on the surface of the mask film MK to protect the surface. This protective film can suppress the etching of the mask film MK when the dielectric film DF is etched. Therefore, C x H y F z free radicals can improve the selectivity ratio of the dielectric film DF relative to the mask film MK in the etching of the dielectric film DF (dividing the etching rate of the dielectric film DF by the mask MK The value obtained from the etching rate).
又,自包含C xH yF z氣體之處理氣體生成之電漿中包含大量的自C xH yF z氣體解離及/或自C xH yF z系自由基進一步解離之HF物種。HF物種包含氟化氫之氣體、自由基及離子之至少任一種。HF物種作為介電膜DF之蝕刻劑發揮功能。藉由在電漿中包含大量HF物種,而可提高介電膜DF之蝕刻速率。 Also, the plasma generated from the process gas containing CxHyFz gas contains a large number of HF species dissociated from the CxHyFz gas and / or further dissociated from CxHyFz radicals . The HF species includes at least any one of hydrogen fluoride gas, radicals, and ions. The HF species function as an etchant for the dielectric film DF. By including a large amount of HF species in the plasma, the etching rate of the dielectric film DF can be increased.
C xH yF z氣體可具有1個以上之CF 3基。於C xH yF z氣體具有CF 3基之情形時,例如於CH基與CF 3基形成單鍵之情形時,藉由其分子構造而容易解離成HF,從而可於電漿中使HF物種增加。 The C x H y F z gas may have one or more CF 3 groups. When the C x Hy F z gas has a CF 3 group, for example, when the CH group and the CF 3 group form a single bond, it is easy to dissociate into HF due to its molecular structure, so that HF can be used in the plasma Species increase.
再者,處理氣體可包含C
xF
z(x為2以上之整數,z為1以上之整數)氣體而代替上述C
xH
yF
z氣體之一部分或全部。具體而言,亦可使用選自由C
2F
2、C
2F
4、C
3F
8、C
4F
6、C
4F
8及C
5F
8所組成之群中之至少1種。藉此,可抑制電漿中之氫之量,例如,可抑制因過多之氫所引起之形態變差或腔室10內之水分增加等。此處,所謂形態係指遮罩膜MK之表面狀態、開口OP之真圓度等與遮罩之形狀相關之特性。
Furthermore, the processing gas may include C x F z (x is an integer greater than 2, z is an integer greater than 1) gas instead of part or all of the above-mentioned C x H y F z gas. Specifically, at least one selected from the group consisting of C 2 F 2 , C 2 F 4 , C 3 F 8 , C 4 F 6 , C 4 F 8 and C 5 F 8 can also be used. Thereby, the amount of hydrogen in the plasma can be suppressed, for example, the deterioration of morphology or the increase of moisture in the
C xH yF z氣體之流量相對於反應氣體之總流量為20體積%以下。C xH yF z氣體之流量相對於反應氣體之總流量,例如亦可為15體積%以下、10體積%以下、5體積%以下。 The flow rate of the C x H y F z gas is 20% by volume or less relative to the total flow rate of the reaction gas. The flow rate of the CxHyFz gas may be, for example, 15 vol % or less, 10 vol % or less, or 5 vol % or less with respect to the total flow rate of the reaction gas.
反應氣體可包含含有鹵素之氣體。含有鹵素之氣體可調整蝕刻時之遮罩膜MK或介電膜DF之形狀。含有鹵素之氣體可為含氯氣體、含溴氣體及/或含碘氣體。作為含氯氣體,可使用Cl 2、SiCl 2、SiCl 4、CCl 4、SiH 2Cl 2、Si 2Cl 6、CHCl 3、SO 2Cl 2、BCl 3、PCl 3、PCl 5、POCl 3等氣體。作為含溴氣體,可使用Br 2、HBr、CBr 2F 2、C 2F 5Br、PBr 3、PBr 5、POBr 3、BBr 3等氣體。作為含碘氣體,可使用HI、CF 3I、C 2F 5I、C 3F 7I、IF 5、IF 7、I 2、PI 3等氣體。於一例中,作為含有鹵素之氣體,使用選自由Cl 2氣體、Br 2氣體、HBr氣體、CF 3I氣體、IF 7氣體及C 2F 5Br所組成之群中之至少1種。於另一例中,作為含有鹵素之氣體,使用Cl 2氣體及HBr氣體。 The reactive gas may contain a halogen-containing gas. The gas containing halogen can adjust the shape of the mask film MK or the dielectric film DF during etching. The halogen-containing gas may be a chlorine-containing gas, a bromine-containing gas, and/or an iodine-containing gas. As chlorine-containing gas, Cl 2 , SiCl 2 , SiCl 4 , CCl 4 , SiH 2 Cl 2 , Si 2 Cl 6 , CHCl 3 , SO 2 Cl 2 , BCl 3 , PCl 3 , PCl 5 , POCl 3 and other gases can be used. . As the bromine-containing gas, gases such as Br 2 , HBr, CBr 2 F 2 , C 2 F 5 Br, PBr 3 , PBr 5 , POBr 3 , and BBr 3 can be used. As the iodine-containing gas, gases such as HI, CF 3 I, C 2 F 5 I, C 3 F 7 I, IF 5 , IF 7 , I 2 , and PI 3 can be used. In one example, at least one selected from the group consisting of Cl 2 gas, Br 2 gas, HBr gas, CF 3 I gas, IF 7 gas, and C 2 F 5 Br is used as the halogen-containing gas. In another example, Cl 2 gas and HBr gas are used as the halogen-containing gas.
反應氣體亦可包含含氮氣體。含氮氣體可抑制蝕刻時之遮罩膜MK之開口OP之堵塞。含氮氣體例如可為選自由NF 3氣體、N 2氣體及NH 3氣體所組成之群中之至少1種氣體。 The reaction gas may also contain nitrogen-containing gas. The nitrogen-containing gas can suppress clogging of the opening OP of the mask film MK during etching. The nitrogen-containing gas may be, for example, at least one gas selected from the group consisting of NF 3 gas, N 2 gas and NH 3 gas.
反應氣體可包含含氧氣體。與含氮氣體同樣地,含氧氣體可抑制蝕刻時之遮罩膜MK之堵塞。作為含氧氣體,例如可使用選自由O 2、CO、CO 2、H 2O及H 2O 2所組成之群中之至少1種氣體。於一例中,反應氣體包含H 2O以外之含氧氣體、即選自由O 2、CO、CO 2及H 2O 2所組成之群中之至少1種氣體。含氧氣體對遮罩膜MK之損傷較少,可抑制形態變差。 The reactive gas may contain an oxygen-containing gas. Similar to the nitrogen-containing gas, the oxygen-containing gas suppresses clogging of the mask film MK during etching. As the oxygen-containing gas, for example, at least one gas selected from the group consisting of O 2 , CO, CO 2 , H 2 O and H 2 O 2 can be used. In one example, the reaction gas contains an oxygen-containing gas other than H 2 O, that is, at least one gas selected from the group consisting of O 2 , CO, CO 2 and H 2 O 2 . Oxygen-containing gas causes less damage to the mask film MK and suppresses deterioration of the shape.
圖6係表示蝕刻後之遮罩膜MK之形狀之一例之圖。圖6係於基板處理裝置1中對具有與基板W相同之構造之樣品基板進行蝕刻時之遮罩膜MK之形狀(俯視)之一例。於圖6中,「No.」表示蝕刻後之樣品基板之試樣編號。「處理氣體」表示蝕刻時所使用之處理氣體,「A」表示包含HF氣體、C
4H
2F
6氣體、O
2氣體、NF
3氣體、HBr氣體及Cl
2氣體之處理氣體(以下稱為「處理氣體A」)。處理氣體A包含相對於反應氣體之總流量為80體積%以上的HF氣體,且包含相對於反應氣體之總流量為4~5體積%的O
2氣體。「處理氣體」之「B」表示不含NF
3氣體且相應地使O
2氣體之流量增加,除此以外與處理氣體A相同之處理氣體(以下稱為「處理氣體B」)。處理氣體B包含相對於反應氣體之總流量為6~7體積%的O
2氣體。「上部電極施加」之「有」表示於蝕刻中對基板處理裝置1之上部電極30供給負極性之直流電壓,「無」表示不對上部電極30供給負極性之直流電壓。根據圖6之「遮罩形狀」可知,於「上部電極施加」之「有」之情形及「無」之情形時,使用包含NF
3之處理氣體A時(試樣1及試樣3),開口OP之真圓度均會變差以及均會於遮罩膜MK之表面產生階差。另一方面,可知使用不含NF
3氣體且O
2氣體之流量增加之處理氣體B時(試樣2及試樣4),開口OP之真圓度較高,又,不會於遮罩膜MK之表面產生階差,與使用處理氣體A時(試樣1及試樣3)相比,遮罩膜MK之形態得以改善。
FIG. 6 is a diagram showing an example of the shape of the mask film MK after etching. FIG. 6 shows an example of the shape (planar view) of the mask film MK when a sample substrate having the same structure as the substrate W is etched in the
反應氣體可包含含磷氣體。作為含磷氣體,例如,可使用選自由PF 3、PF 5、POF 3、HPF 6、PCl 3、PCl 5、POCl 3、PBr 3、PBr 5、POBr 3、PI 3、P 4O 10、P 4O 8、P 4O 6、PH 3、Ca 3P 2、H 3PO 4及Na 3PO 4所組成之群中之至少1種氣體。該等之中,可使用PF 3、PF 5、PCl 3等含鹵化磷之氣體,例如亦可使用PF 3、PF 5等含氟化磷之氣體。 The reaction gas may contain a phosphorus-containing gas. As the phosphorus-containing gas, for example, a gas selected from PF 3 , PF 5 , POF 3 , HPF 6 , PCl 3 , PCl 5 , POCl 3 , PBr 3 , PBr 5 , POBr 3 , PI 3 , P 4 O 10 , P At least one gas from the group consisting of 4 O 8 , P 4 O 6 , PH 3 , Ca 3 P 2 , H 3 PO 4 and Na 3 PO 4 . Among them, phosphorus halide-containing gases such as PF 3 , PF 5 , and PCl 3 can be used. For example, phosphorus fluoride-containing gases such as PF 3 and PF 5 can also be used.
除此以外,處理氣體亦可包含BF 3、BCl 3、BBr 3、B 2H 6等含硼氣體。又,處理氣體亦可包含SF 6及COS等含硫氣體。 In addition, the processing gas may also include boron-containing gases such as BF 3 , BCl 3 , BBr 3 , and B 2 H 6 . In addition, the processing gas may contain sulfur-containing gases such as SF 6 and COS.
處理氣體可除了上述反應氣體以外,還包含惰性氣體(Ar等高貴氣體)。The processing gas may contain an inert gas (noble gas such as Ar) in addition to the above-mentioned reaction gas.
供給至內部空間10s內之處理氣體之壓力藉由控制連接於腔室本體12之排氣裝置50之壓力調整閥而調整。處理氣體之壓力例如可為5 mTorr(0.7 Pa)以上100 mTorr(13.3 Pa)以下、10 mTorr(1.3 Pa)以上60 mTorr(8.0 Pa)以下或20 mTorr(2.7 Pa)以上40 mTorr(5.3 Pa)以下。The pressure of the process gas supplied into the
繼而,於步驟ST22中,自電漿生成部(高頻電源62及/或偏壓電源64)供給高頻電力及/或電氣偏壓。藉此,於上部電極30與基板支持器14之間生成高頻電場,自內部空間10s內之處理氣體生成電漿。所生成之電漿中之離子、自由基等活性種被基板W吸引而對基板W進行蝕刻。Next, in step ST22, high-frequency power and/or electrical bias are supplied from the plasma generation unit (high-
於步驟ST22中,基板支持器14之溫度設定為0℃以下。設定之基板支持器14之溫度例如可為0℃以下,亦可為-10℃以下、-20℃以下、-30℃以下或-40℃以下、-60℃以下、-70℃以下。基板支持器14之溫度可藉由自冷卻器單元供給之熱交換介質而調整。In step ST22, the temperature of the
圖7係表示蝕刻之溫度依存性之一例之圖。圖7表示使用電漿處理裝置1自為氟化氫氣體及氬氣之混合氣體之處理氣體生成電漿而對氧化矽膜進行蝕刻所得的實驗結果。於該實驗中,一面變更基板支持器14之溫度,一面對氧化矽膜進行蝕刻,使用四極質譜儀(quadrupole mass analyzer),測定氧化矽膜之蝕刻時之氣相中之氟化氫(HF)之量與SiF
3之量。圖7之橫軸表示基板支持器14之溫度T(℃),縱軸表示氟化氫(HF)及SiF
3之量(以氦為基準標準化所得之強度)。
FIG. 7 is a graph showing an example of temperature dependence of etching. FIG. 7 shows experimental results obtained by etching a silicon oxide film by using the
如圖7所示,於基板支持器14之溫度為約-60℃以下之溫度時,作為蝕刻劑之氟化氫(HF)之量減少,藉由氧化矽膜之蝕刻所生成之反應產物即SiF
3之量增加。即,於該實驗中,於基板支持器14之溫度為約-60℃以下之溫度時,於氧化矽膜之蝕刻中利用之蝕刻劑之量增加。
As shown in FIG. 7 , when the temperature of the
因此,根據該實驗可知,基板支持器14之溫度越低,則越促進氧化矽膜之蝕刻,因此,可改善介電膜DF相對於遮罩膜MK之選擇比。再者,蝕刻劑之量增加之溫度根據與反應氣體中之氟化氫氣體之流量比或添加氣體等處理條件之關係而變動。因此,亦可於特定條件下調查基板支持器14之溫度與氟化氫之量及SiF
3之量之關係,基於其結果而設定基板支持器14之溫度。
Therefore, according to this experiment, it can be seen that the lower the temperature of the
圖8係表示步驟ST22中之基板W之剖面構造之一例之圖。執行步驟ST22時,遮罩膜MK作為遮罩發揮功能,介電膜DF中與遮罩膜MK之開口OP對應之部分於深度方向(圖8中自上往下之方向)上被蝕刻,而形成凹01部RC。凹部RC係由遮罩膜MK之側壁S1與介電膜DF之側壁S2所包圍之空間。步驟ST22中形成之凹部RC之縱橫比可為20以上,亦可為30以上、40以上、50以上或100以上。FIG. 8 is a diagram showing an example of a cross-sectional structure of the substrate W in step ST22. When step ST22 is performed, the mask film MK functions as a mask, and the portion of the dielectric film DF corresponding to the opening OP of the mask film MK is etched in the depth direction (direction from top to bottom in FIG. 8 ), and The concave 01 portion RC is formed. The recess RC is a space surrounded by the side wall S1 of the mask film MK and the side wall S2 of the dielectric film DF. The aspect ratio of the recess RC formed in step ST22 may be 20 or more, or 30 or more, 40 or more, 50 or more, or 100 or more.
於本處理方法中,反應氣體包含C xH yF z氣體。C xH yF z氣體於電漿中以高密度生成C xH yF z系自由基。C xH yF z系自由基吸附於遮罩膜MK之表面(上表面T1及側壁S1)或介電膜DF之側壁S2而形成保護膜PF。再者,保護膜PF可朝向深度方向(圖8中自上往下之方向)變薄。保護膜PF抑制於執行步驟ST22時遮罩膜MK之表面被蝕刻去除(即,遮罩膜MK之蝕刻速率增加)。藉此,介電膜DF相對於遮罩膜MK之選擇比提高。 In this processing method, the reaction gas includes C x H y F z gas. C x H y F z gas generates C x H y F z free radicals with high density in the plasma. C x H y F z is free radicals adsorbed on the surface of the mask film MK (the upper surface T1 and the sidewall S1 ) or the sidewall S2 of the dielectric film DF to form the protection film PF. Furthermore, the protective film PF may become thinner toward the depth direction (direction from top to bottom in FIG. 8 ). The protective film PF inhibits the surface of the mask film MK from being etched away when step ST22 is performed (ie, the etching rate of the mask film MK increases). Thereby, the selectivity ratio of the dielectric film DF with respect to the mask film MK improves.
保護膜PF可抑制介電膜DF之橫向(圖8之左右方向)之蝕刻。於C xH yF z氣體之流量相對於反應氣體之總流量為20體積%以下之情形時,可進一步抑制碳過度沈積於遮罩膜MK之側壁S1及/或介電膜DF而導致遮罩膜MK之開口OP堵塞。於反應氣體包含含氧氣體之情形時,可進一步抑制碳過度沈積於遮罩膜MK之側壁S1及/或介電膜DF而導致遮罩膜MK之開口OP堵塞。藉由以上之至少一個因素,可適當地保持形成於介電膜DF之凹部RC之形狀及/或尺寸。 The protective film PF can suppress etching in the lateral direction (left and right direction in FIG. 8 ) of the dielectric film DF. When the flow rate of the C x H y F z gas relative to the total flow rate of the reaction gas is 20% by volume or less, it can further suppress excessive deposition of carbon on the sidewall S1 of the mask film MK and/or the dielectric film DF to cause masking. The opening OP of the mask MK is blocked. When the reaction gas contains oxygen-containing gas, excessive deposition of carbon on the sidewall S1 of the mask film MK and/or the dielectric film DF can be further prevented from clogging the opening OP of the mask film MK. By at least one of the above factors, the shape and/or size of the recess RC formed in the dielectric film DF can be properly maintained.
C
xH
yF
z氣體於電漿中生成大量HF物種。因此,於執行步驟ST22時,可甚至對形成於介電膜DF之凹部RC之底部BT充分供給HF系物種(蝕刻劑)。又,於執行步驟ST22時,基板支持器14之溫度被控制為0℃以下之低溫。藉由基板W之溫度之上升得以抑制,可促進HF物種(蝕刻劑)於凹部RC之底部BT處之吸附(HF物種於低溫下吸附係數進一步增加)。藉由以上之至少一個因素,可提高介電膜DF之蝕刻速率。
C x H y F z gas generates a large number of HF species in the plasma. Therefore, when step ST22 is performed, the HF-based species (etchant) can be sufficiently supplied even to the bottom BT of the recess RC formed in the dielectric film DF. In addition, when performing step ST22, the temperature of the
再者,於步驟ST22中,於內部空間10s內生成電漿時,可自偏壓電源64對基板支持器14週期性地賦予電氣偏壓之脈衝波。藉由週期性地賦予電氣偏壓之脈衝波,可交替地進行蝕刻與保護膜PF之形成。Furthermore, in step ST22 , when plasma is generated in the
又,於執行步驟ST2時,可使供給至內部空間10s之C
xH
yF
z氣體之流量變化。例如,可於利用包含第1分壓之C
xH
yF
z氣體之反應氣體進行第1蝕刻之後,利用包含第2分壓之C
xH
yF
z氣體之反應氣體進行第2蝕刻。藉此,例如於介電膜DF為不同材料之積層膜之情形時,藉由結合要蝕刻之膜之材料控制C
xH
yF
z氣體之流量,可對該積層膜適當地進行蝕刻。
Also, when step ST2 is executed , the flow rate of the CxHyFz gas supplied to the
又,於執行步驟ST2時,供給至內部空間10s之C xH yF z氣體之流量可於俯視基板W時在基板W之中心部與周邊部不同。藉此,即便於遮罩膜MK之側壁S1所包圍之開口OP之尺寸在基板W之中心部與周邊部不同之情形時,亦可藉由控制C xH yF z氣體之流量之分佈而修正該尺寸之偏差。 In addition, when step ST2 is performed, the flow rate of the CxHyFz gas supplied to the inner space 10s may be different between the central part and the peripheral part of the substrate W when the substrate W is viewed from above. Thereby, even when the size of the opening OP surrounded by the side wall S1 of the mask film MK is different between the central part and the peripheral part of the substrate W, it is possible to control the distribution of the flow rate of the CxHyFz gas . Correct the deviation of this dimension.
又,於執行步驟ST2時,可變更腔室10(內部空間10s)內之壓力或自偏壓電源64供給至基板支持器14之電氣偏壓。例如,步驟ST2可包含:第1工序,其係將腔室10內設為第1壓力,對基板支持器14供給第1電氣偏壓而對介電膜DF進行蝕刻;及第2工序,其係將腔室10內設為第2壓力,對基板支持器14供給第2電氣偏壓而對介電膜DF進行蝕刻。步驟ST2亦可交替地重複第1工序與第2工序。第1壓力可與第2壓力不同,例如可大於第2壓力。第1電氣偏壓可與第2電氣偏壓不同,例如,第1電氣偏壓之絕對值可大於第2電氣偏壓之絕對值。藉由適當調整第1壓力、第2壓力、第1電氣偏壓及第2電氣偏壓,例如,可於第1工序中在凹部RC到達基底膜UF之前或即將到達之前對介電膜DF進行各向異性蝕刻,於第2工序中以使凹部RC之底部於橫向上擴大之方式進行各向同性蝕刻。In addition, when performing step ST2, the pressure in the chamber 10 (
以下,對為了評價本處理方法而進行之各種實驗進行說明。本發明不受以下之實驗任何限定。Hereinafter, various experiments conducted to evaluate this treatment method will be described. The present invention is not limited by the following experiments.
(實驗1)
圖9係表示實驗1之測定結果之圖。於實驗1中,測定各種反應氣體中之HF物種之生成量。於實驗1中,向基板處理裝置1之內部空間10s供給C
4H
2F
6氣體、C
4F
8氣體、C
4F
6氣體及CH
2F
2氣體中之任一種與Ar氣體作為反應氣體而生成電漿10分鐘,利用四極質譜儀(quadrupole mass analyzer)測定電漿生成前與電漿生成後之HF強度。基板支持器14之溫度設定為-40℃。圖9之縱軸表示電漿生成前之HF強度與電漿生成後之HF強度之差。縱軸之值越大,則意味著電漿中之HF物種之生成量越多。
(Experiment 1) FIG. 9 is a graph showing the measurement results of
如圖9所示,本處理方法之反應氣體之一實施例之C 4H 2F 6氣體與不含氫元素之C 4F 8氣體及C 4F 6氣體相比不言而喻,即便與包含氫元素之CH 2F 2氣體相比,電漿中之HF物種之生成量亦更多。 As shown in Figure 9, the C 4 H 2 F 6 gas of one embodiment of the reaction gas of this treatment method is self-evident compared with the C 4 F 8 gas and C 4 F 6 gas without hydrogen, even if compared with Compared with CH 2 F 2 gas containing hydrogen, the generation amount of HF species in the plasma is also larger.
(實驗2)
圖10及圖11係表示實驗2之測定結果之圖。於實驗2中,測定各種處理氣體下之蝕刻速率及選擇比。於實驗2中,於基板支持器14上準備具有與基板W相同之構造之樣品基板。樣品基板於矽膜上具有氧化矽作為介電膜DF,且具有有機膜作為遮罩膜MK。向基板處理裝置1之內部空間10s供給處理氣體而生成電漿,對該樣品基板之介電膜DF進行蝕刻。基板支持器14之溫度設定為-40℃。如圖10及圖11所示,處理氣體中之反應氣體為包含C
4F
8氣體、CH
2F
2氣體或C
4H
2F
6氣體中之任一種之各情形時,測定介電膜DF之蝕刻速率(E/R[nm/min]、圖10)與介電膜DF相對於遮罩膜MK之選擇比(Sel.、圖11)。C
4F
8氣體之流量係反應氣體之總流量之5體積%。CH
2F
2氣體之流量係反應氣體之總流量之15體積%。C
4H
2F
6氣體之流量係反應氣體之總流量之5體積%。反應氣體包含相對於反應氣體之總流量為70~90體積%的HF氣體。
(Experiment 2) FIGS. 10 and 11 are diagrams showing the measurement results of
如圖10及圖11所示,本處理方法之反應氣體之一實施例之包含C 4H 2F 6氣體之處理氣體與包含C 4F 8氣體或CH 2F 2氣體作為反應氣體之處理氣體相比,蝕刻速率及選擇比均更高。 As shown in Figure 10 and Figure 11, one embodiment of the reaction gas of this processing method is a processing gas containing C 4 H 2 F 6 gas and a processing gas containing C 4 F 8 gas or CH 2 F 2 gas as a reactive gas In comparison, the etch rate and selectivity are higher.
(實驗3)
圖12及圖13係表示實驗3之測定結果之圖。於實驗3中,測定變更凹部RC之縱橫比時之各種處理氣體下之蝕刻速率及弓曲CD(Critical Dimension,臨界尺寸)。於實驗3中,於基板支持器14上準備具有與實驗2相同之構造之樣品基板。向基板處理裝置1之內部空間10s供給處理氣體而生成電漿,對該樣品基板之介電膜DF進行蝕刻。基板支持器14之溫度設定為-40℃。圖12及圖13係對處理氣體中之反應氣體包含C
4F
8氣體或C
4H
2F
6氣體之各情況表示變更凹部RC之縱橫比(AR)時之介電膜DF相對於遮罩膜MK之選擇比(Sel.、圖12)與介電膜DF之凹部RC之最大寬度(弓曲CD:CD
m[nm]、圖13)之關係。再者,選擇比可藉由將介電膜DF之蝕刻速率除以遮罩膜MK之蝕刻速率而求出。C
4F
8氣體或C
4H
2F
6氣體係反應氣體之總流量之5體積%。反應氣體包含相對於反應氣體之總流量為90體積%以上的HF氣體。
(Experiment 3) FIGS. 12 and 13 are diagrams showing the measurement results of
如圖12及圖13所示,使用本處理方法之處理氣體之一實施例之包含C 4H 2F 6氣體之反應氣體時,即便形成於介電膜DF之凹部RC之縱橫比變高,與使用包含C 4F 8氣體之反應氣體時相比,亦維持較高之選擇比,並且弓曲CD之增加得以抑制。 As shown in FIG. 12 and FIG. 13 , when the reaction gas containing C4H2F6 gas which is an embodiment of the processing gas of this processing method is used, even if the aspect ratio of the concave part RC formed in the dielectric film DF becomes high, The selectivity was also maintained higher than when the reaction gas containing C 4 F 8 gas was used, and the increase in bow CD was suppressed.
(實驗4)
圖14係表示實驗4之測定結果之圖。於實驗4中,測定利用氧氣清洗基板處理裝置1之腔室10時產生之CO之發射光譜強度(CO強度)之經時變化。於圖14中,CH1係使用包含相對於反應氣體之總流量為4體積%之C
4H
2F
6氣體的處理氣體對具有與實驗2相同之構造之樣品基板進行蝕刻後之腔室。CH2係使用包含相對於反應氣體之總流量為16體積%之CH
2F
2氣體的處理氣體對具有與實驗2相同之構造之樣品基板進行蝕刻後之腔室。CO強度係藉由清洗氣體(氧氣)與腔室10內之含碳沈積物發生反應而測量,可作為腔室內之清洗進展之指南。
(Experiment 4) FIG. 14 is a graph showing the measurement results of
如圖14所示,CH1中之CO強度於清洗剛開始後達到峰值,然後急遽減少,於清洗開始20~30秒鐘後變成0。CH2中之CO強度具有低於CH1之峰值,減少量亦緩和,即便於清洗開始200秒鐘後亦不變成0。即,使用本處理方法之反應氣體之一實施例之包含C 4H 2F 6氣體之處理氣體時,與使用包含CH 2F 2氣體之處理氣體時相比,可縮短蝕刻後之腔室之清洗時間。 As shown in Figure 14, the CO intensity in CH1 peaked immediately after the cleaning started, then decreased sharply, and became zero 20-30 seconds after the cleaning started. The CO intensity in CH2 has a peak value lower than that of CH1, and the amount of decrease is moderate, and it does not become zero even after 200 seconds from the start of cleaning. That is, when using the processing gas containing C 4 H 2 F 6 gas, which is an embodiment of the reaction gas of the processing method, compared with using the processing gas containing CH 2 F 2 gas, the length of the chamber after etching can be shortened. Cleaning time.
又,揭示之實施方式進而包含以下態樣。Moreover, the disclosed embodiment further includes the following aspects.
(附記1) 一種蝕刻氣體組合物,其係包含HF氣體與選自由C 4H 2F 6氣體、C 4H 2F 8氣體、C 3H 2F 4氣體及C 3H 2F 6氣體所組成之群中之至少1種C xH yF z氣體的反應氣體,且上述HF氣體之流量多於上述C xH yF z氣體之流量。 (Appendix 1) An etching gas composition comprising HF gas and a gas selected from C 4 H 2 F 6 gas, C 4 H 2 F 8 gas, C 3 H 2 F 4 gas, and C 3 H 2 F 6 gas. The reaction gas of at least one C x H y F z gas in the group formed, and the flow rate of the above-mentioned HF gas is greater than the flow rate of the above-mentioned C x H y F z gas.
(附記2) 如附記1之蝕刻氣體組合物,其中上述C xH yF z氣體之流量相對於上述反應氣體之總流量為20體積%以下。 ( Additional Note 2) The etching gas composition according to Additional Note 1, wherein the flow rate of the above-mentioned CxHyFz gas relative to the total flow rate of the above-mentioned reaction gas is 20% by volume or less.
(附記3)
如附記1或2之蝕刻氣體組合物,其中上述HF氣體之流量相對於上述反應氣體之總流量為70體積%以上。
(Note 3)
The etching gas composition of
(附記4)
如附記1至3中任一項之蝕刻氣體組合物,其中上述反應氣體進而包含含有鹵素之氣體。
(Note 4)
The etching gas composition according to any one of
(附記5)
如附記4之蝕刻氣體組合物,其中上述含有鹵素之氣體係選自由含氯氣體、含溴氣體及含碘氣體所組成之群中之至少1種。
(Note 5)
The etching gas composition as in
(附記6)
如附記4之蝕刻氣體組合物,其中上述含有鹵素之氣體係選自由Cl
2、SiCl
2、SiCl
4、CCl
4、SiH
2Cl
2、Si
2Cl
6、CHCl
3、SO
2Cl
2、BCl
3、PCl
3、PCl
5、POCl
3、Br
2、HBr、CBr
2F
2、C
2F
5Br、PBr
3、PBr
5、POBr
3、BBr
3、HI、CF
3I、C
2F
5I、C
3F
7I、IF
5、IF
7、I
2及PI
3所組成之群中之至少1種。
(Annex 6) The etching gas composition as in
(附記7)
如附記1至5中任一項之蝕刻氣體組合物,其中上述反應氣體包含含磷氣體。
(Note 7)
The etching gas composition according to any one of
(附記8)
如附記1至7中任一項之蝕刻氣體組合物,其中上述反應氣體進而包含含氧氣體。
(Note 8)
The etching gas composition according to any one of
(附記9)
如附記1至8中任一項之蝕刻氣體組合物,其中上述反應氣體進而包含選自由含硼氣體及含硫氣體所組成之群中之至少1種。
(Note 9)
The etching gas composition according to any one of
本處理方法可於不脫離本發明之範圍及主旨之情況下進行各種變化。例如,本處理方法除了可使用電容耦合型之基板處理裝置1執行以外,亦可使用利用感應耦合型電漿或微波電漿等任意之電漿源之基板處理裝置而執行。Various changes can be made in this processing method without departing from the scope and spirit of the present invention. For example, this processing method can be executed using a substrate processing apparatus using any plasma source such as inductively coupled plasma or microwave plasma, in addition to the capacitively coupled
1:基板處理裝置
10:腔室
10s:內部空間
12:腔室本體
12e:排氣口
12g:閘閥
12p:通路
13:支持部
14:基板支持器
16:電極板
18:下部電極
18f:流路
20:靜電吸盤
20p:直流電源
20s:開關
22a:配管
22b:配管
24:氣體供給管線
25:邊緣環
30:上部電極
32:構件
34:頂板
34a:氣體噴出孔
36:支持體
36a:氣體擴散室
36b:複數個氣孔
36c:氣體導入口
38:氣體供給管
40:氣體源群
41:流量控制器群
42:閥群
46:護罩
48:擋板
50:排氣裝置
52:排氣管
62:高頻電源
64:偏壓電源
66:匹配器
68:匹配器
70:電源
80:控制部
BT:底部
CT:控制部
DF:介電膜
LLM1:裝載閉鎖模組
LLM2:裝載閉鎖模組
LM:承載器模組
LP1:裝載埠
LP2:裝載埠
LP3:裝載埠
MK:遮罩膜
OP:開口
PF:保護膜
PM1~PM6:基板處理室
PS:基板處理系統
RC:凹部
S1:側壁
S2:側壁
T1:上表面
TM:搬送模組
UF:基底膜
W:基板
1: Substrate processing device
10:
圖1係概略性地表示基板處理裝置1之圖。
圖2係表示高頻電力HF及電氣偏壓之一例之時序圖。
圖3係概略性地表示基板處理系統PS之圖。
圖4係表示基板W之剖面構造之一例之圖。
圖5係表示本處理方法之流程圖。
圖6係表示蝕刻後之遮罩膜MK之形狀之一例之圖。
圖7係表示蝕刻之溫度依存性之一例之圖。
圖8係表示步驟ST22中之基板W之剖面構造之一例之圖。
圖9係表示實驗1之測定結果之圖。
圖10係表示實驗2之測定結果之圖。
圖11係表示實驗2之測定結果之圖。
圖12係表示實驗3之測定結果之圖。
圖13係表示實驗3之測定結果之圖。
圖14係表示實驗4之測定結果之圖。
FIG. 1 is a diagram schematically showing a
Claims (28)
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