TW202241121A - Set value auto-adjusting device and method thereof - Google Patents

Set value auto-adjusting device and method thereof Download PDF

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TW202241121A
TW202241121A TW110111753A TW110111753A TW202241121A TW 202241121 A TW202241121 A TW 202241121A TW 110111753 A TW110111753 A TW 110111753A TW 110111753 A TW110111753 A TW 110111753A TW 202241121 A TW202241121 A TW 202241121A
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value
mentioned
limit value
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TWI770918B (en
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曾柏銜
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新唐科技股份有限公司
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/24Pc safety
    • G05B2219/24215Scada supervisory control and data acquisition

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Abstract

A set value auto-adjusting device is provided in the invention. The set value auto-adjusting device comprises a first register circuit, a second register circuit, a control logic circuit and a comparison circuit. The first register circuit stores an increment value and a decrement value. The second register circuit stores a first set value. The control logic circuit is coupled to the first register circuit and the second register circuit, and in response to a trigger event, the control logic circuit determines whether to adjust the first set value according to the increment value and the decrement value. The comparison circuit is coupled to the second register circuit and the control logic circuit. The comparison circuit receives an input value and compares the input value with the first set value to determine whether the input value is larger than or equal to the first set value to generate the trigger event to a CPU or a peripheral device.

Description

設定值自動調整裝置和方法Setting value automatic adjustment device and method

本發明之實施例主要係有關於一設定值自動調整技術,特別係有關於根據一觸發事件,判斷是否根據遞增值或遞減值調整設定值之設定值自動調整技術。The embodiments of the present invention are mainly related to an automatic setting value adjustment technology, especially related to a setting value automatic adjustment technology for judging whether to adjust the setting value according to an increment value or a decrement value according to a trigger event.

一般電子裝置要更改其之設定值時,都需要中央處理器介入去更改電子裝置之暫存器所儲存之設定值。舉例來說,當使用類比數位轉換器(Analog-to-digital converter,ADC)控制器來監控電路上的電壓時,會設定兩個設定值用來做為ADC值比對的上限值和下限值,以構成一個監控視窗(monitor window)。然而,監控視窗的範圍是固定的,若要變動監控視窗的範圍則需要中央處理器介入去更改ADC控制器之暫存器中所儲存之上限值和下限值。When a general electronic device wants to change its setting value, the central processing unit is required to intervene to change the setting value stored in the register of the electronic device. For example, when using an analog-to-digital converter (Analog-to-digital converter, ADC) controller to monitor the voltage on the circuit, two set values will be set as the upper limit and lower for ADC value comparison. Limits to form a monitor window. However, the range of the monitoring window is fixed, and if the range of the monitoring window is to be changed, the central processing unit needs to intervene to change the upper limit value and the lower limit value stored in the register of the ADC controller.

有鑑於上述先前技術之問題,本發明之實施例提供了一種設定值自動調整裝置和方法。In view of the above-mentioned problems in the prior art, embodiments of the present invention provide an automatic setting value adjustment device and method.

根據本發明之一實施例提供了一種設定值自動調整裝置。設定值自動調整裝置包括一第一暫存電路、一第二暫存電路、一控制邏輯電路和一比較電路。第一暫存電路儲存一遞增值和一遞減值。第二暫存電路儲存一第一設定值。控制邏輯電路耦接上述第一暫存電路和上述第二暫存電路,以及根據一觸發事件,判斷是否根據上述遞增值或上述遞減值調整上述第一設定值。比較電路耦接上述第二暫存電路和上述控制邏輯電路。上述比較電路接收一輸入值,且比較上述輸入值是否大於或等於上述第一設定值,以產生上述觸發事件給一中央處理器或一周邊裝置。According to an embodiment of the present invention, a set value automatic adjustment device is provided. The set value automatic adjustment device includes a first temporary storage circuit, a second temporary storage circuit, a control logic circuit and a comparison circuit. The first temporary storage circuit stores an increment value and a decrement value. The second temporary storage circuit stores a first setting value. The control logic circuit is coupled to the first temporary storage circuit and the second temporary storage circuit, and determines whether to adjust the first set value according to the increment value or the decrement value according to a trigger event. The comparison circuit is coupled to the second temporary storage circuit and the control logic circuit. The comparison circuit receives an input value, and compares whether the input value is greater than or equal to the first set value, so as to generate the trigger event to a central processing unit or a peripheral device.

根據一些實施例,第二暫存電路更儲存一第二設定值,其中上述第一設定值係一上限值,且上述第二設定值係一下限值。According to some embodiments, the second temporary storage circuit further stores a second set value, wherein the first set value is an upper limit value, and the second set value is a lower limit value.

根據一些實施例,設定值自動調整裝置更包括一比較電路。比較電路耦接第二暫存電路和控制邏輯電路。比較電路比較上述輸入值是否大於或等於上述上限值,和比較上述輸入值是否小於或等於上述下限值,以產生上述觸發事件。當上述輸入值大於或等於上述上限值時,控制邏輯電路根據上述觸發事件,將上述上限值和上述下限值加上上述遞增值,並根據調整後之上述上限值和上述下限值,更新儲存在上述第二暫存電路之上述上限值和上述下限值。當上述輸入值小於或等於上述下限值時,上述控制邏輯電路根據上述觸發事件,將上述上限值和上述下限值減掉上述遞減值,並根據調整後之上述上限值和上述下限值,更新儲存在上述第二暫存電路之上述上限值和上述下限值。According to some embodiments, the device for automatically adjusting the setting value further includes a comparison circuit. The comparison circuit is coupled to the second register circuit and the control logic circuit. The comparison circuit compares whether the input value is greater than or equal to the upper limit value and whether the input value is less than or equal to the lower limit value, so as to generate the trigger event. When the above-mentioned input value is greater than or equal to the above-mentioned upper limit value, the control logic circuit adds the above-mentioned upper limit value and the above-mentioned lower limit value to the above-mentioned incremental value according to the above-mentioned trigger event, and according to the adjusted above-mentioned upper limit value and the above-mentioned lower limit value, and update the above-mentioned upper limit value and the above-mentioned lower limit value stored in the above-mentioned second temporary storage circuit. When the above-mentioned input value is less than or equal to the above-mentioned lower limit value, the above-mentioned control logic circuit will subtract the above-mentioned decrement value from the above-mentioned upper limit value and the above-mentioned lower limit value according to the above-mentioned trigger event, and then adjust the above-mentioned upper limit value and the above-mentioned lower limit value according to the adjusted limit value, updating the above-mentioned upper limit value and the above-mentioned lower limit value stored in the above-mentioned second temporary storage circuit.

根據一些實施例,當上述輸入值大於或等於上述上限值,或上述輸入值小於或等於上述下限值時,比較電路將上述觸發事件傳送給中央處理器或周邊裝置。According to some embodiments, when the input value is greater than or equal to the upper limit value, or the input value is less than or equal to the lower limit value, the comparison circuit transmits the trigger event to the central processing unit or peripheral device.

根據一些實施例,中央處理器根據上述觸發事件,調整上述周邊裝置之設定值。According to some embodiments, the central processing unit adjusts the setting values of the peripheral devices according to the trigger events.

根據一些實施例,周邊裝置直接根據上述觸發事件,調整其之設定值。According to some embodiments, the peripheral device adjusts its setting value directly according to the above trigger event.

根據一些實施例,中央處理器提供上述遞增值、上述遞減值、上述第一設定值和上述第二設定值之初始值後,進入一睡眠模式。According to some embodiments, the central processing unit enters a sleep mode after providing initial values of the increment value, the decrement value, the first set value, and the second set value.

根據一些實施例,上述遞增值和上述遞減值可相同或不相同。According to some embodiments, the above-mentioned increment value and the above-mentioned decrement value may be the same or different.

根據本發明之一實施例提供了一種設定值自動調整方法。設定值自動調整方法適用一設定值自動調整裝置,其中上述設定值自動調整裝置用以接收一輸入值和傳輸一觸發事件,以觸發一中央處理器或一周邊裝置。設定值自動調整方法之步驟包括:藉由上述設定值自動調整裝置之一比較電路,比較上述輸入值是否大於或等於一第一設定值,以產生上述觸發事件;以及藉由上述設定值自動調整裝置之一控制邏輯電路,根據上述觸發事件,判斷是否根據一遞增值或一遞減值調整上述第一設定值,其中上述遞增值和上述遞減值儲存在上述設定值自動調整裝置之一第一暫存電路,且上述第一設定值儲存在上述設定值自動調整裝置之一第二暫存電路。An embodiment of the present invention provides a method for automatically adjusting a set value. The setting value automatic adjustment method is suitable for a setting value automatic adjustment device, wherein the above setting value automatic adjustment device is used to receive an input value and transmit a trigger event to trigger a central processing unit or a peripheral device. The steps of the automatic setting value adjustment method include: using a comparison circuit of the above-mentioned automatic setting value adjustment device to compare whether the above-mentioned input value is greater than or equal to a first setting value, so as to generate the above-mentioned trigger event; A control logic circuit of the device, according to the above-mentioned trigger event, judges whether to adjust the above-mentioned first set value according to an increment value or a decrement value, wherein the above-mentioned increment value and the above-mentioned decrement value are stored in one of the above-mentioned set value automatic adjustment devices. storage circuit, and the first set value is stored in a second temporary storage circuit of the set value automatic adjustment device.

關於本發明其他附加的特徵與優點,此領域之熟習技術人士,在不脫離本發明之精神和範圍內,當可根據本案實施方法中所揭露之設定值自動調整裝置和方法,做些許的更動與潤飾而得到。With regard to other additional features and advantages of the present invention, those skilled in the art can make some changes according to the set value automatic adjustment device and method disclosed in the implementation method of this case without departing from the spirit and scope of the present invention obtained with retouching.

本章節所敘述的是實施本發明之較佳方式,目的在於說明本發明之精神而非用以限定本發明之保護範圍,本發明之保護範圍當視後附之申請專利範圍所界定者為準。What is described in this chapter is the best way to implement the present invention. The purpose is to illustrate the spirit of the present invention and not to limit the protection scope of the present invention. .

第1圖係顯示根據本發明之一實施例所述之一設定值自動調整裝置100之方塊圖。如第1圖所示,設定值自動調整裝置100可包括至少一第一暫存電路110、一第二暫存電路120和一控制邏輯電路130。此外,注意地是,在第1圖中所示之方塊圖,僅係為了方便說明本發明之實施例,但本發明並不以第1圖為限。FIG. 1 is a block diagram showing an automatic setting value adjustment device 100 according to an embodiment of the present invention. As shown in FIG. 1 , the setting value automatic adjustment device 100 may include at least a first temporary storage circuit 110 , a second temporary storage circuit 120 and a control logic circuit 130 . In addition, it should be noted that the block diagram shown in FIG. 1 is only for the convenience of describing the embodiment of the present invention, but the present invention is not limited to FIG. 1 .

根據本發明一實施例,設定值自動調整裝置100可係一類比數位轉換器(Analog-to-digital converter,ADC)控制器或一脈波寬度調變(Pulse-width modulation, PWM) 控制器,但本發明並不以此為限。According to an embodiment of the present invention, the set value automatic adjustment device 100 may be an analog-to-digital converter (Analog-to-digital converter, ADC) controller or a pulse-width modulation (Pulse-width modulation, PWM) controller, But the present invention is not limited thereto.

根據本發明一實施例,第一暫存電路110可包括一暫存器(圖未顯示),用以儲存一遞增值和一遞減值。根據本發明另一實施例,第一暫存電路110可包括一第一暫存器(圖未顯示)和一第二暫存器(圖未顯示),其中第一暫存器用以儲存一遞增值且第二暫存器用以儲存一遞減值。根據本發明一實施例,遞增值和遞減值可相同或不相同。According to an embodiment of the present invention, the first register circuit 110 may include a register (not shown in the figure) for storing an increment value and a decrement value. According to another embodiment of the present invention, the first register circuit 110 may include a first register (not shown) and a second register (not shown), wherein the first register is used to store a The value is incremented and the second register is used to store a decremented value. According to an embodiment of the present invention, the increment value and the decrement value may be the same or different.

根據本發明一實施例,第二暫存電路120可包括一暫存器(圖未顯示),用以儲存一第一設定值。根據本發明一實施例,第二暫存電路120可包括一第一暫存器(圖未顯示)和一第二暫存器(圖未顯示),其中第一暫存器用以儲存一第一設定值且第二暫存器用以儲存一第二設定值。According to an embodiment of the present invention, the second temporary storage circuit 120 may include a temporary register (not shown in the figure) for storing a first setting value. According to an embodiment of the present invention, the second temporary storage circuit 120 may include a first temporary register (not shown in the figure) and a second temporary register (not shown in the figure), wherein the first temporary register is used to store a first The setting value and the second register are used to store a second setting value.

根據本發明一實施例,第一暫存電路110所儲存之遞增值和遞減值之初始值和第二暫存電路120所儲存之第一設定值和第二設定值之初始值,係由一中央處理器(Central Processing Unit, CPU)300所提供。根據本發明一實施例,當中央處理器300設定好第一暫存電路110所儲存之遞增值和遞減值之初始值和第二暫存電路120所儲存之第一設定值和第二設定值之初始值後,中央處理器300可進入一睡眠模式。According to an embodiment of the present invention, the initial value of the increment value and the decrement value stored in the first temporary storage circuit 110 and the initial value of the first set value and the second set value stored in the second temporary storage circuit 120 are determined by a Provided by a central processing unit (Central Processing Unit, CPU) 300. According to an embodiment of the present invention, when the central processing unit 300 has set the initial value of the increment value and the decrement value stored in the first temporary storage circuit 110 and the first set value and the second set value stored in the second temporary storage circuit 120 After setting the initial value, the CPU 300 can enter a sleep mode.

根據本發明一實施例,控制邏輯電路130可根據接收到之一觸發事件E trigger,判斷是否根據儲存在第一暫存電路110之遞增值或遞減值調整儲存在第二暫存電路120之第一設定值(和第二設定值)。詳細之內容底下會以第2圖為例來做說明。 According to an embodiment of the present invention, the control logic circuit 130 can determine whether to adjust the first value stored in the second temporary storage circuit 120 according to the increment value or the decrement value stored in the first temporary storage circuit 110 according to a received trigger event E trigger . A setpoint (and a second setpoint). The detailed content will be explained below with Figure 2 as an example.

第2圖係顯示根據本發明之一實施例所述之一設定值自動調整裝置200之方塊圖。設定值自動調整裝置200係一ADC控制器。如第2圖所示,設定值自動調整裝置200可包括至少一第一暫存電路210、一第二暫存電路220、一控制邏輯電路230和一比較電路240。注意地是,在第2圖中所示之方塊圖,僅係為了方便說明本發明之實施例,但本發明並不以第2圖為限。此外,第1圖所示之第一暫存電路110、第二暫存電路120和控制邏輯電路130可應用於第2圖之第一暫存電路210、第二暫存電路220和控制邏輯電路230。此外,根據本發明一實施例,第1圖所示之控制邏輯電路130亦可包含為第2圖之控制邏輯電路230和比較電路240。FIG. 2 is a block diagram showing an automatic setting value adjustment device 200 according to an embodiment of the present invention. The setting value automatic adjustment device 200 is an ADC controller. As shown in FIG. 2 , the setting value automatic adjustment device 200 may include at least a first temporary storage circuit 210 , a second temporary storage circuit 220 , a control logic circuit 230 and a comparison circuit 240 . It should be noted that the block diagram shown in FIG. 2 is only for the convenience of describing the embodiment of the present invention, but the present invention is not limited to FIG. 2 . In addition, the first temporary storage circuit 110, the second temporary storage circuit 120 and the control logic circuit 130 shown in FIG. 1 can be applied to the first temporary storage circuit 210, the second temporary storage circuit 220 and the control logic circuit in FIG. 2 230. In addition, according to an embodiment of the present invention, the control logic circuit 130 shown in FIG. 1 may also include the control logic circuit 230 and the comparison circuit 240 in FIG. 2 .

在此實施例中,第一暫存電路210可儲存一遞增值和一遞減值。第二暫存電路220可儲存一第一設定值和一第二設定值,其中第一設定值可係一上限值,且第二設定值可係一下限值。上限值和下限值可用以界定設定值自動調整裝置200(ADC控制器)之一監控視窗(monitor window)的範圍。In this embodiment, the first register circuit 210 can store an increment value and a decrement value. The second temporary storage circuit 220 can store a first set value and a second set value, wherein the first set value can be an upper limit value, and the second set value can be a lower limit value. The upper limit and the lower limit can be used to define the range of a monitor window of the set point automatic adjustment device 200 (ADC controller).

在此實施例中,當比較電路240接收到經由類比數位轉換器(ADC)(圖未顯示)轉換之一輸入值D in(例如:將輸入電壓值轉換後之數位數值)後,比較電路240會將接收到之輸入值D in和上限值以及下限值進行比對,以比較輸入值D in是否大於或等於上限值,和比較輸入值D in是否小於或等於下限值。當輸入值D in大於或等於上限值,或輸入值D in小於或等於下限值時,比較電路240會產生一觸發事件E trigger,並將觸發事件E trigger傳送給控制邏輯電路230。根據本發明一實施例,當輸入值D in大於或等於上限值時,觸發事件E trigger會係一第一數值,以及當輸入值D in小於或等於下限值時,觸發事件E trigger會係一第二數值。 In this embodiment, when the comparison circuit 240 receives an input value D in converted by an analog-to-digital converter (ADC) (not shown in the figure) (for example: a digital value converted from the input voltage value), the comparison circuit 240 The received input value D in is compared with the upper limit value and the lower limit value to compare whether the input value D in is greater than or equal to the upper limit value and whether the input value D in is less than or equal to the lower limit value. When the input value D in is greater than or equal to the upper limit, or the input value D in is less than or equal to the lower limit, the comparison circuit 240 generates a trigger event E trigger and transmits the trigger event E trigger to the control logic circuit 230 . According to an embodiment of the present invention, when the input value D in is greater than or equal to the upper limit value, the trigger event E trigger will be a first value, and when the input value D in is less than or equal to the lower limit value, the trigger event E trigger will be Coordinates a second value.

控制邏輯電路230接收到觸發事件E trigger後,控制邏輯電路230可根據觸發事件E trigger,得知輸入值D in係大於或等於上限值,或輸入值D in係小於或等於下限值。當輸入值D in大於或等於上限值時,控制邏輯電路230會將上限值和下限值加上遞增值,並將調整後之上限值和下限值回傳給第二暫存電路220,以更新儲存在第二暫存電路220之上限值和下限值。當輸入值D in小於或等於下限值時,控制邏輯電路230會將上限值和下限值減掉遞減值,並將調整後之上限值和下限值會傳給第二暫存電路220,以更新儲存在第二暫存電路220之上限值和下限值。因此,在此實施例中,設定值自動調整裝置200(ADC控制器)可根據接收到之觸發事件E trigger,自動去調整監控視窗的範圍(即調整上限值和下限值)。也就是說,在此實施例中,不需要中央處理器介入(即中央處理器不須被喚醒),設定值自動調整裝置200(ADC控制器)即可根據接收到之觸發事件E trigger,自動去調整監控視窗的範圍,因而達到省電之效果。 After the control logic circuit 230 receives the trigger event E trigger , the control logic circuit 230 can know that the input value D in is greater than or equal to the upper limit value or the input value D in is less than or equal to the lower limit value according to the trigger event E trigger . When the input value D in is greater than or equal to the upper limit value, the control logic circuit 230 will add the upper limit value and the lower limit value to the incremental value, and return the adjusted upper limit value and lower limit value to the second temporary storage The circuit 220 is used to update the upper limit value and the lower limit value stored in the second temporary storage circuit 220 . When the input value D in is less than or equal to the lower limit value, the control logic circuit 230 will subtract the decrement value from the upper limit value and the lower limit value, and pass the adjusted upper limit value and lower limit value to the second temporary storage The circuit 220 is used to update the upper limit value and the lower limit value stored in the second temporary storage circuit 220 . Therefore, in this embodiment, the setting value automatic adjusting device 200 (ADC controller) can automatically adjust the range of the monitoring window (ie adjust the upper limit and the lower limit) according to the received trigger event E trigger . That is to say, in this embodiment, the setting value automatic adjustment device 200 (ADC controller) can automatically adjust the set value according to the received trigger event E trigger without the intervention of the central processing unit (that is, the central processing unit does not need to be woken up). To adjust the scope of the monitoring window, thus achieving the effect of power saving.

第二暫存電路220儲存之上限值和下限值更新後,比較電路240將會根據更新之上限值和下限值來判斷新接收到之輸入值D inAfter the upper limit value and the lower limit value stored in the second temporary storage circuit 220 are updated, the comparison circuit 240 will judge the newly received input value D in according to the updated upper limit value and lower limit value.

在此實施例中,比較電路240亦可將觸發事件E trigger傳送給中央處理器或一周邊裝置(例如:PWM控制器、數位類比轉換器(Digital-to-analog converter,DAC)控制器、週邊記憶體直接存取 (Peripheral Direct Memory Access controller,PDMA) 控制器、 計時器(Timer)、通用型之輸入輸出 (General-Purpose Input/Output,GPIO)或類比比較器(Analog Comparator,ACMP)控制器,但本發明不以此為限)。 In this embodiment, the comparison circuit 240 can also transmit the trigger event E trigger to the central processing unit or a peripheral device (for example: PWM controller, digital-to-analog converter (Digital-to-analog converter, DAC) controller, peripheral Direct memory access (Peripheral Direct Memory Access controller, PDMA) controller, timer (Timer), general-purpose input and output (General-Purpose Input/Output, GPIO) or analog comparator (Analog Comparator, ACMP) controller , but the present invention is not limited thereto).

根據本發明一實施例,中央處理器可根據觸發事件E trigger,調整周邊裝置之設定值。底下將會以第3圖來做說明。 According to an embodiment of the present invention, the central processing unit can adjust the setting values of the peripheral devices according to the trigger event E trigger . Figure 3 will be used below to illustrate.

根據本發明另一實施例,周邊裝置可直接從設定值自動調整裝置200接收觸發事件E trigger,並根據觸發事件E trigger,調整其之設定值。底下將會以第4圖來做說明。 According to another embodiment of the present invention, the peripheral device may directly receive the trigger event E trigger from the setting value automatic adjustment device 200 , and adjust its setting value according to the trigger event E trigger . Figure 4 will be used below to illustrate.

第3圖係顯示根據本發明之一實施例所述之調整一周邊裝置之設定值之示意圖。如第3圖所示,當比較電路240傳送一觸發事件E trigger給中央處理器300後,中央處理器300可根據接收到之觸發事件E trigger,去調整周邊裝置400(例如:一PWM控制器,但本發明不以此為限)之一工作(duty)設定值。 FIG. 3 is a schematic diagram showing adjusting a setting value of a peripheral device according to an embodiment of the present invention. As shown in FIG. 3, after the comparison circuit 240 sends a trigger event E trigger to the central processing unit 300, the central processing unit 300 can adjust the peripheral device 400 (for example: a PWM controller) according to the received trigger event E trigger , but the present invention is not limited thereto) one of the duty setting values.

第4圖係顯示根據本發明之另一實施例所述之調整一周邊裝置之設定值之示意圖。如第4圖所示,比較電路240可直接傳送一觸發事件E trigger給周邊裝置400(例如:一PWM控制器,但本發明不以此為限)。周邊裝置400接收到觸發事件E trigger後,可根據接收到之觸發事件E trigger,直接調整其之工作(duty)設定值。具體來說,如第4圖所示,周邊裝置400可包含一第三暫存電路410、一第四暫存電路420和一第二控制邏輯電路430。在此實施例中,第1圖所示之第一暫存電路110、第二暫存電路120和控制邏輯電路130可應用於第4圖之第三暫存電路410、第四暫存電路420和第二控制邏輯電路430。 FIG. 4 is a schematic diagram showing adjusting a setting value of a peripheral device according to another embodiment of the present invention. As shown in FIG. 4 , the comparing circuit 240 can directly transmit a trigger event E trigger to the peripheral device 400 (eg, a PWM controller, but the present invention is not limited thereto). After receiving the trigger event E trigger , the peripheral device 400 can directly adjust its duty setting value according to the received trigger event E trigger . Specifically, as shown in FIG. 4 , the peripheral device 400 may include a third temporary storage circuit 410 , a fourth temporary storage circuit 420 and a second control logic circuit 430 . In this embodiment, the first temporary storage circuit 110, the second temporary storage circuit 120 and the control logic circuit 130 shown in FIG. 1 can be applied to the third temporary storage circuit 410 and the fourth temporary storage circuit 420 in FIG. 4 and the second control logic circuit 430 .

第三暫存電路410可用以儲存一遞增值和一遞減值。第四暫存電路420可用以儲存周邊裝置400之一工作(duty)設定值。第二控制邏輯電路430可根據接收到之觸發事件E trigger,判斷係要將工作(duty)設定值加上遞增值,或係要將工作(duty)設定值減去遞減值。相較於第3圖之架構,在此實施例中之中,中央處理器300設定好第三暫存電路410所儲存之遞增值和遞減值之初始值和第四暫存電路420所儲存之工作(duty)設定值之初始值後,中央處理器300即可進入一睡眠模式。也就是說,中央處理器300不須被喚醒來調整周邊裝置400之工作(duty)設定值。因此,在此實施例中將可達到更省電之效果。底下將會以一應用例來說明第4圖之操作。 The third temporary storage circuit 410 can be used to store an increment value and a decrement value. The fourth temporary storage circuit 420 can be used to store a duty setting value of the peripheral device 400 . The second control logic circuit 430 can determine whether to add the increment value to the duty set value or to subtract the decrement value from the duty set value according to the received trigger event E trigger . Compared with the architecture in FIG. 3, in this embodiment, the central processing unit 300 sets the initial value of the increment value and the decrement value stored in the third temporary storage circuit 410 and the initial value stored in the fourth temporary storage circuit 420. After initializing the duty setting value, the CPU 300 can enter a sleep mode. That is to say, the CPU 300 does not need to be woken up to adjust the duty settings of the peripheral device 400 . Therefore, in this embodiment, a more power-saving effect can be achieved. Below, an application example will be used to illustrate the operation in Figure 4.

底下之應用例將會參考第4圖來做說明。底下之範例係假設將設定值自動調整裝置200(即ADC控制器)實作在藉由旋鈕調整電燈之亮度。在此範例中,當旋鈕往順時針方向旋轉時,輸出的電壓會變大。反之,當旋鈕往逆時針方向旋轉時,輸出的電壓會變小。當ADC轉出的值(即輸入值D in)越大,則周邊裝置400(例如:PWM控制器)輸出的工作(duty)設定值則越大,讓電燈亮度變亮。反之,當ADC轉出的值越小,則周邊裝置400輸出的工作(duty)設定值則越小,讓電燈亮度變暗。首先,中央處理器300會先設定相關設定值自動調整裝置200和周邊裝置400之暫存器的初始值,接著就進入睡眠模式。假設第一暫存電路210儲存之遞增值和遞減值之初始值為50、第二暫存電路220儲存之上限值為和下限值之初始值為600和500、第三暫存電路410儲存之遞增值和遞減值之初始值為100,且第四暫存電路420儲存之工作(duty)設定值之初始值為1000。 The following application examples will be explained with reference to Figure 4. The example below assumes that the setting value automatic adjustment device 200 (ie, the ADC controller) is implemented to adjust the brightness of an electric lamp through a knob. In this example, when the knob is turned clockwise, the output voltage will increase. Conversely, when the knob is turned counterclockwise, the output voltage will decrease. When the value converted from the ADC (ie, the input value D in ) is larger, the duty setting value output by the peripheral device 400 (eg, the PWM controller) is larger, so that the brightness of the lamp becomes brighter. Conversely, when the value converted by the ADC is smaller, the duty setting value output by the peripheral device 400 is smaller, so that the brightness of the lamp is dimmed. Firstly, the central processing unit 300 first sets the initial values of the temporary registers of the relevant setting value automatic adjustment device 200 and the peripheral device 400, and then enters the sleep mode. Assume that the initial value of the increment value and decrement value stored by the first temporary storage circuit 210 is 50, the initial value of the upper limit value and the lower limit value stored by the second temporary storage circuit 220 is 600 and 500, the third temporary storage circuit 410 The initial value of the stored increment value and decrement value is 100, and the initial value of the duty setting value stored by the fourth temporary storage circuit 420 is 1000.

當ADC轉出的值為550時,不會觸發觸發事件E trigger的產生。當旋鈕往順時針方向慢慢轉動時,則ADC轉出的值也慢慢變大。當ADC轉出的值為610時,會滿足大於上限值的條件。此時,控制邏輯電路230會將上限值和遞增值的值做相加運算(即600+50=650),以及將上限值更新為650。此外,控制邏輯電路230會將下限值和遞增值做相加運算(即500+50=550),以及將下限值更新為550。此時,比較電路240亦會發送觸發事件E trigger給周邊裝置400。第二控制邏輯電路430會根據收到觸發事件E trigger,將工作(duty)設定值和遞增值做相加運算(即1000 + 100 = 1100),並將工作(duty)設定值更新為1100。 When the value converted by the ADC is 550, the generation of the trigger event E trigger will not be triggered. When the knob is slowly turned clockwise, the value turned out by the ADC will gradually increase. When the value transferred by the ADC is 610, the condition of being greater than the upper limit value will be met. At this time, the control logic circuit 230 will add the upper limit value and the incremental value (ie 600+50=650), and update the upper limit value to 650. In addition, the control logic circuit 230 will add the lower limit value and the increment value (ie, 500+50=550), and update the lower limit value to 550. At this time, the comparison circuit 240 also sends a trigger event E trigger to the peripheral device 400 . The second control logic circuit 430 will add the duty setting value and the incremental value according to the received trigger event E trigger (ie 1000 + 100 = 1100), and update the duty setting value to 1100.

當新接受到之ADC轉出的值為540時,會滿足小於更新後之下限值的條件。此時,控制邏輯電路230會將下限值和遞減值的值做相減運算(即550-50=500),以及將下限值更新為500。此外,控制邏輯電路230會將上限值和遞減值的值做相減運算(即650-50=600),以及將上限值更新為600。此時,比較電路240亦會發送觸發事件E trigger給周邊裝置400。第二控制邏輯電路430會根據收到觸發事件E trigger,將工作(duty)設定值和遞減值做相減運算(即1100-100=1000),並將工作(duty)設定值更新為1000。 When the value transferred from the newly received ADC is 540, the condition of being less than the updated lower limit value will be met. At this time, the control logic circuit 230 will perform a subtraction operation between the lower limit value and the decrement value (ie, 550−50=500), and update the lower limit value to 500. In addition, the control logic circuit 230 performs a subtraction operation between the upper limit value and the decrement value (ie, 650−50=600), and updates the upper limit value to 600. At this time, the comparison circuit 240 also sends a trigger event E trigger to the peripheral device 400 . The second control logic circuit 430 will subtract the duty setting value from the decrement value (ie 1100−100=1000) according to the received trigger event E trigger , and update the duty setting value to 1000.

特別說明地是,上述範例僅係用以說明本發明之實施例,但本發明並不以此為限。In particular, the above examples are only used to illustrate the embodiments of the present invention, but the present invention is not limited thereto.

第5圖係根據本發明之一實施例所述之設定值自動調整方法之流程圖。設定值自動調整方法適用設定值自動調整裝置100。在步驟S510,藉由設定值自動調整裝置100之一比較電路比較一輸入值是否大於或等於一第一設定值,以產生一觸發事件。在步驟S520,藉由設定值自動調整裝置100之一控制邏輯電路,根據上述觸發事件,判斷是否根據一遞增值或一遞減值調整一第一設定值,其中遞增值和遞減值儲存在設定值自動調整裝置100之一第一暫存電路,且第一設定值儲存在設定值自動調整裝置100之一第二暫存電路。FIG. 5 is a flow chart of a method for automatically adjusting a set value according to an embodiment of the present invention. The set value automatic adjustment method is applicable to the set value automatic adjustment device 100 . In step S510, a comparison circuit of the automatic setting value adjustment device 100 compares whether an input value is greater than or equal to a first setting value to generate a trigger event. In step S520, through the control logic circuit of the automatic setting value adjustment device 100, according to the trigger event, it is judged whether to adjust a first setting value according to an increment value or a decrement value, wherein the increment value and decrement value are stored in the set value A first temporary storage circuit of the automatic adjustment device 100 , and the first setting value is stored in a second temporary storage circuit of the automatic setting value adjustment device 100 .

在此實施例中,第二暫存電路更可儲存一第二設定值,其中第一設定值可係一上限值,且第二設定值可係一下限值。在此實施例中,遞增值和遞減值可相同或不相同。In this embodiment, the second temporary storage circuit can further store a second set value, wherein the first set value can be an upper limit value, and the second set value can be a lower limit value. In this embodiment, the increment value and decrement value may or may not be the same.

在此實施例中,設定值自動調整方法之步驟更可包括,設定值自動調整裝置100之一比較電路會比較輸入值是否大於或等於上限值,和比較輸入值是否小於或等於下限值,以產生觸發事件。當輸入值大於或等於上限值時,控制邏輯電路根據觸發事件,將上限值和下限值加上遞增值,並根據調整後之上限值和下限值,更新儲存在第二暫存電路之上限值和下限值。當輸入值小於或等於下限值時,控制邏輯電路根據觸發事件,將上限值和下限值減掉遞減值,並根據調整後之上限值和下限值,更新儲存在第二暫存電路之上限值和下限值。In this embodiment, the steps of the method for automatically adjusting the set value may further include that the comparison circuit of the automatic set value adjusting device 100 compares whether the input value is greater than or equal to the upper limit value, and compares whether the input value is less than or equal to the lower limit value , to generate a trigger event. When the input value is greater than or equal to the upper limit value, the control logic circuit adds the upper limit value and the lower limit value to the incremental value according to the trigger event, and updates the stored value in the second temporary value according to the adjusted upper limit value and lower limit value. Store the upper limit and lower limit of the circuit. When the input value is less than or equal to the lower limit value, the control logic circuit will subtract the decrement value from the upper limit value and the lower limit value according to the trigger event, and update the stored in the second temporary value according to the adjusted upper limit value and lower limit value. Store the upper limit and lower limit of the circuit.

在此實施例中,設定值自動調整方法之步驟更可包括,當輸入值大於或等於上限值,或輸入值小於或等於下限值時,比較電路將觸發事件傳送給一中央處理器或一周邊裝置。在一實施例中,中央處理器根據觸發事件,調整周邊裝置之設定值。在另一實施例中,周邊裝置直接根據觸發事件,調整其之設定值。In this embodiment, the steps of the automatic setting value adjustment method may further include, when the input value is greater than or equal to the upper limit value, or the input value is less than or equal to the lower limit value, the comparison circuit sends a trigger event to a central processing unit or A peripheral device. In one embodiment, the central processing unit adjusts the setting values of the peripheral devices according to the trigger event. In another embodiment, the peripheral device directly adjusts its setting value according to the trigger event.

在此實施例中,一中央處理器可用以提供遞增值、遞減值、第一設定值和第二設定值之初始值給設定值自動調整裝置100後,然後進入一睡眠模式。In this embodiment, a central processing unit can be used to provide the increment value, the decrement value, the initial value of the first set value and the second set value to the set value automatic adjustment device 100, and then enter into a sleep mode.

第6圖係根據本發明之另一實施例所述之設定值自動調整方法之流程圖。設定值自動調整方法適用設定值自動調整裝置200。在步驟S610,設定值自動調整裝置200從一中央處理器取得遞增值、遞減值、第一設定值和第二設定值之初始值。遞增值和遞減值係儲存在設定值自動調整裝置200之一第一暫存電路,且第一設定值和第二設定值係儲存在設定值自動調整裝置200之一第二暫存電路。在此實施例中,第一設定值可係一上限值,且第二設定值可係一下限值。FIG. 6 is a flow chart of a method for automatically adjusting setting values according to another embodiment of the present invention. The set value automatic adjustment method is applicable to the set value automatic adjustment device 200 . In step S610, the setting value automatic adjustment device 200 obtains the increment value, the decrement value, the initial value of the first setting value and the second setting value from a central processing unit. The incremental value and the decremental value are stored in a first temporary storage circuit of the automatic setting value adjustment device 200 , and the first and second setting values are stored in a second temporary storage circuit of the automatic setting value adjustment device 200 . In this embodiment, the first set value may be an upper limit value, and the second set value may be a lower limit value.

在步驟S620,設定值自動調整裝置200之一比較電路會比較一輸入值是否大於或等於上限值,以決定是否產生觸發事件。當輸入值大於或等於上限值時,進行步驟S630。在步驟S630,設定值自動調整裝置200之一控制邏輯電路根據觸發事件,將上限值和下限值加上遞增值,並根據調整後之上限值和下限值,更新儲存在第二暫存電路之上限值和下限值。In step S620, a comparison circuit of the automatic setting value adjustment device 200 compares whether an input value is greater than or equal to an upper limit value to determine whether a trigger event is generated. When the input value is greater than or equal to the upper limit, go to step S630. In step S630, one of the control logic circuits of the set value automatic adjustment device 200 adds the upper limit value and the lower limit value to the incremental value according to the trigger event, and updates the stored value in the second The upper limit and lower limit of the temporary storage circuit.

當輸入值未大於或等於上限值時,進行步驟S640。在步驟S640,比較電路會比較輸入值是否小於或等於下限值,以決定是否產生觸發事件。當輸入值小於或等於下限值時,進行步驟S650。在步驟S650,控制邏輯電路根據觸發事件,將上限值和下限值減掉遞減值,並根據調整後之上限值和下限值,更新儲存在第二暫存電路之上限值和下限值。When the input value is not greater than or equal to the upper limit, go to step S640. In step S640, the comparing circuit compares whether the input value is less than or equal to the lower limit value to determine whether to generate a trigger event. When the input value is less than or equal to the lower limit, go to step S650. In step S650, the control logic circuit subtracts the decrement value from the upper limit value and the lower limit value according to the trigger event, and updates the upper limit value and the lower limit value stored in the second temporary storage circuit according to the adjusted upper limit value and lower limit value lower limit.

根據本發明另一實施例,步驟S620和步驟S640之順序可以對調。According to another embodiment of the present invention, the order of step S620 and step S640 may be reversed.

當第二暫存電路之上限值和下限值更新後,會進行步驟S660。在步驟S660,比較電路會將觸發事件傳送給中央處理器或一周邊裝置。After the upper limit value and the lower limit value of the second temporary storage circuit are updated, step S660 will be performed. In step S660, the comparison circuit transmits the trigger event to the CPU or a peripheral device.

根據本發明提出之設定值自動調整方法,設定值自動調整裝置不需要藉由中央處理器,即可自行自動調整其之設定值。因此,將可達成省電之效果。According to the automatic setting value adjustment method proposed by the present invention, the setting value automatic adjustment device can automatically adjust its setting value without using the central processing unit. Therefore, the effect of power saving will be achieved.

本說明書中以及申請專利範圍中的序號,例如「第一」、「第二」等等,僅係為了方便說明,彼此之間並沒有順序上的先後關係。The serial numbers in this specification and the scope of the patent application, such as "first", "second", etc., are only for convenience of description, and there is no sequential relationship between them.

本發明之說明書所揭露之方法和演算法之步驟,可直接透過執行一處理器直接應用在硬體以及軟體模組或兩者之結合上。一軟體模組(包括執行指令和相關數據)和其它數據可儲存在數據記憶體中,像是隨機存取記憶體(RAM)、快閃記憶體(flash memory)、唯讀記憶體(ROM)、可抹除可規化唯讀記憶體(EPROM)、電子可抹除可規劃唯讀記憶體(EEPROM)、暫存器、硬碟、可攜式硬碟、光碟唯讀記憶體(CD-ROM)、DVD或在此領域習之技術中任何其它電腦可讀取之儲存媒體格式。一儲存媒體可耦接至一機器裝置,舉例來說,像是電腦/處理器(爲了說明之方便,在本說明書以處理器來表示),上述處理器可透過來讀取資訊(像是程式碼),以及寫入資訊至儲存媒體。一儲存媒體可整合一處理器。一特殊應用積體電路(ASIC)包括處理器和儲存媒體。一用戶設備則包括一特殊應用積體電路。換句話說,處理器和儲存媒體以不直接連接用戶設備的方式,包含於用戶設備中。此外,在一些實施例中,任何適合電腦程序之產品包括可讀取之儲存媒體,其中可讀取之儲存媒體包括和一或多個所揭露實施例相關之程式碼。在一些實施例中,電腦程序之產品可包括封裝材料。The steps of the methods and algorithms disclosed in the description of the present invention can be directly applied to hardware and software modules or a combination of the two by executing a processor. A software module (including execution instructions and associated data) and other data can be stored in data memory, such as random access memory (RAM), flash memory (flash memory), read only memory (ROM) , Erasable Programmable Read-Only Memory (EPROM), Electronically Erasable Programmable Read-Only Memory (EEPROM), Temporary Register, Hard Disk, Portable Hard Disk, Compact Disk Read-Only Memory (CD- ROM), DVD, or any other computer-readable storage medium format within the skill of the art. A storage medium can be coupled to a machine device, for example, such as a computer/processor (for the convenience of description, it is represented by a processor in this specification), and the above-mentioned processor can read information (such as a program) code), and write the information to the storage medium. A storage medium can integrate a processor. An application specific integrated circuit (ASIC) includes a processor and storage media. A user equipment includes an ASIC. In other words, the processor and the storage medium are included in the user equipment without being directly connected to the user equipment. Furthermore, in some embodiments, any product suitable for a computer program includes a readable storage medium that includes code associated with one or more disclosed embodiments. In some embodiments, the product of the computer program may include packaging materials.

以上段落使用多種層面描述。顯然的,本文的教示可以多種方式實現,而在範例中揭露之任何特定架構或功能僅為一代表性之狀況。根據本文之教示,任何熟知此技藝之人士應理解在本文揭露之各層面可獨立實作或兩種以上之層面可以合併實作。The above paragraphs use various levels of description. Obviously, the teachings herein can be implemented in many ways, and any specific structure or function disclosed in the examples is only a representative situation. According to the teaching of this article, any person familiar with the art should understand that each aspect disclosed in this article can be implemented independently or two or more aspects can be implemented in combination.

雖然本揭露已以實施例揭露如上,然其並非用以限定本揭露,任何熟習此技藝者,在不脫離本揭露之精神和範圍內,當可作些許之更動與潤飾,因此發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the disclosure has been disclosed above with the embodiment, it is not intended to limit the disclosure. Anyone who is familiar with this technology can make some changes and modifications without departing from the spirit and scope of the disclosure. Therefore, the protection scope of the invention The ones defined in the scope of the attached patent application shall prevail.

100、200:設定值自動調整裝置 110、210:第一暫存電路 120、220:第二暫存電路 130、230:控制邏輯電路 240:比較電路 300:中央處理器 400:周邊裝置 410:第三暫存電路 420:第四暫存電路 430:第二控制邏輯電路 D in:輸入值 E trigger:觸發事件 S510、S610~S660:步驟 100, 200: set value automatic adjustment device 110, 210: first temporary storage circuit 120, 220: second temporary storage circuit 130, 230: control logic circuit 240: comparison circuit 300: central processing unit 400: peripheral device 410: second Three temporary storage circuit 420: fourth temporary storage circuit 430: second control logic circuit D in : input value E trigger : trigger event S510, S610~S660: steps

第1圖係顯示根據本發明之一實施例所述之一設定值自動調整裝置100之方塊圖。 第2圖係顯示根據本發明之一實施例所述之一設定值自動調整裝置200之方塊圖。 第3圖係顯示根據本發明之一實施例所述之調整一周邊裝置之設定值之示意圖。 第4圖係顯示根據本發明之另一實施例所述之調整一周邊裝置之設定值之示意圖。 第5圖係根據本發明之一實施例所述之一設定值自動調整方法之流程圖。 第6圖係根據本發明之另一實施例所述之設定值自動調整方法之流程圖。 FIG. 1 is a block diagram showing an automatic setting value adjustment device 100 according to an embodiment of the present invention. FIG. 2 is a block diagram showing an automatic setting value adjustment device 200 according to an embodiment of the present invention. FIG. 3 is a schematic diagram showing adjusting a setting value of a peripheral device according to an embodiment of the present invention. FIG. 4 is a schematic diagram showing adjusting a setting value of a peripheral device according to another embodiment of the present invention. FIG. 5 is a flow chart of a method for automatically adjusting a setting value according to an embodiment of the present invention. FIG. 6 is a flow chart of a method for automatically adjusting setting values according to another embodiment of the present invention.

100:設定值自動調整裝置 100: Set value automatic adjustment device

110:第一暫存電路 110: the first temporary storage circuit

120:第二暫存電路 120: the second temporary storage circuit

130:控制邏輯電路 130: Control logic circuit

Etrigger:觸發事件 E trigger : trigger event

Claims (10)

一種設定值自動調整裝置,包括: 一第一暫存電路,儲存一遞增值和一遞減值; 一第二暫存電路,儲存一第一設定值; 一控制邏輯電路,耦接上述第一暫存電路和上述第二暫存電路,以及根據一觸發事件,判斷是否根據上述遞增值或上述遞減值調整上述第一設定值;以及 一比較電路,耦接上述第二暫存電路和上述控制邏輯電路,其中上述比較電路接收一輸入值,且比較上述輸入值是否大於或等於上述第一設定值,以產生上述觸發事件給一中央處理器或一周邊裝置。 An automatic setting value adjustment device, comprising: a first temporary storage circuit, storing an increment value and a decrement value; A second temporary storage circuit, storing a first set value; A control logic circuit, coupled to the first temporary storage circuit and the second temporary storage circuit, and judging whether to adjust the first set value according to the increment value or the decrement value according to a trigger event; and A comparison circuit, coupled to the second temporary storage circuit and the control logic circuit, wherein the comparison circuit receives an input value, and compares whether the input value is greater than or equal to the first set value, so as to generate the trigger event to a central processor or a peripheral device. 如請求項1之設定值自動調整裝置,其中上述第二暫存電路更儲存一第二設定值,其中上述第一設定值係一上限值,且上述第二設定值係一下限值。The set value automatic adjustment device according to claim 1, wherein the second temporary storage circuit further stores a second set value, wherein the first set value is an upper limit value, and the second set value is a lower limit value. 如請求項2之設定值自動調整裝置,其中上述比較電路比較上述輸入值是否大於或等於上述上限值,和比較上述輸入值是否小於或等於上述下限值,以產生上述觸發事件。The set value automatic adjustment device according to claim 2, wherein the comparison circuit compares whether the input value is greater than or equal to the upper limit value, and compares whether the input value is less than or equal to the lower limit value, so as to generate the trigger event. 如請求項3之設定值自動調整裝置,其中當上述輸入值大於或等於上述上限值時,上述控制邏輯電路根據上述觸發事件,將上述上限值和上述下限值加上上述遞增值,並根據調整後之上述上限值和上述下限值,更新儲存在上述第二暫存電路之上述上限值和上述下限值;以及當上述輸入值小於或等於上述下限值時,上述控制邏輯電路根據上述觸發事件,將上述上限值和上述下限值減掉上述遞減值,並根據調整後之上述上限值和上述下限值,更新儲存在上述第二暫存電路之上述上限值和上述下限值。The set value automatic adjustment device according to claim 3, wherein when the input value is greater than or equal to the upper limit value, the control logic circuit adds the incremental value to the upper limit value and the lower limit value according to the trigger event, And update the above-mentioned upper limit and the above-mentioned lower limit stored in the above-mentioned second temporary storage circuit according to the adjusted above-mentioned upper limit and the above-mentioned lower limit; and when the above-mentioned input value is less than or equal to the above-mentioned lower limit, the above-mentioned The control logic circuit subtracts the above-mentioned decrement value from the above-mentioned upper limit value and the above-mentioned lower limit value according to the above-mentioned trigger event, and updates the above-mentioned upper limit and the above lower limit. 如請求項3之設定值自動調整裝置,其中當上述輸入值大於或等於上述上限值,或上述輸入值小於或等於上述下限值時,上述比較電路將上述觸發事件傳送給上述中央處理器或上述周邊裝置,且其中上述中央處理器根據上述觸發事件,調整上述周邊裝置之設定值,或上述周邊裝置直接根據上述觸發事件,調整其之設定值。The set value automatic adjustment device according to claim 3, wherein when the input value is greater than or equal to the upper limit value, or the input value is less than or equal to the lower limit value, the comparison circuit sends the trigger event to the central processing unit Or the above-mentioned peripheral device, wherein the above-mentioned central processing unit adjusts the setting value of the above-mentioned peripheral device according to the above-mentioned trigger event, or the above-mentioned peripheral device directly adjusts its setting value according to the above-mentioned trigger event. 一種設定值自動調整方法,適用一設定值自動調整裝置,其中上述設定值自動調整裝置用以接收一輸入值和傳送一觸發事件給一中央處理器或一周邊裝置,包括: 藉由上述設定值自動調整裝置之一比較電路,比較上述輸入值是否大於或等於一第一設定值,以產生上述觸發事件;以及 藉由上述設定值自動調整裝置之一控制邏輯電路,根據上述觸發事件,判斷是否根據一遞增值或一遞減值調整上述第一設定值,其中上述遞增值和上述遞減值儲存在上述設定值自動調整裝置之一第一暫存電路,且上述第一設定值儲存在上述設定值自動調整裝置之一第二暫存電路。 A set value automatic adjustment method is suitable for a set value automatic adjustment device, wherein the set value automatic adjustment device is used to receive an input value and send a trigger event to a central processing unit or a peripheral device, including: Using a comparator circuit of the set value automatic adjustment device to compare whether the above input value is greater than or equal to a first set value, so as to generate the above trigger event; and By means of a control logic circuit of the above-mentioned set value automatic adjustment device, according to the above-mentioned trigger event, it is judged whether to adjust the above-mentioned first set value according to an increment value or a decrement value, wherein the above-mentioned increment value and the above-mentioned decrement value are stored in the above-mentioned set value automatic A first temporary storage circuit of the adjustment device, and the first set value is stored in a second temporary storage circuit of the automatic adjustment device of the set value. 如請求項6之設定值自動調整方法,其中上述第二暫存電路更儲存一第二設定值,其中上述第一設定值係一上限值,且上述第二設定值係一下限值。The method for automatically adjusting a set value according to Claim 6, wherein the second temporary storage circuit further stores a second set value, wherein the first set value is an upper limit value, and the second set value is a lower limit value. 如請求項7之設定值自動調整方法,更包括: 藉由上述比較電路,比較上述輸入值是否大於或等於上述上限值,和比較上述輸入值是否小於或等於上述下限值,以產生上述觸發事件。 For example, the setting value automatic adjustment method of claim item 7 further includes: By means of the comparison circuit, it is compared whether the input value is greater than or equal to the upper limit value, and whether the input value is less than or equal to the lower limit value, so as to generate the trigger event. 如請求項8之設定值自動調整方法,更包括: 當上述輸入值大於或等於上述上限值時,藉由上述控制邏輯電路根據上述觸發事件,將上述上限值和上述下限值加上上述遞增值,並根據調整後之上述上限值和上述下限值,更新儲存在上述第二暫存電路之上述上限值和上述下限值;以及 當上述輸入值小於或等於上述下限值時,藉由上述控制邏輯電路根據上述觸發事件,將上述上限值和上述下限值減掉上述遞減值,並根據調整後之上述上限值和上述下限值,更新儲存在上述第二暫存電路之上述上限值和上述下限值。 For example, the setting value automatic adjustment method of claim item 8 further includes: When the above-mentioned input value is greater than or equal to the above-mentioned upper limit value, the above-mentioned upper limit value and the above-mentioned lower limit value are added to the above-mentioned incremental value by the above-mentioned control logic circuit according to the above-mentioned trigger event, and according to the adjusted above-mentioned upper limit value and the above-mentioned lower limit value, updating the above-mentioned upper limit value and the above-mentioned lower limit value stored in the above-mentioned second temporary storage circuit; and When the above-mentioned input value is less than or equal to the above-mentioned lower limit value, the above-mentioned upper limit value and the above-mentioned lower limit value are subtracted from the above-mentioned decrement value by the above-mentioned control logic circuit according to the above-mentioned trigger event, and according to the adjusted above-mentioned upper limit value and The above-mentioned lower limit value updates the above-mentioned upper limit value and the above-mentioned lower limit value stored in the above-mentioned second temporary storage circuit. 如請求項8之設定值自動調整方法,更包括: 當上述輸入值大於或等於上述上限值,或上述輸入值小於或等於上述下限值時,藉由上述比較電路將上述觸發事件傳送給上述中央處理器或上述周邊裝置,上述中央處理器根據上述觸發事件,調整上述周邊裝置之設定值,或上述周邊裝置直接根據上述觸發事件,調整其之設定值。 For example, the setting value automatic adjustment method of claim item 8 further includes: When the above-mentioned input value is greater than or equal to the above-mentioned upper limit value, or when the above-mentioned input value is less than or equal to the above-mentioned lower limit value, the above-mentioned trigger event is transmitted to the above-mentioned central processing unit or the above-mentioned peripheral device through the above-mentioned comparison circuit, and the above-mentioned central processing unit according to The above-mentioned trigger event adjusts the setting value of the above-mentioned peripheral device, or the above-mentioned peripheral device directly adjusts its setting value according to the above-mentioned trigger event.
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