TW202232329A - Data arrangement method and memory storage system using persistent memory - Google Patents

Abstract

A data arrangement method and a memory storage system using a persistent memory are disclosed. The method includes: activating a persistent memory in a host system; in a status that a connection between the host system and a memory device is established, storing a management table maintained by the memory device to the persistent memory; and in a data arrangement operation performed by the memory device, updating the management table in the persistent memory through the connection and copying target data from at least one first type memory unit to at least one second type memory unit by the memory device according to an updating result.

Description

Data organization method and memory storage system using persistent memory

The present invention relates to a memory management technology, and more particularly, to a data organization method and a memory storage system using persistent memory.

With the decreasing size of memory storage devices and the cost consideration of manufacturers, reducing the capacity and volume of dynamic random access memory (DRAM) in memory storage devices has gradually become one of the design choices. . Generally speaking, in a memory storage device lacking DRAM (DRAM-less), it can be compensated by sharing memory with the host system (also called Host Memory Buffer (HMB)). The insufficiency of DRAM in the memory storage device itself. However, based on current standard specifications, the memory provided by the host system is all volatile memory (eg, DRAM), which may cause data loss in the event of an unexpected power failure. Therefore, the memory storage device generally does not store the important data in the HMB, so as to avoid the loss of the important data when the power is suddenly turned off and cannot be recovered. Due to this limitation, when a DRAM-less memory storage device performs internal data organization (such as data movement), the memory storage device can only use its internal buffer with a smaller capacity (the capacity may only be 2~8MB) to perform Data collation, resulting in a significant drop in operational efficiency.

The present invention provides a data sorting method and a memory storage system using persistent memory, which can use the persistent memory at the host system side to improve the efficiency of internal data sorting performed by a memory storage device.

An embodiment of the present invention provides a method for organizing data using persistent memory, which includes: enabling persistent memory in a host system; in a state where a connection between the host system and a memory device has been established, storing the management table maintained by the memory device in the persistent memory; and in the process of performing a data sorting operation on the memory device, the memory device updates the persistent memory via the connection and copying the target data from at least one entity unit of the first type in the memory device to at least one entity unit of the second type in the memory device according to the update result. store.

Embodiments of the present invention further provide a memory storage system using persistent memory, which includes a host system and a memory device. The host system is configured with persistent memory. The memory device is coupled to the host system. The host system is used to enable the persistent memory. In a state where the connection between the host system and the memory device has been established, the memory controller of the memory device stores the management table maintained by the memory device in the persistent memory in the body. During the process of performing the data sorting operation by the memory device, the memory controller updates the management table in the persistent memory via the connection, and deletes the target data from the memory according to the update result. At least one physical unit of the first type in the memory device is copied to at least one physical unit of the second type in the memory device for storage.

Based on the above, the host system can enable its internal persistent memory. When the connection between the host system and the memory device is established, the management table maintained by the memory device can be stored in the persistent memory. Then, in the process of performing the data sorting operation on the memory device, the memory device can update the management table in the persistent memory through the connection, and according to the update result, the target data can be removed from at least one of the memory devices. The first type of physical unit is copied to at least one second type of physical unit for storage. In this way, the efficiency of the internal data arrangement of the memory storage device can be effectively improved.

FIG. 1 is a schematic diagram of a memory storage system according to an embodiment of the present invention. Referring to FIG. 1 , the memory storage system 10 includes a host system 11 and a memory device 12 . The interface specification between the host system 11 and the memory device 12 conforms to the NVM Express (NVMe) interface standard. The memory storage system 10 is also referred to as an NVMe storage system.

The host system 11 is coupled to the memory device 12 and can store data to or read data from the memory device 12 . For example, host system 11 is any system that can substantially cooperate with memory device 12 to store data, such as a computer system, digital camera, video camera, communication device, audio player, video player, or tablet, etc., while memory The device 12 can be a flash drive, a memory card, a Solid State Drive (SSD), a Secure Digital (SD) card, a Compact Flash (CF) card, or an embedded storage device. Non-volatile memory storage device.

The host system 11 includes a processor 111 and a persistent memory 112 . The processor 111 is coupled to the persistent memory 112 . The processor 111 may run an operating system (eg, Windows or iOS, etc.) and may be responsible for part or the entire operation of the host system 11 . For example, the processor 111 may include a central processing unit (CPU), or other programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, special Application Specific Integrated Circuits (ASIC), Programmable Logic Device (PLD) or other similar devices or combinations of these devices.

The persistent memory 112 is configured in the host system 11 and used to store data. Persistent memory 112 may be positioned between conventional DRAM and solid state disk (SSD) in various levels of storage media. That is, although the data access speed of the persistent memory 112 is slightly slower than the data access speed of the DRAM, the storage capacity of the persistent memory 112 can be close to that of a general SSD. For example, assuming that the storage capacity of conventional DRAM is between 4GB and 32GB, the storage capacity of persistent memory 112 may be between 128GB and 512GB or more. In addition, the data access speed of the persistent memory 112 may be, for example, more than 6 times that of the conventional SSD.

The persistent memory 112 can selectively operate in a volatile mode and a persistent mode. In volatile mode, data stored in persistent memory 112 is lost due to a (sudden) power failure of host system 11 . That is, in the volatile mode, persistent memory 112 is used similar to conventional DRAM, which can store data volatilely. In one embodiment, persistent memory 112 operating in a volatile mode can also be used to replace conventional DRAM or as an extension to conventional DRAM.

In persistent mode, the data stored in persistent memory 112 is not lost due to a (sudden) power failure of host system 11 . That is, in persistent mode, persistent memory 112 is used like an SSD and stores data sustainably. However, the persistent memory 112 is packaged in a Dual In-line Memory Module (DIMM), compared to the SSD in which the NAND package is used. Therefore, persistent memory 112 may be compatible with the busbars or channels conventionally used in DRAM.

In one embodiment, the host system 11 may further include other storage media (eg, DRAM and/or SSD, etc.), power supply circuits (eg, batteries, etc.), and various input/output devices (eg, monitor, keyboard, mouse, touchscreen, etc.) control panel, speaker, microphone and/or network interface card, etc.), which is not limited in the present invention.

The memory device 12 includes a memory controller (also called a flash memory controller) 121 and a non-volatile memory module 122 . The memory controller 121 can be used to control the non-volatile memory module 122 . For example, the memory controller 121 can control the non-volatile memory module 122 to perform data reading, writing and erasing.

The non-volatile memory module 122 is used for non-volatile storage of data. For example, the non-volatile memory module 122 may include multiple physical units. Each physical unit can contain multiple memory cells. Each memory cell can store data by changing the threshold voltage. It should be noted that multiple memory cells in the same physical unit can be programmed simultaneously (eg, applying a write voltage) to store data. For example, an entity unit may be an entity fan, entity page, or other entity management unit.

The non-volatile memory module 122 may include a single level cell (SLC) NAND type flash memory module (ie, a flash memory module in which one memory cell can store 1 bit), multiple Multi level cell (MLC) NAND type flash memory modules (ie, a memory cell can store 2 bits of flash memory modules), triple level cell (TLC) NAND type Flash memory modules (ie, one memory cell can store 3-bit flash memory modules), quad level cell (QLC) NAND-type flash memory modules (ie, one memory The cells can store 4-bit flash memory modules) and/or other types of flash memory modules.

The non-volatile memory module 122 includes a storage area (also called a cache area) 1221 and a storage area 1222 . Each physical unit in the storage area 1221 is also called a first-type physical unit. Each physical unit in the storage area 1222 is also referred to as a second-type physical unit. A single physical unit in the storage area 1221 is used to store n bits. A single physical unit in the storage area 1222 is used to store m bits. Both m and n are positive integers, and m is greater than n. In one embodiment, n may be 1 and m may be 2, 3, or 4.

In one embodiment, each physical unit in storage area 1221 may be programmed based on a virtual SLC (pSLC) mode. Therefore, a single memory cell programmed in storage area 1221 can store 1 bit. In one embodiment, each physical unit in storage area 1222 may be programmed based on TLC or QLC mode. Thus, a single memory cell programmed in storage area 1222 can store 3 or 4 bits.

In one embodiment, the memory device 12 may not have DRAM, so the memory device 12 may also be referred to as a DRAM-less memory device. In one embodiment, the memory controller 121 and/or the non-volatile memory module 122 may have static random access memory (SRAM). For example, the storage space of the SRAM in the memory controller 121 and/or the non-volatile memory module 122 may be about 2 to 8 MB or more.

In one embodiment, the processor 111 of the host system 11 may enable persistent memory 112 . For example, the processor 111 may update the indication value indicating the usage state of the persistent memory 112 from the bit "0 (disabled)" to the bit "1 (enabled)". In addition, the processor 111 can set the capacity of the storage space in the persistent memory 112 that is allowed to be provided to the memory device 12 . For example, the processor 111 can set a storage space of 500MB in the persistent memory 112 for the memory device 12 to use.

In one embodiment, the host system 11 may execute a handshake procedure with the memory device 12 . For example, in the handshake procedure, the host system 11 and the memory device 12 may communicate one or more signals to each other for mutual authentication. The handshake procedure can be used to establish a connection between the host system 11 and the memory device 12 . This connection also conforms to the NVMe interface standard.

In one embodiment, in a state where the connection between the host system 11 and the memory device 12 is established, the memory controller 121 of the memory device 12 can manage one or more items maintained by the memory device 12 . The table is stored in the persistent memory 112 of the host system 11 . For example, the management table may include a logical-to-physical mapping table originally stored in the non-volatile memory module 122 . The logical-to-physical mapping table may record logical-to-physical mapping information related to certain physical units in the non-volatile memory module 122 . For example, the logic-to-physical mapping information may include mapping information between a certain physical unit and a certain logical unit in the non-volatile memory module 122 . Wherein, a logical unit may refer to one or more logical addresses.

In one embodiment, the memory controller 121 may perform data sorting operations. The data sorting operation can copy the valid data (also called target data) stored in the storage area 1221 to the storage area 1222 for centralized storage. The valid data refers to the data currently mapped by the logical unit. For example, in this data sorting operation, the valid data stored in m (eg, 3 or 4) first-type physical units in the storage area 1221 can be copied to n (eg, 1) first-type physical units in the storage area 1222 Centralized storage is carried out in the second-class entity unit. Afterwards, the first type of entity unit in the storage area 1221 whose valid data has been copied can be associated with a free pool and can be erased before the next use, so as to release the free space in the storage area 1221 .

In one embodiment, the memory controller 121 can update the management in the persistent memory 112 via the aforementioned connection between the host system 11 and the memory device 12 during the execution of the data sorting operation. form, and copy the target data from m (eg, 3 or 4) first-type entity units in the storage area 1221 to n (eg, 1) first-type entity units in the storage area 1222 according to the update result Storage in the second type of entity unit.

In one embodiment, memory controller 121 may update the management table in persistent memory 112 according to new logical-to-physical mapping information related to the target data. For example, it is assumed that the management table (ie, the logical-to-physical mapping table) originally read from the non-volatile memory module 122 records the old logical-to-physical mapping information related to the target data. The old logical-to-physical mapping information can reflect the old mapping relationship between the old physical unit (ie, the first type of physical unit) originally used to store the target data and the logical unit to which the target data belongs.

After the management table is stored in the persistent memory 112 , the memory controller 121 can modify and update the information in the management table in the persistent memory 112 . For example, memory controller 121 may update old logical-to-physical mapping information related to the target data with new logical-to-physical mapping information related to the target data in persistent memory 112 . This new logical-to-physical mapping information can be reflected in the data sorting operation, and the relationship between the new physical unit (ie, the second type of physical unit) for storing the target data and the logical unit to which the target data belongs New mapping relationship. That is to say, the updated management table in the persistent memory 112 can reflect the physical unit (ie, the second type of physical unit) that is finally used to store the target data in the data sorting operation and the target A new mapping relationship between the logical units to which the data belongs.

In one embodiment, after completing the data sorting operation, the memory controller 121 may read the updated management table back from the persistent memory 112 and store it back to the non-volatile memory in module 122. Then, when the target data needs to be accessed, the memory controller 121 can determine the physical unit currently used to store the target data according to the management table.

In one embodiment, the processor 111 of the host system 11 may also configure the storage space in the persistent memory 112 that is allowed to be provided for use by the memory device 12 to operate in the persistent mode. In the persistent mode, the management table stored in the persistent memory 112 will not be lost due to unexpected power failure of the host system 11 . Thereby, the reliability of the memory device 12 to perform the data sorting operation can be improved.

In one embodiment, if the memory device 12 is a DRAM-less memory device (ie, the memory device 12 does not have DRAM or the storage space of the DRAM is insufficient), the persistent memory 112 ( Or under the premise that only volatile memory such as DRAM in the host system 11 can be used), the memory device 12 can only use the SRAM in the memory controller 121 and/or the non-volatile memory module 122 to store all the data. the management form. If the data volume of the management table is greater than the capacity of the SRAM, the management table needs to be stored in batches in the SRAM for query and modification during the execution of the data sorting operation, thereby causing the data sorting The execution efficiency of the operation is reduced.

In one embodiment, it is assumed that the memory device 12 is a DRAM-less memory device (ie, the memory device 12 does not have DRAM or the storage space of DRAM is insufficient). However, under the premise that the persistent memory 112 in the host system 11 can be used (and the storage space in the usable persistent memory 112 is operated in the persistent mode), by means of a large-capacity and data-persistent memory The persistent memory 112 is used to store the management table, which can effectively improve the execution efficiency of the data sorting operation.

In one embodiment, regardless of whether the memory device 12 has sufficient DRAM storage space, during the process of performing the data sorting operation, the management table required for performing the data sorting operation can be transmitted to the host system 11 at one time. The storage, query and update are performed in the persistent memory 112 of the data, thereby improving the execution efficiency of the data sorting operation. After the data sorting operation is completed, the updated management table in the persistent memory 112 can be restored to the non-volatile memory module 122 of the memory device 12 for subsequent use.

FIG. 2 is a flowchart of a method for organizing data using persistent memory according to an embodiment of the present invention. Referring to FIG. 2, in step S201, the persistent memory in the host system is enabled. In step S202, when the connection between the host system and the memory device has been established, the management table maintained by the memory device is stored in the persistent memory. In step S203, during the process of performing the data sorting operation on the memory device, the memory device updates the management table in the persistent memory via the connection, and organizes the target data according to the update result. Copying from at least one physical unit of the first type in the memory device to at least one physical unit of the second type in the memory device for storage.

However, each step in FIG. 2 has been described above in detail, and will not be repeated here. It should be noted that each step in FIG. 2 can be implemented as a plurality of program codes or circuits, which is not limited by the present invention. In addition, the method of FIG. 2 can be used in conjunction with the above exemplary embodiments, and can also be used alone, which is not limited by the present invention.

To sum up, the embodiments of the present invention can use persistent memory with data persistence on the host system side to store the management table required for performing the data sorting operation when the memory device performs the internal data sorting operation. . In this way, the operation efficiency of the internal data arrangement performed by the memory storage device can be effectively improved.

Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

10: Memory Storage System 11: Host system 111: Processor 112: persistent memory 12: Memory device 121: Memory Controller 122: Non-volatile memory module 1221, 1222: Storage area S201~S203: Steps

FIG. 1 is a schematic diagram of a memory storage system according to an embodiment of the present invention. FIG. 2 is a flowchart of a method for organizing data using persistent memory according to an embodiment of the present invention.

S201~S203: Steps

Claims (10)

A data organization method using persistent memory, comprising: enabling a persistent memory in a host system; In a state where a connection between the host system and a memory device is established, a management table maintained by the memory device is stored in the persistent memory; and During the process of performing a data sorting operation by the memory device, the memory device updates the management table in the persistent memory via the connection, and changes a target data from the data in the memory device according to an update result. At least one physical unit of the first type is copied to at least one physical unit of the second type in the memory device for storage. The data organizing method using persistent memory as claimed in claim 1, wherein the persistent memory can operate in a volatile mode and a persistent mode, In the volatile mode, data stored in the persistent memory is lost due to power loss of the host system, and In the persistent mode, the data stored in the persistent memory is not lost due to power failure of the host system. The data organizing method using persistent memory as described in claim 2, further comprising: At least a portion of the storage space of the persistent memory is configured to operate in the persistent mode, and the management table is stored in the at least a portion of the storage space that operates in the persistent mode. The data collation method using persistent memory as claimed in claim 1, wherein the at least one first-type physical unit and the at least one second-type physical unit are both included in a non-volatile memory model of the memory device In the group, a single memory cell in the at least one first type of physical unit is used to store n bits, a single memory cell in the at least one second type of physical unit is used to store m bits, m and n All are positive integers, and m is greater than n. The data organizing method using persistent memory as claimed in claim 1, wherein the management table includes a logic-to-entity mapping table. A memory storage system using persistent memory, comprising: a host system configured with a persistent memory; and a memory device coupled to the host system, wherein the host system is used to enable the persistent memory, In a state that a connection between the host system and the memory device has been established, a memory controller of the memory device stores a management table maintained by the memory device in the persistent memory ,and During the process of performing a data sorting operation on the memory device, the memory controller updates the management table in the persistent memory via the connection, and removes a target data from the memory device according to an update result The at least one first-type physical unit of the memory device is copied to at least one second-type physical unit in the memory device for storage. The memory storage system using persistent memory as claimed in claim 6, wherein the persistent memory is operable in a volatile mode and a persistent mode, In the volatile mode, data stored in the persistent memory is lost due to power loss of the host system, and In the persistent mode, the data stored in the persistent memory is not lost due to power failure of the host system. The memory storage system using persistent memory as claimed in claim 7, wherein the host system is further configured to configure at least a portion of the storage space of the persistent memory to operate in the persistent mode, and The management table is stored in the at least a portion of the storage space operating in the persistent mode. The memory storage system using persistent memory as claimed in claim 6, wherein both the at least one first type physical unit and the at least one second type physical unit are included in a non-volatile memory of the memory device In the module, a single memory cell in the at least one first type entity unit is used to store n bits, a single memory cell in the at least one second type entity unit is used to store m bits, m and n are all positive integers, and m is greater than n. The memory storage system using persistent memory of claim 6, wherein the management table includes a logic-to-entity mapping table.

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