TW202230119A - Method for performing multi-system log access management, associated system on chip integrated circuit and non-transitory computer-readable medium - Google Patents

Abstract

A method for performing multi-system log access management and an associated SoC IC are provided. The method may include: utilizing multiple partial circuit of at least one processor in the SoC IC to run multiple systems, respectively; utilizing a first partial circuit to execute at least one first log management procedure, to configure at least one memory into multiple ring buffers, to record a set of first logs of a first system running on the first partial circuit into a first ring buffer, and to write multiple sets of logs respectively stored in the multiple ring buffers into a file system; and utilizing at least one second partial circuit to execute at least one second log management procedure, to record at least one set of second logs of at least one second system running on the at least one second partial circuit into at least one second ring buffer.

Description

Method, system-on-chip integrated circuit, and non-transitory computer-readable medium for multi-system log access management

The present invention relates to cross-system management on an integrated circuit (IC), and more particularly to a method for multi-system log (log) access management, and related System on Chip (SoC for short) integrated circuit (IC for short) and non-transitory computer-readable medium (non-transitory computer-readable medium).

A SoC IC may contain multiple processors for implementing different functions (eg, system control, sound-related functions, etc.). During various phases of the SoC IC, it may be desirable to record individual logs of the plurality of processors. For example, in the design stage, the pilot run stage and the production trial run stage of the SoC IC, a large number of logs may be required for system performance analysis and debugging. During the mass production phase of the SoC IC, logs may also be required to find out the cause of the system crash. Since the SoC IC can have various functions, the processors in the SoC IC can each run different systems. However, certain problems may occur. For example, the SoC IC may only keep a log of a single processor of the processors or only a single system of the systems, and thus lack a common architecture for obtaining logs across systems and multiple processors. For another example, these processors may output logs separately to the same console, where simultaneous operation of the same console may require a locking mechanism, which can cause these processors to wait for each other and thus slow down these processors speed. For another example, when the SoC IC is not connected to the console, or the SoC IC is connected to the console but a console-side host fails, the SoC IC cannot be analyzed. Therefore, there is a need for a novel approach and related architecture to implement SoC ICs with reliable log handling mechanisms with no or less likely side effects.

An object of the present invention is to provide a method for multi-system log (log) access management, a related System on Chip (SoC) integrated circuit, and a non-transitory computer readable Remove the media to resolve the above issues.

Another object of the present invention is to provide a method for multi-system log access management, a related system-on-chip integrated circuit, and a non-transitory computer-readable medium, so as to ensure the record of log information of multiple systems. Completeness, correctness and availability.

At least one embodiment of the present invention provides a method for multi-system log access management, wherein the method is applicable to a system-on-chip integrated circuit. The method may include operating a plurality of systems to control the operation of the SoC integrated circuit with at least one processor in the SoC, wherein the at least one processor includes a plurality of local circuits, and the plurality of each local circuit runs the plurality of systems; and utilizes a first local circuit of the plurality of local circuits to execute at least a first log management program, so as to configure at least one memory in the system-on-chip integrated circuit to be respectively a plurality of ring buffers corresponding to the plurality of partial circuits, recording a set of first logs of a first system operating on the first partial circuit in a first ring buffer of the plurality of ring buffers, and write multiple sets of logs stored in the multiple ring buffers into a file system to become at least one log file for access, wherein the multiple systems include the first system, and the multiple sets of logs include the set a first log; and executing at least a second log management procedure by utilizing at least one second partial circuit of the plurality of partial circuits to record in at least one second ring buffer of the plurality of ring buffers running on the At least one set of second logs of at least one second system of at least one second partial circuit, wherein the plurality of systems includes the at least one second system, and the multiple sets of logs include the at least one set of second logs.

At least one embodiment of the present invention provides a system-on-chip integrated circuit, wherein the system-on-chip integrated circuit is applicable to multi-system log access management. The system-on-chip integrated circuit may include: at least one processor including a plurality of partial circuits; and at least one memory coupled to the at least one processor. The plurality of local circuits can be used to respectively operate a plurality of systems to control the operation of the SoC IC, and the at least one memory can be used to store information for the SoC IC. For example, a first partial circuit of the plurality of partial circuits executes at least a first log management procedure, so as to configure the at least one memory as a plurality of ring buffers corresponding to the plurality of partial circuits, respectively, in the plurality of A first ring buffer of the ring buffers records a set of first logs of a first system running on the first partial circuit, and writes the sets of logs stored in the ring buffers respectively a file system to become at least one log file for further use, wherein the plurality of systems include the first system, the plurality of sets of logs include the first set of logs; and at least a second one of the plurality of partial circuits The local circuit executes at least one second log management procedure to record in at least one second ring buffer of the plurality of ring buffers at least one set of first records of at least one second system running on the at least one second local circuit Two logs, wherein the plurality of systems include the at least one second system, and the plurality of sets of logs include the at least one group of second logs.

At least one embodiment of the present invention provides a non-transitory computer-readable medium storing code to enable a system-on-chip integrated circuit to perform a multi-syslog access management program when executing the code. The system at least one processor in the single chip integrated circuit operates a plurality of systems to control the operation of the system single chip integrated circuit, the at least one processor includes a plurality of partial circuits, the plurality of partial circuits respectively operate the plurality of systems, The multi-system log access management program includes: executing at least one first log management program with a first partial circuit of the plurality of partial circuits, so as to configure at least one memory in the SoC integrated circuit to be respectively a plurality of ring buffers corresponding to the plurality of partial circuits, recording a set of first logs of a first system operating on the first partial circuit in a first ring buffer of the plurality of ring buffers, and write multiple sets of logs stored in the multiple ring buffers into a file system to become at least one log file for access, wherein the multiple systems include the first system, and the multiple sets of logs include the set a first log; and executing at least a second log management procedure by utilizing at least one second partial circuit of the plurality of partial circuits to record in at least one second ring buffer of the plurality of ring buffers running on the At least one set of second logs of at least one second system of at least one second partial circuit, wherein the plurality of systems includes the at least one second system, and the multiple sets of logs include the at least one set of second logs.

According to some embodiments, where the at least one processor represents a plurality of processors/processor cores, the plurality of partial circuits may represent the plurality of processors/processor cores. For example, the plurality of processors/processor cores may be implemented by a plurality of central processing units (Central Processing Unit, CPU for short) or a plurality of CPU cores.

One of the advantages of the present invention is that, through a carefully designed log processing mechanism, the present invention enables multi-system architectures such as multi-core heterogeneous CPU architectures to have cross-system log processing capabilities, especially to improve the overall log The processing performance is improved, and the problems of the related art, such as frequent operation of the console and the waiting caused by the locking mechanism, can be avoided, resulting in lowering of the system performance.

FIG. 1 is a schematic diagram of a system on chip (SoC) integrated circuit (IC) 100 according to an embodiment of the present invention, wherein the SoC IC 100 can be located in an electronic device 10, especially , which can be mounted on a main circuit board (eg, a printed circuit board) of the electronic device 10 , but the invention is not limited thereto. As shown in FIG. 1, in addition to the SoC IC 100, the electronic device 10 may include a data storage device 12 and an interface circuit 14, and the data storage device 12 may include a file system 12FS. Additionally, SoC IC 100 may include at least one processor (eg, one or more processors), collectively referred to as processor 110 , and may further include at least one memory (eg, one or more memories) coupled to processor 110 ), collectively referred to as the memory 120, wherein the processor 110 may include a plurality of partial circuits {PC} such as (N+1) partial circuits PC(0), PC(1), . . . and PC(N) for respective Run multiple systems such as systems #0, #1, . . . and #N, where the notation { } may represent a set. These partial circuits {PC} such as the (N+1) partial circuits PC(0), PC(1), . 1) Local processing circuits, in particular, may implement systems #0, #1, . . . and #N for SoC IC 100, respectively. For ease of understanding, systems #0, #1, . . . and #N may represent a plurality of operating systems (OSs), respectively.

Under the control of at least one program module (eg, one or more program modules) running on the processor 110 , the processor 110 may configure the memory 120 (eg, multiple storage areas thereof) into a plurality of ring buffers (Ring Buffer) {RB} such as (N+1) ring buffers RB(0), RB(1), . . . and RB(N) and a ring buffer header RBH and perform multiple log access operations. For example, these log access operations may include: (1) Local circuits PC(0), PC(1), . N) Write operations WRITE(0), WRITE(1), . read operations READ(0), READ(1), ..., and READ(N) by processors RB(0), RB(1), ..., and RB(N), which may be log reads and (3) a write operation WRITE _TOTAL of the local circuit PC(0) to the file system 12FS in the data storage device 12, wherein this write operation can also be a log write operation, and since the write operation is written to the file system 12FS Instead, it can be a file write operation, such as a log file write operation; but the invention is not limited thereto.

Based on the architecture shown in Figure 1, the SoC IC 100 can perform multi-system log access management. The plurality of partial circuits {PC} such as the (N+1) partial circuits PC(0), PC(1), ... and PC(N) may operate systems #0, #1, ... and #N, respectively, to control Operation of SoC IC 100 while at least one memory such as memory 120 may be used to store information for SoC IC 100, wherein at least two of systems #0, #1, . . . and #N are typically different from each other , in particular, belong to different types of systems. For example, systems #0, #1, . . . and #N may correspond to multiple functions of the electronic device 10 such as functions #0, #1, . . . and #N, respectively, where function #0 may include system control, and function #1 , ... and #N may include voice processing, video processing, communication processing, positioning processing, etc., but are not limited thereto.

A first partial circuit of the plurality of partial circuits {PC}, such as partial circuit PC(0), may be configured as a main partial circuit for overall control of the multi-syslog access management. In particular, the partial circuit PC(0) can execute at least a first log management program such as the log management program LMP(0) to perform the following operations: (1) Configure the memory 120 to correspond to the (N+1) ring buffers RB( 0), RB(1), ... and RB(N); (2) In a first ring buffer such as ring buffer RB(0) of the (N+1) ring buffers RB(0), RB(1), . . . and RB(N), record the operation A first set of logs on a first system on the first partial circuit (where systems #0, #1, ... and #N include the first system, eg, system #0), such as running on partial circuit PC ( 0) a set of logs LOG(0) on system #0; and (3) Write (N+1) sets of logs LOG(0), LOG(1), . The log file 12LF is for further use (eg, accessed by the user/other processor according to at least one command and displayed on the display, so that the user/other processor can use the content of each log for the plurality of partial circuits {PC } to control/optimize/reset/debug... etc.), wherein the (N+1) set of logs LOG(0), LOG(1), ... and LOG(N) include the set of first logs such as the set of logs Log LOG(0).

In addition, at least one second partial circuit in the plurality of partial circuits {PC}, such as partial circuit PC(n) (for example, the symbol "n" may represent any positive integer in the interval [1, N]), may Execute at least one second log management program such as log management program LMP(n) for at least one first among the (N+1) ring buffers RB(0), RB(1), . . . and RB(N) In a second ring buffer such as ring buffer RB(n), at least one second system (wherein the at least one second system is included in the system) operating on the at least one second partial circuit (eg partial circuit PC(n)) is recorded In #0, #1, . (1), ... and LOG(N) include the at least one set of second logs such as the set of logs LOG(n). For example, N partial circuits PC(1), . . . and PC(N) may execute N log management procedures LMP(1), . ), ... and RB(N) record N groups of logs LOG(1), ... and LOG of N systems #1, ... and #N operating in N partial circuits PC(1), ... and PC(N) (N).

For ease of understanding, the plurality of partial circuits {PC} such as the (N+1) partial circuits PC(0), PC(1), ... and PC(N) may be processed by a processor/processor core such as a central processing unit Unit (Central Processing Unit, hereinafter referred to as CPU)/CPU core and other means to implement. In this case, the above-mentioned at least one processor such as the processor 110 may include a plurality of processors/processor cores such as a plurality of CPU/CPU cores.

FIG. 2 illustrates implementation details of the SoC IC 100 shown in FIG. 1 according to an embodiment of the present invention. In this embodiment, the (N+1) partial circuits PC(0), PC(1), . . . and PC(N) shown in FIG. 1 can be implemented as (N+1) CPUs such as CPU(0), CPU(1), . . . and CPU(N), where a certain one of the above-listed CPUs, such as CPU(0), may be the main CPU among these CPUs. For the sake of brevity, similar content in this embodiment is not repeated here.

FIG. 3 illustrates implementation details of the SoC IC 100 shown in FIG. 1 according to another embodiment of the present invention. In this embodiment, the (N+1) partial circuits PC(0), PC(1), . . . and PC(N) shown in FIG. 1 can be implemented as (N+1) CPU cores, respectively Such as CORE(0), CORE(1), . . . and CORE(N), where a certain one of the above-listed CPU cores, such as CORE(0), may be the main CPU core among these CPU cores. For the sake of brevity, similar content in this embodiment is not repeated here.

Based on the architecture shown in FIG. 1, the electronic device 10 (eg, the SoC IC 100, the data storage device 12, etc. therein) may operate according to a method for performing the multi-syslog access management, wherein the method is applicable It is applicable to the electronic device 10 , in particular, the SoC IC 100 , the data storage device 12 , and the like therein. The method may include: using the processor 110 to run systems #0, . The at least one first log management program such as log management program LMP(0) can be implemented as the CPU CPU(0) of FIG. 2 or the CPU core CORE(0) of FIG. 3 to configure the memory 120 to respectively Corresponding to the (N+1) partial circuits PC(0), . (0), . The group of logs LOG(0) of system #0 of (0), and the (N+1) groups of logs LOG(0), . . . and LOG(N stored in the (N+1) ring buffers respectively ) into the file system 12FS to become the log file 12LF for further use; and utilizing the at least one second partial circuit such as one or more partial circuits {PC(n)} (which may be implemented as the CPU {CPU of FIG. 2) (n)} or the CPU core {CORE(n)} of FIG. 3, and so on in the following embodiments) (for example, "n" can represent any positive integer in the interval [1, N]) to execute the at least one A second log manager, such as one or more log managers {LMP(n)}, to log in the at least one second ring buffer, such as one or more ring buffers {RB(n)} running at the at least one The at least one second system (eg: System #1, if N = 1) of a second partial circuit (eg, the one or more partial circuits {PC(n)}); also eg: System #1 to System #N , if N > 1) of the at least one group of second logs (for example: a group of logs LOG(1), if N = 1; another example: the N groups of logs LOG(1), ... and LOG(N), if N > 1).

In addition, the electronic device 10 (eg, the SoC IC 100 therein, the data storage device 12 , etc.) may be configured to have multiple log processing pipelines according to the method. The at least one program module running on the processor 110 (eg, the at least one first log management program and the at least one second log management program, such as the log management programs LMP(0), . . . , and LMP(N) ), the processor 110 can convert the architecture of the SoC IC 100 (eg: the (N+1) partial circuits PC(0), . . . and PC(N), the (N+1) ring buffers RB (0), ... and RB(N), as well as internal connection structures (such as data processing paths) are configured in a multi-pipeline architecture. For example, relevant configuration operations in the method may include: (1) using the at least one first log management program such as log management program LMP(0), connecting from the first partial circuit to a A first data processing path, such as a data processing path from the partial circuit PC(0) to the ring buffer RB(0) (eg, the data processing path corresponding to the write operation WRITE(0)), is configured as a first a log write pipeline, such as a log write pipeline corresponding to the set of logs LOG(0); (2) utilizing the at least one second log management program such as the one or more log management programs {LMP(n)}, connecting from the at least one second partial circuit to at least one second data processing path of the at least one second ring buffer, such as from the one or more partial circuits {PC(n)}, respectively, to the one or more One or more data processing paths of a ring buffer {RB(n)} (eg, one or more data processing paths corresponding to one or more write operations {WRITE(n)}), configured as at least one A second log write pipeline, such as corresponding to one or more sets of logs (eg: a set of logs LOG(1), if N = 1; another example: the N sets of logs LOG(1), ... and LOG(N), If N > 1) one or more log write pipelines; (3) use the at least one first log manager such as log manager LMP(0) to connect from the plurality of ring buffers {RB} to the A plurality of other data processing paths of the first partial circuit, such as (N+1) from the (N+1) ring buffers RB(0), . . . and RB(N), respectively, are connected to the partial circuit PC(0) data processing paths (for example: (N+1) data processing paths corresponding to (N+1) read operations READ(0), ... and READ(N)), configured as multiple log read pipelines, such as (N+1) log read pipelines corresponding to the (N+1) sets of logs LOG(0), . . . and LOG(N), respectively; and (4) utilizing the at least one first log management program such as a log Management program LMP(0), a subsequent data processing path from the first partial circuit, such as partial circuit PC(0), towards file system 12FS, along with a path extending from the subsequent data processing path to file system 12FS an extended data processing path configured as a log export pipeline, wherein the total output processing path from the local circuit PC(0) to the file system 12FS may include the subsequent data processing path and the extended data processing path, And the write operation WRITE _TOTAL can be marked on it for easy understanding; wherein, based on the pipeline processing between the plurality of partial circuits {PC} and the plurality of ring buffers {RB}, the (N+1) group log The amount of data buffered in the plurality of ring buffers {RB} by LOG(0), . . . and LOG(N) may change dynamically over time.

According to some embodiments, the electronic device 10 (eg, the SoC IC 100 therein, the data storage device 12, etc.) may record for the (N+1) set of logs LOG(0), . . . and LOG(N) in accordance with the method to store the (N+1) groups of logs LOG(0), . . . and LOG(N) together with their overall management information in the log file 12LF. ), ... and any group of logs (eg, each group of logs) The overall management information of any log (eg, each log) in the LOG(N) may include a serial number (serial number) or a timestamp (timestamp) )Wait. For example, the set of first logs such as the set of logs LOG(0) may include the serial number of each log in the set of logs, the timestamp of each log in the set of logs, and the log content of each log in the set of logs, and the At least one set of second logs (eg: a set of logs LOG(1), if N = 1; another example: any of the N sets of logs LOG(1), ... and LOG(N), if N > 1) The group of second logs may include the serial number of each log in the any group of second logs, the timestamp of each log in the any group of second logs, and the log content of each log in the any group of second logs. In addition, the respective time stamps of all logs in the (N+1) group of logs LOG(0), ... and LOG(N) are generated according to a same clock (or clock) to indicate the ( Relative timing between N+1) sets of logs LOG(0), . . . and LOG(N), where this clock may represent the (N+1) partial circuits PC(0), . . . located in the electronic device 10 and the clock shared by PC(N) such as systems #1, . . . and #N respectively running on it. For example, the clock can be set within the SoC IC 100 . As another example, the clock may be provided outside the SoC IC 100 .

FIG. 4 illustrates a partial log processing control scheme of the method according to an embodiment of the present invention. For ease of understanding, the symbol "n0" may represent a non-negative integer in the interval [0, N]. Any one of the (N+1) partial circuits PC(0), . . . and PC(N) described in the embodiment of FIG. 1, such as the embodiment of FIG. 2 The CPU CPU(n0) or the CPU core CORE(n0) described in the embodiment of FIG. 3 may operate according to the local log processing control scheme under the control of the log management program LMP(n0), so that the ring buffer RB (n0) writes a log of a set of logs LOG(n0), where the log can be regarded as a log entry.

In step S10, the partial circuit PC(n0) may start writing to the corresponding buffer such as the ring buffer RB(n0), in particular, to the ring buffer RB(n0) (eg the set of logs LOG(n0) buffered by it. )) to write the log content of this log (for example, the event information corresponding to the event represented by this log).

In step S11, the partial circuit PC(n0) can check whether the ring buffer RB(n0) is full (in the figure, "whether the ring buffer is full" is marked for simplicity). If the check result is yes, end the workflow of the local log processing control scheme, for example, enter an error handling program to handle this situation; if not, enter step S12.

In step S12, according to the current time of the above-mentioned clock, the local circuit PC(n0) can add a time stamp of the log to the ring buffer RB(n0) (for example, the group of logs LOG(n0) buffered by it), Wherein the time stamp may indicate the current time.

In step S13, the local circuit PC(n0) may add a sequence number of this log to the ring buffer RB(n0) (eg, the group of logs LOG(n0) buffered by it). For example, a series of sequence numbers of the group of logs LOG(n0) may represent the order of all logs of the group of logs LOG(n0), and this sequence number in the series of sequence numbers may indicate the relative order of this log with respect to the rest of the logs.

In step S14, the local circuit PC(n0) may calculate a checksum of the log content of this log, in particular, in the ring buffer RB(n0) (eg the set of logs LOG(n0) it buffers) The checksum is written in as the integrity check information for this log.

In step S15 , the local circuit PC ( n0 ) can control the memory barrier, such as issuing a data synchronization barrier (DSB for short) command.

In step S16, the partial circuit PC(n0) may update an input pointer of the ring buffer RB(n0), wherein the input pointer may indicate a newest input position of the ring buffer RB(n0) (eg, currently written s position).

For better understanding, the method can be illustrated by the workflow shown in FIG. 4, but the present invention is not limited thereto. According to some embodiments, one or more steps may be added, deleted or modified in the workflow shown in FIG. 4 .

FIG. 5 illustrates a global log processing control scheme of the method according to an embodiment of the present invention. A local circuit PC(0) (eg CPU CPU(0) in Figure 2 or CPU core CORE(0) in Figure 3) may operate according to the global log processing control scheme under the control of the log management program LMP(0) , to read one or more logs from the set of logs LOG(n0) from the ring buffer {RB(n0)}.

In step S20, the local circuit PC(0) may start reading the buffer, eg, start executing a main control program corresponding to the global log processing control scheme. Then, it goes to step S21.

In step S21, the local circuit PC(0) may perform memory allocation to obtain memory space for use by a global ring buffer Global_Ring_Buffer (marked as “malloc (Global_Ring_Buffer)” in the figure for brevity). Then, it goes to step S22.

In step S22, the local circuit PC(0) may initialize (initialize) the global ring buffer Global_Ring_Buffer (marked as "init Global_Ring_Buffer" in the figure for simplicity), wherein the global ring buffer Global_Ring_Buffer may include the ring buffer header area RBH and the (N+1) ring buffers RB(0), . . . and RB(N). For example, the local circuit PC(0) may record the respective ring buffer management information of the (N+1) ring buffers RB(0), . . . and RB(N) in the ring buffer header area RBH, so as to Indicate the respective users of the (N+1) ring buffers RB(0), ... and RB(N) (eg partial circuits PC(0), ... and PC(N)) and the (N+1) The respective sizes of the ring buffers RB(0), . . . and RB(N). Then, it goes to step S23.

In step S23, the local circuit PC(0) may create a main task to control operations in subsequent steps. For example, the log management program LMP(0) may include the main control program and the main work, but the present invention is not limited thereto. Then, it goes to step S24.

In step S24, the partial circuit PC(0) may attempt to obtain a data from a partial circuit PC(n0) such as a CPU (eg, CPU CPU(n) in FIG. 2)/CPU core (eg, CPU core CORE(n) in FIG. 3 ). )) of the ring buffer RB(n0) reads a log (in the figure, it is marked as "reading the log from the ring buffer of a CPU" for brevity). Then, it goes to step S25.

In step S25, the local circuit PC(0) can check whether the ring buffer RB(n0) is empty (in the figure, "whether the ring buffer is empty" is marked for simplicity). If yes, go to step S26; if no, go to step S28.

In step S26, the partial circuit PC(0) can wait for a period of time, especially, sleep for a period of time. Then, it goes to step S27.

In step S27, the partial circuit PC(0) can select the next partial circuit such as the next CPU/CPU core (marked as "select the next CPU" in the figure for simplicity) to select all the partial circuits such as all the CPUs in turn. /CPU core, and then check all local circuits. Then, it returns to step S24.

In step S28, the local circuit PC(0) can calculate the checksum of the log according to the log content of the log. Then, it goes to step S29.

In step S29, the local circuit PC(0) can check whether the checksum calculated in step S28 is equal to the checksum recorded in this log (marked "checksum is correct" in the figure for brevity). If yes, go to step S30; if no, go to step S24.

In step S30, the local circuit PC(0) can store the log in the file system 12FS (eg, log file 12LF). Then, it goes to step S31.

In step S31, the local circuit PC(n0) can control the memory failure, such as issuing the DSB command. Then, it goes to step S32.

In step S32, the local circuit PC(0) may update an output pointer of the ring buffer RB(n0), wherein the output pointer may indicate a newest output position of the ring buffer RB(n0) (eg, currently read s position). Then, it returns to step S24.

For better understanding, the method can be illustrated by the workflow shown in FIG. 5, but the present invention is not limited thereto. According to some embodiments, one or more steps may be added, deleted or modified in the workflow shown in FIG. 5 .

FIG. 6 illustrates a non-transitory computer-readable medium 10M involved in the method according to an embodiment of the present invention, wherein the non-transitory computer-readable medium 10M stores program codes 10P enables the SoC IC 100 to perform a multi-syslog access management procedure such as the multi-syslog access management (eg, various operations described in the above embodiments) when executing the above-described code 10P. For ease of understanding, the code 10P may be depicted as including the log management programs LMP(0), . . . and LMP(N), but the invention is not limited thereto. In addition, the program code 10P can be loaded into the processor 110 to become the at least one program module running on the processor 110 . The non-transitory computer-readable medium 10M may represent a certain storage device/element of the electronic device 10 (eg, the data storage device 12 shown in FIG. 1 or other storage devices/elements). The storage device/component can be implemented by a hard disk drive, a solid state drive, a Universal Flash Storage (UFS) device, a non-volatile memory device such as an electronically erasable programmable read-only memory (Electrically-Erasable Programmable Read-Only Memory, EEPROM) and flash (Flash) memory), etc., but the present invention is not limited to this. For the sake of brevity, similar content in this embodiment is not repeated here.

Through a carefully designed log processing mechanism, the present invention enables a multi-system architecture such as a multi-core heterogeneous CPU architecture to have a cross-system log processing capability, especially to improve the overall log processing performance. For example, the methods and system-on-chip integrated circuits of the present invention can control all of the plurality of local circuits (eg, all of the plurality of processors/processor cores, such as the plurality of all of the CPUs, or all the CPU cores of the plurality of CPU cores) output their respective logs to the plurality of ring buffers, respectively, instead of directly outputting to a console, and can utilize the first local Circuitry (eg, a primary processor/processor core of the plurality of processors/processor cores, such as a primary CPU of the plurality of CPUs, or a primary CPU core of the plurality of CPU cores) will be complete The log is output to the console, and therefore, problems in the related art such as frequent console operations and waiting due to a locking mechanism can be avoided, thereby reducing system performance. In addition, the method and system SoC of the present invention can obtain the complete log at any time, especially save the complete log in the file system, and thus can avoid the related art problems such as the console has not been connected, or the console has been connected but The console side host fails and the log cannot be viewed. In addition, through the use of memory barrier control procedures, the present invention can ensure that a single buffer has only one consumer and one producer to achieve first-in, first-out (FIFO) no-lock burst access (no-lock burst access). , to avoid system performance degradation and possible deadlock caused by locking. Due to the introduction of global timestamps, the present invention can provide better reference information for system analysis through the gap between timestamps of adjacent logs. The present invention can also provide reference information for judging whether any log is lost by introducing a serial number. The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

10: Electronic device 12: Data storage device 12FS: File system 12LF: Log file 14: Interface circuit 100: System on chip (SoC) integrated circuit (IC) 110: Processor 120: Memory LMP(0)~LMP( N): log management program LOG(0)~LOG(N): log PC(0)~PC(N): local circuit RB(0)~RB(N): ring buffer RBH: ring buffer header WRITE (0)~WRITE(N), WRITE _TOTAL : write operation READ(0)~READ(N): read operation CPU(0)~CPU(N): central processing unit (CPU) CORE(0)~ CORE (N): Central Processing Unit (CPU) cores S10~S16, S20~S32: Step 10M: Non-transitory computer readable medium 10P: Program code

FIG. 1 is a schematic diagram of a System on Chip (SoC) integrated circuit (IC) according to an embodiment of the present invention. FIG. 2 illustrates implementation details of the SoC shown in FIG. 1 according to an embodiment of the present invention. FIG. 3 illustrates implementation details of the system-on-chip integrated circuit shown in FIG. 1 according to another embodiment of the present invention. FIG. 4 illustrates a partial log processing control scheme of a method for multi-system log (log) access management according to an embodiment of the present invention. FIG. 5 illustrates a global log processing control scheme of the method according to an embodiment of the present invention. FIG. 6 illustrates a non-transitory computer-readable medium involved in the method according to an embodiment of the present invention.

10: Electronics

12: Data storage device

12FS: File System

12LF: log file

14: Interface circuit

100: System-on-Chip (SoC) Integrated Circuit (IC)

110: Processor

120: memory

LMP(0)~LMP(N): log management program

LOG(0)~LOG(N): log

PC(0)~PC(N): Local circuit

RB(0)~RB(N): Ring buffer

RBH: Ring Buffer Header

WRITE(0)~WRITE(N), WRITE _TOTAL : write operation

READ(0)~READ(N): read operation

Claims (10)

A method for multi-system log access management, applicable to a system-on-chip integrated circuit, the method comprising: The operation of the SoC IC is controlled by operating a plurality of systems by utilizing at least one processor in the SoC IC, wherein the at least one processor includes a plurality of partial circuits, and the plurality of partial circuits operate respectively the plurality of systems; Using one of the plurality of local circuits to execute at least one first log management program, so as to configure at least one memory in the SoC IC to correspond to a plurality of the plurality of local circuits, respectively a ring buffer, recording a set of first logs of a first system running on the first partial circuit in a first ring buffer of the plurality of ring buffers, and separating the plurality of ring buffers The stored sets of logs are written into a file system to become at least one log file for access, wherein the multiple systems include the first system, and the multiple sets of logs include the first set of logs; and At least one second log management procedure is executed by at least one second partial circuit among the plurality of partial circuits, so as to record in the at least one second ring buffer of the plurality of ring buffers running in the at least one second partial circuit At least one set of second logs of at least one second system of the circuit, wherein the plurality of systems includes the at least one second system, and the plurality of sets of logs includes the at least one set of second logs. The method of claim 1, wherein the group of first logs includes serial numbers of each log in the group of first logs and log contents of each log in the group of first logs, and the at least one group of second logs Any one group of second logs includes the serial number of each log in the any group of second logs and the log content of each log in the any one group of second logs. The method of claim 1, wherein the set of first logs includes timestamps of each log in the set of first logs and log content of each log in the set of first logs, and the at least one set of second logs Any set of second logs in the log includes timestamps of each log in the any set of second logs and log content of each log in the any set of second logs. The method of claim 1, wherein any log in any one of the groups of logs includes a time stamp; and the respective time stamps of all the logs in the plurality of groups of logs are based on An identical clock is generated to indicate the relative timing among the sets of logs. The method described in item 1 of the scope of the application, further comprising: Using the at least one first log management program to configure a first data processing path from the first partial circuit to the first ring buffer into a first log write pipeline; Using the at least one second log manager to configure at least one second data processing path from the at least one second partial circuit to the at least one second ring buffer into at least one second log write pipeline; and Using the at least one first log manager to configure a plurality of other data processing paths from the plurality of ring buffers to the first partial circuit, respectively, into a plurality of log read pipelines, and from the first partial circuit toward A subsequent data processing path of the file system is configured as a log export pipeline. The method of claim 1, wherein based on pipeline processing between the plurality of local circuits and the plurality of ring buffers, the amount of data buffered by the plurality of sets of logs in the plurality of ring buffers changes over time change dynamically. The method of claim 1, wherein at least two systems in the plurality of systems belong to different types of systems respectively. The method of claim 1, wherein the plurality of systems respectively represent a plurality of operating systems. A system-on-chip integrated circuit can be applied to multi-system log access management, and the system-on-chip integrated circuit includes: at least one processor, the at least one processor including a plurality of local circuits for respectively operating a plurality of systems to control the operation of the system-on-chip integrated circuits; and at least one memory coupled to the at least one processor for storing information for the system-on-chip integrated circuit; in: A first partial circuit of the plurality of partial circuits executes at least a first log management procedure, so as to configure the at least one memory as a plurality of ring buffers corresponding to the plurality of partial circuits, respectively, in the plurality of rings A first ring buffer among the buffers records a set of first logs of a first system running on the first partial circuit, and writes the sets of logs stored in the plurality of ring buffers into a file the system to become at least one log file for further use, wherein the plurality of systems includes the first system, and the plurality of sets of logs includes the first set of logs; and At least one second partial circuit of the plurality of partial circuits executes at least one second log management procedure to record in at least one second ring buffer of the plurality of ring buffers operating on the at least one second partial circuit At least one set of second logs of at least one second system, wherein the plurality of systems include the at least one second system, and the multiple sets of logs include the at least one set of second logs. A non-transitory computer-readable medium storing program code to enable a system-on-chip integrated circuit to perform a multi-syslog access management program when executing the code, at least one of the system-on-chip integrated circuits A processor operates a plurality of systems to control the operation of the system-on-chip integrated circuit, the at least one processor includes a plurality of local circuits, the plurality of local circuits respectively run the plurality of systems, the multi-system log access management program Include: Using one of the plurality of local circuits to execute at least one first log management program, so as to configure at least one memory in the SoC IC to correspond to a plurality of the plurality of local circuits, respectively a ring buffer, recording a set of first logs of a first system running on the first partial circuit in a first ring buffer of the plurality of ring buffers, and separating the plurality of ring buffers The stored sets of logs are written into a file system to become at least one log file for access, wherein the multiple systems include the first system, and the multiple sets of logs include the first set of logs; and At least one second log management procedure is executed by at least one second partial circuit among the plurality of partial circuits, so as to record in the at least one second ring buffer of the plurality of ring buffers running in the at least one second partial circuit At least one set of second logs of at least one second system of the circuit, wherein the plurality of systems includes the at least one second system, and the plurality of sets of logs includes the at least one set of second logs.

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