TW202203392A - 積體電路封裝之模具材料層內的高導熱性、高模數結構 - Google Patents

積體電路封裝之模具材料層內的高導熱性、高模數結構 Download PDF

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TW202203392A
TW202203392A TW109144069A TW109144069A TW202203392A TW 202203392 A TW202203392 A TW 202203392A TW 109144069 A TW109144069 A TW 109144069A TW 109144069 A TW109144069 A TW 109144069A TW 202203392 A TW202203392 A TW 202203392A
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integrated circuit
electronic substrate
forming
mold material
electronic
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TW109144069A
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奕群 白
菲普 梅塔
約翰 戴克
林子寅
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美商英特爾股份有限公司
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Abstract

可形成一種積體電路總成，其包含電子基材；至少一積體電路裝置，其電性附接至該電子基材；模具材料層，其毗連該電子基材並實質上圍繞該至少一積體電路；以及在該模具材料層內的至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。

Description

積體電路封裝之模具材料層內的高導熱性、高模數結構
本說明書之實施例大致上係關於模具積體電路封裝之製造的領域，並且更具體地係有關於將高模數、高導熱性結構結合到積體電路封裝的模具材料層中。
積體電路產業正在不斷努力生產出更快、更小、更薄的積體電路(IC)裝置和封裝以用於各種電子產品，包括(但不限於)電腦伺服器和可攜式產品，諸如可攜式電腦、電子平板電腦、行動電話、數位相機等。
實現這些目標的一種路徑是更緊密地封裝積體電路裝置。一種此種配置(稱為堆疊的複合晶粒)包含附接至電子基材的複數個積體電路裝置(主動或被動的)，其在實質上圍繞或環繞複數個積體電路裝置的電子基材上具有模具材料層。如那些熟悉此技藝人士所將理解到，儘管這樣的積體電路封裝可以是封裝積體電路裝置的有效方式，但是它與單片矽相比具有更高的翹曲，因為模具材料層引起溫度梯度。這樣的翹曲會導致模具材料層的剝離及/或破裂，這可能導致積體電路封裝的故障。溫度梯度的翹曲可能在積體電路封裝的操作及/或製造程序的溫度循環期間發生，諸如積體電路封裝與電路板的熱壓接合。
此外，當基材是主動(例如，積體電路裝置)的時候，它會產生大量的熱，這可能很難透過模具材料層和複數個積體電路裝置傳遞到散熱裝置。這個問題可透過使用導熱的模具材料到模具材料層而減輕。然而，導熱模具材料通常具有高的熱膨脹係數，這會加劇翹曲。
及
在下面的詳細敘述中，參考附圖，這些附圖以說明的方式示出了可以實踐所請求標的的特定實施例。這些實施例已經足夠詳細地敘述，以使得所屬技術領域中具有通常知識者能夠實踐發明標的。應理解其儘管各種實施例不同，但是不一定是相互排斥。例如，在不脫離所請求標的的精神和範圍的況下，可以在其他實施例內實施結合一個實施例的本文敘述的特定特徵、結構、或特性。在本說明書內所提到的「一個實施例」或「實施例」意味連同實施例說明的特別特徵、結構或特性被包括在本發明之至少一實施方式中。因此，用語「一個實施例」或「在一實施例中」的使用不一定指相同的實施例。此外，應理解到在不脫離所請求標的的精神和範圍的情況下，可以修改每一所揭露的實施例內單一元件的位置和配置。因此，以下詳細敘述不應被理解為限制性的，並且發明標的的範圍僅由適當解釋的所附申請專利範圍以及所附申請專利範圍所賦予的均等物的全部範圍來限定。在圖式中，貫穿若干視圖的相同元件編號指的是相同或相似的元件或功能，並且其中所描繪的元件不需彼此按比例繪製，而是可以放大或縮小各個元件，以便在本說明書的上下文中更容易地理解這些元件。
如本文所使用的用語「上方」、「至」、「之間」及「上」是指層或相對於其它層之組件的相對位置。一層在另一層「上方」或「上」可以與其他層直接接觸，或者可以具有一或多個中介層。在層「之間」的一層可以直接與這些層接觸，或者可以具有一或多個中介層。
用語「封裝」一般而言是指一或多個晶粒的自包含載體，其中晶粒係附接至封裝基材，並且可以被封裝以用於保護，並在晶粒與位於封裝基材外部的引線、接腳或凸塊之間具有整合的或有線接合的互連。封裝可包含單一晶粒或多個晶粒，以提供特定功能。封裝通常安裝在印刷電路板上，以便與其他方封裝的積體電路和分立的組件互連，從而形成更大的電路。
這裡，用語「有核心的」通常是指構建在包含非撓性的硬質材料的電路板、卡或晶圓上的積體電路封裝的基材。一般而言，將小的印刷電路板用作核心，在其上可以焊接積體電路裝置和分立的被動組件。一般而言，核心具有從一側延伸至另一側的通孔，從而允許在核心之一側上的電路直接耦接至核心之另一側上的電路。核心亦可作為構建導體和介電質材料之層的平台。
這裡，用語「無核心的」通常是指不具有核心的積體電路封裝的基材。缺少核心允許使用高密度封裝架構，因為與高密度互連相比，通孔具有相對較大的尺寸和間距。
這裡，如果本文中使用用語「焊盤側」通常是指積體電路封裝的基材最靠近印刷電路板、主機板或其他封裝之附接平面的一側。這與用語「晶粒側」相反，用語「晶粒側」係積體電路封裝之基材的晶粒或多個晶粒附接至其的一側。
這裡，用語「介電質」通常是指構成封裝基材的結構之任何數量的非導電材料。為了本揭露的目的，可以將介電質材料作為層壓膜的層或作為模製在安裝在基材上的積體電路晶粒上的樹脂結合到積體電路封裝中。
這裡，用語「金屬化」通常是指形成在封裝基材之介電質材料上方並穿過其的金屬層。通常將金屬層圖形化以形成金屬結構，諸如跡線和接合墊。封裝基材的金屬化可被限制為單層或被介電質層分開的多層。
這裡，用語「接合墊」通常是指終止積體電路封裝和晶粒中的整合的跡線和通孔的金屬化結構。用語「焊料墊」有時可替代「接合墊」，並具有相同的意義。
這裡，用語「焊料凸塊」通常是指形成接合墊上的焊料層。焊料層通常具有圓形形狀，因此稱為「焊料凸塊」。
這裡，用語「基材」通常是指包含介電質和金屬化結構的平面平台。基材機械地支持並電性耦接至在單一平台上的一或多個IC晶粒，並藉由可模製的介電質材料囊封一或多個IC晶粒。基材通常包含在兩側上作為接合互連的焊料凸塊。基材的一側(通常稱為「晶粒側」)包含用於晶片或晶粒接合的焊料凸塊。基材的相對側(通常稱為「焊盤側」)包含用於將封裝接合至印刷電路板的焊料凸塊。
這裡，用語「總成」通常是指將零件群組為單一功能單元。元件可以是分開的，並且機械地組裝到功能單元，其中零件係可移除的。在另一實例中，零件可永久地接合在一起。在一些實例中，零件係整合在一起。
貫穿說明書及在申請專利範圍中，用語「連接的」意指在連接的東西之間以諸如電性、機械或磁性的直接連接，而沒有任何中間的裝置。
用語「耦接」的意思是透過一或多個被動或主動中間裝置在連接的或間接連接的物之間的直接或間接連接，諸如直接電性、機械、磁性或流體連接。
用語「電路」或「模組」可指的是一或多個被動和/或主動組件，其為佈置以與另一個合作來提供所需的功能。用語「信號」可稱為至少一電流信號、電壓信號、磁性信號或資料/時脈信號。「一(a)」、「一個(an)」以及「該」的意思包括數個參考。「中」的意思包括「中」和「上」。
垂直方向係在z方向上，並且應當理解到「頂部」、「底部」、「上方」和「下方」的引用是指z維度中具有通常含義的相對位置。然而，應當理解到實施例不必限於圖中所示的方向或組態。
用於「實質上」、「接近」、「大約」、「附近」以及「約」一般指的是目標值在+/-10％之間(除非另有指明)。除非以其它方式指明，使用用以敘述一般物件之一般形容詞「第一」、「第二」以及「第三」等等，僅指示相似物件之不同實例被提及，並且不旨在暗示如此描述的物件必須以給定的順序，無論是時間、空間、排名或以在任何其他方式。
對於本揭露之目的，用語「A和/或B」及「A或B」的意思是(A)、(B)或(A和B)。對於本揭露之目的，用語「A、B和/或C」的意思是(A)、(B)、(C)、(A和B)、(A和C)、(B和C)或(A、B和C)。
標示為「橫截面」、「輪廓」和「平面」的視圖相應於笛卡爾座標系統內的正交平面。因此，橫截面和輪廓圖是在x-z平面中截取的，而平面圖是在x-y平面中截取的。一般而言，x-z平面中的輪廓圖係橫截面視圖。在適當的地方，圖紙上標有軸，以指示圖形的方向。
本說明書之實施例包括積體電路封裝及其製造方法，所述積體電路封裝包含電子基材、電性附接至電子基材的至少一積體電路裝置、毗連電子基材及實質上圍繞至少一積體電路裝置的模具材料層、以及在模具材料層內的至少一結構，其中至少一結構包含具有高模數和高導熱性的材料。
圖1繪示具有電性連接至電子電路板120之積體電路封裝110的積體電路總成100。根據本說明書的一實施例，積體電路封裝110可包含以通常被稱為倒裝晶片或受控倒塌晶片連接(“C4”)組態之組態電性附接至電子基材150的至少一積體電路裝置(繪示為第一積體電路裝置1401 、第二積體電路裝置1402 、及第三積體電路裝置1403 )。
第一積體電路裝置1401 、第二積體電路裝置1402 、及第三積體電路裝置1403 可為任何合適的裝置，包括(但不限制於)微處理器、晶片組、圖形裝置、無線裝置、記憶體裝置、特定應用積體電路、及其組合、及其堆疊等等。如圖所示，第一積體電路裝置1401 、第二積體電路裝置1402 、及第三積體電路裝置1403 可各具有第一表面142、相對第二表面144、以及在第一表面142與第二表面144之間延伸的至少一側146。
在圖1中所示之本說明書的實施例中，第一積體電路裝置1401 、第二積體電路裝置1402 、及第三積體電路裝置1403 可利用複數個裝置至基材互連160電性附接至電子基材150。裝置至基材互連160可為任何合適的導電材料或結構，包括(但不限制於)焊球、金屬凸塊或柱、金屬填充環氧樹脂或其組合。在一實施例中，裝置至基材互連160可為形成自錫、鉛/錫合金(例如，63%錫/37%鉛焊料)、及高錫含量的合金(例如，90%或更多的錫，諸如錫/鉍、共晶錫/銀、三元錫/銀/銅、共晶錫/銅、及類似的合金)的焊球。在另一實施例中，裝置至基材互連160可為銅凸塊或柱。在進一步實施例中，裝置至基材互連160可為塗佈有焊料材料的金屬凸塊或柱。裝置至基材互連160可以與它們各別的積體電路裝置(即，第一積體電路裝置1401 、第二積體電路裝置1402 、及第三積體電路裝置1403 )內的積體電路(未圖示)電性連通。
電性絕緣底填充材料170(諸如，環氧樹脂材料)可經設置在第一積體電路裝置1401 與電子基材150之間、在第二積體電路裝置1402 與電子基材150之間、以及在第三積體電路裝置1403 與電子基材150之間。如那些熟悉此技藝人士所將理解到，底填充材料170可如黏性液體經施配在個別積體電路裝置1401 、1402 、1403 之第一表面142與電子基材150之間，然後通過固化程序進行硬化。如本領域中已知的，底填充材料170亦可以是模製底填充材料。如那些熟悉此技藝人士所將理解到，底填充材料170可提供結構化整合性並且可防止污染物。
電子基材150可為任何合適的裝置，包括被動裝置(諸如，中介層、電路板等等)及/或(例如，具有積體電路的)主動裝置(諸如，微處理器、晶片組、圖形裝置、無線裝置、記憶體裝置、特定應用積體電路、及其組合、及其堆疊等等)。如圖所示，電子基材150可包括第一表面152及相對第二表面154。
當電子基材150係被動裝置時，其可包含複數個介電質材料層(未圖示)，其可包括堆疊膜及/或阻焊劑層，並且可由合適的介電質材料組成，包括但不限於雙馬來酰亞胺三嗪樹脂(bismaleimide triazine resin)、阻燃級4材料、聚醯亞胺材料、二氧化矽填充的環氧樹脂材料、玻璃增強環氧樹脂材料等、以及低k和超低k介電質(介電常數小於約3.6)，包括但不限於碳摻雜介電質、氟摻雜介電質、多孔介電質、有機聚合介電質等。電子基材150可進一步包括延伸穿過電子基材150的導電路徑或「金屬化」(未圖示)。如那些熟悉此技藝人士所將理解到，導電路徑可為導電跡線(未圖示)和延伸穿過複數個介電質材料層(未圖示)之導電通孔(未圖示)的組合。這些導電跡線和導電通孔為本領域眾所周知，並且為了清楚起見未在圖1中示出。導電跡線和導電通孔可由任何合適的導電材料製成，所述導電材料包括但不限制於金屬，諸如銅、銀、鎳、金、鋁、及其合金等等。如那些熟悉此技藝人士所將理解到，電子基材150可為有核心基材或無核心基材。
當電子基材150係主動裝置，其可為任何合適的裝置包括(但不限制於)微處理器、晶片組、圖形裝置、無線裝置、記憶體裝置、特定應用積體電路、及其組合、及其堆疊等等。第一積體電路裝置1401 、第二積體電路裝置1402 、及第三積體電路裝置1403 可電性附接至電子基材150之第二表面154上的穿越矽通孔(未圖示)(作為主動裝置)。穿越矽通孔係本領域眾所周知，並且為了清楚和簡潔的目的將在本文中討論和繪示。
電子電路板120可為被動裝置，並且像是前面討論的被動電子基材150，其可包含複數個介電質材料層(未圖示)，其可包括堆疊膜及/或阻焊劑層，並且可由合適的介電質材料組成，包括但不限於雙馬來酰亞胺三嗪樹脂(bismaleimide triazine resin)、阻燃級4材料、聚醯亞胺材料、二氧化矽填充的環氧樹脂材料、玻璃增強環氧樹脂材料等、以及低k和超低k介電質(介電常數小於約3.6)，包括但不限於碳摻雜介電質、氟摻雜介電質、多孔介電質、有機聚合介電質等。電子電路板120可進一步包括延伸穿過電子電路板120的導電路徑或「金屬化」128(以虛線顯示)。如那些熟悉此技藝人士所將理解到，導電路徑128可為導電跡線(未圖示)和延伸穿過複數個介電質材料層(未圖示)之導電通孔(未圖示)的組合。這些導電跡線和導電通孔為本領域眾所周知，並且為了清楚起見未在圖1中示出。導電跡線和導電通孔可由任何合適的導電材料製成，所述導電材料包括但不限制於金屬，諸如銅、銀、鎳、金、和鋁、及其合金等等。如那些熟悉此技藝人士所將理解到，電子電路板120可為有核心基材或無核心基材。
在本說明書的一實施例中，積體電路封裝110可電性附接至電子電路板120，所述電子電路板具有複數個封裝至電路板互連130。在本說明書的一個實施例中，封裝至電路板互連130可在電子基材150之第一表面152上的接合墊156與在電子電路板120之第一表面122上的接合墊124之間延伸。封裝至電路板互連130可為任何合適的導電材料或結構，包括(但不限制於)焊球、金屬凸塊或柱、金屬填充環氧樹脂或其組合。在一實施例中，封裝至電路板互連130可為形成自錫、鉛/錫合金(例如，63%錫/37%鉛焊料)、及高錫含量的合金(例如，90%或更多的錫，諸如錫/鉍、共晶錫/銀、三元錫/銀/銅、共晶錫/銅、及類似的合金)的焊球。在另一實施例中，封裝至電路板互連130可為銅凸塊或柱。在進一步實施例中，封裝至電路板互連130可為塗佈有焊料材料的金屬凸塊或柱。
在電子電路板120之第一表面122上的接合墊124可與導電路徑128電性接觸。導電路徑128可延伸通過電子電路板120並且電性連接至外部組件(未圖示)。
如在圖1中進一步所示，模具材料層180可形成在電子基材150上。模具材料層180可為任何合適的材料，諸如環氧樹脂。如那些熟悉此技藝人士所將理解到，模具材料層180可提供結構化整合性並且可防止污染物。可以在模具材料層180內形成至少一高導熱性、高模數結構190。至少一結構190可以由任何合適的高模數和高導熱性材料製成，包括(但不限制於)金屬、石墨烯、燒結漿料等等。在一實施例中，金屬材料可包括銅、銀、鎳、金、鋁、及其合金等等。在另一實施例中，石墨烯材料可包括排列的石墨烯、官能化的石墨烯、片材石墨烯等等。在又一實施例中，完全或部分的燒結漿料可包括銀、銀塗佈的銅顆粒、銅/錫介金屬化合物、環氧樹脂或矽樹脂基質中的錫/銻合金等等。在一實施例中，至少一結構190可包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
儘管圖1中顯示三個積體電路裝置1401 、1402 、及1403 ，但是積體電路封裝110可具有任何合適數量的積體電路裝置，諸如圖2中所示的積體電路裝置1401 -1409 。除此之外，至少一結構190可具有任何合適的組態。在本說明書的一個實施例中，如圖2所示，至少一結構190可為圍繞積體電路裝置1401 -1409 的單一結構，使其類似於圖像的框架，例如「圖框(picture frame)」。在本說明書的另一實施例中，至少一結構190可組成多個片段，諸如圖3中所示的L形壁1901 -1904 、圖4中所示的壁片段1905 -1908 等。
圖5-8繪示根據本說明書之一個實施例之製造積體電路封裝110的程序。如圖5中所示，至少一積體電路裝置1401 -1403 可透過該複數個裝置至基材互連160電性附接至電子基材150，並且底填充材料170可設置在積體電路裝置1401 -1403 與電子基材150之間。如圖6中所示，至少一結構190可形成在電子基材150上。至少一結構190可由任何本領域已知的程序形成，已知的程序包括(但不限於)電鍍、施配、印刷等等。如圖7中所示，模具材料層180可形成在電子基材150、至少一結構190、及積體電路裝置1401 -1403 的上方。模具材料層180可藉由施配、疊層、使用封裝模具(mold chase)等等來形成。模具材料層180可被平坦化(諸如藉由化學機械研磨(“CMP”))以露出至少一結構190的一部分和積體電路裝置1401 -1403 的第二表面144，從而形成積體電路封裝110，如圖8所示。
圖9-12繪示根據本說明書之一個實施例之製造積體電路封裝110的程序。如圖9中所示，開始於關於圖5所示及所討論的結構，模具材料層180可被形成在電子基材150及積體電路裝置1401 -1403 上方。如圖10所示，模具材料層180可被平坦化(如前面所述)，以露出積體電路裝置1401 -1403 的第二表面144。如圖11所示，至少一溝槽192可被形成穿過模具材料層180，以露出電子基材150的一部分。至少一溝槽192可由任何本領域已知合適的程序形成，已知的程序包括但不限於雷射鑽孔、離子剝蝕、蝕刻等等。如圖12所示，至少一結構190可被形成在至少一溝槽192內的電子基材150上(參見圖11)，以形成積體電路封裝110。至少一結構190可由任何本領域已知的程序形成，已知的程序包括但不限於電鍍、施配、印刷等等。
應理解到實施例不限於圖1的積體電路總成100，但可為任何合適的組態。在圖13中所示的實施例中，積體電路總成100可包括主機板194，其中電子電路板120係電性附接至主機板194。主機板194可為被動裝置並且(像是前面討論的被動電子電路板120)可包含複數個介電質材料層(未圖示)和延伸穿過主機板194的導電路徑或「金屬化」198(以虛線示出)。如那些熟悉此技藝人士所將理解到，導電路徑198可為導電跡線(未圖示)和延伸穿過複數個介電質材料層(未圖示)之導電通孔(未圖示)的組合。這些導電跡線和導電通孔為本領域眾所周知，並且為了清楚起見未在圖13中示出。如那些熟悉此技藝人士所將理解到，主機板194可為有核心基材或無核心基材。
在本說明書的一實施例中，電子電路板120可電性附接至主機板194，所述主基板具有複數個電路板至電路板互連134。在本說明書的一個實施例中，電路板至電路板互連134可在電子基材120之第二表面126上的接合墊132與在主機板194之第一表面196上的接合墊136之間延伸。電路板至電路板互連134可為與如前文討論之封裝至電路板互連130類似地構造和組成物。
如在圖13中進一步所示，底填充材料172可設置在積體電路封裝110與電子電路板120之間。額外地，在主機板194之第一表面196上的接合墊136可與導電路徑198電性接觸。導電路徑198可延伸通過主機板194並且電性連接至外部組件(未圖示)。
圖14係根據本說明書之一實施例的製造積體電路總成之程序200的流程圖。如在方塊210中所述，可形成電子基材。如在方塊220中所述，可形成至少一積體電路裝置。如在方塊230中所述，至少一積體電路裝置可電性附接至電子基材。如在方塊240中所述，可形成模具材料層以毗連電子基材並實質上圍繞至少一積體電路裝置。如在方塊250中所述，可在模具材料層內形成至少一結構，其中至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
圖15繪示根據本發明之一個實施方式之電子或計算裝置300。計算裝置300可包括殼體301，其具有電路板302設置其中。計算裝置300可包括數個積體電路組件，包括但不限制於處理器304、至少一通訊晶片306A、306B、揮發性記憶體308(例如，DRAM)、非揮發性記憶體310(例如，ROM)、快閃記憶體312、圖形處理器或CPU314、數位訊號處理器(未圖示)、密碼處理器(未圖示)、晶片組316、天線、顯示器(觸控螢幕顯示器)、觸控螢幕控制器、電池、音頻編解碼器(未圖示)、視頻編解碼器(未圖示)、功率放大器(AMP)、全球定位系統(GPS)裝置、羅盤、加速計(未圖示)、陀螺儀(未圖示)、揚聲器、相機和大容量儲存裝置(未圖示)(諸如，硬碟驅動器、光碟(CD)、數位多功能光碟(DVD)等)。任何積體電路組件可實體地和電性地耦接至電路板302。在一些實施方式中，積體電路組件中之至少一者可為處理器304的一部分。
通訊晶片致能無線通訊，用於將資料轉移至計算裝置以及從計算裝置轉移資料。用語「無線」及其衍生字可用以敘述可藉由使用調諧電磁輻射經由非固態介質而通訊資料之電路、裝置、系統、方法、技術、通訊通道等等。用語並非暗示相關裝置不包含任何線路，儘管在一些實施例中它們可能不包含任何線路。通訊晶片可實施任何數目之無線標準或協定實現無線通訊，包括但不限制於Wi-Fi(IEEE 802.11系列)、WiMAX(IEEE 802.16系列)、IEEE 802.20、長程演進(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、藍芽、其衍生、以及任何其它被指定為3G、4G、5G、及之外的無線協定。計算裝置可包括複數個通訊晶片。例如，第一通訊晶片可專用於短距離無線通訊諸如Wi-Fi及藍芽，及第二通訊晶片可專用於長距離無線通訊諸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO、及其他。
用語「處理器」可指處理來自暫存器和/或記憶體之電子資料而將電子資料轉變為可儲存於暫存器及/或記憶體中之其它電子資料的任何裝置或部分裝置。
積體電路組件中之至少一者可包括積體電路總成，其包含電子基材；至少一積體電路裝置，其電性附接至該電子基材；模具材料層，其毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及在該模具材料層內的至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
在各個實施方式中，計算裝置可為膝上型電腦、輕省筆電、筆記型電腦、輕薄型筆電、智慧型手機、平板電腦、個人數位助理(PDA)、超薄行動PC、行動電話、桌上型電腦、伺服器、印表機、掃描器、監視器、機上盒、娛樂控制單元、數位相機、可攜式音樂播放器、或數位錄影機。在進一步實施方式中，計算裝置可為處理資料之任何其他電子裝置。
應該理解，本說明書的發明標的不必限於圖1-15所示的特定應用。如那些熟悉此技藝人士所將理解到發明標的可應用在其他積體電路裝置和總成應用，以及任何合適的電子應用。
以下實例與其他實施例有關，實例中的細節可以在一或多個實施例中的任何地方使用，其中實例1係一種積體電路總成，其包含電子基材；至少一積體電路裝置，其電性附接至該電子基材；模具材料層，其毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及在該模具材料層內的至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
在實例2中，實例1之發明標的可選地包括該至少一結構的該材料，其係選自由金屬、石墨烯、及燒結漿料所組成之群組。
在實例3中，任何實例1至2之發明標的可選地包括為主動裝置的該電子基材。
在實例4中，任何實例1至2之發明標的可選地包括為被動裝置的該電子基材。
在實例5中，任何實例1至4之發明標的可選地包括實質上圍繞該至少一積體電路裝置的該至少一結構。
實例6係一種電子系統，其包含：電路板以及積體電路總成，其電性耦接至該電路板，其中該積體電路總成包含：電子基材；至少一積體電路裝置，其電性附接至該電子基材；模具材料層，其毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及在該模具材料層內的至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
在實例7中，實例6之發明標的可選地包括該至少一結構的該材料，其係選自由金屬、石墨烯、及燒結漿料所組成之群組。
在實例8中，任何實例6至7之發明標的可選地包括為主動裝置的該電子基材。
在實例9中，任何實例6至7之發明標的可選地包括為被動裝置的該電子基材。
在實例10中，任何實例6至9之發明標的可選地包括實質上圍繞該至少一積體電路裝置的該至少一結構。
實例11係一種製造積體電路總成的方法，其包含：形成電子基材；形成至少一積體電路裝置；將該至少一積體電路裝置電性附接至該電子基材；形成模具材料層以毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及在該模具材料層內形成至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
在實例12中，實例11之發明標的可選地包括為主動裝置的該電子基材。
在實例13中，實例11之發明標的可選地包括為被動裝置的該電子基材。
在實例14中，任何實例11至13之發明標的可選地包括在形成該模具材料層之前形成該至少一結構。
在實例15中，實例14之發明標的可選地包括由選自由金屬、石墨烯、及燒結漿料所組成之群組的該至少一結構的該材料形成該至少一結構。
在實例16中，實例14之發明標的可選地包括平坦化該模具材料層以露出該至少一積體電路裝置的一部分。
在實例17中，任何實例11至13之發明標的可選地包括在該模具材料層中形成該至少一溝槽以及在該至少一溝槽中形成該至少一結構。
在實例18中，實例17之發明標的可選地包括由選自由金屬、石墨烯、及燒結漿料所組成之群組的該至少一結構的該材料形成該至少一結構。
在實例19中，實例17之發明標的可選地包括在形成該至少一溝槽之前平坦化該模具材料層以露出該至少一積體電路裝置的一部分。
在實例20中，任何實例11至19之發明標的可選地包括實質上圍繞該至少一積體電路裝置的該至少一結構。
如此詳細地描述了本發明的實施例，應理解到由所附申請專利範圍界定的本發明不受以上敘述中闡述的特定細節的限制，因為在不脫離本發明的精神或範圍的情況下，其許多明顯的變化是可能的。
100:積體電路總成 110:積體電路封裝 120:電子電路板 122,142,152,196:第一表面 124,132,136,156:接合墊 126,144,154:第二表面 128,198:導電路徑 130:封裝至電路板互連 134:電路板至電路板互連 1401 -1409 :積體電路裝置 146:側 150:電子基材 160:裝置至基材互連 170,172:底填充材料 180:模具材料層 190:結構 1901 -1904 :L形壁 1905 -1908 :壁片段 192:溝槽 194:主機板 200:程序 210,220,230,240,250:方塊 300:計算裝置 301:殼體 302:電路板 304:處理器 306A,306B:通訊晶片 308:揮發性記憶體 310:非揮發性記憶體 312:快閃記憶體 314:圖形處理器或CPU 316:晶片組
本發明的發明標的在說明書的結論部分中特別指出並明確地請求保護。本發明的前述和其他特徵從下文的敘述和所附申請專利範圍並結合附圖將變得更加完全地明顯。應理解到附圖僅描繪根據本發明的幾個實施例，因此，不應視為限制其範圍。透過使用附圖，將以額外的特徵和細節來敘述本揭露，使得可以更容易地確定本發明的優點，其中：
[圖1]係根據本說明書之一個實施例之積體電路總成的側面橫截面視圖。
[圖2-4]係根據本說明書之實施例的沿著圖1之線2-2之積體電路總成的平面圖。
[圖5-8]係根據本說明書之實施例的製造積體電路總成之方法的橫截面視圖。
[圖9-12]係根據本說明書之實施例的製造積體電路總成之另一方法的橫截面視圖。
[圖13]係根據本說明書之另一實施例之積體電路總成的側面橫截面視圖。
[圖14]係根據本說明書之一實施例之製造積體電路總成之程序的流程圖。
[圖15]係根據本說明書之一個實施例的電子系統。
100:積體電路總成
110:積體電路封裝
120:電子電路板
122,142,152:第一表面
124,156:接合墊
128:導電路徑
130:封裝至電路板互連
1401:第一積體電路裝置
1402:第二積體電路裝置
1403:第三積體電路裝置
144,154:第二表面
146:側
150:電子基材
160:裝置至基材互連
170:底填充材料
180:模具材料層
190:結構

Claims (20)

  1. 一種積體電路總成，其包含： 電子基材； 至少一積體電路裝置，其電性附接至該電子基材； 模具材料層，其毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及 在該模具材料層內的至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
  2. 如請求項1之積體電路總成，其中該至少一結構的該材料係選自由金屬、石墨烯、及燒結漿料所組成之群組。
  3. 如請求項1之積體電路總成，其中該電子基材係主動裝置。
  4. 如請求項1之積體電路總成，其中該電子基材係被動裝置。
  5. 如請求項1之積體電路總成，其中該至少一結構實質上圍繞該至少一積體電路裝置。
  6. 一種電子系統，其包含： 電路板； 積體電路總成，其電性耦接至該電路板，其中該積體電路總成包含： 電子基材； 至少一積體電路裝置，其電性附接至該電子基材； 模具材料層，其毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及 在該模具材料層內的至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
  7. 如請求項6之電子系統，其中該至少一結構的該材料係選自由金屬、石墨烯、及燒結漿料所組成之群組。
  8. 如請求項6之電子系統，其中該電子基材係主動裝置。
  9. 如請求項6之電子系統，其中該電子基材係被動裝置。
  10. 如請求項6之電子系統，其中該至少一結構實質上圍繞該至少一積體電路裝置。
  11. 一種形成積體電路總成的方法，其包含： 形成電子基材； 形成至少一積體電路裝置； 將該至少一積體電路裝置電性附接至該電子基材； 形成模具材料層以毗連該電子基材並實質上圍繞該至少一積體電路裝置；以及 在該模具材料層內形成至少一結構，其中該至少一結構包含具有大於約20吉帕斯卡之模數及大於約10瓦/米-克耳文之導熱性的材料。
  12. 如請求項11之方法，其中形成該電子基材包含形成主動裝置。
  13. 如請求項11之方法，其中形成該電子基材包含形成被動裝置。
  14. 如請求項11之方法，其中形成該至少一結構包含在形成該模具材料層之前形成該至少一結構。
  15. 如請求項14之方法，其中形成該至少一結構包含從選自由金屬、石墨烯、及燒結漿料所組成之群組的該材料形成該至少一結構。
  16. 如請求項14之方法，其更包含平坦化該模具材料層以露出該至少一積體電路裝置的一部分。
  17. 如請求項11之方法，其中形成該至少一結構包含在該模具材料層中形成至少一溝槽並且在該至少一溝槽中形成該至少一結構。
  18. 如請求項17之方法，其中在該至少一溝槽中形成該至少一結構包含由選自由金屬、石墨烯、及燒結漿料所組成之群組的該材料形成該至少一結構。
  19. 如請求項17之方法，其更包含在形成該至少一溝槽之前，平坦化該模具材料層以露出該至少一積體電路裝置的一部分。
  20. 如請求項11之方法，其中形成該至少一結構包含形成該至少一結構以實質上圍繞該至少一積體電路裝置。
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