TW202134883A - Write mangement for protecting erased blocks in flash memory - Google Patents

Abstract

A method of managing a flash memory module is provided. The flash memory module includes a plurality of blocks, where a portion of the plurality of blocks belongs to a spare pool. The method includes: reserving at least one erased block in the spare pool for a write operation; monitoring an erasure time of the at least one erased block; when the erasure time exceeds a threshold value, performing a read operation on a plurality of specific blocks in the flash memory module; and utilizing data read from the plurality of specific blocks to program the at least one erased block.

Description

Write management mechanism for protecting erased blocks in flash memory

The present invention relates to flash memory, in particular to a method, controller and related storage device for managing blocks to be written in the flash memory.

Generally speaking, for a write command issued by the host, the flash memory controller will find an idle erased block from the flash memory to write data into it. However, if the flash memory cell remains in the erased state for a long time, it may cause irreversible physical damage to the cell. Therefore, it is necessary to provide a write management mechanism to prevent this problem.

In view of this, one objective of the present invention is to provide a write management mechanism for flash memory. In the present invention, a part of the block of the flash memory is divided as a spare pool. The controller will find blocks from the spare pool to write data to complete the write command issued by the host. Among them, only a small amount of erased blocks are reserved in the above-mentioned spare pool, and the rest are programmed blocks. When the controller receives the write command from the host side, the controller will find the reserved erased block from the spare pool to write the data. Moreover, after the writing is completed, the controller will find one or more written blocks from the spare pool and perform an erase operation as a new reserved block. In this way, the number of erased blocks in the flash memory block can be reduced.

On the other hand, for each erased block reserved in the spare pool, the controller will create its time file (e.g., time stamp) to monitor the time it stays in the erased state. Once this time If a threshold is exceeded, the controller will write the erased block, and find one or more blocks from the written block in the spare pool to replace it, thereby reducing the risk of physical damage.

An embodiment of the present invention provides a method of managing a flash memory module. The flash memory module includes a plurality of blocks, and a part of the plurality of blocks belongs to a spare pool. The method includes: reserving at least one erased block in the spare pool to facilitate a write operation To proceed; monitor the erase time of one of the at least one erased block; when the erased time exceeds a threshold, perform read operations on a plurality of specific blocks in the flash memory module ; And use the data read from the plurality of specific blocks to write to the at least one erased block.

An embodiment of the present invention provides a controller for managing a flash memory module, wherein the flash memory module includes a plurality of blocks, and a part of the plurality of blocks belongs to a spare pool, The controller includes: a storage unit and a processing unit. The storage unit is used to store a program code. The processing unit is coupled to the storage unit, and is used to read the code from the storage unit to execute the code, so as to perform the following operations: reserve at least one erased block in the spare pool for benefit Perform a write operation; monitor the erase time of one of the at least one erased block; when the erased time exceeds a threshold, the specific blocks in the flash memory module Perform a read operation; and use the data read from the plurality of specific blocks to write to the at least one erased block.

An embodiment of the present invention provides a storage device. The storage device includes a flash memory module and a controller. The flash memory module includes a plurality of blocks, and a part of the plurality of blocks belongs to a spare pool. The controller is used for accessing the flash memory module and includes: a storage unit for storing a program code; and a processing unit coupled to the storage unit. The processing unit is used to read the program code from the storage unit to execute the program code to perform the following operations: reserve at least one erased block in the spare pool to facilitate a write operation; Monitor the erase time of one of the at least one erased block; when the erased time exceeds a threshold, perform a read operation on a plurality of specific blocks in the flash memory module; and use The data read from the plurality of specific blocks is written to the at least one erased block.

In the following text, many specific details are described to provide readers with a thorough understanding of the embodiments of the present invention. However, those skilled in the art will understand how to implement the present invention without one or more specific details or using other methods or elements. In other cases, well-known structures, materials or operations will not be shown or described in detail, so as to avoid obscuring the core concept of the present invention.

In addition, any examples or explanations given in the specification should not be limited or defined by any vocabulary used therein. On the contrary, these examples or explanations should be considered as describing a specific embodiment and only as an illustration. Those skilled in the art will understand that any vocabulary used in these examples or explanations will cover other embodiments given elsewhere in this specification. The terms used to indicate these non-limiting examples include, but are not limited to: "for example," "such as," "for example," "in one embodiment", and "in an example."

The processes and blocks in the flowcharts in the specification show the architecture, functions, and operations that can be implemented by the system, method, and computer software product based on various embodiments of the present invention. In this regard, each block in the flowchart or functional block diagram may represent a module, section, or part of the program code, which includes one or more executable instructions for implementing specified logical functions. In addition, each block in the function block diagram and/or flowchart, as well as the combination of blocks, can basically be realized by a dedicated hardware system that performs a specified function or action, or a combination of dedicated hardware and computer program instructions. . These computer program instructions can also be stored in a computer-readable medium, which can make a computer or other programmable data processing device work in a specific manner, so that the instructions stored in the computer-readable medium implement flowcharts and/or functional blocks The functions/actions specified by the squares in the figure.

Figure 1 is a schematic diagram of an embodiment of the present invention. As shown in the figure, the storage device 100 includes a controller 120 and a flash memory module 130, and is controlled by a host device 200 (the storage device 100 may even be a part of the host device 200). The host 200 may include at least one central processing unit (not shown), and controls the operation of the host 200 by operating an operating system and an application program, and is linked with peripheral devices (not shown). The storage device 100 can be used to provide storage space for the host 200 to store program codes and data necessary for operating the operating system and various applications. Examples of the main control device 50 may include: a multifunctional mobile phone, a tablet, a wearable device, and a personal computer such as a desktop computer or a notebook computer. Examples of the storage device 100 may include (but are not limited to): a solid state drive (SSD) and various embedded storage devices (for example, an embedded storage device compliant with UFS or EMMC specifications).

The controller 120 can be used to access the flash memory module 130. In one embodiment, the flash memory module 130 may be a three-dimensional NAND-type flash (3D NAND-type flash), and may include at least one flash memory chip (Flash memory chip), but this is not Limitations of the present invention. Each flash memory chip includes a plurality of blocks, and the controller 120 performs data erasing operations on the flash memory module 130 in units of blocks. In addition, a block can record a specific number of data pages (Pages), and the controller 120 writes data to the flash memory module 130 in units of data pages.

The controller 120 may include a processing circuit such as a microprocessor 122 and a storage unit 124, such as a read only memory (ROM). The read only memory 124 is mainly used to store program codes and specific data, and the microprocessor 122 is used to execute program codes to control access to the flash memory module 130. In addition, the controller 120 may also include other interface logic, control logic, or buffer memory, etc., to assist in implementing various operations described below. However, for the sake of brevity in the description, it is omitted here. After reading the following, those skilled in the art should be able to know how to implement the use of known circuits in combination with the circuit elements and structures disclosed in the text, so as to realize the various operations and related applications mentioned in the embodiments of the present invention.

In this embodiment, the host 200 can indirectly access the storage device 100 by sending a host command and a corresponding logical address to the controller 120. The controller 120 receives a main control command (read or write command) and a logical address, and translates the main control command into a memory operation command, and then controls the flash memory module 130 to read and write (program) with the operation command. ), or erase (erase) the memory unit or data page (page) or block (block) of a specific physical address in the flash memory module 130. Furthermore, the controller 120 will also execute the program code and/or refer to the data in the storage unit 124 to execute a series of operations to implement specific operations mentioned below.

As shown in FIG. 2, the flash memory module 130 includes a plurality of blocks, and these blocks may be distributed on the flash memory chips 130_1~130_N. Furthermore, the blocks in the flash memory module 130 can be divided into a spare pool 138. The spare pool 138 may include blocks SB0 to SBQ, and these blocks may not store data or store invalid data (data that has been stored in other blocks and is no longer updated). In the present invention, all write commands issued by the host 200 will be selected by the controller 120 from the spare pool 138 and one or more blocks will be written according to the data contained in the write command issued by the host 200. Import (write data into one or more data pages of the block). When one or more blocks are written into data due to a write command issued by the host 200, they will be moved out of the spare pool 138, and the controller 120 will select from the blocks DB0~DBK outside the spare pool 138 One or more blocks that only store invalid data are used to supplement the reserve pool 138.

In the present invention, the controller 120 reserves at least one erased block (such as block SB_0) that is already in the erased state in the spare pool 138. This is because the erase operation of the block needs to be expensive The time is considerable, and pre-wiping can reduce the delay of the write operation. When the host 200 sends a write command to the controller 120, the controller 120 will write the data sent from the host to the erased block SB_0 reserved in the reserve pool 138, and the host 200 will Before the controller 120 issues the next write command, the controller 120 will search for at least one block (such as block SB_3) from the programmed blocks SB_1~SB_Q in the reserve pool 138, and will After it is erased, it is reserved for the next write operation.

However, as mentioned earlier, if the block is in the erased state for too long, it may cause irreversible physical damage to the cells in it. Therefore, the present invention manages the erased blocks in the reserve pool, and writes the erased blocks into data after a certain period of time to avoid possible damage. Please refer to the flowchart shown in Figure 3, which illustrates a process of the method of the present invention. The process includes at least the following steps:

Step 210: Reserve at least one erased block

Step 220: Establish the time stamp of at least one erased block

Step 230: Determine whether the erasure time of the at least one erased block exceeds the threshold

Step 240: Write the at least one erased block

Step 250: Select at least one written block to replace the erased block.

In step 210, the controller 120 performs an erase operation on at least one written block in the reserve pool 138, so that the at least one written block (such as SB_7) is converted from a programmed state For the erased state, prepare for possible write operations later. Wherein, step 210 may occur before the host 200 issues a write command, or after the controller 120 writes another erased block. In step 220, the controller 120 establishes a time stamp of the at least one erased block. In step 230, the controller 120 determines whether the at least one erased block is in the erased state according to the time information in the time stamp and the system time. One of the erased time exceeds a threshold. This step The purpose of is to protect the erased blocks from unrecoverable physical damage. If the judgment result of step 230 is yes, go to step 230; if not, continue to stay at this step. In step 240, since the controller 120 has found that the erase time of the at least one erased block has exceeded the threshold, it means that the erased block is at risk of damage. Therefore, the controller 120 will write to the at least one erased block and convert it from the erased state to the written state to avoid damage.

Furthermore, in an embodiment, the controller 120 may use the opportunity to write the erased block and perform a garbage collection operation at the same time. The controller 120 writes the data collected from the effective pages of the blocks DB0 to DBK into the at least one erased block, thereby converting the at least one erased block into a written block. After that, the process proceeds to step 250, and the controller 120 searches for at least one written block (such as SB_4) from the reserve pool 138 to replace the aforementioned at least one erased block, and returns to step 210, Perform an erase operation to prepare for the subsequent write command.

It can be seen from the above that the present invention effectively protects the memory cells in the flash memory module 130 and prevents them from being damaged due to staying in the erased state for too long. On the other hand, because the present invention reserves the erased blocks in the reserve pool at any time, the delay of data writing can be shortened (that is, there is no need to wait for the time for erasing the written blocks. ).

In addition, one feature of the present invention is that the controller 120 controls the flash memory module 130. Please refer to Figure 4, when the host side 200 issues a master control command (read or write) to the controller 120, the controller 120 will convert it into The corresponding memory operation command accesses the flash memory chips 130_1~130_N in the flash memory module 130.

Since the present invention manages the erased blocks, it is independent of the master control command of the host 200 and is performed according to the timestamp of the erased blocks. Therefore, even if the host side 200 does not issue a master control command to the controller 120, it will happen that the time stamp of the erased block in the backup pool 138 exceeds the critical value, which triggers the replacement of the erased block and triggers it. The event of the garbage collection operation. Therefore, in an embodiment, the controller 120 may issue the following continuous command sequence to the flash memory chips 130_1~130_N when it does not receive any access command from the host side 200: Read: 00h ALE 30h Write: 80h ALE 10h Erase: 60h ALE D0h

First, assuming that the time stamp of an erased block exceeds the upper limit of time, step 240 of the above process will be triggered to write to the erased block. As mentioned above, writing to the erased block may also trigger the garbage collection operation. Therefore, the first read instruction in the above instruction sequence is to perform garbage data collection operation, and read data from the valid pages in the blocks DB0~DBK outside the spare pool 138. The read data will be sent to the controller 120 for error correction processing. Then, the processed data will be written to the erased block, which is the second write command in the above-mentioned command sequence. Finally, it enters step 250 of the above process, and selects another block from the spare pool for erasing to replace the erased block, that is, the third erasing instruction in the above instruction sequence. It can be further seen from the timing diagram at the bottom of FIG. 4 that the main control command does not cause the controller 120 to generate related memory operation commands, but the controller 120 still periodically generates spontaneous memory operation commands. Therefore, one feature of the present invention is that even when the host 200 does not issue an access command to the controller 120, the controller 120 may spontaneously issue the flash memory module 130: read, write, erase A sequence of consecutive instructions for division.

In summary, through proper management of the spare pool, the present invention effectively reduces write latency (by reserving at least one erased block in the spare pool) while avoiding potential memory cell interference. Physical damage (by limiting the time the block stays in the erased state). At the same time, the management mechanism of the present invention is further combined with the garbage data recovery operation, so as to more rationally write and replace the erased blocks. The foregoing descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the present invention.

100: storage device 120: Controller 122: Processing Unit 124: storage unit 130: Flash memory module 130_1~130_N: Flash memory chip 138: Preparatory Pool DB_0~DBK, SB_0~SBQ: block 210~250: Step

Figure 1 shows the architecture of related storage devices, controllers and flash memory modules according to an embodiment of the present invention. Figure 2 shows the association between a flash memory module and the spare pool. FIG. 3 shows a flowchart of a method for block write management of flash memory according to an embodiment of the present invention. Figure 4 illustrates the association between the main control command and the memory operation command in the embodiment of the present invention.

210~250: Step

Claims (17)

A method for managing a flash memory module, the flash memory module includes a plurality of blocks, a part of the plurality of blocks belongs to a spare pool, the method includes: Reserve at least one erased block in the spare pool to facilitate a write operation; Monitor the erased time of one of the at least one erased blocks; When the erased time exceeds a critical value, perform a read operation on a plurality of specific blocks in the flash memory module; and The at least one erased block is written using the data read from the plurality of specific blocks. The method according to claim 1, wherein the spare pool includes the at least one erased block and at least one written block. The method according to claim 1, wherein the step of monitoring the erased time of the at least one erased block comprises: Establish a time stamp associated with the at least one erased block; and Periodically compare the time information in the time stamp with the critical value. The method according to claim 1, wherein the step of reading a plurality of blocks in the flash memory module includes: Performing a garbage collection operation on a plurality of blocks in the flash memory module; and the steps of writing to at least one erased block include: The at least one erased block is written using the recycling data output from the garbage data recycling operation. The method described in claim 1, which additionally includes: When an access command from a host is not received, specific data is automatically read from the flash memory module and written back to the flash memory module. The method described in claim 1, which additionally includes: Select a first block from at least one written block in the spare pool, and perform an erase operation on the first block; and Use the first block to replace the at least one erased block whose erased time exceeds the threshold. A controller for managing a flash memory module, wherein the flash memory module includes a plurality of blocks, and a part of the plurality of blocks belongs to a spare pool, the controller Include: A storage unit for storing a program code; and A processing unit, coupled to the storage unit, is used to read the program code from the storage unit to execute the program code to perform the following operations: Reserve at least one erased block in the spare pool to facilitate a write operation; Monitor the erased time of one of the at least one erased blocks; When the erased time exceeds a critical value, perform a read operation on a plurality of specific blocks in the flash memory module; and The at least one erased block is written using the data read from the plurality of specific blocks. The controller according to claim 7, wherein the processing unit executes the code to establish a time stamp associated with the at least one erased block; and periodically performs processing based on the time information in the time stamp and the threshold Comparison. The controller according to claim 7, wherein the processing unit executes the code to perform a garbage collection operation on the plurality of blocks in the flash memory module; and utilizes the garbage The recovered data output by the data recovery operation writes the at least one erased block to perform the replacement operation. The controller according to claim 7, wherein the controller is controlled by a host, and the processing unit executes the program code to automatically retrieve from the flash memory when an access command from the host is not received Read specific data from the module and write it back to the flash memory module. For the controller according to claim 7, the processing unit executes the code to select a first block from at least one written block in the spare pool, and perform an erase on the first block Operation; and replacing the at least one erased block whose erased time exceeds the threshold with the first block. A storage device including: A flash memory module including a plurality of blocks, and a part of the plurality of blocks belongs to a spare pool; and A controller for accessing the flash memory module, including: A storage unit for storing a program code; and A processing unit, coupled to the storage unit, is used to read the program code from the storage unit to execute the program code to perform the following operations: Reserve at least one erased block in the spare pool to facilitate a write operation; Monitor the erased time of one of the at least one erased blocks; When the erased time exceeds a critical value, perform a read operation on a plurality of specific blocks in the flash memory module; and The at least one erased block is written using the data read from the plurality of specific blocks. The storage device according to claim 12, wherein the spare pool includes the at least one erased block and at least one written block. The storage device according to claim 12, wherein the controller is used to establish a time stamp associated with the at least one erased block; and periodically compare the time information in the time stamp with the threshold value. The storage device according to claim 12, wherein when the erased time exceeds the threshold, the controller performs a garbage data collection operation on the plurality of blocks in the flash memory module; and uses the The recycling data output by the garbage data recycling operation is written to the at least one erased block. The storage device according to claim 12, wherein the controller is controlled by a host, and when the controller does not receive the access command issued by the host, it automatically reads the specific flash memory module Data and write back to the flash memory module. The storage device according to claim 12, wherein when the erased time exceeds the threshold, the controller selects at least one first block from the spare pool, and performs a wipe on the at least one first block An erasing operation; and replacing the at least one erased block whose erased time exceeds the threshold with the at least one first block.

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