TW202134671A - Self-capacitance detection circuit and information processing device with the capacitance detection circuit capable of greatly saving the circuit area and the cost of chip production when chip is implemented - Google Patents

Self-capacitance detection circuit and information processing device with the capacitance detection circuit capable of greatly saving the circuit area and the cost of chip production when chip is implemented Download PDF

Info

Publication number
TW202134671A
TW202134671A TW109108084A TW109108084A TW202134671A TW 202134671 A TW202134671 A TW 202134671A TW 109108084 A TW109108084 A TW 109108084A TW 109108084 A TW109108084 A TW 109108084A TW 202134671 A TW202134671 A TW 202134671A
Authority
TW
Taiwan
Prior art keywords
terminal
switch
detection circuit
self
capacitance
Prior art date
Application number
TW109108084A
Other languages
Chinese (zh)
Other versions
TWI737216B (en
Inventor
陳臣
Original Assignee
大陸商北京集創北方科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 大陸商北京集創北方科技股份有限公司 filed Critical 大陸商北京集創北方科技股份有限公司
Priority to TW109108084A priority Critical patent/TWI737216B/en
Application granted granted Critical
Publication of TWI737216B publication Critical patent/TWI737216B/en
Publication of TW202134671A publication Critical patent/TW202134671A/en

Links

Images

Abstract

The present invention mainly discloses a self-capacitance detection circuit for coupling to a touch detection terminal of a touch panel and comprises at least one charge amplification unit for coupling with at least one sensing capacitance in the touch panel through the touch detection terminal. In the present invention, the self-capacitance detection circuit further comprises a first current source and a second current source, which are used to subtract an initial capacitance value of the sensing capacitance, thereby increasing the variation of capacitance measured by the self-capacitance detection circuit and achieving the final effect of amplifying the effective range of the output voltage signal. The self-capacitance detection circuit of the present invention does not contain any reference capacitors of the pF level, so the circuit area can be greatly saved when chip is implemented, thereby saving the cost of chip production.

Description

自電容檢測電路以及具有該電容檢測電路的資訊處理裝置Self-capacitance detection circuit and information processing device with the capacitance detection circuit

本發明係關於觸控檢測電路之技術領域,尤指應用於觸控檢測芯片之中的一種自電容檢測電路。The present invention relates to the technical field of touch detection circuits, and particularly refers to a self-capacitance detection circuit used in touch detection chips.

投射電容式觸控面板目前已被廣泛應用在中小尺寸之可攜式電子裝置、平板電腦以及中大尺寸之觸控控顯示器之中,其包含自電容型(Self capacitance)和互電容型(Mutual capacitance)。圖1顯示習知的一種自電容檢測電路的電路架構圖。習知的自電容檢測電路1’係耦接至一觸控面板2’(或一觸控顯示面板模塊)的一觸控檢測端,用以感測該觸控面板2’內的至少一感測電容21’之電容值變化。如圖1所示,習知的自電容檢測電路1’包括:一運算放大器11’、一反饋電容12’、一第一開關13’、一第二開關14’、一第三開關15’、一第四開關16’、一第五開關17’、一第六開關18’、一基準電容19’、一第七開關1A’、一第八開關1b’、以及一第九開關1C’。Projected capacitive touch panels have been widely used in small and medium-sized portable electronic devices, tablet computers, and medium and large-sized touch-control displays. They include self-capacitance and mutual-capacitance types. capacitance). FIG. 1 shows a circuit structure diagram of a conventional self-capacitance detection circuit. The conventional self-capacitance detection circuit 1'is coupled to a touch detection terminal of a touch panel 2'(or a touch display panel module) for sensing at least one sensor in the touch panel 2' Measure the change of the capacitance value of the capacitance 21'. As shown in FIG. 1, the conventional self-capacitance detection circuit 1'includes: an operational amplifier 11', a feedback capacitor 12', a first switch 13', a second switch 14', a third switch 15', A fourth switch 16', a fifth switch 17', a sixth switch 18', a reference capacitor 19', a seventh switch 1A', an eighth switch 1b', and a ninth switch 1C'.

如圖1所示,自電容檢測電路1’通過對感測電容21’充/放電的方式,將感測電容21’所存儲的感測電荷讀出。進一步地,在對所述感測電荷進行放大處理之後,由運算放大器11’的輸出端提供一個輸出電壓信號Vo。更詳細地說明,當手指沒有觸摸到觸控面板2’時,感測電容21’之感測電容CSEN 的值爲C1。並且,當手指觸摸觸控面板2’時,感測電容CSEN 的值則爲C2。因此,感測電容21’的電容變化量Cchange 即為C2-C1。As shown in FIG. 1, the self-capacitance detection circuit 1'reads out the sensed charges stored in the sensing capacitor 21' by charging/discharging the sensing capacitor 21'. Further, after the sensing charge is amplified, the output terminal of the operational amplifier 11' provides an output voltage signal Vo. In more detail, when the finger does not touch the touch panel 2', the value of the sensing capacitance C SEN of the sensing capacitance 21' is C1. Moreover, when the finger touches the touch panel 2', the value of the sensing capacitance C SEN is C2. Therefore, the capacitance change C change of the sensing capacitor 21 ′ is C2-C1.

實務經驗顯示,C1的值過大會導致輸出電壓信號Vo之有效範圍太窄。因此,如圖1所示,自電容檢測電路1’通常會同時包含一個基準電容19’,其係用以在感測電荷進行放大處理的過程中將C1的值減去。如此設計,當手指觸摸觸控面板2’時,自電容檢測電路1’所測得之電容變化量的值便大幅提升,從而放大輸出電壓信號Vo之有效範圍。通過圖2所示之自電容檢測電路的工作時序圖可以進一步地理解,增設的基準電容19’如何達成大幅提升所述電容變化量之最終效果。Practical experience shows that too large a value of C1 leads to a too narrow effective range of the output voltage signal Vo. Therefore, as shown in FIG. 1, the self-capacitance detection circuit 1'usually includes a reference capacitor 19' at the same time, which is used to subtract the value of C1 during the process of amplifying the sensed charge. With this design, when a finger touches the touch panel 2', the value of the capacitance change measured by the self-capacitance detection circuit 1'is greatly increased, thereby amplifying the effective range of the output voltage signal Vo. From the working timing diagram of the self-capacitance detection circuit shown in FIG. 2, it can be further understood how the additional reference capacitor 19' achieves the ultimate effect of greatly increasing the capacitance variation.

參照圖1和圖2,激勵信號VSTIM 的一個完整週期即為自電容檢測電路1’的一個完整工作周期。並且,圖2繪示激勵信號VSTIM 包含正相位階段與負相位階段。在正相位階段之中,令第一開關信號PH1為高電平可令由運算放大器11’和反饋電容12’組成的電荷放大器操作在重置(Reset)模式。此時,重置電荷QRESET =QCbase =VH *Cbase ,其中Cbase 即為基準電容19’的電容值荷。1 and 2, a complete cycle of the excitation signal V STIM is a complete working cycle of the self-capacitance detection circuit 1'. In addition, FIG. 2 shows that the excitation signal V STIM includes a positive phase phase and a negative phase phase. In the positive phase phase, setting the first switch signal PH1 to a high level can make the charge amplifier composed of the operational amplifier 11' and the feedback capacitor 12' operate in the reset mode. At this time, the reset charge Q RESET =Q Cbase =V H *C base , where C base is the capacitance value of the reference capacitor 19 ′.

如圖2所示,通過令第一開關信號PH1為低電平、第二開關信號PH2為高電平、激勵信號VSTIM 為高電平、且驅動信號VDRV 為高電平,可使得由運算放大器11’和反饋電容12’組成的電荷放大器操作在積分模式。在此模式下,該反饋電容12’所儲存之積分電荷QINTERG =QCsen + QCbase +QCF ;其中,QCsen =VH *CSEN ,CSEN 為感測電容21’的電容值。另一方面,QCbase =0,且QCF =(VH -VO )*CF ,CF 為反饋電容12’的電容值。最終,QINTERG =QRESET ,因此可計算出輸出電壓信號Vo=VH (CSEN +CF -Cbase )/CF =1-VH (Cbase -CSEN )/CFAs shown in FIG. 2, by making the first switch signal PH1 at low level, the second switch signal PH2 at high level, the excitation signal V STIM at high level, and the drive signal V DRV at high level, The charge amplifier composed of the operational amplifier 11' and the feedback capacitor 12' operates in the integration mode. In this mode, the feedback capacitor 12 'integrated charge Q INTERG stored sum = Q Csen + Q Cbase + Q CF; wherein, Q Csen = V H * C SEN, C SEN of the sensing capacitor 21' capacitance value. On the other hand, Q Cbase =0, and Q CF =(V H -V O )*C F , where C F is the capacitance value of the feedback capacitor 12'. Finally, Q INTERG =Q RESET , so the output voltage signal Vo=V H (C SEN +C F -C base )/C F =1-V H (C base -C SEN )/C F can be calculated.

圖2繪示激勵信號VSTIM 包含正相位階段與負相位階段。在負相位階段之中,令第一開關信號PH1為高電平可令由運算放大器11’和反饋電容12’組成的電荷放大器操作在重置模式。此時,重置電荷QRESET =QCbase =VH *Cbase 。進一步地,通過令第一開關信號PH1為低電平、第二開關信號PH2為高電平、激勵信號VSTIM 為低電平、且驅動信號VDRV 為低電平,可使得由運算放大器11’和反饋電容12’組成的電荷放大器操作在積分模式。在此模式下,該反饋電容12’所儲存之積分電荷QINTERG =QCsen +QCbase +QCF ;其中,QCsen =(-VH )*CSEN ,QCbase =0,且QCF =(VO )*CF 。最終,QRESET =QINTERG ,因此可計算出輸出電壓信號Vo=VH (Cbase -CSEN )/CFFig. 2 shows that the excitation signal V STIM includes a positive phase phase and a negative phase phase. In the negative phase phase, setting the first switch signal PH1 to a high level can make the charge amplifier composed of the operational amplifier 11' and the feedback capacitor 12' operate in the reset mode. At this time, the reset charge Q RESET =Q Cbase =V H *C base . Further, by setting the first switching signal PH1 to a low level, the second switching signal PH2 to a high level, the excitation signal V STIM to a low level, and the driving signal V DRV to a low level, the operational amplifier 11 The charge amplifier composed of'and the feedback capacitor 12' operates in the integration mode. In this mode, the feedback capacitor 12 'stored in the integrated charge Q INTERG = Q Csen + Q Cbase + Q CF; wherein, Q Csen = (- V H ) * C SEN, Q Cbase = 0, and Q CF = (V O )*C F. Finally, Q RESET =Q INTERG , so the output voltage signal Vo=V H (C base- C SEN )/C F can be calculated.

應可理解,無論是在激勵信號VSTIM 的正相位階段或負相位階段,輸出電壓信號Vo的數學運算式之中都含有(Cbase -CSEN )此項。因此,數學推算的結果證實,在自電容檢測電路1’之中增設基準電容19’之後,感測電容CSEN 的初始值(亦即,C1)便會在電荷放大器對感測電荷進行放大處理的過程中被減去,從而放大輸出電壓信號Vo之有效範圍。It should be understood that no matter in the positive phase phase or the negative phase phase of the excitation signal V STIM , the mathematical expression of the output voltage signal Vo includes the term (C base -C SEN ). Therefore, the result of mathematical calculation proves that after the reference capacitor 19' is added to the self-capacitance detection circuit 1', the initial value of the sensing capacitor C SEN (that is, C1) will be amplified by the charge amplifier. Is subtracted in the process, thereby amplifying the effective range of the output voltage signal Vo.

可惜的是,前述基準電容19’的電容值Cbase 的大小與感測電容21’的電容值CSEN 相關,爲pF量級。因此,當自電容檢測電路1’的檢測通道非常多的時候,每個通道都需要一個獨立的基準電容19’,導致自電容檢測電路1’之芯片需要使用大量的基準電容19’,占用大量的芯片面積。Unfortunately, the capacitance value C base of the aforementioned reference capacitor 19 ′ is related to the capacitance value C SEN of the sensing capacitor 21 ′, and is in the order of pF. Therefore, when the self-capacitance detection circuit 1'has a large number of detection channels, each channel needs an independent reference capacitor 19'. As a result, the chip of the self-capacitance detection circuit 1'needs to use a large number of reference capacitors 19', which occupies a lot of The chip area.

由上述說明可知,現有的用於提升自電容檢測電路之輸出信號的有效範圍的方法顯然具有其實務上的缺失。因此,本領域亟需一種新式的自電容檢測電路。It can be seen from the above description that the existing methods for increasing the effective range of the output signal of the self-capacitance detection circuit obviously have practical shortcomings. Therefore, a new type of self-capacitance detection circuit is urgently needed in the art.

本發明之主要目的在於提供一種自電容檢測電路,其利用電流源取代傳統使用的基礎電容進以達成減去觸控面板之感測電容的電容初始值之效果,使得自電容檢測電路所測得之電容變化量的值可以被大幅提升,達到放大輸出電壓信號的有效範圍之最終效果。The main purpose of the present invention is to provide a self-capacitance detection circuit that uses a current source to replace the traditionally used basic capacitor to achieve the effect of subtracting the initial value of the capacitance of the sensing capacitor of the touch panel, so that the self-capacitance detection circuit can measure The value of the capacitance change can be greatly increased to achieve the final effect of amplifying the effective range of the output voltage signal.

本發明之另一目的在於提供一種自電容檢測電路,其電路結構不包含任何pF量級的基準電容,因此在進行芯片化之時可以大幅節省電路面積,從而節省芯片製作成本。Another object of the present invention is to provide a self-capacitance detection circuit, the circuit structure of which does not include any reference capacitors of the pF level, so that the circuit area can be greatly saved when the chip is implemented, thereby saving the cost of chip production.

為達成上述目的,本發明提出所述自電容檢測電路的一實施例,其用以耦接一觸控面板的一觸控檢測端,且包含至少一電荷放大單元用以通過該觸控檢測端而與該觸控面板之中的至少一感測電容耦接,進以接收一電容檢測信號;其特徵在於,所述自電容檢測電路更包括:To achieve the above objective, the present invention provides an embodiment of the self-capacitance detection circuit, which is used to couple a touch detection terminal of a touch panel and includes at least one charge amplifying unit for passing through the touch detection terminal And coupled with at least one sensing capacitor in the touch panel to receive a capacitance detection signal; characterized in that, the self-capacitance detection circuit further includes:

一第一開關元件,具有一第一端、一第二端以及一控制端,其中該第一端耦接至該電荷放大單元和該感測電容之間的一共接點;A first switching element having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to a common contact point between the charge amplifying unit and the sensing capacitor;

一第一電流源,耦接於一高電平電壓信號和該第一開關元件的該第二端之間,用以向該第一開關元件提供一第一電流;A first current source, coupled between a high-level voltage signal and the second terminal of the first switching element, for providing a first current to the first switching element;

一第二開關元件,具有一第一端、一第二端以及一控制端,其中該第一端耦接至該電荷放大單元和該感測電容之間的該共接點;以及A second switch element having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the common contact point between the charge amplifying unit and the sensing capacitor; and

一第二電流源,耦接於一低電平電壓信號和該第二開關元件的該第二端之間,用以向該低電平電壓信號提供一第二電流;A second current source, coupled between a low-level voltage signal and the second terminal of the second switching element, for providing a second current to the low-level voltage signal;

其中,當所述感測電容的一電容電壓等於或低於一第一門限電壓時,一第一開關元件控制信號傳送至該第一開關元件的該控制端以將該第一開關元件切換至一短路狀態,從而利用該第一電流對該感測電容進行充電且持續一充電時間;以及當所述感測電容的一電容電壓等於或高於一第二門限電壓時,一第二開關元件控制信號傳送至該第二開關元件的該控制端以將該第二開關元件切換至一短路狀態,從而利用該第二電流對該感測電容進行放電且持續一放電時間。Wherein, when a capacitance voltage of the sensing capacitor is equal to or lower than a first threshold voltage, a first switching element control signal is transmitted to the control terminal of the first switching element to switch the first switching element to A short-circuit state, so that the first current is used to charge the sensing capacitor for a charging time; and when a capacitor voltage of the sensing capacitor is equal to or higher than a second threshold voltage, a second switching element The control signal is transmitted to the control terminal of the second switching element to switch the second switching element to a short-circuit state, so that the second current is used to discharge the sensing capacitor for a discharge time.

在一實施例中,該第一電流和該充電時間之乘積與該高電平電壓信號和一基準電容值之乘積相等。In an embodiment, the product of the first current and the charging time is equal to the product of the high-level voltage signal and a reference capacitance value.

在一實施例中,該第二電流和該放電時間之乘積與該高電平電壓信號和一基準電容值之乘積相等。In one embodiment, the product of the second current and the discharge time is equal to the product of the high-level voltage signal and a reference capacitance value.

在一實施例中,該第二電流的值相等於該第一電流的值。In one embodiment, the value of the second current is equal to the value of the first current.

在一實施例中,該電荷放大單元包括:In an embodiment, the charge amplifying unit includes:

一運算放大器,具有耦接一激勵信號壓的一正輸入端、一負輸入端、和一輸出端;以及An operational amplifier having a positive input terminal, a negative input terminal, and an output terminal coupled to an excitation signal voltage; and

一反饋電容,耦接於該運算放大器的該負輸入端和該輸出端之間。A feedback capacitor is coupled between the negative input terminal and the output terminal of the operational amplifier.

在一實施例中,所述自電容檢測電路更包括:In an embodiment, the self-capacitance detection circuit further includes:

一第一開關,具有一第一端、一第二端和一控制端,且該第一開關通過其所述第一端及所述第二端與該電容並聯;A first switch having a first terminal, a second terminal and a control terminal, and the first switch is connected in parallel with the capacitor through the first terminal and the second terminal;

一第二開關, 具有一第一端、一第二端和一控制端,且其所述第一端耦接至該運算放大器的該負輸入端和該反饋電容之間的一共接點,其所述第二端耦接至該第一開關元件12和至少一所述感測電容之間的一共接點;以及A second switch has a first terminal, a second terminal, and a control terminal, and the first terminal is coupled to a common connection point between the negative input terminal of the operational amplifier and the feedback capacitor. The second end is coupled to a common contact point between the first switching element 12 and at least one of the sensing capacitors; and

一第三開關, 具有一第一端、一第二端和一控制端,且其所述第一端耦接至該第二開關的該第二端與至少一所述感測電容之間的一共接點,其所述第二端耦接至該激勵信號。A third switch has a first terminal, a second terminal, and a control terminal, and the first terminal is coupled to the second terminal of the second switch and at least one of the sensing capacitors. A common contact point, the second end of which is coupled to the excitation signal.

在可能的實施例中,該第一開關元件、該第二開關元件、該第一開關、該第二開關、與該第三開關皆可為一P型MOSFET開關、一N型MOSFET開關或一CMOS開關。In possible embodiments, the first switching element, the second switching element, the first switch, the second switch, and the third switch may all be a P-type MOSFET switch, an N-type MOSFET switch or a CMOS switch.

本發明同時提供一種資訊處理裝置,其具有一觸控模塊,且該觸控模塊包含一觸控面板、一觸控檢測電路以及內嵌一觸控辨識運算函式的一微控制器;其中,該觸控檢測電路具有如前所述本發明之自電容檢測電路。The present invention also provides an information processing device, which has a touch module, and the touch module includes a touch panel, a touch detection circuit, and a microcontroller embedded with a touch recognition operation function; wherein, The touch detection circuit has the self-capacitance detection circuit of the present invention as described above.

在可行的實施例中,所述資訊處理裝置可為智慧型手機、平板電腦、筆記型電腦、一體式電腦、智慧型手錶或門禁裝置。In a feasible embodiment, the information processing device may be a smart phone, a tablet computer, a notebook computer, an all-in-one computer, a smart watch, or an access control device.

在可行的實施例中,該觸控模塊進一步和一顯示面板一同組成一觸控顯示模塊。In a feasible embodiment, the touch module and a display panel further constitute a touch display module.

為使  貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable your reviewer to further understand the structure, features, purpose, and advantages of the present invention, the drawings and detailed descriptions of preferred specific embodiments are attached as follows.

圖3顯示本發明之一種自電容檢測電路的電路架構圖。已知,觸控檢測芯片已經被廣泛地應用在各種電子裝置(例如:智能手機)之中,且其包括一觸控面板、一觸控檢測電路以及內嵌一觸控辨識運算函式的一微控制器。本發明之自電容檢測電路1即應用在該觸控檢測電路之中。如圖3所示,本發明之自電容檢測電路1耦接一觸控面板2的一觸控檢測端,且包含至少一電荷放大單元11用以通過該觸控檢測端而與該觸控面板2之中的至少一感測電容21耦接,進以接收一電容檢測信號。FIG. 3 shows a circuit structure diagram of a self-capacitance detection circuit of the present invention. It is known that touch detection chips have been widely used in various electronic devices (such as smart phones), and they include a touch panel, a touch detection circuit, and an embedded touch recognition operation function. Microcontroller. The self-capacitance detection circuit 1 of the present invention is applied to the touch detection circuit. As shown in FIG. 3, the self-capacitance detection circuit 1 of the present invention is coupled to a touch detection terminal of a touch panel 2, and includes at least one charge amplifying unit 11 for communicating with the touch panel through the touch detection terminal. At least one sensing capacitor 21 in 2 is coupled to receive a capacitance detection signal.

如圖3所示,該電荷放大單元11包括一運算放大器111以及一反饋電容112,其中該運算放大器111具有耦接一激勵信號壓VSTIM 的一正輸入端、一負輸入端、和一輸出端,且該反饋電容112耦接於該運算放大器111的該負輸入端和該輸出端之間。圖3繪示本發明之自電容檢測電路1同時包含一第一開關113、一第二開關114以及一第三開關115。更詳細地說明,該第一開關113具有一第一端、一第二端和一控制端,且該第一開關113通過其所述第一端及所述第二端與該反饋電容112並聯。另一方面,該第二開關114 具有一第一端、一第二端和一控制端,且其所述第一端耦接至該運算放大器111的該負輸入端和該反饋電容112之間的一共接點,其所述第二端耦接至該第一開關元件12和至少一所述感測電容21之間的一共接點。並且,該第三開關115具有一第一端、一第二端和一控制端,且其所述第一端耦接至該第二開關114的該第二端與至少一所述感測電容21之間的一共接點,其所述第二端耦接至該激勵信號VSTIMAs shown in FIG. 3, the charge amplifying unit 11 includes an operational amplifier 111 and a feedback capacitor 112, wherein the operational amplifier 111 has a positive input terminal, a negative input terminal, and an output coupled to an excitation signal voltage V STIM. The feedback capacitor 112 is coupled between the negative input terminal and the output terminal of the operational amplifier 111. FIG. 3 shows that the self-capacitance detection circuit 1 of the present invention includes a first switch 113, a second switch 114, and a third switch 115 at the same time. In more detail, the first switch 113 has a first terminal, a second terminal, and a control terminal, and the first switch 113 is connected in parallel with the feedback capacitor 112 through the first terminal and the second terminal. . On the other hand, the second switch 114 has a first terminal, a second terminal, and a control terminal, and the first terminal is coupled between the negative input terminal of the operational amplifier 111 and the feedback capacitor 112 The second terminal is coupled to the common contact between the first switching element 12 and at least one of the sensing capacitors 21. In addition, the third switch 115 has a first terminal, a second terminal, and a control terminal, and the first terminal is coupled to the second terminal of the second switch 114 and at least one of the sensing capacitors. A common contact point between 21, the second end of which is coupled to the excitation signal V STIM .

特別地,本發明在所述自電容檢測電路1之中增設一第一開關元件12、一第一電流源13、一第二開關元件14、以及一第二電流源15。如圖3所示,該第一開關元件12具有一第一端、一第二端以及一控制端,其中該第一端耦接至該電荷放大單元11和該感測電容21之間的一共接點。並且,該第一電流源13耦接於一高電平電壓信號VH 和該第一開關元件12的該第二端之間,用以向該第一開關元件12提供一第一電流。另一方面,該第二開關元件14具有一第一端、一第二端以及一控制端,其中該第一端耦接至該電荷放大單元11和該感測電容21之間的該共接點。並且,該第二電流源15耦接於一低電平電壓信號VL 和該第二開關元件14的該第二端之間,用以向該低電平電壓信號VL 提供一第二電流。In particular, in the present invention, a first switching element 12, a first current source 13, a second switching element 14, and a second current source 15 are added to the self-capacitance detection circuit 1. As shown in FIG. 3, the first switching element 12 has a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to a total of the charge amplifying unit 11 and the sensing capacitor 21. contact. Moreover, the first current source 13 is coupled between a high-level voltage signal V H and the second terminal of the first switching element 12 to provide a first current to the first switching element 12. On the other hand, the second switch element 14 has a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to the common connection between the charge amplifying unit 11 and the sensing capacitor 21 point. Moreover, the second current source 15 is coupled between a low-level voltage signal V L and the second end of the second switching element 14 to provide a second current to the low-level voltage signal V L .

補充說明的是,圖3所示之第一開關元件12、該第二開關元件14、該第一開關113、該第二開關114、與該第三開關115皆可為一P型MOSFET開關、一N型MOSFET開關、或一CMOS開關。It is supplemented that the first switching element 12, the second switching element 14, the first switch 113, the second switch 114, and the third switch 115 shown in FIG. 3 can all be a P-type MOSFET switch, An N-type MOSFET switch, or a CMOS switch.

依據本發明之設計,在所述感測電容21的一電容電壓等於或高於一門限電壓的情況下,一第二開關元件控制信號PH3N傳送至該第二開關元件14的該控制端以將該第二開關元件14切換至一短路狀態,從而利用該第二電流IS2 對該感測電容21進行放電且持續一放電時間。舉例而言,當感測電容21的電容電壓為一高電壓V1時,利用該第二電流源15之第二電流IS2 對該感測電容21進行放電且持續一放電時間,如此可以令該感測電容21所儲存的一感測電荷量被減去一特定電荷量Q= IS2 *TDSC =V1*Cbase 。其中,TDSC 為所述放電時間,且Cbase 為一基準電容值,其與感測電容21的電容值CSEN 相關,爲pF量級。According to the design of the present invention, when a capacitance voltage of the sensing capacitor 21 is equal to or higher than a threshold voltage, a second switching element control signal PH3N is transmitted to the control terminal of the second switching element 14 to The second switch element 14 is switched to a short-circuit state, so that the second current IS2 is used to discharge the sensing capacitor 21 for a discharge time. For example, when the capacitor voltage sensing capacitor 21 to a high voltage V1, using the second current source current I S2 of the second sensing capacitor 15 of the discharge 21 and a discharge duration time can thus enabling the A sensed charge amount stored in the sensing capacitor 21 is subtracted from a specific charge amount Q=I S2 *T DSC =V1*C base . Wherein, T DSC is the discharge time, and C base is a reference capacitance value, which is related to the capacitance value C SEN of the sensing capacitor 21 and is in the order of pF.

相反地,在所述感測電容21的一電容電壓等於或低於一門限電壓的情況下,一第一開關元件控制信號PH3P傳送至該第一開關元件12的該控制端以將該第一開關元件12切換至一短路狀態,從而利用該第一電流對該感測電容21進行充電且持續一充電時間。舉例而言,當感測電容21的電容電壓為一低電壓V2時,利用該第一電流源13之第一電流IS1 對該感測電容21進行充電且持續一充電時間,如此可以令該感測電容21所儲存的一感測電荷量被減去一特定電荷量Q= IS1 *TC =(V1-V2)*Cbase ,其中TC 為所述充電時間。Conversely, when a capacitance voltage of the sensing capacitor 21 is equal to or lower than a threshold voltage, a first switching element control signal PH3P is transmitted to the control terminal of the first switching element 12 to the first switching element 12 The switching element 12 is switched to a short-circuit state, so that the first current is used to charge the sensing capacitor 21 for a charging time. For example, when the capacitance voltage of the sensing capacitor 21 is a low voltage V2, the first current I S1 of the first current source 13 is used to charge the sensing capacitor 21 for a charging time, so that the A sensed charge amount stored in the sensing capacitor 21 is subtracted from a specific charge amount Q=I S1 *T C =(V1-V2)*C base , where T C is the charging time.

進一步地說明,電荷放大單元11在對感測電容21之感測電荷進行放大處理之後,由運算放大器111的輸出端提供一個輸出電壓信號Vo。當手指沒有觸摸到觸控面板2時,感測電容21之感測電容CSEN 的值爲C1。並且,當手指觸摸觸控面板2時,感測電容CSEN 的值則爲C2。因此,感測電容21的電容變化量Cchange 即為C2-C1。特別說明的是,本發明之自電容檢測電路1包含第一電流源13和第二電流源15,其係用以在該電荷放大單元11對感測電荷進行放大處理的過程中將C1的值減去。如此設計,當手指觸摸觸控面板2時,自電容檢測電路1所測得之電容變化量的值便大幅提升,從而放大輸出電壓信號Vo之有效範圍。To further illustrate, after the charge amplifying unit 11 performs amplifying processing on the sensed charge of the sensing capacitor 21, the output terminal of the operational amplifier 111 provides an output voltage signal Vo. When the finger does not touch the touch panel 2, the value of the sensing capacitance C SEN of the sensing capacitor 21 is C1. Moreover, when a finger touches the touch panel 2, the value of the sensing capacitance C SEN is C2. Therefore, the capacitance change C change of the sensing capacitor 21 is C2-C1. Specifically, the self-capacitance detection circuit 1 of the present invention includes a first current source 13 and a second current source 15, which are used to amplify the value of C1 during the process of amplifying the sensed charge by the charge amplifying unit 11 minus. With this design, when a finger touches the touch panel 2, the value of the capacitance change measured by the self-capacitance detection circuit 1 is greatly increased, thereby amplifying the effective range of the output voltage signal Vo.

通過圖4所示的本發明之自電容檢測電路的工作時序圖可以進一步地理解,增設的第一電流源13以及第二電流源15如何達成大幅提升所述電容變化量之最終效果。參照圖3和圖4,激勵信號VSTIM 的一個完整週期即為自電容檢測電路1的一個完整工作周期。並且,圖4繪示激勵信號VSTIM 包含正相位階段與負相位階段。在正相位階段之中,令第一控制信號PH1為高電平可令由運算放大器111和反饋電容112組成的電荷放大單元11操作在重置(Reset)模式。此時,重置電荷QRESET =0。It can be further understood through the working timing diagram of the self-capacitance detection circuit of the present invention shown in FIG. 4 that how the additional first current source 13 and the second current source 15 achieve the ultimate effect of greatly increasing the capacitance variation. 3 and 4, a complete cycle of the excitation signal V STIM is a complete working cycle of the self-capacitance detection circuit 1. Moreover, FIG. 4 shows that the excitation signal V STIM includes a positive phase phase and a negative phase phase. In the positive phase phase, setting the first control signal PH1 to a high level can make the charge amplifying unit 11 composed of the operational amplifier 111 and the feedback capacitor 112 operate in a reset mode. At this time, the reset charge Q RESET =0.

如圖4所示,通過令第一控制信號PH1為低電平、第二控制信號PH2為高電平、且激勵信號VSTIM 為高電平,可使得由運算放大器111和反饋電容112組成的電荷放大單元11操作在積分模式。在此模式下,該反饋電容112所儲存之積分電荷QINTERG =QCsen +QCF +QIS ;其中,QCsen =VH *CSEN ,CSEN 為感測電容21的電容值。另一方面, QCF =(VH -VO )*CF ,CF 為反饋電容112的電容值。並且,IS =IS1 = IS2 。最終,QRESET =QINTERG ,因此,在令IS *T=VH * Cbase 的情況下,可計算出輸出電壓信號Vo=VH (CSEN +CF -Cbase )/CF =1-VH (Cbase -CSEN )/CF 。其中,T為積分時間。As shown in FIG. 4, by setting the first control signal PH1 to a low level, the second control signal PH2 to a high level, and the excitation signal V STIM to a high level, the operational amplifier 111 and the feedback capacitor 112 can be composed of The charge amplifying unit 11 operates in the integration mode. In this mode, the integrated charge Q INTERG =Q Csen +Q CF +Q IS stored in the feedback capacitor 112; where Q Csen =V H *C SEN , and C SEN is the capacitance value of the sensing capacitor 21. On the other hand, Q CF =(V H -V O )*C F , where C F is the capacitance value of the feedback capacitor 112. And, I S = I S1 = I S2 . Finally, Q RESET = Q INTERG, therefore, in the case where the order I S * T = V H * C base , the calculated output voltage signal Vo = V H (C SEN + C F -C base) / C F = 1-V H (C base -C SEN )/C F. Among them, T is the integration time.

補充說明的是,本發明特別令該第一電流IS1 和該充電時間TC 之乘積與該高電平電壓信號VH 和基準電容值(Cbase )之乘積相等,且令該第二電流IS2 和該放電時間TDSC 之乘積與該高電平電壓信號VL 和基準電容值(Cbase )之乘積相等。因此,對於本發明之自電容檢測電路1而言,只需要通過調整積分時間T、第一電流IS1 、及/或第二電流IS2 ,便可以調整對於所述電容變化量(即,C2-C1)的減電容效果。It is added that the present invention specifically makes the product of the first current I S1 and the charging time T C equal to the product of the high-level voltage signal V H and the reference capacitance value (C base ), and the second current The product of I S2 and the discharge time T DSC is equal to the product of the high-level voltage signal V L and the reference capacitance value (C base ). Therefore, for the self-capacitance detection circuit 1 of the present invention, it is only necessary to adjust the integration time T, the first current I S1 , and/or the second current I S2 to adjust the capacitance change amount (ie, C2 -C1)'s capacitance reduction effect.

圖4繪示激勵信號VSTIM 包含正相位階段與負相位階段。在負相位階段之中,令第一控制信號PH1為高電平可令由運算放大器111和反饋電容112組成的電荷放大單元11操作在重置(Reset)模式。此時,重置電荷QRESET =0。進一步地,通過令第一控制信號PH1為低電平、第二控制信號PH2為高電平、且激勵信號VSTIM 為低電平,可使得由運算放大器11和反饋電容12組成的電荷放大單元11操作在積分模式。在此模式下,該反饋電容112所儲存之積分電荷QINTERG =QCsen +QCF +QIS ;其中,QCsen =(-VH )*CSEN ,且QCF =(-VO )*CF 。最終,QRESET =QINTERG ,因此,在令IS *T=VH * Cbase 的情況下,可計算出輸出電壓信號Vo=VH (CSEN +CF -Cbase )/CF =1-VH (Cbase -CSEN )/CF 。其中,T為積分時間。FIG. 4 shows that the excitation signal V STIM includes a positive phase phase and a negative phase phase. In the negative phase phase, setting the first control signal PH1 to a high level can make the charge amplifying unit 11 composed of the operational amplifier 111 and the feedback capacitor 112 operate in a reset mode. At this time, the reset charge Q RESET =0. Further, by setting the first control signal PH1 to a low level, the second control signal PH2 to a high level, and the excitation signal V STIM to a low level, the charge amplifying unit composed of the operational amplifier 11 and the feedback capacitor 12 can be made 11 Operate in integral mode. In this mode, the integrated charge Q INTERG =Q Csen +Q CF +Q IS stored in the feedback capacitor 112; where Q Csen =(-V H )*C SEN , and Q CF =(-V O )* C F. Finally, Q RESET = Q INTERG, therefore, in the case where the order I S * T = V H * C base , the calculated output voltage signal Vo = V H (C SEN + C F -C base) / C F = 1-V H (C base -C SEN )/C F. Among them, T is the integration time.

因此,對於本發明之自電容檢測電路1而言,只需要通過調整積分時間T、第一電流IS1 、及/或第二電流IS2 ,便可以調整對於所述電容變化量(即,C2-C1)的減電容效果。由前述說明可知,無論是在激勵信號VSTIM 的正相位階段或負相位階段,輸出電壓信號Vo的數學運算式之中都含有(Cbase -CSEN )此項。因此,數學推算的結果證實,在自電容檢測電路1之中增設第一電流源13以及第二電流源15之後,感測電容21之感測電容CSEN 的初始值(亦即,C1)便會在電荷放大單元11對感測電荷進行放大處理的過程中被減去,從而放大輸出電壓信號Vo之有效範圍。Therefore, for the self-capacitance detection circuit 1 of the present invention, it is only necessary to adjust the integration time T, the first current I S1 , and/or the second current I S2 to adjust the capacitance change amount (ie, C2 -C1)'s capacitance reduction effect. It can be seen from the foregoing description that whether it is in the positive phase or negative phase of the excitation signal V STIM , the mathematical expression of the output voltage signal Vo includes the term (C base- C SEN ). Therefore, the result of the mathematical calculation proves that after the first current source 13 and the second current source 15 are added to the self-capacitance detection circuit 1, the initial value (ie, C1) of the sensing capacitor C SEN of the sensing capacitor 21 becomes It is subtracted during the process of amplifying the sensed charge by the charge amplifying unit 11, thereby amplifying the effective range of the output voltage signal Vo.

如此,上述已完整且清楚地說明本發明之一種自電容檢測電路;並且,經由上述可得知本發明具有下列優點:In this way, the above has completely and clearly described a self-capacitance detection circuit of the present invention; and, from the above, it can be seen that the present invention has the following advantages:

(1)本發明的自電容檢測電路1主要是利用第一電流源13與第二電流源15減去所述感測電容21之電容初始值(C1),使得自電容檢測電路1所測得之電容變化量的值可以被大幅提升,達到放大輸出電壓信號VO 的有效範圍之最終效果。(1) The self-capacitance detection circuit 1 of the present invention mainly uses the first current source 13 and the second current source 15 to subtract the initial capacitance value (C1) of the sensing capacitor 21, so that the self-capacitance detection circuit 1 measures The value of the capacitance change can be greatly increased to achieve the final effect of amplifying the effective range of the output voltage signal V O.

(2)本發明之自電容檢測電路1的電路結構不包含任何pF量級的基準電容,因此在進行芯片化之時可以大幅節省電路面積,從而節省芯片製作成本。(2) The circuit structure of the self-capacitance detection circuit 1 of the present invention does not include any reference capacitors of the order of pF. Therefore, the circuit area can be greatly saved when the chip is implemented, thereby saving the cost of chip production.

(3)並且,本發明同時揭示一種資訊處理裝置,其具有一觸控模塊,且該觸控模塊包含一觸控面板、一觸控檢測電路以及內嵌一觸控辨識運算函式的一微控制器;其中,該觸控檢測電路具有如前所述本發明之自電容檢測電路1。在一可行實施例中,所述資訊處理裝置係由智慧型手機、平板電腦、筆記型電腦、一體式電腦、智慧型手錶、和門禁裝置所組成之群組所選擇的一種電子裝置。在另一可行實施例中,該觸控模塊進一步和一顯示面板一同組成一觸控顯示模塊。(3) Moreover, the present invention also discloses an information processing device, which has a touch module, and the touch module includes a touch panel, a touch detection circuit, and a microcomputer embedded with a touch recognition operation function. Controller; wherein, the touch detection circuit has the self-capacitance detection circuit 1 of the present invention as described above. In a possible embodiment, the information processing device is an electronic device selected by the group consisting of a smart phone, a tablet computer, a notebook computer, an all-in-one computer, a smart watch, and an access control device. In another feasible embodiment, the touch module further forms a touch display module together with a display panel.

必須加以強調的是,前述本案所揭示者乃為較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。It must be emphasized that the foregoing disclosures in this case are preferred embodiments, and any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by those who are familiar with the art will not deviate from the patent of this case. Right category.

綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請  貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。In summary, regardless of the purpose, means, and effects of this case, it is shown that it is very different from the conventional technology, and its first invention is practical, and it does meet the patent requirements of the invention. Please check it out and grant the patent as soon as possible. Society is for the best prayer.

<本發明> 1:自電容檢測電路 11:電荷放大單元 111:運算放大器 112:反饋電容 113:第一開關 114:第二開關 115:第三開關 12:第一開關元件 13:第一電流源 14:第二開關元件 15:第二電流源 2:觸控面板 21:感測電容<The present invention> 1: Self-capacitance detection circuit 11: charge amplification unit 111: Operational amplifier 112: feedback capacitor 113: First switch 114: second switch 115: third switch 12: The first switching element 13: The first current source 14: The second switching element 15: second current source 2: touch panel 21: Sensing capacitance

<習知> 1’:自電容檢測電路 11’:運算放大器 12’:反饋電容 13’:第一開關 14’:第二開關 15’:第三開關 16’:第四開關 17’:第五開關 18’:第六開關 19’:基準電容 1A’:第七開關 1B’:第八開關 1C’:第九開關 2’:觸控面板 21’:感測電容<Acquaintances> 1’: Self-capacitance detection circuit 11’: Operational amplifier 12’: Feedback capacitor 13’: First switch 14’: Second switch 15’: Third switch 16’: Fourth switch 17’: Fifth switch 18’: The sixth switch 19’: Reference capacitance 1A’: The seventh switch 1B’: Eighth switch 1C’: Ninth switch 2’: Touch panel 21’: Sensing capacitance

圖1為習知的一種自電容檢測電路的電路架構圖; 圖2為習知的自電容檢測電路的工作時序圖; 圖3為本發明之一種自電容檢測電路的電路架構圖;以及 圖4為本發明之自電容檢測電路的工作時序圖。Fig. 1 is a circuit structure diagram of a conventional self-capacitance detection circuit; Figure 2 is a working timing diagram of a conventional self-capacitance detection circuit; FIG. 3 is a circuit structure diagram of a self-capacitance detection circuit of the present invention; and Fig. 4 is a working timing diagram of the self-capacitance detection circuit of the present invention.

1:自電容檢測電路1: Self-capacitance detection circuit

11:電荷放大單元11: charge amplification unit

111:運算放大器111: Operational amplifier

112:反饋電容112: feedback capacitor

113:第一開關113: First switch

114:第二開關114: second switch

115:第三開關115: third switch

12:第一開關元件12: The first switching element

13:第一電流源13: The first current source

14:第二開關元件14: The second switching element

15:第二電流源15: second current source

2:觸控面板2: touch panel

21:感測電容21: Sensing capacitance

Claims (10)

一種自電容檢測電路,用以耦接一觸控面板的一觸控檢測端,且包含至少一電荷放大單元以通過該觸控檢測端與該觸控面板中的至少一感測電容耦接以接收一電容檢測信號,其特徵在於,所述自電容檢測電路更包括: 一第一開關元件,具有一第一端、一第二端及一控制端,其中該第一端耦接至該電荷放大單元和該感測電容之間的一共接點; 一第一電流源,耦接於一高電平電壓信號和該第一開關元件的該第二端之間,用以向該第一開關元件提供一第一電流; 一第二開關元件,具有一第一端、一第二端及一控制端,其中該第一端耦接至該電荷放大單元和該感測電容之間的該共接點;以及 一第二電流源,耦接於一低電平電壓信號和該第二開關元件的該第二端之間,用以向該低電平電壓信號提供一第二電流; 其中,當所述感測電容的一電容電壓等於或低於一第一門限電壓時,一第一開關元件控制信號傳送至該第一開關元件的該控制端以將該第一開關元件切換至一短路狀態,從而利用該第一電流對該感測電容進行充電且持續一充電時間;以及當所述感測電容的一電容電壓等於或高於一第二門限電壓時,一第二開關元件控制信號傳送至該第二開關元件的該控制端以將該第二開關元件切換至一短路狀態,從而利用該第二電流對該感測電容進行放電且持續一放電時間。A self-capacitance detection circuit is used to couple a touch detection terminal of a touch panel, and includes at least one charge amplifying unit to be coupled to at least one sensing capacitor in the touch panel through the touch detection terminal Receiving a capacitance detection signal is characterized in that the self-capacitance detection circuit further includes: A first switch element having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to a common contact point between the charge amplifying unit and the sensing capacitor; A first current source, coupled between a high-level voltage signal and the second terminal of the first switching element, for providing a first current to the first switching element; A second switch element having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the common contact point between the charge amplifying unit and the sensing capacitor; and A second current source, coupled between a low-level voltage signal and the second terminal of the second switch element, for providing a second current to the low-level voltage signal; Wherein, when a capacitance voltage of the sensing capacitor is equal to or lower than a first threshold voltage, a first switching element control signal is transmitted to the control terminal of the first switching element to switch the first switching element to A short-circuit state, thereby using the first current to charge the sensing capacitor for a charging time; and when a capacitor voltage of the sensing capacitor is equal to or higher than a second threshold voltage, a second switching element The control signal is transmitted to the control terminal of the second switching element to switch the second switching element to a short-circuit state, so that the second current is used to discharge the sensing capacitor for a discharge time. 如申請專利範圍第1項所述之自電容檢測電路,其中,該第一電流和該充電時間之乘積與該高電平電壓信號和一基準電容值之乘積相等。According to the self-capacitance detection circuit described in item 1 of the scope of patent application, wherein the product of the first current and the charging time is equal to the product of the high-level voltage signal and a reference capacitance value. 如申請專利範圍第1項所述之自電容檢測電路,其中,該第二電流和該放電時間之乘積與該高電平電壓信號和一基準電容值之乘積相等。According to the self-capacitance detection circuit described in item 1 of the scope of patent application, wherein the product of the second current and the discharge time is equal to the product of the high-level voltage signal and a reference capacitance value. 如申請專利範圍第1項所述之自電容檢測電路,其中,該第二電流的值相等於該第一電流的值。According to the self-capacitance detection circuit described in item 1 of the scope of patent application, the value of the second current is equal to the value of the first current. 如申請專利範圍第1項所述之自電容檢測電路,其中,該電荷放大單元包括: 一運算放大器,具有耦接一激勵信號壓的一正輸入端、一負輸入端、和一輸出端;以及 一反饋電容,耦接於該運算放大器的該負輸入端和該輸出端之間。According to the self-capacitance detection circuit described in item 1 of the scope of patent application, the charge amplifying unit includes: An operational amplifier having a positive input terminal, a negative input terminal, and an output terminal coupled to an excitation signal voltage; and A feedback capacitor is coupled between the negative input terminal and the output terminal of the operational amplifier. 如申請專利範圍第5項所述之自電容檢測電路,更包括: 一第一開關,具有一第一端、一第二端和一控制端,且該第一開關通過其所述第一端及所述第二端與該反饋電容並聯; 一第二開關,具有一第一端、一第二端和一控制端,且其所述第一端耦接至該運算放大器的該負輸入端和該反饋電容之間的一共接點,其所述第二端耦接至該第一開關元件和至少一所述感測電容之間的一共接點;以及 一第三開關,具有一第一端、一第二端和一控制端,且其所述第一端耦接至該第二開關的該第二端與至少一所述感測電容之間的一共接點,其所述第二端耦接至該激勵信號。The self-capacitance detection circuit described in item 5 of the scope of patent application further includes: A first switch having a first terminal, a second terminal and a control terminal, and the first switch is connected in parallel with the feedback capacitor through the first terminal and the second terminal; A second switch has a first terminal, a second terminal, and a control terminal, and the first terminal is coupled to a common connection point between the negative input terminal of the operational amplifier and the feedback capacitor. The second end is coupled to a common contact point between the first switching element and at least one of the sensing capacitors; and A third switch has a first terminal, a second terminal, and a control terminal, and the first terminal is coupled to the second terminal of the second switch and at least one of the sensing capacitors. A common contact point, the second end of which is coupled to the excitation signal. 如申請專利範圍第6項所述之自電容檢測電路,其中,該第一開關元件、該第二開關元件、該第一開關、該第二開關與該第三開關皆為由一P型MOSFET開關、一N型MOSFET開關和一CMOS開關所組成的群組所選擇的一種開關。According to the self-capacitance detection circuit described in item 6 of the scope of patent application, wherein the first switching element, the second switching element, the first switch, the second switch and the third switch are all made of a P-type MOSFET A switch selected by the group consisting of a switch, an N-type MOSFET switch, and a CMOS switch. 一種資訊處理裝置,其具有一觸控模塊,且該觸控模塊包含一觸控面板、一觸控檢測電路以及內嵌一觸控辨識運算函式的一微控制器;其中,該觸控檢測電路具有如申請專利範圍第1項至第6項之任一項所述之自電容檢測電路。An information processing device has a touch module, and the touch module includes a touch panel, a touch detection circuit, and a microcontroller embedded with a touch recognition operation function; wherein the touch detection The circuit has a self-capacitance detection circuit as described in any one of items 1 to 6 of the scope of the patent application. 如申請專利範圍第8項所述之資訊處理裝置,其係由智慧型手機、平板電腦、筆記型電腦、一體式電腦、智慧型手錶、和門禁裝置所組成之群組所選擇的一種電子裝置。The information processing device described in item 8 of the scope of patent application is an electronic device selected by the group consisting of smart phones, tablet computers, notebook computers, all-in-one computers, smart watches, and access control devices . 如申請專利範圍第8項所述之資訊處理裝置,其中,該觸控模塊進一步和一顯示面板一同組成一觸控顯示模塊。According to the information processing device described in item 8 of the scope of patent application, the touch module further forms a touch display module together with a display panel.
TW109108084A 2020-03-11 2020-03-11 Self-capacitance detection circuit and information processing device with the capacitance detection circuit TWI737216B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW109108084A TWI737216B (en) 2020-03-11 2020-03-11 Self-capacitance detection circuit and information processing device with the capacitance detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW109108084A TWI737216B (en) 2020-03-11 2020-03-11 Self-capacitance detection circuit and information processing device with the capacitance detection circuit

Publications (2)

Publication Number Publication Date
TWI737216B TWI737216B (en) 2021-08-21
TW202134671A true TW202134671A (en) 2021-09-16

Family

ID=78283269

Family Applications (1)

Application Number Title Priority Date Filing Date
TW109108084A TWI737216B (en) 2020-03-11 2020-03-11 Self-capacitance detection circuit and information processing device with the capacitance detection circuit

Country Status (1)

Country Link
TW (1) TWI737216B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114691439B (en) * 2022-05-31 2022-08-26 上海泰矽微电子有限公司 Capacitive touch detection chip circuit capable of expanding channel and detection method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8547359B2 (en) * 2010-06-21 2013-10-01 Pixart Imaging Inc. Capacitive touchscreen system with switchable charge acquisition circuit
KR101292733B1 (en) * 2010-10-18 2013-08-05 주식회사 포인칩스 Multi-touch panels capacitance sensing circuitry
US9372582B2 (en) * 2012-04-19 2016-06-21 Atmel Corporation Self-capacitance measurement
CN103902123B (en) * 2014-01-30 2017-04-19 敦泰科技有限公司 Self-capacitance touch sensing device capable of reducing substrate capacitance
KR101602842B1 (en) * 2015-03-05 2016-03-11 주식회사 지2터치 Capacitive type touch signal detection apparatus and mentod
CN206460438U (en) * 2017-01-19 2017-09-01 北京集创北方科技股份有限公司 Touch detection circuit and its contactor control device

Also Published As

Publication number Publication date
TWI737216B (en) 2021-08-21

Similar Documents

Publication Publication Date Title
JP6706660B2 (en) Multi-stage feedback capacitor switching scheme
US10949032B2 (en) Circuit, touch chip, and electronic device for capacitance detection
US8847911B2 (en) Circuit to provide signal to sense array
US10627972B2 (en) Capacitance detecting device, touch device and terminal device
US9557853B2 (en) Touch detecting circuit and semiconductor integrated circuit using the same
US20110227633A1 (en) Capacitive touch panel detection circuit and boost circuit thereof
CN107449810B (en) Capacitance measuring circuit, input device using the same, and electronic apparatus
US11092633B2 (en) Capacitance detection circuit, semiconductor device, input device and electronic apparatus including the same, and method of detecting capacitance
WO2021179730A1 (en) Capacitance measurement apparatus
TWI695310B (en) Fingerprint sensor and method of fingerprint detection
TWI659349B (en) A fingerprint sensing circuit and a fingerprint sensing apparatus are provided
TWI737216B (en) Self-capacitance detection circuit and information processing device with the capacitance detection circuit
CN105528108A (en) Touch sensing method, touch display device and portable electronic device
TWI480779B (en) A power management device of a touchable control system
WO2014134866A1 (en) Positioning detection circuit for touch point of touch panel, touch panel and display device
JP2017021597A (en) Capacity measuring circuit, input device using the same, and electronic equipment
US20190018538A1 (en) Touch screen controller
KR20210012132A (en) High sensitivity touch sensor
US7795957B1 (en) Power supply circuit for south bridge chip
JP2019211898A (en) Touch detection circuit, input device and electronic apparatus
US10650215B2 (en) Fingerprint sensor and terminal device
CN114487784A (en) Capacitance detection circuit, touch chip and electronic equipment
KR101926535B1 (en) Touch panel
CN217085101U (en) Capacitance detection circuit, touch control chip and electronic equipment
KR101926546B1 (en) Position sensing method of touch panel and integrated circuit