TW202125469A - Low power driving system and timing controller for display device - Google Patents

Abstract

Disclosed are a low power driving system and timing controller for a display device. The low power driving system for a display device may include a timing controller configured to transmit a packet to which one of first option information corresponding to a static pattern or second option information corresponding to a dynamic pattern is applied, and a source driver configured to receive the packet and to perform a low power mode corresponding to the static pattern based on the first option information or adaptive charge sharing corresponding to the dynamic pattern based on the second option information.

Description

Low-power driving system and timing controller for display device

The present disclosure relates to a low-power driving technology, and more specifically, to a low-power driving system and a timing controller for a display device.

A display device includes a timing controller, a source driver and a display panel.

The timing controller can be designed to provide display data, control data, and clock pulses for display to the source driver in a grouped form. The source driver receives the display data and provides a source signal corresponding to the display data to the display panel. The display panel displays the screen corresponding to the source signal.

The display device needs to adopt a technology to reduce the power consumption of various components. For this reason, actively researching and adopting the technology of reducing the power consumption of the timing controller and the source driver.

In addition, the source driver of the display device may have a structure for a unique charge sharing connection or a full charge sharing connection to output source signals.

Therefore, the display device needs to be designed to provide the source driver with options for reducing power consumption according to various grouping types or charge sharing structures (for example, full charge sharing).

Various embodiments aim to provide a low-power driving system and a timing controller for a display device, which can support a source driver using a charge sharing method including a full charge sharing connection.

In addition, various embodiments aim to provide a low-power drive system and a timing controller that can freely provide an option for reducing power consumption with respect to polarity, and perform a power consumption operation according to the option.

Each embodiment aims to provide a low-power driving system and method for a display device, and a timing controller, which can recognize a display pattern by the timing controller and send option information corresponding to the recognized display pattern to the source. Driver to reduce the power consumption of the source driver.

In addition, various embodiments aim to provide a low-power driving system for a display device, which can reduce power consumption by the following steps: Provide groupings according to display patterns, the groupings including option information that can reduce power consumption ; And perform charge sharing control on the output based on the option information or perform current control on at least one of the output buffer, the gamma buffer, and the intermediate drive voltage (HVDD) buffer.

In an embodiment, a low-power driving system for a display device may include: a timing controller configured to receive grouped data for correcting the polarity of the row data based on the grouping type of the source driver, and correct the previous row of data based on the grouping data Based on the polarity of the current row data, the display pattern is divided into static patterns and dynamic patterns based on the difference between the previous row data and the current row data, and a packet to which one of the first option information and the second option information is applied is sent, The first option information corresponds to the static pattern, and the second option information corresponds to the dynamic pattern; and the source driver is configured to receive the packet and execute a low power mode corresponding to the static pattern based on the first option information, or based on the second option information The option information performs self-adjusting charge sharing corresponding to the dynamic pattern.

In an embodiment, a timing controller for a display device may include: a pixel value storage device configured to store the previous row data and the current row data, and provide the previous row data and the current row data for mapping; a packet receiver, It is configured to receive the packet type of the source driver and the packet data used to correct the polarity of the row data based on the packet type; the packet mapper is configured to map information about the polarity of the row data based on the packet type and the packet data; a pixel value correction unit , Configured to correct the information about the polarity of the previous row of data and the current row of data based on the information about the polarity; the arithmetic unit is configured to receive the previous row of data and the current row of data from the pixel value correction unit, and based on the previous row of data and the current row of data Calculate the power gain and power loss due to the charge sharing of the current line of data, or calculate the first largest change in the output of the source driver that applies charge sharing to the current line of data and the current The line data applies the second largest change in the output of the source driver shared by the charge; and the option information providing unit configured to provide information on the basis of the comparison result between the power gain amount and the power loss amount if the display pattern is a dynamic pattern Whether to apply the second option information of charge sharing to the current line of data, and if the display pattern is a static pattern, according to whether to apply charge sharing to the previous line of data, a change selected from the first maximum change and the second maximum change is provided as First option information.

Hereinafter, exemplary embodiments will be described in more detail with reference to the accompanying drawings. However, the present disclosure may be implemented in different forms, and should not be configured to be limited to the embodiments described herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Throughout the disclosure, in the various drawings and embodiments of the present disclosure, the same reference numerals denote the same components.

The low-power driving system for the display device according to the embodiment of the present disclosure may be as shown in FIG. 1.

1, the timing controller 10, the source driver 20, the display panel 30, and the memory 40 are shown.

The timing controller 10 receives the display data, the group type, and the group data, where the display data is received from the outside. The group type can be received together with the display data. The timing controller 10 can receive the grouping data corresponding to the grouping type from the look-up data table stored in the memory 40.

In this case, the memory 40 may be configured to use, for example, an EEPROM to store and provide packet data. The grouping data includes information about the polarity of the row data.

The timing controller 10 is configured to configure externally received display data in the form of a packet PKT and provide the packet PKT to the source driver 20.

In this case, the timing controller 10 may configure a group PKT including display data and control data. The control data may include various types of option information for distinguishing power control modes.

The timing controller 10 can use the grouped data to correct the polarity of the pixel value of the row data, and can generate option information based on the comparison result between the previous row data and the current row data whose polarity has been corrected.

The power control mode can be classified into a low power mode control operation and a self-adjusting charge sharing control operation. The option information may indicate low power mode control or self-adjusting charge sharing control, may have a value according to a predetermined agreement, and may be applied to the packet PKT by being included in the control data.

The source driver 20 receives the packet PKT from the timing controller 10 and outputs a source signal (Sout) corresponding to the display data to the display panel 30. In this case, the source driver 20 may be configured to execute the power control mode corresponding to the option information of the control data during the process of converting the display data into the source signal (Sout) and the process of outputting the source signal (Sout). .

The source driver 20 may include a latch, a shift register, a digital-to-analog converter, and an output buffer for converting display data. In addition, the source driver 20 may include a gamma buffer for supplying a gamma voltage to the digital-to-analog converter and an intermediate driving voltage (HVDD) buffer for supplying a driving voltage to the output buffer.

Since latches, shift registers, digital-to-analog converters, output buffers, gamma buffers, and intermediate driving voltage buffers are commonly used components in the source driver 20, detailed descriptions and descriptions thereof are omitted.

The display panel 30 may be configured as a flat display panel. Exemplarily, a display panel or a liquid crystal display (LCD) including pixels using organic light emitting diodes (OLED) and light emitting diodes (LED) may be used as the display panel 30.

In the configuration of FIG. 1, the low-power driving system for a display device according to an embodiment of the present disclosure is configured to include a timing controller 10 and a source driver 20.

The operation of the low-power driving system for the display device is described with reference to FIG. 2.

First, the timing controller 10 is configured to divide the display pattern into a static pattern and a dynamic pattern based on the difference between the previous row data and the current row data, and send a packet PKT to which the first option information and the second option information are applied, The first option information corresponds to a static pattern, and the second option information corresponds to a dynamic pattern.

The timing controller 10 executes the control process. The control process may include step S10 of identifying a pattern and providing a packet PKT based on the identified pattern, wherein the packet PKT includes control data having first option information or second option information.

The source driver 20 can receive the packet PKT, and can identify the power control mode based on the first option information or the second option information. More specifically, the source driver 20 is configured to perform a low-power mode control operation corresponding to a static pattern based on the first option information, or perform a self-adjusting charge sharing control operation corresponding to a dynamic pattern based on the second option information.

That is, the source driver 20 performs the driving process based on the recognized power control mode. The driving process includes step S20 of recognizing the power control mode based on the display pattern, step S22 of performing the low power mode if the display pattern is a static pattern, and step S23 of performing self-adjusting charge sharing if the display pattern is a dynamic pattern.

By comparing the data of the previous row with the data of the current row, the display pattern can be determined as one of the static pattern and the dynamic pattern.

In addition, the determination standard for distinguishing static patterns from dynamic patterns can be set as the data change between the previous row of data and the current row of data. The standards for distinguishing the data changes of static patterns and dynamic patterns can be set differently according to the purpose of the manufacturer.

In the static pattern and the dynamic pattern, the static pattern can be defined as a situation where the source signal (Sout) (ie, the output of the source driver 20) remains constant due to small changes in the data between the previous row of data and the current row of data.

In addition, the dynamic pattern can be defined as a situation where the source signal (Sout) (ie, the output of the source driver 20) oscillates due to a large change in the data between the previous row of data and the current row of data.

In the embodiment of the present disclosure, if the display pattern is a static pattern, the timing controller 10 is configured to provide first option information for determining the power control mode as a low power mode control operation. The source driver 20 is configured to execute a low power mode based on the first option information to reduce power consumption by reducing the amount of current that maintains the output of the current row data.

In addition, in the embodiment of the present disclosure, if the display pattern is a dynamic pattern, the timing controller 10 is configured to provide second option information for determining the power control mode as a self-adjusting charge sharing control operation. The source driver 20 is configured to perform self-adjusting charge sharing by performing charge sharing on the output of the current row data based on the second option information, so as to provide the current discharged from the load capacitor of the display panel to the location that needs to be charged. Way to reduce power consumption.

The timing controller 10 provides a packet PKT, which includes the first option information or the second option information in the control data, so as to reduce the power consumption of the source driver 20. To this end, the timing controller 10 may be configured as shown in FIG. 3.

The second option information can be determined and provided by the self-adjusting shared charge control operation of FIG. 4 and FIG. 5. The first option information can be determined and provided by the low power mode control operation of FIG. 4 and FIG. 9. The self-adjusting charge sharing control operation and the low-power mode control operation can be understood as being included in the identification pattern of FIG. 2 and providing a packet PKT based on the identified pattern. In step S10, the packet PKT includes information having the first option information or the second option information. Control data.

First, referring to FIG. 3, the timing controller 10 includes a data receiver 11, a group configuration unit 12, a group output unit 13 and an option information configuration unit 15.

The material receiver 11 sends the externally received display material to the group configuration unit 12. The group configuration unit 12 provides the group output unit 13 with display data, control data, and a clock for configuring the group PKT as parallel data. The packet output unit 13 converts the parallel data into serial data according to a predetermined protocol, and sends the serial data to the source driver 20 as a packet PKT.

In the above configuration, the group configuration unit 12 receives the first option information or the second option information provided by the option information configuration unit 15, and operates so that the first option information or the second option information is included in the control data.

The option information configuration unit 15 is configured to correct the polarity of the row data based on the grouping type, and to provide the first option information or the second option information based on the comparison result between the previous row data and the current row data. To this end, the option information configuration unit 15 includes a packet receiver 2, a packet mapper 4, a pixel value storage device 5, a pixel value correction unit 6, an arithmetic unit 7, and an option information providing unit 9.

The packet receiver 2 receives the packet type of the source driver 20 and the packet data for correcting the polarity of the line data based on the packet type.

The grouping type can be received together with the display data, or can be pre-set in the internal memory (not shown).

The packet receiver 2 can receive the packet data corresponding to the packet type from the look-up data table stored in the memory 40.

The packet mapper 4 maps information on the polarity of the row data based on the packet type and the packet data. In other words, the grouping data can be determined based on the grouping type. The information on the polarity of the row data of each channel is mapped based on the grouped data. Therefore, the grouping data can be understood as data for mapping information about the polarity of each row.

The pixel value storage device 5 may be configured as a memory for storing the display data sent from the data receiver 11 to the grouping configuration unit 12 in units of rows. The pixel value storage device 5 is configured to have a capacity capable of storing at least the previous row of data and the current row of data and providing the previous row of data and the current row of data for mapping. In addition, the pixel value storage device 5 can be configured to store display data in units of rows, and provide the previous row data and current row data stored therein for mapping in synchronization with the control and operation of the option information providing unit 9.

The pixel value correction unit 6 corrects the information on the polarity of the previous row data and the current row data based on the information on the polarity of the row data of each channel provided by the packet mapper 4, and provides the arithmetic unit 7 with the corrected polarity. The previous line of data and the current line of data.

The arithmetic unit 7 receives the previous line data and the current line data from the pixel value correction unit 6. The arithmetic unit 7 can perform the following operations: an operation to calculate the data change by mapping the previous row data and the current row data, an operation to determine the display pattern in response to the data change, and calculate the power gain generated by the charge sharing of the current row data Calculation of (Ps) and power loss (Pw), calculation of comparing power gain (Ps) and power loss (Pw), and detection of applying charge sharing to the current row data and not applying charge to the current row data respectively In the case of sharing, the calculation of the maximum change (Lpeak_cs and Lpeak_ncs) in the output of the source driver. The arithmetic unit 7 may perform some operations selected from the operations based on the display pattern, and provide the result of the operation to the option information providing unit 9.

The arithmetic unit 7 may receive information on the polarity of the row data of each channel from the packet mapper 4 for operation, and may perform calculations based on the positive polarity and the negative polarity.

The option information providing unit 9 can control the computing unit 7 to select the operation to be performed according to the display pattern, receive the result of the operation, determine the option information corresponding to the display pattern, and provide the determined option information to the grouping configuration unit 12.

That is, the option information configuration unit 15 can determine the second option information obtained by performing the self-adjusting charge sharing control operation of FIGS. 4 and 5 or the second option information obtained by performing the low power mode control operation of FIGS. 4 and 9 The first option information, and the determined first option information or second option information can be provided to the group configuration unit 12.

The low power mode control operation of FIG. 4 is performed by the packet mapper 4 of FIG. 3. FIG. 4 shows the mapping of information on the polarity of the row data of each channel based on the grouping data (S11) determined according to the grouping type, and executing each channel based on the grouping data after performing the mapping based on the grouping type (S11) Polarity mapping (S12).

The operation of the packet mapper 4 in FIG. 4 is combined with the row data correction step S34 based on the polarity of the channel in the self-adjusting charge sharing control operation of FIG. 5 and the row data based on the polarity of the channel in the low power mode control operation of FIG. 9 In the correction step S73, and steps S34 and S73 will be described later.

If the display pattern is a dynamic pattern, the self-adjusting charge sharing control operation of FIG. 5 is executed.

Briefly describe the self-adjusting charge sharing control operation. The self-adjusting charge sharing control operation includes: correcting the previous row data and the current row data based on the grouping data to each have the polarity mapped for each channel; by mapping and comparing the previous row data and the current row data to calculate the current row data The power gain (Ps) and power loss (Pw) produced by charge sharing; and the power gain (Ps) and power loss (Pw) are compared to determine whether to apply charge sharing to the current row of data.

That is, the second option information according to the self-adjusting charge sharing control process can be understood as information indicating whether to apply charge sharing to the source signal corresponding to the current row of data.

In addition, if the display pattern is a static pattern, the low power mode control operation of FIG. 9 is performed.

Briefly describe the low power mode control operation. Low-power mode control operations include: correcting the previous row data and the current row data to have their respective polarities mapped for each channel based on the grouped data; mapping and comparing the previous row data with the current row data; detecting the common charge applied to the current row data The first maximum change in the output of the source driver 20; and the first maximum change is selected as the first option level. In addition, the low-power mode control operation includes: mapping and comparing the previous row of data with the current row of data; detecting the second largest change in the output of the source driver 20 that does not apply charge sharing to the current row of data; and selecting the second largest change as The second option level.

Thereafter, according to whether charge sharing is applied to the previous row of data, one of the first option level and the second option level is selected as the first option information to be applied to the grouping.

The self-adjusting charge sharing control operation will be described in detail with reference to FIG. 5.

First, if the display pattern is a dynamic pattern, in order to determine whether to apply charge sharing, the timing controller 10 stores the previous row data (N-1 rows) and the current row data (N rows) in the pixel value storage device 5 (S30), and Map the previous row data (N-1 row) and the current row data (N row) (S32).

The display panel 30 is configured with pixels having different formats according to their types. Illustratively, FIG. 6 is a diagram showing the pixel arrangement of the normal type display panel 30. FIG. 7 is a diagram showing the pixel arrangement of the Z-reverse type display panel 30. In FIGS. 6 and 7, Rx series pixels represent red pixels, Bx series pixels represent blue pixels, Gx series pixels represent green pixels, and Du pixels represent virtual pixels.

The timing controller 10 configures the group PKT by sorting the display data according to the type of the display panel 30 so as to arrange the red pixels, blue pixels, and green pixels differently in a row unit.

Therefore, the timing controller 10 calls the information for confirming the specifications of the display panel 30 in order to compare the previous row data (N-1 rows) with the current row data (N rows), and control the pixel value storage device 5 to perform Based on the specifications of the display panel 30, the previous row of data (N-1 rows) and the current row of data (N rows) are reordered and mapped.

Thereafter, the pixel value correction unit 6 corrects the previous row data (N-1 rows) and the current row data (N rows) to be based on the information on the polarity of the row data of each channel provided by the packet mapper 4 Each has a polarity mapped for each channel (S34).

Thereafter, the timing controller 10 controls the arithmetic unit 7 to calculate the power gain (Ps) and power loss (Pw) due to the charge sharing of the current row data by comparing the previous row data with the current row data (S36) . The amount of power gain (Ps) and the amount of power loss (Pw) can be calculated using calculation equations preset in the timing controller 10.

The arithmetic unit 7 may receive information about the polarity of the row data of each channel from the packet mapper 4 for calculation, and may perform the calculation based on the positive polarity and the negative polarity.

As shown in FIG. 8, the source driver 20 according to an embodiment of the present invention may be configured to perform charge sharing for all channels based on a full charge sharing connection. The source driver 20 includes a plurality of channels BF for outputting source signals (Sout). Full charge sharing means that all channels BF are connected in common to perform charge sharing.

In FIG. 8, the switching of the channel BF for charge sharing can be realized by using multiple MOS transistors. Since a plurality of MOS transistors can be configured differently according to the purpose of the manufacturer, detailed examples thereof are omitted.

In the full charge sharing connection structure, the charge sharing voltage can be determined as a level having the average value of the voltage applied to the connected channel.

Each channel BF may be configured to output a voltage having a positive polarity in a voltage range of an intermediate driving voltage (HVDD) or greater, or output a voltage having a negative polarity in a voltage range less than the intermediate driving voltage (HVDD). In addition, each channel BF performs charge sharing while being driven in units of rows. In other words, each channel repeats driving and charge sharing based on pixel data that changes in units of rows.

The channel BF that outputs a voltage with a positive polarity can drive an output in the range of the intermediate driving voltage (HVDD) to the driving voltage (VDD). Channel BF, which outputs a voltage with negative polarity, can drive an output in the range of ground voltage (VSS) to mid-drive voltage (HVDD). In this case, the intermediate driving voltage (HVDD) may be set to a voltage having a level between the driving voltage (VDD) and the ground voltage (VSS).

The charge common voltages with positive and negative polarities applied to all channels BF vary in units of rows, and are determined to have the level of the average value of the voltages applied to all channels BF subjected to the full charge sharing connection. Therefore, the level of the charge sharing voltage may correspond to a positive polarity having an intermediate driving voltage (HVDD) or greater or a negative polarity less than the intermediate driving voltage (HVDD).

In the process of repeated driving and charge sharing, power saving and power consumption can be performed according to the voltage change of the channel BF.

If the voltage of the channel BF is charged by the discharged current when the voltage changes from the driving voltage of the previous row to the charge sharing level or from the charge sharing level to the driving voltage of the next row, it can be understood that power saving is performed on the channel BF. In this case, the power saving can be used to calculate the amount of power gain (Ps) due to charge sharing.

In addition, if power consumption occurs when the voltage of the channel BF changes from the driving voltage of the previous row to the charge sharing voltage or from the charge sharing voltage to the driving voltage of the next row, the power consumption can be used to calculate the amount of power loss due to charge sharing (Pw).

As described above, the timing controller 10 controls the arithmetic unit 7 to calculate the amount of power gain due to the charge sharing of the current line data by comparing the previous line data of all channels BF subjected to the full charge sharing connection with the current line data. (Ps) and power loss (Pw) (S36).

When calculating the power gain (Ps) and the power loss (Pw), the option information providing unit 9 of the timing controller 10 compares the power gain (Ps) and the power loss (Pw) calculated by the arithmetic unit 7, and And check whether the power gain (Ps) is greater than the power loss (Pw) (S38).

Illustratively, the step S38 of checking whether the power gain amount (Ps) is greater than the power loss amount (Pw) may be configured to determine whether the power gain amount (Ps) is greater than the power loss amount (Pw) by a preset offset level or More.

When the power gain (Ps) is equal to or less than the power loss (Pw), the option information providing unit 9 of the timing controller 10 determines not to apply charge sharing to the current row data, determines that the charge sharing is turned off (S42), and limits the corresponding second Option information, and the limited second option information is provided to the group configuration unit 12. Therefore, the group configuration unit 12 configures the group PKT to which the second option information (S44) is applied, and the second option information indicates that charge sharing is not applied to the current row data.

On the contrary, when the power gain (Ps) is greater than the power loss (Pw), the option information providing unit 9 of the timing controller 10 determines to apply charge sharing to the current row data, determines that the charge sharing is turned on (S40), and restricts the corresponding second Option information, and provide the second option information to the group configuration unit 12. Therefore, the group configuration unit 12 configures the group PKT to which the second option information (S44) is applied, and the second option information indicates that charge sharing will be applied to the current row data.

As described above, if the display pattern is a dynamic pattern, the timing controller 10 can generate second option information indicating whether the charge sharing is applied to the corresponding current The source signal of the row data can be provided to the source driver 20 with the packet PKT to which the second option information is applied.

The source driver 20 performs self-adjusting charge sharing on the source signal based on the second option information indicating that charge sharing is to be performed, so as to reduce power consumption, and normally outputs the source signal based on the second option information indicating that charge sharing is not to be performed, without performing Self-adjusting charge sharing.

The low power mode control operation will be specifically described with reference to FIG. 9.

As shown in FIG. 9, if the display pattern is a static pattern, the timing controller 10 may perform a low power mode control operation to reduce power consumption by controlling the amount of current output by the source driver 20.

If the display pattern is a static pattern, the timing controller 10 stores the previous row data (N-1 rows) and the current row data (N rows) in the pixel value storage device 5 (S70), and maps the previous row data (N-1 Row) and the current row data (N rows) (S72).

The timing controller 10 configures the group PKT by sorting the display data according to the type of the display panel 30 so as to arrange the red pixels, blue pixels, and green pixels differently in a row unit.

Therefore, the timing controller 10 calls the information for confirming the specifications of the display panel 30 in order to compare the previous row data (N-1 rows) with the current row data (N rows), and control the pixel value storage device 5 to perform Based on the specifications of the display panel 30, the previous row of data (N-1 rows) and the current row of data (N rows) are reordered and mapped.

Thereafter, the pixel value correction unit 6 corrects the previous row data (N-1 rows) and the current row data (N rows) to be based on the information on the polarity of the row data of each channel provided by the packet mapper 4 Each has a polarity mapped for each channel (S73).

If the display pattern is a static pattern, the timing controller 10 checks the change of the output of the source driver 20 with respect to the current line data, and executes the low power mode control process of determining the first option information suitable for the largest change.

10, the first option information is indicated as PWRC, and can be changed to "HHH", "LHH" or "LLL".

The first option information can be determined based on the row data with the static pattern, so as to control the amount of current within the range where the output of the source driver 20 can be maintained.

As shown in FIG. 11, the first option information PWRC can be determined to be included in the range that satisfies the time required to drive the screen and the minimum level (min level), and can be set in units of line data to reduce the amount of current. In other words, the first option information can be determined based on the current row data, so as to reduce the amount of current within the range of maintaining the output voltage based on the previous row data.

To this end, the timing controller 10 controls the arithmetic unit 7 to compare the previous row of data with the current row of data.

The arithmetic unit 7 of the timing controller 10 detects the first largest change (Lpeak_cs) as an absolute value in the output of the source driver 20 applying charge sharing to the current row data by comparing the previous row data with the current row data, and The second largest change (Lpeak_ncs) as an absolute value in the output of the source driver 20 that does not apply charge sharing to the current row data is detected by comparing the previous row data with the current row data (S74).

The arithmetic unit 7 of the timing controller 10 selects the first maximum change (Lpeak_cs) and the second maximum change (Lpeak_ncs) detected as described above as the first option level and the second option level, respectively, and determines that they correspond to the first option level respectively. The control options (PWRCcs and PWRCncs) of the first option level and the second option level (S76).

Thereafter, the option information providing unit 9 of the timing controller 10 checks whether charge sharing has been applied to the previous row of data (S78).

If charge sharing has been applied to the previous row of data, the option information providing unit 9 of the timing controller 10 selects the control option (PWRCcs) as the first option information (PWRC) (80), and provides the first option information (PWRC) Give the grouping configuration unit 12. The packet PKT can be configured by applying the first option information (PWRC) to the packet PKT (S84).

On the contrary, if charge sharing has not been applied to the previous row of data, the option information providing unit 9 of the timing controller 10 selects the control option (PWRCncs) as the first option information (PWRC) (S82), and sets the first option information (PWRC) ) Provided to the grouping configuration unit 12. The packet PKT can be configured by applying the first option information (PWRC) to the packet PKT (S84).

If the display pattern is a static pattern, the timing controller 10 controls the amount of current used for the output of the source driver 20 through the low power mode control operation, thereby performing control for reducing power consumption.

The timing controller 10 can reduce the power consumption of the source driver 20 by performing the self-adjusting charge sharing control operation of FIG. 4 and the low power mode control operation of FIG. 9 for each row of data units.

The timing controller 10 can perform the low-power mode control process by considering each of the output buffer, the gamma buffer, and the intermediate drive voltage buffer, and can generate a control process for controlling the output buffer, the gamma buffer, and the intermediate drive voltage buffer. The individual option information of the drive voltage buffer, and the individual option information can be applied to the packet PKT.

Therefore, since the output buffer, the gamma buffer, and the intermediate driving voltage buffer are controlled based on the corresponding option information, the source driver 20 can be controlled to reduce the total current consumption.

With the above-mentioned configuration and operation of the embodiment, the present disclosure can support source drivers using various charge sharing methods (for example, full charge sharing connection), and provide a method for correcting the polarity of row data based on the packet type and packet data. Option to freely reduce power consumption regarding polarity.

With the above configuration and operation, the present disclosure can reduce the power consumption of the source driver 20 by identifying the display pattern by the timing controller 10 and sending option information corresponding to the identified display pattern to the source driver 20.

In addition, the present disclosure may perform charge sharing control on the output of the source driver 20 or on at least one of an output buffer, a gamma buffer, and an intermediate driving voltage (HVDD) buffer by performing charge sharing control on the output of the source driver 20 based on the option information corresponding to the display pattern Perform current control to reduce power consumption.

The effect of the present disclosure is that it can support source drivers that use various charge sharing methods (such as full charge sharing connection), and provide a method for freely reducing the polarity of the source driver by correcting the polarity of the row data based on the packet type and the packet data. Power consumption options.

The effect of the present disclosure is that it can reduce the power consumption of the source driver by identifying the display pattern by the timing controller and sending option information corresponding to the identified display pattern to the source driver.

In addition, the effect of the present disclosure is that it is possible to perform charge sharing control on the output of the source driver based on the option information corresponding to the display pattern or to perform the charge sharing control on the output buffer, the gamma buffer, and the intermediate driving voltage (HVDD) buffer. At least one performs current control to reduce power consumption.

Although various embodiments have been described above, those skilled in the art will understand that the described embodiments are only exemplary. Therefore, the disclosure described herein should not be limited based on the described embodiments.

2: Packet receiver

4: packet mapper

5: Pixel value storage device

6: Pixel value correction unit

7: arithmetic unit

9: Option information provision unit

10: Timing controller

11: data receiver

12: Group configuration unit

13: Group output unit

15: Option information configuration unit

20: source driver

30: display panel

40: memory

B0: blue pixel

B1: blue pixel

B2: blue pixel

B3: blue pixel

B4: blue pixel

B5: blue pixel

BF: Channel

Du: virtual pixel

G0: Green pixel

G1: Green pixels

G2: Green pixels

G3: Green pixels

G4: Green pixels

G5: Green pixels

HVDD: Intermediate drive voltage

PKT: grouping

PWRC: First option information

R0: red pixel

R1: red pixel

R2: Red pixel

R3: Red pixels

R4: Red pixels

R5: Red pixels

S10: steps

S11: steps

S12: steps

S20: steps

S22: Step

S23: Step

S30: steps

S32: Step

S34: Step

S36: Step

S38: Step

S40: Step

S42: Step

S44: Step

S70: Step

S72: Step

S73: Step

S74: Step

S76: Step

S78: Step

S80: steps

S82: Step

S84: Step

Sout: source signal

VSS: Ground voltage

FIG. 1 is a block diagram showing a low-power driving system for a display device according to an embodiment of the present disclosure.

FIG. 2 is a flowchart showing a low-power driving method according to the embodiment of FIG. 1.

Fig. 3 is a block diagram of the timing controller shown in Fig. 1.

Fig. 4 is a flowchart showing the operation of the packet mapper shown in Fig. 3.

Fig. 5 is a flowchart showing a self-adjusting charge sharing control operation.

6 and 7 are exemplary illustrations of the panel structure.

FIG. 8 is a block diagram describing a full charge sharing connection applied to an embodiment of the present disclosure.

FIG. 9 is a flowchart showing the operation of controlling the low power mode.

FIG. 10 is a waveform diagram describing the operation of controlling the low power mode according to the output level of the source driver.

FIG. 11 is a graph showing the slope of the output change of the source driver according to time corresponding to the option information.

10: Timing controller

20: source driver

30: display panel

40: memory

PKT: grouping

Sout: source signal

Claims (14)

A low-power driving system for a display device, including: The timing controller is configured to receive grouping data for correcting the polarity of the row data based on the grouping type of the source driver, correcting the polarity of the previous row data and the current row data based on the grouping data, and based on the previous row data and the The difference between the current row data divides the display pattern into a static pattern and a dynamic pattern, and sends a packet to which one of the first option information and the second option information is applied, wherein the first option information corresponds to the static pattern , The second option information corresponds to the dynamic pattern; and The source driver is configured to receive the packet and execute a low power mode corresponding to the static pattern based on the first option information, or execute a self corresponding to the dynamic pattern based on the second option information Adjust charge sharing. The low-power drive system according to claim 1, wherein the timing controller: Calculate the amount of power gain and power loss due to the charge sharing of the current row of data based on the comparison result between the previous row of data and the current row of data, and Based on the comparison result between the power gain amount and the power loss amount, the second option information on whether to apply charge sharing to the current row data is provided. The low-power drive system according to claim 2, wherein the timing controller: When the power gain amount is equal to or less than the power loss amount, the second option information for turning off charge sharing is provided for the current row data, and When the power gain amount is greater than the power loss amount, the second option information for enabling charge sharing is provided for the current row data. The low-power driving system according to claim 2, wherein the timing controller performs processing on the previous row data and the current row data with respect to all channels of the source driver subjected to full charge sharing connection. Comparing and calculating the power gain amount and the power loss amount due to the charge sharing of the current row data. The low-power driving system according to claim 2, wherein the source driver performs the self-adjusting charge sharing based on the second option information, so as to selectively share the source signal corresponding to the current row data Perform charge sharing. The low-power drive system according to claim 1, wherein the timing controller: Based on the comparison result between the previous row of data and the current row of data, calculate the first maximum change in the output of the source driver that applies charge sharing to the current row of data and the current row of data is not applied to the current row of data. The second largest change in the output of the source driver applying charge sharing, and According to whether charge sharing is applied to the previous row of data, a change selected from the first maximum change and the second maximum change is provided as the first option information. The low-power drive system according to claim 6, wherein the timing controller: If the charge sharing is applied to the previous row of data, the first maximum change is provided as the first option information, and If charge sharing is not applied to the previous row of data, the second maximum change is provided as the second option information. The low-power drive system according to claim 6, wherein the source driver executes the low-power mode, and in the low-power mode, based on the first maximum change provided as the first option information And the second maximum change to reduce the amount of current used to maintain the output of the current line of data. The low-power drive system according to claim 1, wherein: The timing controller provides the first option information including information for distinguishing the output buffer, the gamma buffer, and the intermediate driving voltage buffer, and The source driver performs a low power mode on one buffer selected among the output buffer, the gamma buffer, and the intermediate driving voltage buffer based on the first option information. A timing controller for a display device, including: The pixel value storage device is configured to store the previous row data and the current row data, and provide the previous row data and the current row data for mapping; A packet receiver configured to receive the packet type of the source driver and the packet data for correcting the polarity of the line data based on the packet type; A packet mapper configured to map information about the polarity of the row data based on the packet type and the packet data; A pixel value correction unit configured to correct the information about the polarity of the previous row of data and the current row of data based on the information about the polarity; An arithmetic unit configured to receive the previous row data and the current row data from the pixel value correction unit, and calculate the current row based on the comparison result between the previous row data and the current row data The amount of power gain and the amount of power loss generated by the charge sharing of the data, or calculating the first maximum change in the output of the source driver that applies charge sharing to the current line of data and the charge is not applied to the current line of data The second largest change in the output of the shared source driver; and The option information providing unit is configured to, if the display pattern is a dynamic pattern, based on the comparison result between the power gain amount and the power loss amount, provide a second information on whether to apply the charge sharing to the current row data Option information, and if the display pattern is a static pattern, according to whether the charge sharing is applied to the previous row of data, a change selected from the first maximum change and the second maximum change is provided as the first One option information. The timing controller according to claim 10, further comprising a group configuration unit configured to configure a group including display data and control data, Wherein, the group configuration unit applies the first option information for low-power mode or the second option information for self-adjusting charge sharing to the control data, and in the low-power mode, reduce In order to maintain the current amount of the output of the source driver for maintaining the current row of data, in the self-adjusting charge sharing, charge sharing is selected for the current row of data. The timing controller according to claim 10, wherein the arithmetic unit: Optionally perform the following operations: calculating the first operation of the data change between the previous row of data and the current row of data, calculating the power gain and power loss due to the charge sharing of the current row of data The second operation of the amount of power, the third operation of comparing the amount of power gain with the amount of power loss, and if the charge sharing is applied to the current row data, detecting that the output of the source driver And a fourth operation that detects the second largest change in the output of the source driver if the charge sharing is not applied to the source driver, Sequentially execute the first operation, the second operation, and the third operation according to the dynamic pattern, and The first operation and the fourth operation are sequentially performed according to the static pattern. The timing controller according to claim 10, wherein, if the display pattern is the dynamic pattern, when the power gain amount is equal to or less than the power loss amount, the option information providing unit is the The current row data provides the second option information for turning off charge sharing, and when the power gain amount is greater than the power loss amount, the option information providing unit provides the current row data for turning on charge sharing Of the second option information. The timing controller according to claim 10, wherein the option information providing unit: If the charge sharing is applied to the previous row of data, the first maximum change is provided as the first option information, and If the charge sharing is not applied to the previous row of data, the second maximum change is provided as the second option information.

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