TW202021117A - Input sensing unit and display apparatus including the same - Google Patents

Abstract

An input sensing unit includes a plurality of first electrodes, each of which including a plurality of first main patterns and a plurality of connection patterns disposed between the first main patterns to connect two first main patterns adjacent to each other, a plurality of second electrodes each of which including a plurality of second main patterns and a plurality of connection patterns disposed between the second main patterns to connect two second main patterns adjacent to each other, and a plurality of third electrodes receiving an electrical signal that is different from that received by the second electrode. Each of the third electrodes includes a plurality of third main patterns spaced apart from the second sensing patterns in a plan view and a plurality of third connection patterns disposed between the third main patterns to connect two third main patterns adjacent to each other and spaced apart from the first connection patterns in a plan view.

Description

Input sensing unit and display device including the same

Cross-reference for related applications

This case claims the priority and benefits of the Korean Patent Application No. 10-2018-0109298 filed on September 12, 2018 and the Korean Patent Application No. 10-2018-0129178 filed on October 26, 2018, based on all The purpose is to introduce the entire contents here for reference.

Exemplary embodiments of the present invention generally relate to an input sensing unit and a display device including the same, and more particularly, to an input sensing unit having improved electrical reliability and a display device including the same.

Various electronic devices currently used in multimedia devices, such as televisions, mobile phones, desktop computers, navigation equipment, and game consoles, are already under development. Such an electronic device may include a keyboard or a mouse as an input unit. The electronic device may also include a display device. Such a display device generally includes a display unit as an output device and an input sensing unit as an input device.

The above information disclosed in this technical background section is only for the background of understanding the concept of the present invention, and therefore may include information that does not constitute prior art.

Exemplary embodiments of the present invention provide an input sensing unit with improved external input sensitivity and a display device including the same.

Additional features of the inventive concept will be described below, and will become apparent in part from the description, or learned through practice of the present invention.

An exemplary embodiment of the inventive concept provides an input sensing unit including: a plurality of first electrodes arranged in a first direction and extending in a second direction crossing the first direction respectively, and including arranged in a second A plurality of first main patterns in the direction, and a plurality of connection patterns provided between the plurality of first main patterns to connect the two first main patterns adjacent to each other; the plurality of second electrodes, arranged in the second direction And each extends along the first direction, and includes a plurality of second main patterns arranged in the first direction, and a plurality of connections disposed between the plurality of second main patterns to connect two adjacent second main patterns A pattern; and a plurality of third electrodes, arranged in the second direction, each extending in the first direction and receiving an electronic signal different from the signal received by the second electrode. Each third electrode includes: a plurality of third main patterns, arranged in the first direction and spaced apart from the plurality of second main patterns in plan view; and a plurality of connection patterns, disposed between the plurality of third main patterns to Two third main patterns adjacent to each other are connected, and are spaced apart from the plurality of first connection patterns in plan view.

The plurality of first connection patterns and the plurality of second connection patterns may be disposed on different layers from each other.

The plurality of third connection patterns and the plurality of first connection patterns may be disposed on the same layer.

The plurality of second main patterns and the plurality of third main patterns may be disposed on the same layer and spaced apart from each other in plan view.

Each second main pattern may be defined with an opening, and a plurality of third main patterns may be respectively disposed in the openings.

The plurality of third connection patterns and the plurality of first main patterns may be disposed on different layers from each other.

Each third connection pattern may overlap at least a portion of the plurality of first electrodes in plan view, respectively.

Each third main pattern may include: a central portion; and a branch portion connected to one side of the central portion and protruding from the central portion in the first direction; wherein a plurality of third connection patterns may be respectively connected to the branch portions.

The branch parts may be provided in plural to be respectively provided on both sides of the central part.

The branch portion may have a long shape extending along the first direction.

The branch portion may have a zigzag shape extending in the first direction.

The plurality of second connection patterns and the plurality of third connection patterns may have different shapes from each other.

Each third connection pattern may include a plurality of sub-connection patterns arranged in the second direction and connected to the same third main pattern.

Each first connection pattern may be connected to each first main pattern to form a whole.

Each of the first to third main patterns may include a plurality of grid lines.

Each third connection pattern may extend along a plurality of grid lines, respectively.

The plurality of first connection patterns and the plurality of third main patterns may not overlap each other.

The plurality of third connection patterns may overlap the first electrode and the second electrode in plan view.

Each third electrode can receive a ground voltage.

Another exemplary embodiment of the present inventive concept provides a display device including: a display unit including a plurality of pixels configured to display an image; and an input sensing unit configured to overlap the plurality of pixels and including receiving A first electrode, a second electrode, and a third electrode of mutually different electronic signals, each of the first electrode, the second electrode, and the third electrode includes: a plurality of main patterns arranged at intervals from each other; and a plurality of connection patterns, It is arranged between a plurality of main patterns to connect two main patterns adjacent to each other. The connection pattern of the third electrode and the connection pattern of the first electrode are spaced apart from each other in plan view.

The connection pattern of the first electrode and the connection pattern of the third electrode may be disposed on the same layer.

The connection pattern of the first electrode and the main pattern of the first electrode may be disposed on different layers; and the connection pattern of the third electrode and the main pattern of the third electrode are disposed on different layers.

The main pattern of the third electrode may be spaced apart from the main pattern of the first electrode in plan view.

The connection pattern of the first electrode and the connection pattern of the second electrode may be disposed on different layers from each other.

In a plan view, the connection pattern of the first electrode and the connection pattern of the third electrode may overlap with the main pattern of the first electrode.

The main pattern of the second electrode and the main pattern of the third electrode may be arranged in the same direction.

The main patterns of the second electrode are respectively defined with predetermined openings; and the main patterns of the third electrode can be respectively disposed in the openings.

Each main pattern may include a plurality of grid lines, respectively.

The connection pattern of the third electrode may extend along a plurality of grid lines, respectively.

Each pixel may include an organic light-emitting element or a quantum dot light-emitting element.

The third electrode may be configured to receive the ground voltage.

It should be understood that the foregoing brief description and the following detailed description are exemplary and descriptive, and are intended to provide further description of the claimed invention.

In the following description, for the purpose of explanation, many specific details are set forth in order to provide a thorough understanding of various exemplary embodiments. Herein, the term "embodiments" is a non-limiting example of an apparatus or method applied to one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments can be practiced without these specific details or with one or more equivalent arrangements. In other instances, conventional structures and devices are shown in block diagram form in order to prevent unnecessarily obscuring the various exemplary embodiments. Further, various exemplary embodiments may be different, but need not be exclusive. For example, the specific shapes, configurations, and features of the exemplary embodiments may be used or implemented in another exemplary embodiment without departing from the inventive concept.

Unless otherwise stated, the illustrated exemplary embodiments should be understood as exemplary features that provide details of changes in some methods of actually implementing the inventive concept. Therefore, unless otherwise stated, the features, components, modules, layers, films, panels, regions, and/or aspects of various embodiments (hereinafter referred to individually or collectively as "elements") may be made without departing from the invention Under the concept of other ways to combine, separate, interchange and/or rearrange.

Cross-hatching and/or shading are often used in the drawings to clarify the boundary between adjacent elements. Therefore, no matter whether there is a cross line or a shadow, it cannot convey or indicate the specific materials, material properties, dimensions, proportions and common points between the elements shown, and/or any other properties or attributes in the elements Preferences, requirements, etc., unless otherwise stated. Further, in the drawings, the size and relative sizes of elements may be exaggerated for clarity and/or descriptive purposes. Therefore, the size and relative size of each element are not necessarily limited to those shown in the drawings. When the exemplary embodiments may be implemented differently, a specific processing order may be performed differently from the described order. For example, two consecutively described processes can be performed substantially simultaneously or in a reverse order to that described. In addition, the same element symbol indicates the same element.

When an element like a layer is said to be "on", "connected to" or "coupled to" another element, it can be directly On another element, connected to or coupled to another element, or there may be an intermediate element. However, when an element is referred to as "directly on", "directly connected to" or "directly coupled to" another element, there is no intermediate element. Further, the term "connected" may refer to the presence or absence of physical, electrical, and/or fluid connections of intermediate elements. In addition, the D1 axis, D2 axis, and D3 axis are not limited to the three axes of the rectangular coordinate system such as the x, y, and z axes, but can be interpreted broadly. For example, the D1 axis, D2 axis, and D3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purposes of the present invention, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as X only, Y only, Z only, Or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Although the terms "first", "second", etc. are used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, the first element discussed below may be referred to as the second element without departing from the teachings of the present invention.

For descriptive purposes, in this article you can use things like "beneath", "below", "under", "lower", "above", "above" (upper), "over", "higher", "side (for example, in the side wall)" and similar spatial relative terms, and therefore, to describe as shown in the drawings The relationship between one element and another element (or multiple elements). Spatially relative terms are intended to cover different orientations of the device in use, operation, and/or manufacture in addition to the orientation depicted in the drawings. For example, if the device in the drawings is turned over, elements described as "below" or "beneath" under other elements or features will be oriented "Above". Therefore, the exemplary term "below" may include both an orientation above and below. Still further, the device may be oriented in other ways (eg, rotated 90 degrees or in other orientations), and therefore, the spatial relative descriptors used herein are interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a", "ab" and "the" are also intended to include plural forms unless the context clearly indicates otherwise. In addition, when used in this specification, the terms "comprises," "comprising," "includes," and/or "including" specify the existence of the features, integers, steps, operations , Elements, components, and/or groups thereof, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It should also be noted that in this article, the terms "substantially", "about" and other similar terms are used as similar terms rather than degree terms, and therefore are used to explain what can be used in the technical field Have the inherent errors, measurements, calculations, and/or values provided by those with ordinary knowledge.

Various exemplary embodiments are described herein with reference to cross-sectional views, isometric views, perspective views, plan views, and/or exploded views, which are schematic diagrams of idealized exemplary embodiments and/or intermediate structures. Therefore, changes in the illustrated shape caused by, for example, manufacturing techniques and/or tolerances can be expected. Therefore, the exemplary embodiments disclosed herein should not be construed as being limited to the specifically drawn shapes of the regions, but should include shape deviations caused by manufacturing, for example. For this reason, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and therefore, are not intended to be limiting.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those with ordinary knowledge in the technical field to which this disclosure belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with those in the relevant technical field, and will not be interpreted in idealized or overly formal meanings unless clearly defined here.

FIG. 1 is a perspective view of a display device according to an embodiment of the inventive concept. Referring to FIG. 1, the display device DD can display an image through the front surface IS. The front surface IS is parallel to the plane defined by the first direction axis DR1 and the second direction axis DR2.

The normal direction of the front surface IS, that is, the thickness direction of the display device DD is represented as the third direction axis DR3. The front surface (or top surface) and rear surface (or bottom surface) of each element or unit described later are distinguished by the third direction axis DR3. However, the first to third direction axes illustrated in this exemplary embodiment are only examples. Hereinafter, the first to third directions may be referred to by the first to third direction axes DR1, DR2, and DR3, respectively, and denoted by the same reference symbols.

Although the display device DD illustrated in an exemplary embodiment of the inventive concept has a flat front surface IS, the inventive concept is not limited thereto. The display device DD may include a curved front surface or a solid front surface. The solid front surface may contain a plurality of display areas pointing in different directions. For example, the solid front surface may include a polygonal cylindrical front surface.

The display device DD according to the present exemplary embodiment may be a rigid display device. However, the concept of the present invention is not limited to this. For example, the display device DD according to the inventive concept may be a flexible display device DD. According to this exemplary embodiment, the display device DD applicable to the mobile terminal is exemplarily illustrated.

Although not shown in FIG. 1, the electronic module, camera module, power module and the like mounted on the main board can be installed on the stand/housing together with the display device DD to constitute a mobile terminal. The display device DD according to the concept of the present invention can be applied to large electronic devices such as televisions and screens, as well as medium-sized electronic devices such as tablet computers, navigation units of vehicles, game consoles, and smart watches.

Referring to FIG. 1, the front surface IS of the display device DD includes an active area AA and a peripheral area NAA adjacent to the active area AA. In this exemplary embodiment, the active area AA may be an area where the image IM is displayed, and also an area where the external input TC is sensed.

The image IM includes still images and moving images. FIG. 1 shows an icon image as an example of the image IM.

The external input TC includes user input applied from the outside. The user's input includes various external inputs, such as through a part of the user's body, light, heat, pressure, or the like. In this exemplary embodiment, the user's input is depicted as input applied by the user's hand to the front surface IS.

However, this is only an example. For example, the display device DD may sense the user's input applied to the side or rear surface of the display device DD. Here, the active area AA may be extended to the side or rear surface of the display device DD. The display device DD according to the concept of the present invention may be designed to have various shapes, but is not limited to specific embodiments.

The peripheral area NAA is an area where the image IM is not displayed, or an area where external input is not sensed even if an electronic signal is applied. As shown in FIG. 1, the active area AA may have a rectangular shape. The peripheral area NAA may surround the active area AA. However, the concept of the present invention is not limited to this. For example, the active area AA and the peripheral area NAA are designed differently from each other.

2A to 2D are cross-sectional views of a display device according to an exemplary embodiment of the inventive concept. FIGS. 2A to 2D illustrate cross sections defined by the second direction axis DR2 and the third direction axis DR3. FIGS. 2A to 2D are schematic drawings for explaining the stacking relationship of the functional panels and/or functional units constituting the display device DD.

The display device DD according to an exemplary embodiment of the inventive concept may include a display unit, an input sensing unit, an anti-reflection unit, and a window. At least a part of the display unit, the input sensing unit, the anti-reflection unit, and the window can be formed through a continuous process, and at least a part of the display unit, the input sensing unit, the anti-reflection unit, and the window can be coupled to each other through the adhesive element. Figures 2A to 2D show an optical transparent adhesive OCA as an adhesive element. Hereinafter, the adhesive element may include a general adhesive or adhesive. In the concept of the present invention, the anti-reflection unit and the window can be replaced with different components or completely omitted.

In FIGS. 2A to 2D, the components corresponding to the input sensing unit, the anti-reflection unit, and the window formed by the continuous process relative to other components can be represented as “layers”. The components of the input sensing unit, the anti-reflection unit, and the window that are coupled to other components through the adhesive component can be expressed as "panels." The "panel" may include a base layer that provides a base surface, for example, a synthetic film, a composite material film, a glass substrate, and the like, but the base layer may be omitted in the "layer". That is to say, the unit represented as "layer" can be provided on the base surface provided by other units.

The display unit, input sensing unit, anti-reflection unit, and window may be referred to as a display panel DP, input sensing panel ISP, anti-reflection panel RPP, and window panel WP, or display panel DP, input sensing layer ISL, anti-reflection Layer RPL and window layer WL.

As shown in FIG. 2A, the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection panel RPP, and a window panel WP. The input sensing layer ISL is directly disposed on the display panel DP. In the present disclosure, "the component B is directly disposed on the component A" may mean that no separate adhesive layer/adhesive element is provided between the component A and the component B. Component B can be formed on the base surface provided by component A through a continuous process after component A is formed.

The display panel DP and the input sensing layer ISL directly disposed on the display panel DP can be defined as the display module DM. The optical transparent adhesive OCA is disposed between the display module DM and the anti-reflection panel RPP and between the anti-reflection panel RPP and the window panel WP.

The display panel DP generates an image, and the input sensing layer ISL obtains coordinate information of external input (eg, touch event). Although not separately shown, the display module DM according to the concept of the present invention may further include a protection element provided on the bottom surface of the display panel DP. The protection element and the display panel DP may be coupled to each other through the adhesive element. The display device DD of FIGS. 2B to 2D described below may further include a protection element.

The display panel DP according to an exemplary embodiment of the inventive concept may be a light-emitting display panel, but it is not limited thereto. For example, the display panel DP may be an organic light-emitting display panel or a quantum dot light-emitting display panel. The organic light emitting display panel may include an organic light emitting material. The light emitting layer of the quantum dot light emitting display panel may include quantum dot light emitting elements, such as quantum dots, quantum rods and the like. Hereinafter, the display panel DP may be described as an organic light-emitting display panel.

The anti-reflection panel RPP reduces the reflectance of external light incident from the window panel WP. The anti-reflection panel RPP according to an exemplary embodiment of the inventive concept may include a retarder and a polarizer. The retarder may be a film type or liquid crystal coating type retarder, and may include a λ/2 retarder and/or a λ/4 retarder. The polarizing plate may also be a film type or liquid crystal coating type polarizing plate. The film type may contain an elongated synthetic resin, and the liquid crystal coating type may contain liquid crystals in a predetermined arrangement. The retardation plate and the polarizing plate may each further include a protective film. The retarder and polarizer itself or the protective film may be defined as the base layer of the anti-reflection panel RPP.

The anti-reflection panel RPP according to an exemplary embodiment of the inventive concept may include a color filter. The color filters may have a predetermined arrangement. The color filters may be arranged according to the color of light emitted by pixels provided in the display panel DP. The anti-reflection panel RPP may further include a black matrix adjacent to the color filter.

The anti-reflection panel RPP according to an exemplary embodiment of the inventive concept may include a destructive interference structure. For example, the destructive interference structure includes a first reflective layer and a second reflective layer provided on different layers from each other. Since the first reflected light and the second reflected light reflected from the first reflective layer and the second reflective layer, respectively, can destructively interfere, the reflectance of external light can be reduced.

The window panel WP according to an exemplary embodiment of the inventive concept includes a base layer WP-BS and a photoresist pattern WP-BZ. The base layer WP-BS may include a glass substrate and/or a synthetic film. The base layer WP-BS is not limited to a single layer. The base layer WP-BS may include two or more layers of films coupled to each other through an adhesive element.

The photoresist pattern WP-BZ partially overlaps with the base layer WP-BS. The photoresist pattern WP-BZ is provided on the rear surface of the base layer WP-BS, and particularly corresponds to the peripheral area NAA of the display device DD. The area where the photoresist pattern WP-BZ is not provided may correspond to the active area AA of the display device DD.

The photoresist pattern WP-BZ may be a color organic film, for example, formed by coating. Although not shown, the window panel WP may further include a functional coating provided on the entire surface of the base layer WP-BS. The functional coating may include an anti-fingerprint layer, an anti-reflection layer, a hard coating layer, and the like. Hereinafter, referring to FIGS. 2B to 2D, the window panel WP and the window layer WL will be simply shown without distinguishing the base layer WP-BS and the photoresist pattern WP-BZ.

As shown in FIGS. 2B and 2C, the display device DD may include a display panel DP, an input sensing panel ISP, an anti-reflection panel RPP, and a window panel WP. The stacking order of the input sensing panel ISP and the anti-reflection panel RPP can be changed.

As shown in FIG. 2D, the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection layer RPL, and a window layer WL. The adhesive element can be omitted from the display device DD, and the input sensing layer ISL, the anti-reflection layer RPL, and the window layer WL can be formed on the base surface provided on the display panel DP through a continuous process. The stacking order of the input sensing layer ISL and the anti-reflection panel RPP can be changed.

3A and 3B are cross-sectional views of a part of a display device DD according to an exemplary embodiment of the inventive concept. The display panel DP may correspond to a display unit described later. In this exemplary embodiment, "one area corresponds to another area" may mean that these areas overlap each other and have the same surface area, but the description is not limited thereto. The above will be described in detail later.

As shown in FIG. 3A, the display panel DP may include a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and an upper insulating layer TFL.

The display area AA1 and the non-display area NAA1 may be defined on the display panel DP. The display area AA1 may be an area where the image IM is displayed, and the non-display area NAA1 may be an area where the image IM is not displayed. The display area AA1 and the non-display area NAA1 may be provided to correspond to the active area AA and the peripheral area NAA of FIG. 1. In this exemplary embodiment, "a region corresponds to another region" may mean that the regions overlap each other and have the same surface area, but it is not limited thereto.

The base layer BL may include at least one plastic film. The base layer BL may include a plastic substrate, a glass substrate, a metal substrate, and an organic/inorganic composite substrate.

The circuit element layer DP-CL includes at least an intermediate insulating layer and circuit elements. The intermediate insulating layer includes at least one intermediate inorganic film and at least one intermediate organic film. Circuit elements include signal lines, pixel drive circuits, and the like. The above will be described in detail later.

The display element layer DP-OLED may include organic light-emitting diodes. The display element layer DP-OLED may further include an organic film, such as a pixel definition layer.

The upper insulating layer TFL may include a plurality of thin films. A part of the thin films may be provided to improve light efficiency, and other parts of the thin films may be provided to protect the organic light emitting diode. The upper insulating layer TFL will be described in detail later.

As shown in FIG. 3B, the display panel DP may include a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, an encapsulation layer ES, and coupling the base layer BL to the encapsulation layer ES Sealant SM. The encapsulation layer ES may be spaced apart from the display element layer DP-OLED by a predetermined gap GP. Each base layer BL and encapsulation layer ES may include a plastic substrate, a glass substrate, a metal substrate, and an organic/inorganic composite substrate, respectively. The sealant SM may contain an organic adhesive element or a frit.

FIG. 4 is a plan view of a display unit according to an embodiment of the inventive concept. FIG. 5A is an enlarged cross-sectional view of a display unit according to an embodiment of the inventive concept. FIG. 5B is an enlarged cross-sectional view of an upper insulating layer according to an embodiment of the inventive concept. The display unit DPU of FIGS. 4 and 5A will be described based on the display panel DP of FIG. 3A.

As shown in FIG. 4, the display unit DPU may include a driving circuit GDC, a plurality of signal lines SGL (hereinafter referred to as signal lines), a plurality of signal pads DPD (hereinafter referred to as signal pads), and a plurality of pixels PX (below (Referred to as pixels in the text).

The display area AA1 may be defined as an area where pixels PX are set. Each pixel PX includes an organic light emitting diode and a pixel driving circuit connected to the organic light emitting diode. The circuit element layer DP-CL in FIGS. 3A and 3B may include a driving circuit GDC, a signal line SGL, a signal pad DPD, and a pixel driving circuit.

The driving circuit GDC may include a scan driving circuit. The scan driving circuit generates a plurality of scan signals to sequentially output the scan signals to the plurality of scan lines GL described later. The scan driving circuit may further output other control signals to the driving circuit of each pixel PX.

The scan driving unit may include a plurality of thin film transistors produced through the same process as the driving circuit of the pixel PX, for example, a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

The signal line SGL includes a scanning line GL, a data line DL, a power line PL, and a control signal line CSL. The scanning lines GL are respectively connected to corresponding pixels in the pixels PX, and the data lines DL are respectively connected to corresponding pixels in the pixels PX. The power line PL is connected to the pixel PX. The control signal line CSL can provide a control signal to the scan driving circuit.

The signal line SGL overlaps the display area AA1 and the non-display area NAA1. The signal line SGL may include a pad part and a line part. The line portion overlaps the display area AA1 and the non-display area NAA1. The pad part is an end connected to the wire part. The pad portion is disposed on the non-display area NAA1 to overlap with the corresponding signal pad in the signal pad DPD. The area where the signal pad DPD is set in the non-display area NAA1 may be defined as the pad area DP-PA. The pad area DP-PA can be connected to a circuit board (not shown).

In essence, the line portion connected to the pixel PX may constitute most of the signal line SGL. The line portion is the transistors TR1 and TR2 connected to the pixel PX (see FIG. 5A). The wire part may have a single/multi-layer structure. The line part may be a whole or include two or more parts. Two or more parts may be provided on different layers from each other and connected to each other, and a contact hole may pass through the insulating layer provided between the two parts.

FIG. 5A shows a partial cross section of the display panel DP corresponding to the transistors TR1 and TR2 and the light emitting element ELD. The circuit element layer DP-CL disposed on the base layer BL includes at least one insulating layer and circuit elements. The circuit element includes the signal line of the pixel and the drive circuit. The circuit element layer DP-CL can be formed through a process of forming an insulating layer, a semiconductor layer and a conductive layer by coating or deposition, and a process of patterning the insulating layer, a semiconductor layer and a conductive layer by a photolithography process.

In this exemplary embodiment, the circuit element layer DP-CL may include a buffer layer BFL, a first intermediate inorganic layer 10 as an inorganic layer, a second intermediate inorganic layer 20, and an intermediate organic layer 30 as an organic layer. The buffer layer BFL may include a plurality of inorganic layers. FIG. 5A illustrates the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, the first control electrode GE1, and the second control constituting the transistor TR1 (which is a switching transistor) and the transistor TR2 (which is a driving transistor). An example of the positional relationship among the electrode GE2, the first input electrode DE1, and the second output electrode E1. The first to fourth vias CH1 to CH4 are illustrative drawings.

The display element layer DP-OLED may include a light emitting element ELD. In this exemplary embodiment, the light emitting element ELD is provided as an example of an organic light emitting element. However, this is only an example. For example, the light emitting element ELD may include various examples, such as an electrophoresis device, an electrowetting device, a liquid crystal capacitor, a quantum dot diode, a nano LED, a micro LED, and the like.

The display element layer DP-OLED includes a pixel definition layer PDL. The pixel definition layer PDL contains an insulating material. For example, the pixel definition layer PDL may be an organic layer.

The first electrode AE of the light-emitting element ELD is provided on the intermediate organic layer 30. The first electrode AE of the light emitting element ELD is connected to the second output electrode E2 through the fifth through hole CH5 passing through the intermediate organic layer 30. The light emitting opening OP is defined in the pixel definition layer PDL. The light emitting opening OP of the pixel defining layer PDL exposes at least a part of the first electrode AE of the light emitting element ELD.

As shown in FIG. 5A, the display area AA1 may include a light-emitting area PXA and a non-light-emitting area NPXA adjacent to the light-emitting area PXA. The non-light emitting area NPXA may surround the light emitting area PXA. In the present exemplary embodiment, the light emitting area PXA may be defined to correspond to a part of the first electrode AE of the light emitting element ELD exposed by the light emitting opening OP.

The hole control layer HCL may be provided in common on the light emitting area PXA and the non-light emitting area NPXA. The hole control layer HCL may include a hole transport layer and may further include a hole injection layer. The light emitting layer EML is provided on the hole control layer HCL. The light emitting layer EML may be disposed in a region corresponding to the light emitting opening OP. That is, the light emitting layer EML may be formed to be separated from each pixel PX. In addition, the light emitting layer EML may include organic materials and/or inorganic materials. The light emitting layer EML may generate light having a predetermined color.

The electronic control layer ECL is provided on the light emitting layer EML. The electron control layer ECL may include an electron transport layer and may further include an electron injection layer. The hole control layer HCL and the electronic control layer ECL can be commonly formed on a plurality of pixels by using an open mask. The second electrode CE of the light emitting element ELD is provided on the electronic control layer ECL. The second electrode CE of the light emitting element ELD is provided as a whole and is commonly provided on a plurality of pixels.

As shown in FIGS. 5A and 5B, the upper insulating layer TFL is provided on the second electrode CE of the light emitting element ELD. The upper insulating layer TFL may include a plurality of thin films. According to this exemplary embodiment, the upper insulating layer TFL may include a cover layer CPL and a thin film encapsulation layer TFE. The thin film encapsulation layer TFE may include a first inorganic layer IOL1, an organic layer OL, and a second inorganic layer IOL2.

The cover layer CPL is provided on the second electrode CE of the light emitting element ELD to contact the second electrode CE of the light emitting element ELD. The cover layer CPL may contain an organic material. The first inorganic layer IOL1 is disposed on the cover layer CPL to contact the cover layer CPL. The organic layer OL is disposed on the first inorganic layer IOL1 to contact the first inorganic layer IOL1. The second inorganic layer IOL2 may be disposed on the organic layer OL to contact the organic layer OL.

The cover layer CPL can protect the second electrode CE of the light-emitting element ELD in a process described later, for example, a sputtering process to improve the light-emitting efficiency of the light-emitting element ELD. The cover layer CPL may have a refractive index greater than that of the first inorganic layer IOL1.

The first inorganic layer IOL1 and the second inorganic layer IOL2 can protect the display element layer DP-OLED from oxygen/water vapor, and the organic layer OL can protect the display element layer DP-OLED from foreign particles such as dust particles. Each of the first inorganic layer IOL1 and the second inorganic layer IOL2 may be one of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a metal oxide layer. According to an exemplary embodiment, each of the first inorganic layer IOL1 and the second inorganic layer IOL2 may include a titanium oxide layer, an aluminum oxide layer, and the like. The organic layer OL may include an acrylic-based organic layer, but is not limited thereto.

According to an exemplary embodiment of the inventive concept, an inorganic layer such as a lithium fluoride (LiF) layer may be further disposed between the cover layer CPL and the first inorganic layer IOL1. The lithium fluoride layer can improve the luminous efficiency of the light emitting element ELD.

FIG. 6A is a cross-sectional view of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 6B is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 6C is an enlarged plan view showing a part of FIG. 6B. FIG. 6D is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. Hereinafter, description will be made with reference to FIGS. 6A to 6D.

As shown in FIG. 6A, the input sensing unit ISU may include a first insulating layer IS-IL1, a first conductive layer IS-CL1, a second insulating layer IS-IL2, a second conductive layer IS-CL2, and a third insulating layer IS-IL3. The first insulating layer IS-IL1 may be directly disposed on the upper insulating layer TFL. In the concept of the present invention, the first insulating layer IS-IL1 may be omitted.

Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a single-layer structure or a multi-layer structure in which multiple layers are stacked on the third direction axis DR3. The conductive layer having a multilayer structure may include at least two transparent conductive layers and a metal layer. The conductive layer having a multilayer structure may include metal layers containing metals different from each other. The transparent conductive layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO), PEDOT, metal nanowires, and graphene. The metal layer may be formed of molybdenum, silver, titanium, copper, aluminum, and alloys thereof. For example, each of the first and second conductive layers IS-CL1 and IS-CL2 may have a three-layer metal structure, such as a three-layer structure of titanium/aluminum/titanium.

Each of the first and second conductive layers IS-CL1 and IS-CL2 may include a plurality of conductive patterns, respectively. Hereinafter, an example in which the first conductive layer IS-CL1 includes the first conductive pattern and the second conductive layer IS-CL2 includes the second conductive pattern will be explained. Each of the first and second conductive patterns may include a sensing electrode and a signal line connected to the sensing electrode, respectively.

Each of the first and second insulating layers IS-IL1 and IS-IL2 may include inorganic or organic materials, respectively. In this exemplary embodiment, each of the first and second insulating layers IS-IL1 and IS-IL2 may be an inorganic layer including an inorganic material. The inorganic layer may include at least one of titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, or hafnium oxide. The third insulating layer IS-IL3 may include an organic material. The organic layer may include acrylic-based resin, methacrylic-based resin, polyisoprene-based resin, vinyl resin, epoxy-based resin, polyurethane-based resin, cellulose-based resin, siloxane-based resin, polyimide Based resin, polyamide-based resin or perylene-based resin (perylene-based resin).

6B and 6C, the input sensing unit ISU is provided on the base substrate BS. The input sensing unit ISU may be disposed on the display unit DPU or the display panel DP, may be disposed between the display unit DPU and the base substrate BS, or the base substrate BS may be disposed between the input sensing unit ISU and the display unit DPU.

The front surface IS2 provided by the input sensing unit ISU includes a sensing area AA2 and a second peripheral area NAA2. The sensing area AA2 may correspond to the active area AA of the display device DD (see FIG. 1). The second peripheral area NAA2 may correspond to the peripheral area NAA of the display device DD (see FIG. 1). In this exemplary embodiment, the display area AA1 (see FIG. 3A) and the sensing area AA2 may correspond to each other.

However, this is only an example. For example, the display area AA1 and the sensing area AA2 may partially overlap each other. The active area AA may be substantially an area defined by the projection display area AA1 and the sensing area AA2. Therefore, the active area AA may include all the display area AA1 and the sensing area AA2.

The input sensing unit ISU includes a plurality of first electrodes TE1, a plurality of second electrodes TE2, a plurality of third electrodes TE3, a plurality of sensing lines TL1, TL2, and TL3, and a plurality of sensing pads T11, T12, T2, and T3 . For the sake of explanation, a part of the electrodes are hatched to distinguish the first electrode TE1, the second electrode TE2, and the third electrode TE3.

The first electrode TE1, the second electrode TE2 and the third electrode TE3 are disposed on the sensing area AA2. As described above, the sensing area AA2 may overlap the display area AA1 of the display unit DPU and correspond to the active area AA of the display device DD.

The sensing lines TL1, TL2 and TL3 and the sensing pads T11, T12, T2 and T3 are disposed on the peripheral area NAA2. As described above, the second peripheral area NAA2 may overlap the first peripheral area NAA1 of the display unit DPU and correspond to the peripheral area NAA of the display device DD.

The sensing lines TL1, TL2, and TL3 may include a plurality of first sensing lines TL1, a plurality of second sensing lines TL2, and a third sensing line TL3. The sensing pads T11, T12, T2, and T3 include a plurality of first sensing pads T11 and T12, a plurality of second sensing pads T2, and a third sensing pad T3. The sensing lines TL1, TL2, and TL3 are respectively connected to corresponding sensing pads in the sensing pads T11, T12, T2, and T3.

The first electrode TE1 is arranged in the first direction DR1. Each first electrode TE1 extends in the second direction DR2. Each first electrode TE1 may include a plurality of first main patterns SP1 and a plurality of first connection patterns BP1, respectively.

The first main patterns SP1 and the first connection patterns BP1 may be arranged in the second direction DR2, respectively. Each first main pattern SP1 has a diamond shape. However, this is only an example. For example, each first main pattern SP1 is not limited to a specific shape.

Each first connection pattern BP1 is disposed between the first main patterns SP1. Each first connection pattern BP1 connects two first main patterns SP1 adjacent to each other, respectively. The first main patterns SP1 are electrically connected to each other through the first connection patterns BP1.

In this exemplary embodiment, the first connection pattern BP1 is disposed on a layer different from the first main pattern SP1. Each first connection pattern BP1 may partially overlap the first main pattern SP1. Each first main pattern SP1 may pass through a predetermined insulating layer to be electrically connected to the first connection pattern BP1.

The first sensing lines TL1 are respectively connected to the first electrodes TE1. The first sensing line TL1 connects the first electrode TE1 to the sensing pads of the first sensing pads T11 and T12 corresponding to the first electrode TE1, respectively.

In this exemplary embodiment, the first sensing line TL1 may include a first sub-line TL11 and a second sub-line TL12. The first sub-line TL11 connects a part of the first electrode TE1 to the first sensing pad T11. The second sub-line TL12 connects the remaining part of the first electrode TE1 to the first sensing pad T12.

For convenience of description, FIG. 6C illustrates three first sensing lines L11, L12, and L13 belonging to the first sensing line TL1. The three first sensing lines L11, L12 and L13 are respectively connected to the corresponding first electrodes TE1.

The first sensing line TL1 may transmit the electronic signals provided through the first sensing pads T11 and T12 to the first electrode TE1, or may transmit the electronic signals provided through the first electrode TE1 through the first sensing pads T11 and T12 to the outside. However, this is only an example. For example, the first sensing pads T11 and T12 may be continuously arranged on one side of the display panel pad DPD, but the concept of the present invention is not limited to a specific configuration.

Referring again to FIGS. 6B and 6C, the second electrodes TE2 are arranged in the second direction DR2. Each second electrode TE2 extends along the first direction DR1. Each second electrode TE2 may include a plurality of second main patterns SP2 and a plurality of second connection patterns BP2, respectively.

The second main patterns SP2 and the second connection patterns BP2 may be arranged in the first direction DR1, respectively. Each of the first main pattern SP1 and the second main pattern SP2 has a diamond shape. However, this is only an example. For example, in the concept of the present invention, the shapes of the first main pattern SP1 and the second main pattern SP2 are not limited thereto.

Each second connection pattern BP2 is provided between the second main patterns SP2. Each second connection pattern BP2 connects two second main patterns SP1 adjacent to each other, respectively. The second main patterns SP2 are electrically connected to each other through the second connection patterns BP2.

In this exemplary embodiment, the second connection pattern BP2 is disposed on the same layer as the second main pattern SP2, and thus is provided as a whole. Therefore, the second electrode TE2 can be provided as a whole extending along the first direction DR1. However, this is only an example. For example, the second connection pattern BP2 may be disposed on a layer different from the second main pattern SP2, but the concept of the present invention is not limited thereto.

The second sensing lines TL2 are respectively connected to the second electrodes TE2. The second sensing line TL2 connects the second electrode TE2 to the second sensing pad T2.

For the sake of explanation, FIG. 6C illustrates N second sensing lines L21, L22, L23, L24, and L2N belonging to the second sensing line TL2. The second sensing lines L21, L22, L23, L24, and L2N are respectively connected to the corresponding second electrodes TE2. The number N may correspond to the number of second electrodes TE2 provided by the input sensing unit ISU.

The second sensing line TL2 may transmit the electronic signal provided through the second sensing pad T2 to the second electrode TE2, or may transmit the electronic signal provided through the second electrode TE2 through the second sensing pad T2 to the outside.

The second electrode TE2 may receive an electronic signal different from the signal applied to the first electrode TE1. Here, the second electrode TE2 and the first electrode TE1 can jointly generate an electric field. For example, the first electrode TE1 may receive a driving signal, and may receive a sensing signal. The input sensing unit ISU can operate in a mutual cap (mutual cap) manner, that is, the external input TC is sensed through a change in capacitance formed between the second electrode TE2 and the first electrode TE1 (see FIG. 1).

Alternatively, the second electrode TE2 may receive the same kind of electronic signal as the first electrode TE1. For example, the first electrode TE1 and the second electrode TE2 may receive the sensing signal. The input sensing unit ISU can operate in a self-cap (self-cap) manner, that is, sense the information of the external input TC through the change of the sensing signal of the external input TC.

Referring again to FIGS. 6B and 6C, the third electrodes TE3 are arranged in the second direction DR2. Each third electrode extends along the first direction DR1. In this exemplary embodiment, the third electrode TE3 may extend and be arranged parallel to the second electrode TE2.

Each third electrode TE3 may include a plurality of third main patterns SP3 and a plurality of third connection patterns BP3, respectively. The third main patterns SP3 and the third connection patterns BP3 may be arranged in the first direction DR1.

The third main pattern SP3 may be disposed within the second main pattern SP2. In this exemplary embodiment, the third main patterns SP3 may be respectively disposed in predetermined openings SP_OP respectively defined in the second main patterns SP2.

The third main pattern SP3 may be accommodated in the opening SP_OP and spaced apart from the second main pattern SP2 in plan view. In this exemplary embodiment, the third main pattern SP3 and the second main pattern SP2 may not overlap each other in plan view. In this exemplary embodiment, each third main pattern SP3 may be surrounded by each second main pattern SP2.

Each third main pattern SP3 may include a first part MP and a second part PP. The first part MP may have a shape similar to each second main pattern SP2. In this exemplary embodiment, the first portion MP may have a diamond shape having a size smaller than each second main pattern SP2.

The second part PP is a side connected to the first part MP. The second portion PP may have, for example, a long shape extending in the first direction DR1. In this exemplary embodiment, the second part PP may be provided in plural and connected to two sides opposite to each other in the first direction DR1.

Each third connection pattern BP3 is disposed between the third main patterns SP3. Each third connection pattern BP3 connects two third main patterns SP3 adjacent to each other, respectively. The third main patterns SP3 are electrically connected to each other through the third connection patterns BP3. However, this is only an example. For example, the third electrode TE3 may be arranged in the first direction DR1, but the concept of the present invention is not limited thereto.

The third connection pattern BP3 may be spaced apart from the first connection pattern BP1 in a plan view. The third connection pattern BP3 may be disposed so that the third connection pattern BP3 and the first connection pattern BP1 do not overlap in a plan view. Each third connection pattern BP3 according to this exemplary embodiment may have a shape bent at least once in the first direction DR1, respectively. In this exemplary embodiment, each third connection pattern BP3 has a shape bent once.

Each third connection pattern BP3 may be spaced apart from the first connection pattern BP1 in a plan view through a curved shape and thus overlap the first main pattern SP1. Since each third connection pattern BP3 according to the inventive concept has a curved shape, respectively, the third connection pattern BP3 can be stably connected to the third main pattern SP3 without disturbing the second connection pattern BP2.

The third sensing lines TL3 are respectively connected to the third electrode TE3. The third sensing line TL3 connects the third sensing pad T3 to the third electrode TE3. In this exemplary embodiment, each third sensing pad T3 and the third sensing line TL3 are provided as a whole. The third electrode TE3 can receive the ground voltage through the third sensing pad T3.

According to an exemplary embodiment of the inventive concept, the input sensing unit ISU may further include a third electrode TE3 that receives a ground voltage. Therefore, it is possible to prevent the occurrence of signal failure such as noise caused by the electronic signal supplied to the display unit DPU. Therefore, the sensitivity of the input sensing unit ISU can be easily prevented from deteriorating.

In addition, according to the inventive concept, the third connection pattern BP3 constituting the third electrode TE3 may be designed so that the third connection pattern BP3 does not overlap with the first connection pattern BP1 provided on the same layer to prevent the third electrode TE3 from the first The electrodes TE1 interfere with each other. Therefore, the electrical reliability of the input sensing unit ISU can be improved.

As shown in FIG. 6D, in the input sensing unit ISU, each third sensing line TL3 and the third sensing pad T3 may be provided as a plurality of, respectively. The plurality of third sensing lines TL3P and the plurality of third sensing pads T3P may be respectively connected to the corresponding third electrodes TE3. Here, the third electrode TE3 may receive an electronic signal for sensing noise in the active area AA. According to the inventive concept, the input sensing unit ISU can be designed in various configurations, but the inventive concept is not limited thereto.

FIG. 7 is a plan view of a part of an input sensing unit ISU according to an embodiment of the inventive concept. 8A and 8B are cross-sectional views of a part of the input sensing unit ISU according to an embodiment of the inventive concept. FIG. 7 shows the area AA' of FIG. 6C. FIG. 8A shows the cross section taken along line I-I' of FIG. 7, and FIG. 8B shows the cross section taken along line II-II' of FIG. 7. Hereinafter, description will be made with reference to FIGS. 7 to 8B. The same components as those in FIGS. 1 to 6D may be given the same reference symbols, and detailed descriptions thereof will be omitted.

For the sake of explanation, FIG. 7 illustrates an area where one first connection pattern BP1, one second connection pattern BP2, and one third connection pattern BP3 are provided.

The first main pattern SP1 and the second main pattern SP2 may be disposed on the same layer and spaced apart from each other. A predetermined space GS1 may be defined between the first main pattern SP1 and the second main pattern SP2. Although not shown, a floating pattern spaced apart from the first main pattern SP1 and the second main pattern SP2 may be further disposed in the space GS1 between the first main pattern SP1 and the second main pattern SP2.

The second main pattern SP2 and the third main pattern SP3 may be disposed on the same layer and spaced apart from each other. In this exemplary embodiment, the third main patterns SP3 may be respectively disposed in predetermined openings SP_OP defined in the second main pattern SP2. Therefore, a predetermined space GS2 may be defined between the second main pattern SP2 and the third main pattern SP3. The second main pattern SP2 and the third main pattern SP3 may not overlap each other in plan view.

In this exemplary embodiment, the first connection pattern BP1 and the third connection pattern BP3 may be disposed on different layers from the first main pattern SP1, the second main pattern SP2, the second connection pattern BP2, and the third main pattern SP3 , And there is a predetermined insulating layer IL in between.

The first connection pattern BP1 is provided on a different layer from the second connection pattern BP2. In this exemplary embodiment, the first connection pattern BP1 may cross the second connection pattern BP2 in plan view. The first connection pattern BP1 may be connected to the first main pattern SP1 through the contact portion CNT1 passing through the insulating layer IL.

The third connection pattern BP3 and the first connection pattern BP1 may be disposed on the same layer. The third connection pattern BP3 may be connected to the third main pattern SP3 through the contact portion CNT3 passing through the insulating layer IL.

The third connection pattern BP3 may be spaced apart from the first connection pattern BP1 in a plan view. The third connection pattern BP3 and the first connection pattern BP1 may not overlap. As described above, the third connection pattern BP3 may be bent in the first direction DR1 in a plan view to be spaced apart from the first connection pattern BP1 and overlap the first main pattern SP1.

According to the inventive concept, even if the third connection pattern BP3 is disposed on the same layer, the third connection pattern BP3 can be connected to the third main pattern SP3 and the first main pattern SP1 without short-circuiting each other. Therefore, the electrical reliability of the input sensing unit ISU can be improved.

FIG. 9 is a plan view of a part of an input sensing unit according to an exemplary embodiment of the inventive concept. FIGS. 10A to 10C are plan views of a plurality of parts of the input sensing unit according to an embodiment of the inventive concept; for ease of explanation, FIG. 9 shows an area corresponding to FIG. 7, and FIG. 10A FIG. 10C shows the interlayer plan view of the area of FIG. 9. Hereinafter, the concept of the present invention will be explained with reference to FIGS. 9 to 10C. The same components as those in FIGS. 1 to 8B may be given the same reference symbols, and detailed descriptions thereof will be omitted.

As shown in FIG. 9, the input sensing unit ISU_M may include a plurality of grid lines MSL. The grid line MSL includes a first grid line MS1 and a second grid line MS2, which extend in a direction crossing the first direction DR1 and the second direction DR2 and cross each other. The mesh opening MS_OP is defined in the mesh line MSL. Each mesh opening MS_OP can correspond to the above-mentioned light emitting area PXA (see FIG. 5). Therefore, even if the mesh line MSL is formed of an optically opaque material, the influence of the input sensing unit ISU_M on the light emitting area PXA can still be Minimize to prevent the display characteristics of the display device from deteriorating.

The grid line MSL may be a component of each of the first electrode TE1_M, the second electrode TE2_M, and the third electrode TE3_M. In particular, each of the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M may include a grid line MSL. The space cut by the grid line MSL may define the boundary between the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M.

The first connection patterns BP1_M may be provided in plural along the first direction DR1. The first connection pattern BP1_M may include a part bent in the second direction DR2. Therefore, the first connection pattern BP1_M may not overlap the second connection pattern BP2_M in plan view, and may overlap the second main pattern SP2_M in plan view.

The third connection pattern BP3_M is disposed to be spaced apart from the first connection pattern BP1_M. The third connection patterns BP3_M may be provided in plural along the second direction DR2. The third connection pattern BP3_M may include a part bent in the first direction DR1. Therefore, the third connection pattern BP3_M may not overlap the second connection pattern BP2_M and the first connection pattern BP1_M in plan view, and may overlap the first main pattern SP1_M in plan view.

According to the inventive concept, the first connection pattern BP1_M and the third connection pattern BP3_M are disposed on a layer different from the grid line MSL. Referring to FIGS. 10A to 10C, the first connection pattern BP1_M and the third connection pattern BP3_M may constitute the first layer LY1, the grid line MSL may constitute the third layer LY3, and the contact portions CNT1_M and CNT3_M may constitute the second layer LY2 .

In particular, the first connection pattern BP1_M and the third connection pattern BP3_M are disposed on the first layer LY1. The first layer LY1 may be a layer disposed under the insulating layer IL (see FIG. 8A). The first connection pattern BP1_M and the third connection pattern BP3_M may be provided as different layers after being separated from the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M.

The first connection pattern BP1_M and the third connection pattern BP3_M may extend along the grid line MSL. Each of the first connection pattern BP1_M and the third connection pattern BP3_M may have a shape corresponding to the grid line MSL. Therefore, each of the first connection pattern BP1_M and the third connection pattern BP3_M may have a shape formed by removing a part of the grid line MSL. Therefore, the influence of the first connection pattern BP1_M and the third connection pattern BP3_M on the light emitting area PXA can be reduced.

The second layer LY2 may correspond to the insulating layer IL. The insulating layer IL defining the contact portions CNT1_M and CNT3_M may be disposed on the first connection pattern BP1_M and the third connection pattern BP3_M. The contact portions CNT1_M and CNT3_M may be defined as areas that need to be connected between the insulating layer SIL and the mesh line MSL in the area overlapping the first connection pattern BP1_M and the third connection pattern BP3_M.

The third layer LY3 may be a layer provided on the insulating layer IL. The grid line MSL is provided on the insulating layer IL. That is, each of the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M may be respectively disposed on the uppermost layer of the input sensing unit ISU_M. The portions of the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M that overlap the contact portions CNT1_M and CNT3_M may pass through the insulating layer IL and be connected to the first connection pattern BP1_M and the third Connection pattern BP3_M.

The input sensing unit ISU_M according to an exemplary embodiment of the inventive concept may further include a floating pattern FL disposed in the first main pattern SP1_M. The floating pattern FL may be disposed in a predetermined opening defined in the first main pattern SP1_M. The floating pattern FL is arranged to be spaced apart from the first main pattern SP1_M. According to the inventive concept, since the floating pattern FL is further provided, it may be difficult to distinguish the second electrode TE2_M and the first electrode TE1_M provided on the third main pattern SP3_M from each other. Therefore, the visibility of the input sensing unit ISU_M can be improved.

In addition, according to the inventive concept, since the floating pattern FL is further provided, it is possible to prevent the deterioration of the sensitivity of the input sensing unit ISU_M caused by the electronic signal applied to the display unit DPU. Therefore, the electrical reliability of the input sensing unit ISU_M can be improved.

FIG. 11 is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. 12A to 12C are plan views of an input sensing unit according to an exemplary embodiment of the inventive concept. Fig. 12A shows an enlarged view of the area BB' in Fig. 11, and Fig. 12B shows an enlarged view of a part of the area in Fig. 12A. Fig. 12C shows an enlarged plan view of the area CC' in Fig. 11. Hereinafter, the concept of the present invention will be explained with reference to FIGS. 11 to 12C. The same components as those in FIGS. 1 to 10C may be given the same reference symbols, and detailed descriptions thereof will be omitted.

FIG. 11 illustrates a partial area of the input sensing unit ISU_M1 centered on the area where the first connection pattern BP1_M1, the second connection pattern BP2_M1, and the third connection pattern BP3_M1 are provided.

In addition, FIG. 11 illustrates a part of two first main patterns SP1_M1 arranged to be spaced apart from each other in the second direction DR2 with a first connection pattern BP1_M1 interposed therebetween, arranged to be spaced apart from each other in the first direction DR1 Part of the two second main patterns SP2_M1 that are open and have the second connection pattern BP2_M1 in between, and part of the two third main patterns SP3_M1 that are arranged to be spaced apart from each other in the second direction DR2 and have the third connection pattern BP3_M1 is in between. The input sensing unit ISU_M1 according to the inventive concept includes a plurality of grid lines MSL.

As shown in FIGS. 11 and 12A, in the input sensing unit ISU_M1, each of the first connection pattern BP1_M1 and the third connection pattern BP3_M1 may have various shapes, respectively. For example, the first connection patterns BP1_M1 may be provided as a plurality to be spaced apart from each other in the first direction DR1 and connected to the first main pattern SP1_M1, respectively.

Each first connection pattern BP1_M1 extends along a part of the grid line MSL. Therefore, each first connection pattern BP1_M1 may not overlap with the mesh opening MS_OP and substantially expose the light emitting area PXA. Therefore, it is possible to prevent the display characteristics of the display device from deteriorating due to the lamination with the input sensing unit ISU_M.

The third connection pattern BP3_M1 extends along a part of the grid line MSL. The third connection pattern BP3_M1 may be spaced apart from the first connection pattern BP1_M1 in a plan view. FIG. 12B is an enlarged view of a part of the area adjacent to the third connection pattern BP3_M1, the first connection pattern BP1_M1, and the second connection pattern BP2_M1 in FIG. 12A.

Referring to FIGS. 12A and 12B, the third connection pattern BP3_M1 may be spaced apart from the first connection pattern BP1_M1 in a plan view. The third connection pattern BP1_M1 may partially overlap the first main pattern SP1_M1 in a plan view. According to the inventive concept, a short circuit between the third connection pattern BP3_M1 and the first connection pattern BP1_M1 provided on the same layer can be prevented. In addition, the third connection pattern BP3_M1 may be bent so that the third connection pattern BP3_M1 does not overlap the second connection pattern BP2_M1 in a plan view. The third connection pattern BP3_M1 may have a shape bent at least once in the first direction DR1. In this embodiment, the third connection pattern BP3_M1 may have a zigzag shape bent several times in the first direction DR1. According to the inventive concept, since the third connection pattern BP3_M1 is designed to have a curved shape, a non-overlapping portion between the third connection pattern BP3_M1 and the first connection pattern BP1_M1 may be added to simply prevent interference with the light emitting area PXA.

A predetermined space GS2_1 can be defined between the second part PP1 and the second main pattern SP2_1.

Referring to FIGS. 11 and 12C, each third main pattern SP3_M1 may include a first part MP1 and a second part PP1, respectively. Each of the first portion MP1 and the second portion PP1 may be disposed at a predetermined distance from the second main pattern SP2_M1.

The second portion PP1 may have a shape bent at least once in the first direction DR1. The second portion PP1 according to this exemplary embodiment may have a zigzag shape extending in the first direction DR1. According to the concept of the present invention, the second part PP1 can be designed to be bent several times to prevent the boundary between the third main pattern SP3_M1 and the second main pattern SP_M1 in the space GS1_1 from being easily seen . In addition, it may be difficult to distinguish the third main pattern SP3_M1 from the second main pattern SP2_M1. Therefore, the visibility of the input sensing unit ISU_M1 can be improved.

The first main pattern SP1_M1 may be connected to the first connection pattern BP1_M through the contact portion CNT1_M1, and the third main pattern SP3_M1 may be connected to the third connection pattern BP3_M1 through the contact portion CNT3_M1.

FIG. 13A is a perspective view illustrating a coupling state of a display device according to an exemplary embodiment of the inventive concept. FIG. 13B is an exploded perspective view of the display device of FIG. 13A; FIGS. 14A to 14C are plan views showing a part of the components of FIG. 13B; FIG. 14A shows a plan view of the display unit DPU_H, and FIG. 14B An enlarged schematic view of the area XX' is shown, and FIG. 14C is a plan view of the input sensing unit ISU_H. Hereinafter, the concept of the present invention will be explained with reference to FIGS. 13A to 14C. The same components as those in FIGS. 1 to 12C may be given the same reference symbols, and detailed descriptions thereof will be omitted.

Referring to FIG. 13A, the display device DD_H may be a device activated according to an electronic signal. Examples of the display device DD_H may include tablet computers, notebook computers, computers, smart TVs, and the like. In this exemplary embodiment, a display device DD_H including a smartphone will be described as an example.

The display device DD_H can display the image IM and sense the external input TC. The image IM includes still images and moving images. The external input TC includes various external inputs, such as through a part of the user's body, light, heat, pressure, or the like. In this embodiment, the user's input is depicted as input applied by the user's hand to the front surface.

In this exemplary embodiment, the display device DD_H provides a front surface FS that displays an image and senses the external input TC. However, this is only an example. For example, as described above, the external input TC may be provided in various shapes. According to the structure of the display device DD_H, the display device DD_H can sense the external input TC applied to the side or rear surface of the display device DD_H, but the concept of the present invention is not limited thereto.

As shown in FIG. 13B, the display device DD_H may include a window panel WP, an electronic panel EP_H, an electronic module EM, and a housing EDC. The window panel WP may include an insulating material. For example, the window panel WP may be made of glass, plastic, or a combination thereof.

The front surface FS of the display device DD_H may correspond to the front surface of the window panel WP. The front surface of the window panel WP includes a transmission area TA and a frame area BZA. The transmission area TA may be an optically transparent area. For example, the transmission area TA may be an area having a visible light transmittance of about 90% or higher.

The bezel area BZA may be an area having a lower light transmittance than the transmission area TA. The frame area BZA defines the shape of the transmission area TA. The bezel area BZA may be disposed adjacent to the transmission area TA to surround the transmission area TA.

The frame area BZA may have a predetermined color. The bezel area BZA may cover the peripheral area NAA of the electronic panel EP_H to prevent the peripheral area NAA from being visible from the outside. In this exemplary embodiment, the bezel area BZA may be defined by the aforementioned photoresist pattern WP-BZ (see FIG. 2A) and correspond to the peripheral area NAA. However, this is only an example. For example, the frame area BZA in the window panel WP may also be omitted.

A predetermined hole area HA may be defined in the window panel WP according to this exemplary embodiment. The hole area HA may be provided in the transmission area TA. The hole area HA overlaps the electronic module EM in plan view. In this exemplary embodiment, the hole area HA may correspond to an area in the window panel WP that overlaps a module hole MH of the electronic panel EP_H described later.

The electronic module EM is set under the window panel WP. The electronic module EM may overlap the module hole MH and the hole area HA in a plan view. The electronic module EM may receive external input transmitted through the hole area HA or provide output through the hole area HA. At least a part of the electronic module EM may be accommodated in the module hole MH. According to the concept of the present invention, the electronic module EM may be arranged to overlap with the active area AA to prevent the frame area BZA from increasing.

The electronic module EM includes various functional modules for driving the display device DD. The electronic module EM can be electrically connected to the electronic panel EP_H through a connector (not shown). For example, the electronic module EM may be a camera, a speaker, or a sensor that senses light or heat.

The electronic panel EP_H can display the image IM and sense the external input TC. In this exemplary embodiment, a predetermined module hole MH may be defined in the electronic panel EP_H. The module hole MH may be defined by the third direction DR3 passing through the electronic panel EP_H.

In this exemplary embodiment, the module hole MH may be defined in the active area AA. The module hole MH overlaps the electronic module EM described later. The electronic module EM can receive external theme information provided outside the window panel WP through the module hole MH.

Specifically, the electronic panel EP_H will be described with reference to FIGS. 14A to 14C. FIG. 14A shows a plan view of a part of the display unit DPU_H of the electronic panel EP_H, and FIG. 14B shows a schematic view of a region corresponding to the region XX' of the display unit DPU_H. FIG. 14C is a plan view of the input sensing unit ISU_H of the electronic panel EP_H.

As shown in FIGS. 14A and 14B, the display unit DPU_H includes a plurality of pixels PX. The pixel PX may be disposed around the module hole MH to surround the module hole MH in a plan view. The pixel PX may be connected to the power line PL, the data line DL, and the scan line GL connected to the first power terminal VDD, respectively. The display pad DPF may include a pad D1 connected to the data line DL and a pad D2 connected to the first power terminal VDD. FIG. 14A shows that the second power terminal VSS is connected to the light emitting element ELD. Hereinafter, the repeated explanation about the pixel PX will be omitted.

The display unit DPU_H is penetrated by the module hole MH. In FIG. 14B, two of the signal lines, the first and second signal lines SL1 and SL2, are respectively connected to the pixel PX.

The first signal line SL1 extends along the first direction DR1. The first signal line SL1 is connected to pixels in the same row arranged in the first direction DR1 among the pixels PX. The first signal line SL1 may correspond to the scan line GL. The first signal line SL1 may provide a gate signal to turn on the corresponding pixel in the pixel PX.

A part of the pixels PX connected to the first signal line SL1 may be disposed on the left side of the module hole MH, and other parts of the pixels PX may be disposed on the right side of the module hole MH. Therefore, even if a part of pixels with respect to the module hole MH is omitted, pixels in the same row connected to the first signal line SL1 can still be turned on/off by substantially the same gate signal.

The second signal line SL2 extends along the second direction DR2. The second signal line SL2 is connected to pixels in the same column arranged in the second direction DR2 among the pixels PX. The second signal line SL2 may correspond to, for example, the data line DL. The second signal line SL2 provides a data signal to the corresponding pixel PX.

A part of the pixels PX connected to the second signal line SL2 may be disposed above the module hole MH, and other parts of the pixels PX may be disposed below the module hole MH. Therefore, even if a part of pixels relative to the module hole MH is omitted, pixels in the same column connected to the second signal line SL2 can still receive data signals through the same line.

In the display unit DPU_H according to an exemplary embodiment of the inventive concept, the first signal line SL1 may correspond to a scan line, and the second signal line SL2 may correspond to a data line. Alternatively, the first signal line SL1 and the second signal line SL2 may be one of a power supply line, an initial voltage line, and a light emission control line. In addition, although not shown, each pixel PX may be further connected to an additional signal line (not shown).

Referring to FIG. 14C, the input sensing unit ISU_H is penetrated by the module hole MH. At least a portion of the first electrode TE1_H, the second electrode TE2_H, and the third electrode TE3_H disposed in the sensing area AA2 may be disposed adjacent to the edge of the module hole MH to surround the module hole MH. The first electrode TE1_H, the second electrode TE2_H, and the third electrode TE3_H adjacent to the module hole MH may include a first main pattern SP1_H, a second main pattern SP2_H, and a third main pattern SP3_H, which are separated from the module hole MH The shape of each pattern may have a partially removed shape.

Referring to FIG. 13B, the housing EDC is provided under the window panel WP. The housing EDC may be coupled to the window panel WP to define the appearance of the display device DD_H. The housing EDC may include a material with relatively high rigidity. For example, the housing EDC may include a plurality of frames and/or plates made of glass, plastic, and metal. The housing EDC provides a predetermined accommodation space. The electronic panel EP_H and the electronic module EM can be accommodated in the accommodating space and protected from external impact.

According to the concept of the present invention, the electronic module EM may be arranged such that a part of the electronic module overlaps the active area AA of the electronic panel EP_H and the transmission area TA of the window panel WP. Therefore, the surface area of the bezel area can be reduced to improve the aesthetic appearance of the display device DD.

FIG. 15A is an exploded perspective view of a display device according to an exemplary embodiment of the inventive concept, and FIG. 15B is a plan view illustrating a part of the assembly of FIG. 15A. Hereinafter, the concept of the present invention will be explained with reference to FIGS. 15A and 15B. The same components as those in FIGS. 1 to 7 may be given the same reference symbols, and detailed descriptions thereof will be omitted.

The display device DD_N may include a window panel WP_N, an electronic panel EP_N, an electronic module EM1, and a housing EDC. Compared with the window panel WP of FIG. 13B, the window panel WP_N may further include a notch portion NTA defined on one side.

The notch portion NTA may be formed by recessing a part of one side of the window panel WP_N toward the center of the window panel WP_N. Therefore, the front surface FS of the window panel WP_N may include the transmission area TA_N and the frame area BZA_N, each having a shape deformed according to the notch portion NTA. Each of the transmissive area TA_N and the frame area BZA_N may have a shape corresponding to a recess on one side corresponding to the notch portion NTA.

The notch portion NTA may be defined in the window panel WP_N overlapping the electronic module EM1. The electronic module EM1 may be a camera, a speaker, or a sensor that senses light or heat. According to the inventive concept, the electronic module EM1 may be exposed to the outside through the notch portion NTA of the window panel WP_N.

The electronic panel EP_N is disposed between the window panel WP_N and the housing EDC. The notch portion NT may be provided in the electronic panel EP_N to correspond to the window panel WP_N. The notch portion NT of the electronic panel EP_N may be defined at a position overlapping the electronic module EM1. According to the inventive concept, the electronic module EM1 can be exposed from the electronic panel EP_N and the window panel WP_N to easily provide output signals to the outside or easily receive external information without disturbing the window panel WP_N or the electronic panel EP_N.

Referring to FIG. 15B, the input sensing unit ISU_N may include a predetermined notch portion NT. In this exemplary embodiment, the notch portion NT may be formed by recessing a part of the upper side of the display unit DPU_N extending in the first direction DR1 in the opposite direction of the second direction DR2.

After the notch portion NT is defined, at least a part of the first electrode TE1_N, the second electrode TE2_N and the third electrode TE3_N disposed on the sensing area AA2 may be partially removed compared to the input sensing unit ISU of FIG. 6B shape. For example, due to the notch portion NT, the surface area or length of a portion of the first electrode TE1_N may be smaller than the surface area or length of the region spaced from the notch portion NT. The length and surface area of the first electrode of the first electrode TE1_N spaced from the notch portion NT in the second direction DR2 may be smaller than the length and surface area of the first electrode spaced from the notch portion NT in the first direction DR1.

In addition, for example, a part of the second electrode TE2_N can be divided into left and right parts relative to the notch part NT. The second connection patterns BP2_N connecting the two second main patterns SP2_N of the second electrode TE2_N spaced apart from each other with respect to the notch portion NT may extend along the edge of the notch portion NT. Therefore, even if the second electrode TE2_N is separated by the notched portion NT, a part of the second electrode TE2_N can still be electrically connected to each other through the second connection pattern BP2_N.

In addition, for example, just like the second electrode TE2_N, a part of the third electrode TE3_N may be divided into left and right parts with respect to the notch part NT. Therefore, the third connection pattern BP3_N adjacent to the notch portion NT may extend along the edge of the notch portion NT to connect the two third main patterns SP3_N spaced apart from each other by the notch portion NT in the first direction DR1. Therefore, even if the third electrode TE3_N is separated by the notched portion NT, a part of the third electrode TE3_N can still be electrically connected to each other through the third connection pattern BP3_N.

According to the inventive concept, an input sensing unit ISU_N having various shapes and a display device DD_N including the input sensing unit ISU_N can be provided. In addition, in various shapes of the input sensing unit ISU_N, the third connection pattern BP3_N may be designed so that the third connection pattern BP3_N does not overlap with the first connection pattern BP1_N. Therefore, it is possible to provide an electronic device that prevents overlap between the third connection pattern BP3_N and the first connection pattern BP1_N in plan view to improve electrical reliability.

According to the inventive concept, it is possible to reduce the overlap between signal lines transmitting electronic signals different from each other. Therefore, the occurrence of noise caused by electrical interference between the signal lines can be reduced to improve the input sensing unit to have improved external input sensitivity. In addition, a display device with improved electrical reliability can be provided.

Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such an embodiment, but is limited to a broader scope in the appended patent application, and various obvious modifications and equivalent settings that are obvious to those having ordinary knowledge in the technical field.

10: The first intermediate inorganic layer 20: Second intermediate inorganic layer 30: middle organic layer AA: Active area AA1: display area AA2: Sensing area AE: the first electrode of the light-emitting element BFL: buffer layer BL: Basic layer BP1, BP1_M, BP1_M1: the first connection pattern BP2, BP2_M, BP2_M1: second connection pattern BP3, BP3_M, BP3_M1: the third connection pattern BS: basic substrate BZA, BZA_N: border area CE: the second electrode of the light-emitting element CH1: the first through hole CH2: second through hole CH3: third through hole CH4: fourth through hole CH5: fifth through hole CNT1, CNT3, CNT1_M, CNT3_M, CNT1_M1, CNT3_M1: contact part CPL: Overlay CSL: control signal line D1, D2: solder pad DD, DD_H, DD_N: display device DE1: the first input electrode DL: data cable DM: display module DP: display panel DP-CL: circuit element layer DPD: signal pad DPF: display pad DP-OLED: display element layer DP-PA: pad area DPU, DPU_H: display unit DR1: first direction axis DR2: Second direction axis DR3: third direction axis ECL: Electronic control layer EDC: enclosure ELD: light emitting element EM, EM1: electronic module EML: light emitting layer EP_H, EP_N: electronic panel ES: encapsulation layer FL: Floating pattern GDC: drive circuit GE1: the first control electrode GE2: second control electrode GL: Scan line GP: clearance GS1, GS2: space HA: Hole area HCL: hole control layer IL: insulating layer IM: image IOL1: the first inorganic layer IOL2: second inorganic layer IS, IS2, FS: front surface IS-CL1: the first conductive layer IS-CL2: second conductive layer IS-IL1: the first insulating layer IS-IL2: Second insulating layer IS-IL3: Third insulating layer ISL: input sensing layer ISP: input sensing panel ISU, ISU_M, ISU_H: input sensing unit LY1: the first layer LY2: second layer LY3: third layer MH: module hole MP, MP1: Part One MS_OP: Grid opening MS1: first grid line MS2: second grid line MSL: grid line NAA: surrounding area NAA1: Non-display area NAA2: Second surrounding area NPXA: non-luminous area NT: Notched part of electronic panel NTA: Notched part of the window panel OCA: Optical clear adhesive OL: Organic layer OP: Illuminated opening OSP1: the first semiconductor pattern OSP2: second semiconductor pattern PDL: pixel definition layer PL: power cord PP, PP1: Part Two PX: pixels PXA: light emitting area RPL: anti-reflection layer RPP: anti-reflective panel SE1: second output electrode SGL: signal line SM: Sealant SP_OP: opening SP1, SP1_M, SP1_M1: the first main pattern SP2, SP2_M, SP2_1: second main pattern SP3, SP3_M, SP3_H: the third main pattern T11, T12: the first sensing pad T2: second sensing pad T3: third sensing pad TA,TA_N: transmission area TC: external input TE1, TE1_M: the first electrode TE2, TE2_M: second electrode TE3, TE3_M: third electrode TFE: thin film encapsulation layer TFL: upper insulating layer TL1, L11, L12, L13: the first sensing line TL11: the first strand TL12: second strand TL2, L21, L22, L23, L24, L2N: second sensing line TL3: third sensing line TR1, TR2: transistor VDD: the first power supply terminal WL: Window layer WP, WP_N: window panel WP-BS: Basic layer WP-BZ: photoresist pattern

The accompanying drawings are used to provide a further understanding of the concept of the present invention, and are incorporated in and constitute a part of this specification. These drawings depict exemplary embodiments of the inventive concept, and are used together with the description to explain the inventive concept. FIG. 1 is a perspective view of a display device according to an exemplary embodiment of the inventive concept. FIGS. 2A, 2B, 2C, and 2D are cross-sectional views of a display device according to an exemplary embodiment of one concept of the present invention. 3A and 3B are cross-sectional views of a portion of a display panel according to an exemplary embodiment of the inventive concept. FIG. 4 is a plan view of a display unit according to an exemplary embodiment of the inventive concept. FIG. 5A is an enlarged cross-sectional view of a display unit according to an exemplary embodiment of the inventive concept. FIG. 5B is an enlarged cross-sectional view of an upper insulating layer according to an exemplary embodiment of the inventive concept. FIG. 6A is a cross-sectional view of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 6B is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 6C is an enlarged plan view showing a part of FIG. 6B. FIG. 6D is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 7 is a plan view of a part of an input sensing unit according to an exemplary embodiment of the inventive concept. 8A and 8B are cross-sectional views of a part of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 9 is a plan view of a part of an input sensing unit according to an exemplary embodiment of the inventive concept. 10A, 10B, and 10C are plan views of parts of the input sensing unit according to an embodiment of the inventive concept. FIG. 11 is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. 12A, 12B, and 12C are plan views of an input sensing unit according to an exemplary embodiment of the inventive concept. FIG. 13A is a perspective view illustrating a coupling state of a display device according to an exemplary embodiment of the inventive concept. FIG. 13B is an exploded perspective view of the display device of FIG. 13A. 14A, 14B, and 14C are plan views showing a part of the assembly of FIG. 13B. FIG. 15A is an exploded perspective view of a display device according to an exemplary embodiment of the inventive concept. FIG. 15B is a plan view showing a part of the assembly of FIG. 15A.

AA2: Sensing area

BP1: the first connection pattern

BP2: second connection pattern

BP3: third connection pattern

BS: basic substrate

DPD: signal pad

DR1: first direction axis

DR2: Second direction axis

IS2: front surface

ISU: input sensing unit

NAA2: Second surrounding area

SP1: the first main pattern

SP2: second main pattern

SP3: the third main pattern

T11, T12: the first sensing pad

T2: second sensing pad

T3: third sensing pad

TE1: the first electrode

TE2: second electrode

TE3: third electrode

TL1: the first sensing line

TL11: the first strand

TL12: second strand

TL2: second sensing line

TL3: third sensing line

Claims (31)

An input sensing unit, including: A plurality of first electrodes arranged in a first direction and extending along a second direction crossing the first direction respectively, the plurality of first electrodes includes a plurality of first main electrodes arranged in the second direction A pattern, and a plurality of first connection patterns provided between the plurality of first main patterns to connect two first main patterns adjacent to each other; A plurality of second electrodes are arranged in the second direction and extend along the first direction, respectively, the plurality of second electrodes include a plurality of second main patterns arranged in the first direction, and a plurality of second electrodes arranged on the second direction A plurality of second connection patterns connecting two second main patterns adjacent to each other between the main patterns; and A plurality of third electrodes, arranged in the second direction, respectively extending along the first direction and configured to receive an electronic signal different from the signal configured by the second electrode to receive, The plurality of third electrodes respectively include: A plurality of third main patterns arranged in the first direction and spaced apart from the plurality of second main patterns in plan view; and A plurality of third connection patterns are disposed between the plurality of third main patterns to connect two third main patterns adjacent to each other, and are spaced apart from the plurality of first connection patterns in a plan view. The input sensing unit as described in item 1 of the patent application scope, wherein the plurality of first connection patterns and the plurality of second connection patterns are disposed on different layers from each other. The input sensing unit as described in item 2 of the patent application scope, wherein the plurality of third connection patterns and the plurality of first connection patterns are disposed on the same layer. The input sensing unit as described in item 2 of the patent application scope, wherein the plurality of second main patterns and the plurality of third main patterns are disposed on the same layer and spaced apart from each other in plan view. The input sensing unit as described in item 4 of the patent application scope, in which: The plurality of second main patterns respectively define an opening; and The plurality of third main patterns are respectively disposed in the openings. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of third connection patterns and the plurality of first main patterns are disposed on different layers from each other. The input sensing unit as described in item 6 of the patent application range, wherein the plurality of third connection patterns respectively overlap at least a part of the plurality of first electrodes in a plan view. The input sensing unit as described in item 1 of the patent application scope, in which: The plurality of third main patterns respectively include: A central part; and A branch portion connected to one side of the central portion and protruding from the central portion in the first direction; and The plurality of third connection patterns are respectively connected to the branch part. The input sensing unit as described in item 8 of the patent application range, wherein the branch portion is provided as a plurality of to be disposed on both sides of the central portion, respectively. The input sensing unit as described in item 8 of the patent application range, wherein the branch portion has a long shape extending along the first direction. The input sensing unit as described in item 8 of the patent application range, wherein the branch portion has a zigzag shape extending along the first direction. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of second connection patterns and the plurality of third connection patterns have different shapes from each other. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of third connection patterns respectively include a plurality of sub-connection patterns arranged in the second direction and connected to the same third main pattern. The input sensing unit as described in item 1 of the patent application range, wherein each of the plurality of first connection patterns is connected to each of the plurality of first main patterns to form a whole. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of first main patterns to the plurality of third main patterns respectively include a plurality of grid lines. The input sensing unit as described in item 15 of the patent application range, wherein the plurality of third connection patterns respectively extend along the plurality of grid lines. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of first connection patterns and the plurality of third main patterns do not overlap each other. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of third connection patterns overlap the first electrode and the second electrode in a plan view. The input sensing unit as described in item 1 of the patent application range, wherein the plurality of third electrodes respectively receive a ground voltage. A display device comprising: A display unit including a plurality of pixels configured to display an image; and An input sensing unit, arranged to overlap the plurality of pixels, and including a first electrode, a second electrode, and a third electrode that receive different electronic signals from each other, The first electrode, the second electrode, and the third electrode respectively include: A plurality of main patterns, spaced apart from each other; and A plurality of connection patterns, arranged between the plurality of main patterns to connect two main patterns adjacent to each other, The connection pattern of the third electrode and the connection pattern of the first electrode are spaced apart from each other in plan view. The display device as described in item 20 of the patent application range, wherein the connection pattern of the first electrode and the connection pattern of the third electrode are disposed on the same layer. The display device as described in item 21 of the patent application scope, in which: The connection pattern of the first electrode and the main pattern of the first electrode are arranged on different layers from each other; and The connection pattern of the third electrode and the main pattern of the third electrode are disposed on different layers from each other. A display device as described in item 22 of the patent application range, wherein the main pattern of the third electrode is spaced apart from the main pattern of the first electrode in plan view. The display device as described in item 20 of the patent application range, wherein the connection pattern of the first electrode and the connection pattern of the second electrode are disposed on different layers from each other. The display device as described in item 24 of the patent application range, wherein the connection pattern of the first electrode and the connection pattern of the third electrode overlap with the main pattern of the first electrode in plan view. The display device as described in Item 20 of the patent application range, wherein the main pattern of the second electrode and the main pattern of the third electrode are arranged in the same direction. The display device as described in item 26 of the patent application scope, in which: The main patterns of the second electrode are respectively defined with predetermined openings; and The main patterns of the third electrode are respectively disposed in the openings. The display device as described in item 20 of the patent application range, wherein the plurality of main patterns respectively include a plurality of grid lines. The display device as described in item 28 of the patent application range, wherein the connection patterns of the third electrodes respectively extend along the plurality of grid lines. The display device as described in item 20 of the patent application range, wherein the plurality of pixels respectively include an organic light-emitting element or a quantum dot light-emitting element. The display device as described in item 20 of the patent application range, wherein the third electrode is configured to receive a ground voltage.

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