TW202008475A - Interconnect substrate having stress modulator and flip chip assembly thereof and manufacturing methods thereof - Google Patents

Abstract

A method of making an interconnect substrate mainly includes steps of: providing metal posts around a stress modulator, providing a molding compound to bind the stress modulator and the metal posts, providing a crack inhibiting layer on the stress modulator and the molding compound and interfaces between the stress modulator and the molding compound, and depositing metal conductors on the crack inhibiting layer and electrically connected to the metal posts. The metal conductors have interconnect pads superimposed over the stress modulator so that bumps for device connection can be mounted at the area covered by the stress modulator, thereby avoiding cracking of the bumps.

Description

Interconnecting substrate with stress regulating member, its flip chip assembly and manufacturing method thereof

The invention relates to an interconnect substrate, its flip-chip assembly and its manufacturing method, in particular to an interconnect substrate with a stress regulator, its flip-chip assembly and its manufacturing method, wherein the flip-chip assembly system will have at least one convex The block overlaps the stress regulator in the interconnect substrate.

High-performance microprocessors and ASICs require more advanced packaging technologies, such as flip-chip assembly, to meet various performance requirements. The technical process of flip chip assembly includes pre-forming bumps on the wafer pads and flip-chip mounting the wafers so that the bumps face down and align with the bonding positions on the package substrate, and the solder on the bumps melts to Wet the joint location. After reflow, the solder is cooled and solidified to form a solder joint between the chip and the package substrate. Compared with the face-up chip connection structure, flip chip can provide the shortest lead, the smallest inductance, the highest frequency, the best noise control, the smallest component pin and the smallest volume.

Although flip chip technology has great advantages over wire bonding, it has great technical limitations. For example, solder bumps are prone to stress problems caused by thermal expansion mismatch between the semiconductor wafer and the package substrate. Due to material fatigue caused by thermo-mechanical stress, bumps will have problems of electrical resistance, cracking and holes becoming more and more serious over time.

Brofman’s U.S. Patent No. 9,698,072, Hong’s U.S. Patent No. 9,583,368 and Chen’s U.S. Patent No. 9,287,143 disclose the flip chip assembly, in which the resin or mold sealing material is located between the wafer and the substrate as a solder bump Covering material, and as a joint between the wafer and the substrate. This primer material mechanically fixes the flip chip surface to the substrate to reduce the stress acting on the small bumps. According to this, the primer can prevent the bumps from being damaged (such as cracking and breaking) when the package is thermally expanded, and the flip chip package has higher long-term stability than the package without the primer. However, the disadvantages of this method include complex process requirements and high cost, and if the primer is not completely coated, there will be unexpected bump cracking problems.

Pendse’s U.S. Patent No. 9,773,685 and Huang’s U.S. Patent No. 9,583,367 disclose flip-chip assemblies that directly connect solder bumps to the substrate lead (BOL), wire (BOT) or narrow pad (BONP), with a view to It has higher reliability. However, because the thermal expansion coefficient (CTE) of the laminated (organic) substrate is usually 16-18 ppm/ °C, the CTE of silicon is about 2-3 ppm/ °C, so the obvious CTE mismatch problem will make these subtle changes impossible How effective is it.

In view of the various development stages and limitations of the recent flip chip assembly, there is an urgent need to fundamentally solve the problem of thermomechanical stress acting on the bumps and interconnect substrates due to CTE mismatch.

The main object of the present invention is to provide an interconnect substrate for flip chip assembly, which can place flip chip bumps above the stress regulator of the interconnect substrate to reduce solder ball cracking caused by wafer/substrate CTE mismatch Defects, which in turn ensures the reliability of flip chip.

Another object of the present invention is to provide an interconnect substrate for flip chip assembly, which is provided with a crack prevention layer on the stress adjusting member, and the crack preventing layer extends laterally to other areas of the interconnect substrate to avoid stress adjustment Cracks appear at the interface between the piece and the surrounding materials. In addition, since the anti-crack layer separates the routing line (used to connect the bumps) from the stress regulating member and the surrounding material of the stress regulating member, the crack formed around the stress regulating member can be prevented from extending to the routing line, thereby ensuring coverage The signal integrity of the crystal body.

According to the above and other objects, the present invention provides a method for manufacturing an interconnect substrate, which includes: providing a metal plate having a first series of metal posts and a support carrier, wherein the first series of metal posts contact the support carrier The top side of the plate and protruding from the top side of the support carrier; a stress adjusting member is provided at a predetermined position laterally surrounded by the first series of metal columns, wherein the thermal expansion coefficient of the stress adjusting member is less than 10 ppm/°C; a mold sealing material is provided on the top side of the support carrier, wherein the mold sealing material joins the stress adjusting member and fills the spaces between the first series of metal columns; a first crack prevention is provided Layer, which covers the top surface of the stress adjusting member and extends laterally to the interface between the stress adjusting member and the molding material, and covers the top surface of the molding material and the first series of metal pillars The top side, wherein the first crack prevention layer includes a resin base layer and reinforcing fibers, and the reinforcing fibers are blended in the resin base layer and form a fiber staggered structure; a plurality of first metal conductors are deposited on the first crack prevention layer On the top surface, wherein the first metal conductors have interconnection pads overlying the top surface of the stress adjusting member, and the first metal conductors are blinded by a plurality of metalizations in the first crack prevention layer The hole is electrically connected to the first series of metal posts; and at least a selected portion of the support carrier plate of the metal plate is removed to expose the bottom surface of the mold sealing material.

In another aspect, the present invention provides another method for manufacturing an interconnect substrate, which includes: providing a metal plate having a first series of metal posts and a support carrier, wherein the first series of metal posts contact the Supporting the top side of the carrier plate and protruding from the top side of the supporting carrier plate; setting a stress adjusting member at a predetermined position laterally surrounded by the first series of metal columns, wherein the thermal expansion coefficient of the stress adjusting member Less than 10 ppm/°C; a mold sealing material is provided on the top side of the support carrier, wherein the mold sealing material joins the stress adjusting member and fills the space between the first series of metal columns and covers the stress A top surface of the adjusting member; depositing a plurality of first metal conductors on the top surface of the molding material, wherein the first metal conductors have interconnection pads overlapping the top surface of the stress adjusting member, and the first A metal conductor is electrically connected to the first series of metal posts; and at least a selected portion of the supporting carrier plate of the metal plate is removed to expose the bottom surface of the mold sealing material.

In still another aspect, the present invention provides a method for manufacturing a semiconductor assembly, which includes: obtaining the above-mentioned interconnect substrate through the above-mentioned method; and disposing a semiconductor element on the interconnect substrate and using a plurality of Bumps to electrically couple the semiconductor element to the interconnection pads of the first metal conductors, wherein the bumps of the semiconductor element are aligned with the stress adjusting member and covered by the stress adjusting member .

Unless specifically described or steps that must occur in sequence, the order of the above steps is not limited to those listed above, and can be changed or rearranged according to the desired design.

Accordingly, the present invention further provides an interconnect substrate, which includes: a stress adjusting member with a thermal expansion coefficient of less than 10 ppm/°C; a first series of metal pillars that laterally surround the stress adjusting member; and a mold sealing material, It joins the peripheral edge of the stress adjusting member and fills the space between the first series of metal pillars; a first anti-cracking layer, which covers the top surface of the stress adjusting member and extends laterally to the stress adjusting member On the interface between the component and the mold sealing material, and covers the top surface of the mold sealing material and the top side of the first series of metal pillars; a plurality of first metal conductors are provided on the top surface of the first crack prevention layer On, wherein the first metal conductors have interconnection pads overlying the top surface of the stress regulator, and the first metal conductors are electrically Connected to the first series of metal columns; and the second series of metal columns extending from the bottom surface of the molding material, and the bottom side of each of the second series of metal columns and the bottom surface of the stress adjusting member are substantially The upper coplanar plane, wherein each of the second series of metal pillars is aligned with its corresponding first series of metal pillars, and is electrically connected to at least one of the first metal conductors.

In another aspect, the present invention provides another interconnect substrate, which includes: a stress adjusting member with a thermal expansion coefficient of less than 10 ppm/°C; a first series of metal pillars that laterally surround the stress adjusting member; A mold sealing material, which joins the peripheral edge of the stress adjusting member and fills the space between the first series of metal pillars, and covers the top surface of the stress adjusting member; and a plurality of first metal conductors, which are provided on the mold On the top surface of the sealing material, the first metal conductors have interconnection pads overlying the top surface of the stress adjusting member, and the first metal conductors are electrically connected to the first series of metal pillars.

In still another aspect, the present invention provides a semiconductor assembly including: the above-mentioned interconnect substrate; and a semiconductor device, which is disposed on the interconnect substrate and electrically coupled to the via a plurality of bumps The interconnection pads of the first metal conductors, wherein the bumps of the semiconductor element are aligned with the stress adjusting member and covered by the stress adjusting member.

The interconnect substrate and manufacturing method of the present invention have many advantages. For example, it is particularly advantageous to provide an interconnection pad for connecting bumps above the stress adjusting member. The reason is that the low CTE of the stress adjusting member can reduce the warping phenomenon of the bump connecting region, and The problem of CTE mismatch between the semiconductor element and the bump connection interval is reduced to avoid cracking of the bump connecting the interconnection pad and the semiconductor element. The first anti-cracking layer is disposed on the stress adjusting member and the mold sealing material to cover the interface between the stress adjusting member and the mold sealing material, thereby solving the problem of unreliable circuits caused by the interface. Since the first crack prevention layer contains a large number of interlaced fibers, the cracks generated at the interface between the stress regulator and the molding material can be suppressed from extending to the first crack prevention layer, thereby ensuring the first crack prevention layer Reliability of metal conductors. The method of arranging metal posts around the stress adjusting member can provide vertical connection channels between opposite sides of the interconnect substrate.

The above and other features and advantages of the present invention can be more clearly understood from the following detailed description of the preferred embodiments.

In the following, an embodiment will be provided to explain the implementation of the present invention in detail. The advantages and effects of the present invention will be more prominent through the content disclosed in the present invention. The illustrations attached here are simplified and used as examples. The number, shape and size of the components shown in the drawings can be modified according to the actual situation, and the configuration of the components may be more complicated. The present invention can also be practiced or applied in other aspects, and various changes and adjustments can be made without departing from the spirit and scope defined by the present invention.

[Example 1]

1-13 are diagrams of a method for manufacturing an interconnect substrate in the first embodiment of the present invention. The interconnect substrate includes a first series of metal pillars, a second series of metal pillars, a metal ring, a stress adjusting member, and a mold sealing material. A first crack prevention layer and a first metal conductor.

1 and 2 are a cross-sectional view and a top perspective schematic view of a metal plate 10, respectively. The metal plate 10 is generally made of copper, aluminum, alloy 42, iron, nickel, silver, gold, combinations thereof, alloys thereof, or other suitable metals. In this embodiment, the metal plate 10 is made of copper, and includes a support carrier 11, a first series of metal posts 12 and a metal ring 13. The first series of metal columns 12 and the metal ring 13 contact the top side of the support carrier 11 and protrude from the top side of the support carrier 11. The metal ring 13 laterally surrounds the position where the stress adjusting member is to be placed, and the first series of metal posts 12 is located outside the area surrounded by the metal ring 13 and serves as a vertical conduction path. In this embodiment, since the metal pillar 12 and the metal ring 13 are formed by a single-sided metal etching process, the metal pillar 12 and the metal ring 13 have tapered side walls. As shown in FIG. 1, as the metal pillar 12 and the metal ring 13 extend upward away from the top side of the support carrier 11, the lateral dimensions of the metal pillar 12 and the metal ring 13 show a tendency to shrink. In addition, the support board 11 is further etched from the back side to form a through hole 101 that is aligned with a predetermined position surrounded by the metal ring 13.

3 and 4 are a cross-sectional view and a top perspective schematic view of the stress adjusting member 20 disposed at a predetermined position surrounded by the metal ring 13, respectively. The stress adjusting member 20 has a low coefficient of thermal expansion (CTE<10 ppm/°C), so compared with a resin laminate, its CTE is more in line with a silicon wafer. Suitable materials for the stress regulator 20 include ceramics, silicon, glass, composite materials, metal alloys, and other materials. In this embodiment, the stress adjusting member 20 is a ceramic block 21 whose thickness is substantially equal to the thickness of the supporting carrier 11 and the metal pillar 12. The stress adjusting member 20 is disposed in the metal ring 13 and inserted into the through hole 101 of the metal plate 10, and the top surface of the stress adjusting member 20 is substantially coplanar with the top side of the metal column 12 and the top side of the metal ring 13, and the stress adjustment The bottom surface of the member 20 and the bottom side of the support carrier 11 are substantially coplanar. In some examples, the inner side wall of the metal ring 13 can be used as a positioning member to ensure the accuracy of placing the stress adjusting member 20. According to this, the stress adjusting member 20 can be accurately limited to a predetermined position, and the peripheral edge of the stress adjusting member 20 is close to the inner side wall of the metal ring 13.

5 and 6 are a cross-sectional view and a top perspective schematic view of the mold sealing material 30, respectively. The molding material 30 can be paste printing, compressive molding, transfer molding, liquid injection molding, spin coating, or other suitable methods. , Deposited on the top side of the support carrier 11, and fill the remaining space in the metal ring 13. Accordingly, the molding material 30 laterally surrounds and uniformly covers the metal post 12, the metal ring 13 and the stress adjusting member 20 in the lateral direction to join the peripheral edge of the stress adjusting member 20 and fill the space between the metal pillars 12. Through the flattening process, the exposed top surface of the molding material 30 will be substantially coplanar with the top side of the metal post 12, the top side of the metal ring 13, and the top surface of the stress adjusting member 20, while the exposed bottom surface of the mold material 30 is The bottom surface of the stress adjusting member 20 is substantially coplanar.

The molding material 30 mainly includes an organic resin binder and granular inorganic filler. In this embodiment, the thermal expansion coefficient of the organic resin binder is greater than 20 ppm/°C, and the thermal expansion coefficient of the granular inorganic filler is less than 10 ppm/°C. In addition, based on the total weight of the molding material 30, the content of the particulate inorganic filler in the molding material 30 is preferably 30 to 90% by weight. Therefore, the CTE of the molding material 30 can be adjusted to be more compatible with the metal plate 10 and the stress adjusting member 20, so as to reduce cracking or peeling problems caused by CTE mismatch.

7 is a cross-sectional view of the first crack prevention layer 42 and the metal sheet 45 laminated/coated from above on the stress adjusting member 20, the molding material 30, the metal post 12, and the metal ring 13. The first anti-cracking layer 42 contacts and is sandwiched between the stress adjusting member 20 and the metal sheet 45, the mold sealing material 30 and the metal sheet 45, the metal post 12 and the metal sheet 45, and the metal ring 13 and the metal sheet 45. In this embodiment, the first crack prevention layer 42 includes a resin base layer 421 and reinforcing fibers 423, wherein the reinforcing fibers 423 are blended in the resin base layer 421 and form a fiber interlacing structure 424. The reinforcing fiber 423 may be carbon fiber, silicon carbide fiber, glass fiber, nylon fiber, polyester fiber or polyamide fiber. According to this, even if cracks are generated at the interface between the stress regulator 20 and the molding material 30 during thermal cycling, the interlaced structure of the reinforcing fibers 423 can prevent the cracks from extending to the first crack prevention layer 42 and thereby ensure the first crack prevention layer 42 Reliability of the routing line.

8 and 9 are a cross-sectional view and a top perspective schematic view of forming a blind hole 43 to expose a selected portion of the metal pillar 12 from above. The blind hole 43 can be formed by various techniques, such as laser drilling, plasma etching, and lithography techniques, which generally have a diameter of 50 microns. Pulse laser can be used to improve the efficiency of laser drilling. Alternatively, a scanning laser beam can be used with a metal mask. The blind hole 43 extends through the first crack prevention layer 42 and the metal sheet 45 and is aligned with the selected portion of the metal pillar 12.

10 and 11 are a cross-sectional view and a top perspective schematic view of the first metal conductor 46 formed on the first crack prevention layer 42 from above, which is formed by the metal deposition and metal patterning processes described below . First, a coating layer 45' is deposited on the metal sheet 45 and the blind hole 43, and then a patterning step is performed on the metal sheet 45 and the coating layer 45' thereon to form the first metal conductor 46. The first metal conductor 46 extends upward from the metal pillar 12 and fills the blind hole 43 to form a metalized blind hole 44 that directly contacts the metal pillar 12 while extending laterally on the top surface of the first crack prevention layer 42. Therefore, the first metal conductor 46 has an interconnection pad 461 that overlaps the top surface of the stress adjusting member 20 and extends laterally from the interconnection pad 461 toward the surrounding area to be blinded by the metallization in the first crack prevention layer 42 The hole 44 is electrically connected to the metal post 12.

The coating layer 45' can be deposited by various techniques (such as electroplating, electroless plating, evaporation, sputtering, or a combination thereof). For example, first immerse the structure in an activator solution to cause a catalytic reaction between the structure and electroless copper, then coat a thin copper layer as a seed layer by electroless plating, and then electroplating the required thickness The second copper layer is formed on the seed layer. Alternatively, before depositing the electroplated copper layer on the seed layer, the seed layer may be formed into a seed layer film such as titanium/copper by sputtering. Once the desired thickness is reached, the coating layer 45' and the metal sheet 45 can be patterned using various techniques to form the first metal conductor 46, which includes wet etching, electrochemical etching, laser assisted etching, and combinations thereof, and used The photomask (not shown) is etched to define the first metal conductor 46.

For the convenience of illustration, the covering layer 45' and the metal sheet 45 are represented by a single layer. Since copper is homogeneously coated, the boundary between the metal layers may be difficult to detect or even undetectable, but there will be a clear boundary between the coating layer 45' and the first crack prevention layer 42.

12 and 13 are a cross-sectional view and a bottom perspective view of forming a second series of metal posts 14 and metal rings 15, respectively. The second series of metal posts 14 are aligned with the first series of metal posts 12, while the lower metal ring 15 is aligned with the upper metal ring 13. In this embodiment, since the second series of metal pillars 14 and the lower metal ring 15 are formed by etching on the bottom side of the support carrier 11 by a single-sided metal etching process, the second series of metal pillars 14 and the lower metal ring 15 The side wall is tapered and not covered by the molding material 30. As shown in FIG. 12, as the metal post 14 and the metal ring 15 extend downwards away from the bottom surface of the molding material 30, the lateral dimensions of the metal post 14 and the metal ring 15 are reduced.

Accordingly, the completed interconnection substrate 100 includes the first series of metal pillars 12, the second series of metal pillars 14, metal rings 13, 15, the stress adjusting member 20, the molding material 20, the first crack prevention layer 42 and the first One metal conductor 46.

FIG. 14 is a cross-sectional view of the semiconductor assembly 110, which electrically connects the semiconductor element 61 to the interconnect substrate 100 shown in FIG. The semiconductor element 61 (shown as a chip) is connected to the interconnection pad 461 face-down via bumps 71. The low CTE of the stress adjusting member 20 can reduce the CTE mismatch between the semiconductor element 61 and the bump connection region (covered by the stress adjusting member 20 from below), and can suppress the bending of the bump connection region during thermal cycling Because of the warpage phenomenon, the bumps 71 that are aligned with the stress adjusting member 20 and completely covered by the stress adjusting member 20 from below can be prevented from cracking, thereby avoiding the problem of connection failure between the semiconductor element 61 and the interconnect substrate 100.

FIG. 15 is a cross-sectional view of the semiconductor assembly 110 shown in FIG. 14 where a primer 81 is further formed. Optionally, a primer 81 is further provided to fill the gap between the semiconductor element 61 and the interconnect substrate 100.

16 is a cross-sectional view of the solder ball 91 further formed in the semiconductor assembly 110 shown in FIG. 15. Optionally, a solder ball 91 is further connected to the metal post 14 for the next level of connection.

[Example 2]

17-18 are diagrams of a method for manufacturing an interconnect substrate according to a second embodiment of the present invention, which has a second crack prevention layer and a second metal conductor.

For the purpose of brief description, any descriptions of the above-mentioned Embodiment 1 that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

17 is a cross-sectional view of the structure of FIG. 12 further forming a second crack prevention layer 52 and forming a blind hole 53 in the second crack prevention layer 52. The second crack prevention layer 52 is covered from below and contacts the bottom surface of the stress adjusting member 20, the bottom surface of the molding material 30, the bottom side of the metal post 14 and the bottom side of the metal ring 15. The blind hole 53 extends through the second anti-cracking layer 52 to expose selected portions of the metal pillar 14 and the metal ring 15 from below. In this embodiment, the second anti-cracking layer 52 includes a resin base layer and reinforcing fibers, wherein the reinforcing fibers are blended in the resin base layer and form a fiber interlaced structure.

18 is a cross-sectional view of the second metal conductor 56 formed on the second crack prevention layer 52 from below, which is formed by the metal deposition and metal patterning processes described below. First, a coating layer 55' is deposited on the second crack prevention layer 52 and in the blind hole 53, and then a patterning step is performed on the coating layer 55' to form a second metal conductor 56. The second metal conductors 56 extend downward from the metal post 14 and the metal ring 15 and fill the blind hole 53 to form a metalized blind hole 54 that directly contacts the metal post 14 and the metal ring 15 while extending laterally The bottom surface of the second crack prevention layer 52. Therefore, the second metal conductor 56 can be electrically connected to the first metal conductor 46 and the metal rings 13, 15 through the metal posts 12, 14 to form a ground connection.

Accordingly, the completed interconnect substrate 200 includes the first series of metal pillars 12, the second series of metal pillars 14, the metal rings 13, 15, the stress adjusting member 20, the molding material 30, the first crack prevention layer 42, the first A metal conductor 46, a second crack prevention layer 52 and a second metal conductor 56.

19 is a cross-sectional view of the semiconductor assembly 210, which electrically connects the semiconductor element 61 to the interconnect substrate 200 shown in FIG. The semiconductor element 61 is electrically connected to the first metal conductor 46 through the bump 71 in a flip-chip manner, wherein the bump 71 is aligned with the stress adjusting member 20 and is covered by the stress adjusting member 20.

[Example 3]

20-24 are diagrams of a method for manufacturing an interconnect substrate according to a third embodiment of the present invention, where a primary metal conductor is provided on a mold sealing material.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

FIG. 20 is a cross-sectional view of the structure of FIG. 5 further forming the primary metal conductor 41 on the molding material 30. The primary metal conductors 41 contact and extend laterally on the top surface of the molding material 30, and are electrically connected to the first series of metal pillars 12 and metal rings 13.

FIG. 21 is a cross-sectional view of forming the first crack prevention layer 42 and the blind hole 43. The first anti-cracking layer 42 covers the top surface of the stress adjusting member 20 and extends laterally on the interface between the stress adjusting member 20 and the molding material 30, and also covers the top surface of the molding material 30 and the primary metal conductor 41. The blind hole 43 extends through the first crack prevention layer 42 to expose the selected portion of the primary metal conductor 41.

22 is a cross-sectional view of the first metal conductor 46 formed on the first crack prevention layer 42 from above, which is formed by a metal deposition and metal patterning process. The first metal conductors 46 extend upward from the primary metal conductor 41 and fill the blind hole 43 to form a metalized blind hole 44 that directly contacts the primary metal conductor 41 while extending laterally from the first crack prevention layer 42 on. Therefore, the first metal conductors 46 can be electrically connected to the metal post 12 through the primary metal conductor 41.

23 is a cross-sectional view of forming the second series of metal pillars 14 and metal rings 15. The support carrier 11 can be selectively removed to reveal the bottom surface of the mold sealing material 30 from below, and form a metal post 14 and a metal ring 15. The second series of metal posts 14 contact and align with the first series of metal posts 12, while the lower metal ring 15 contacts and aligns with the upper metal ring 13.

24 is a cross-sectional view of forming the second crack prevention layer 52 and the second metal conductor 56. The second crack prevention layer 52 covers and contacts the bottom surface of the stress adjusting member 20, the bottom surface of the molding material 30, the bottom side of the metal post 14 and the bottom side of the metal ring 15 from below. The second metal conductor 56 extends downward from the metal post 14 and the metal ring 15 and fills the blind hole 53 to form a metalized blind hole 54 that directly contacts the metal post 14 and the metal ring 15 while extending laterally to the second裂层52上。 Crack layer 52.

Accordingly, the completed interconnection substrate 300 includes the first series of metal pillars 12, the second series of metal pillars 14, the metal rings 13, 15, the stress adjusting member 20, the molding material 30, the primary metal conductor 41, the first The crack layer 42, the first metal conductor 46, the second crack prevention layer 52 and the second metal conductor 56.

FIG. 25 is a cross-sectional view of the semiconductor assembly 310, which electrically connects the semiconductor element 61 to the interconnect substrate 300 shown in FIG. The semiconductor element 61 is electrically connected to the first metal conductor 46 through the bump 71 in a flip-chip manner, wherein the bump 71 is aligned with the stress adjusting member 20 and is covered by the stress adjusting member 20.

[Example 4]

26-31 are diagrams of a method for manufacturing an interconnect substrate according to a fourth embodiment of the present invention. The first metal conductor is grounded to the stress adjusting member through a metalized blind hole in the first crack prevention layer.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

FIG. 26 is a cross-sectional view of the stress adjusting member 20 inserted into the through hole 101 of the metal plate 10. The metal plate 10 and the stress adjusting member 20 are similar to the structure shown in FIG. 3, except that the metal plate 10 does not have a metal ring, and the top surface of the stress adjusting member 20 is provided with a top metal layer 23. In this embodiment, the inner side wall of the through hole 101 of the metal plate 10 can be used as a positioning member to ensure the accuracy when placing the stress adjusting member 20. According to this, the stress adjusting member 20 can be accurately restricted to a predetermined position surrounded laterally by the metal post 12, and the peripheral edge of the stress adjusting member 20 is close to the inner wall of the through hole 101 of the metal plate 10.

FIG. 27 is a cross-sectional view of forming the molding material 30. The mold sealing material 30 covers the top surface of the support carrier 11, the side wall of the metal post 12 and the side wall of the stress adjusting member 20, and further fills the space between the peripheral edge of the stress adjusting member 20 and the inner wall of the through hole 101 of the metal plate 10.

FIG. 28 is a cross-sectional view of forming the first crack prevention layer 42 and forming the blind hole 43 in the first crack prevention layer 42. The first crack prevention layer 42 is covered from above and contacts the top metal layer 23 of the stress adjusting member 20, the molding material 30 and the metal pillar 12. The blind hole 43 extends through the first crack prevention layer 42 and aligns with the selected positions of the metal pillar 12 and the top metal layer 23.

FIG. 29 is a cross-sectional view of the first metal conductor 46 formed on the first crack prevention layer 42 from above. The first metal conductor 46 is formed by a metal deposition and metal patterning process. The first metal conductors 46 extend upward from the metal pillars 12 and the top metal layer 23 of the stress adjusting member 20 and fill the blind holes 43 to form metallized blind holes that directly contact the metal pillars 12 and the top metal layer 23 At the same time, it extends laterally on the first crack prevention layer 42 at the same time. Therefore, the first metal conductors 46 are electrically connected to the metal post 12 for signal transmission, and are electrically connected to the stress adjusting member 20 to form a ground connection.

FIG. 30 is a cross-sectional view of forming the second series of metal pillars 14. The second series of metal posts 14 are aligned with the first series of metal posts 12 and are electrically connected to the first metal conductor 46 through the first series of metal posts 12.

FIG. 31 is a cross-sectional view of forming the second crack prevention layer 52 and the second metal conductor 56. The second crack prevention layer 56 covers and contacts the bottom surface of the stress adjusting member 20, the bottom surface of the molding material 30 and the bottom side of the metal pillar 14. The second metal conductor 56 extends downward from the metal pillar 14 to form a metalized blind hole 54 in the second crack prevention layer 52 while extending laterally on the second crack prevention layer 52.

Accordingly, the completed interconnect substrate 400 includes the first series of metal pillars 12, the second series of metal pillars 14, the stress adjusting member 20, the mold sealing material 30, the first crack prevention layer 42, the first metal conductor 46, the first Two anti-cracking layer 52 and a second metal conductor 56.

[Example 5]

32-35 are diagrams of a method for manufacturing an interconnect substrate according to a fifth embodiment of the present invention, where the first metal conductor is grounded and connected to the metal ring.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

32 and 33 are a cross-sectional view and a top perspective schematic view of the structure of FIG. 5 further forming a first crack prevention layer 42 and a blind hole 43, respectively. The first crack prevention layer 42 covers the metal pillar 12, the metal ring 13, the stress adjusting member 20 and the mold sealing material 30 from above. The blind hole 43 extends through the first crack prevention layer 42 and aligns with the selected positions of the metal pillar 12 and the metal ring 13.

FIG. 34 is a cross-sectional view of the first metal conductor 46 formed on the first crack prevention layer 42 from above. The first metal conductor 46 is formed by a metal deposition and metal patterning process. The first metal conductors 46 extend upward from the metal post 12 and the metal ring 13 and fill the blind hole 43 to form a metalized blind hole 44 that directly contacts the metal post 12 and the metal ring 13 while extending laterally On the first anti-crack layer 42. Therefore, the first metal conductors 46 are electrically connected to the metal post 12 to form a signal route, and are electrically connected to the metal ring 13 to form a ground connection.

FIG. 35 is a cross-sectional view of forming the second series of metal posts 14 and metal rings 15. The support carrier 11 can be selectively removed to form the metal post 14 and the metal ring 15. The second series of metal posts 14 contact and align with the first series of metal posts 12, while the lower metal ring 15 contacts and aligns with the upper metal ring 13.

Accordingly, the completed interconnect substrate 500 includes the first series of metal pillars 12, the second series of metal pillars 14, the metal rings 13, 15, the stress adjusting member 20, the molding material 30, the first crack prevention layer 42 and the first One metal conductor 46.

[Example 6]

36-37 are diagrams of a method for manufacturing an interconnect substrate according to a sixth embodiment of the present invention, which is not provided with a second series of metal posts combined with the first series of metal posts.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

36 is a cross-sectional view of the support carrier 11 in FIG. 34 completely removed. By removing the entire support carrier 11, the bottom side of the metal post 12 and the bottom side of the metal ring 13 are exposed from below.

37 is a cross-sectional view of forming the second crack prevention layer 52 and the second metal conductor 56. The second crack prevention layer 52 is covered from below and contacts the stress adjusting member 20, the molding material 30, the metal pillar 12 and the metal ring 13. The second metal conductors 56 extend downward from the metal pillar 12 and the metal ring 13, and form a metalized blind hole 54 in the second crack prevention layer 52, while extending laterally on the second crack prevention layer 52. Therefore, the second metal conductor 56 can contact and be electrically connected to the metal post 12 for signal conduction, and be electrically connected to the metal ring 13 to form a ground connection.

Accordingly, the completed interconnection substrate 600 includes the metal pillar 12, the metal ring 13, the stress adjusting member 20, the molding material 30, the first crack prevention layer 42, the first metal conductor 46, the second crack prevention layer 52 and Second metal conductor 56.

[Example 7]

38-41 are diagrams of a method for manufacturing an interconnect substrate according to a seventh embodiment of the present invention. The mold sealing material further covers the stress adjusting member from above.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

38 is a cross-sectional view of the stress adjusting member 20 inserted into the through hole 101 of the metal plate 10. The metal plate 10 and the stress adjusting member 20 are substantially similar to those shown in FIG. 3, the difference is that the metal plate 10 of this embodiment does not have a metal ring, and the thickness of the stress adjusting member 20 is smaller than the thickness of the metal plate 10.

39 is a cross-sectional view of forming the molding material 30. FIG. The mold sealing material 30 covers the top surface of the support carrier 11, the top surface of the stress adjusting member 20, the side wall of the metal post 12 and the side wall of the stress adjusting member 20, and fills the space between the peripheral edge of the stress adjusting member 20 and the inner wall of the perforation 101 of the metal plate 10 .

FIG. 40 is a cross-sectional view of the first metal conductor 46 formed on the molding material 30 from above. The first metal conductor 46 is formed by a metal deposition and metal patterning process. The first metal conductors 46 extend laterally on the top surface of the molding material 30 and the top side of the metal post 12. Therefore, the first metal conductors 46 have interconnection pads 461 that overlap the top surface of the stress adjusting member 20 and extend laterally from the interconnection pads 461 toward the surrounding area to be electrically connected to the metal pillar 12.

41 is a cross-sectional view of forming the second series of metal pillars 14. The second series of metal pillars 14 are aligned with the first series of metal pillars 12 and are electrically connected to the first metal conductor 46 through the first series of metal pillars 12.

Accordingly, the completed interconnection substrate 700 includes the first series of metal pillars 12, the second series of metal pillars 14, the stress adjusting member 20, the molding material 30, and the first metal conductor 46.

42 is a cross-sectional view of the semiconductor assembly 710, which electrically connects the semiconductor element 61 to the interconnect substrate 700 shown in FIG. The semiconductor element 61 is electrically connected to the interconnection pad 461 through the bump 71 in a flip-chip manner, wherein the bump 71 is aligned with the stress adjusting member 20 and is covered by the stress adjusting member 20.

43 is a cross-sectional view of another aspect of an interconnect substrate in a seventh embodiment of the invention. The interconnect substrate 760 is substantially the same as that shown in FIG. 41, except that the interconnect substrate 760 further includes a crack prevention layer 57 and a second metal conductor 58. The crack prevention layer 57 covers and contacts the bottom surface of the stress adjusting member 20, the bottom surface of the molding material 30, and the bottom side of the metal post 14 from below. Like the first crack prevention layer and the second crack prevention layer described above, the crack prevention layer 57 includes a resin-based layer and reinforcing fibers, wherein the reinforcing fibers are blended in the resin-based layer and form a fiber interlaced structure. The second metal conductor 58 includes a metalized blind hole 59 in direct contact with the metal post 14 and extends laterally on the crack prevention layer 57.

44 is a cross-sectional view of the semiconductor assembly 770, which electrically connects the semiconductor element 61 to the interconnect substrate 760 shown in FIG. 43. The semiconductor element 61 is electrically connected to the first metal conductor 46 through the bump 71 in a flip-chip manner, wherein the bump 71 is aligned with the stress adjusting member 20 and is covered by the stress adjusting member 20.

[Example 8]

45-47 are diagrams of a method for manufacturing an interconnect substrate according to an eighth embodiment of the present invention. The mold sealing material further covers the stress adjusting member, the metal post and the metal ring from above.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

45 is a cross-sectional view of the structure of FIG. 3 further forming a molding material 30 and forming a blind hole 33 in the molding material 30. The mold sealing material 30 covers the top surface of the support carrier 11, the top surface of the stress adjusting member 20, the top side of the metal pillar 12, the top side of the metal ring 13, the side wall of the metal pillar 12, the side wall of the metal ring 13 and the side wall of the stress adjusting member 20. The blind hole 43 extends through the molding material 30 and aligns with the selected positions of the metal post 12 and the metal ring 13.

46 is a cross-sectional view of the first metal conductor 46 formed on the molding material 30 from above, which is formed by a metal deposition and metal patterning process. The first metal conductors 46 extend upward from the metal post 12 and the metal ring 13 and fill the blind hole 33 to form a metalized blind hole 44 that directly contacts the metal post 12 and the metal ring 13 while extending laterally from the die封材30上。 On the sealing material 30. Therefore, the first metal conductor 46 is electrically connected to the metal post 12 for signal transmission, and is electrically connected to the metal ring 13 to form a ground connection.

47 is a cross-sectional view with the entire support carrier 11 removed. After the entire support carrier 11 is removed, the bottom side of the metal post 12 and the bottom side of the metal ring 13 will be exposed from below.

Accordingly, the completed interconnection substrate 800 includes the first series of metal pillars 12, the metal ring 13, the stress adjusting member 20, the mold sealing material 30, and the first metal conductor 46.

48 is a cross-sectional view of the semiconductor assembly 810, which electrically connects the semiconductor element 61 to the interconnect substrate 800 shown in FIG. The semiconductor element 61 is electrically connected to the first metal conductor 46 through the bump 71 in a flip-chip manner, wherein the bump 71 is aligned with the stress adjusting member 20 and is covered by the stress adjusting member 20.

49 is a cross-sectional view of another aspect of an interconnect substrate in an eighth embodiment of the invention. The interconnection substrate 860 is substantially the same as shown in FIG. 47, except that the interconnection substrate 860 further includes a second series of metal pillars 14, a metal ring 15, a crack prevention layer 57 and a second metal conductor 58, but does not have Contact the metalized blind hole on the top side of the metal ring 13. The crack prevention layer 57 covers and contacts the bottom surface of the stress adjusting member 20, the bottom surface of the molding material 30, the bottom side of the metal post 14 and the bottom side of the metal ring 15 from below. The second metal conductor 58 includes a metalized blind hole 59 and extends laterally on the crack prevention layer 57, wherein the metalized blind hole 59 directly contacts the metal post 14 for signal conduction and directly contacts the metal ring 15 to form Ground connection.

FIG. 50 is a cross-sectional view of the semiconductor assembly 870, which electrically connects the semiconductor element 61 to the interconnect substrate 860 shown in FIG. 49. The semiconductor element 61 is electrically connected to the first metal conductor 46 through the bump 71 in a flip-chip manner, wherein the bump 71 is aligned with the stress adjusting member 20 and is covered by the stress adjusting member 20.

[Example 9]

FIGS. 51-53 are diagrams of a method for manufacturing an interconnect substrate according to a ninth embodiment of the present invention. The first metal conductor is grounded and connected to the stress adjusting member through a metalized blind hole of the molding material.

For the purpose of brief description, any descriptions in the above embodiments that can be used for the same application are incorporated herein, and there is no need to repeat the same descriptions.

FIG. 51 is a sectional view of the structure of FIG. 26 further forming a molding material 30 and forming a blind hole 33 in the molding material 30. The mold sealing material 30 covers the top surface of the support carrier 11, the top surface of the stress adjusting member 20, the top side of the metal pillar 12, the side wall of the metal pillar 12 and the side wall of the stress adjusting member 20. The blind hole 43 extends through the molding material 30 to expose selected portions of the metal pillar 12 and the metal layer 23 on the top of the stress adjusting member 20 from above.

52 is a cross-sectional view of the first metal conductor 46 formed on the molding material 30 from above, which is formed by a metal deposition and metal patterning process. The first metal conductors 46 extend upward from the metal pillar 12 and the top metal layer 23 of the stress adjusting member 20 and fill the blind hole 33 to form a metalized blind hole 44 that directly contacts the metal pillar 12 and the top metal layer 23 , While extending laterally on the molding material 30. Therefore, the first metal conductor 46 is electrically connected to the metal post 12 for signal transmission, and is electrically connected to the stress adjusting member 20 to form a ground connection.

FIG. 53 is a cross-sectional view of forming the second series of metal pillars 14. The second series of metal pillars 14 are aligned with the first series of metal pillars 12 and are electrically connected to the first metal conductor 46 through the first series of metal pillars 12.

Accordingly, the completed interconnection substrate 900 includes the first series of metal pillars 12, the second series of metal pillars 14, the stress adjusting member 20, the molding material 30, and the first metal conductor 46.

54 is a cross-sectional view of another aspect of an interconnect substrate in a ninth embodiment of the present invention. The interconnect substrate 960 is substantially the same as that shown in FIG. 53, except that the interconnect substrate 960 further includes a crack prevention layer 57 and a second metal conductor 58. The crack prevention layer 57 covers and contacts the bottom surface of the stress adjusting member 20, the bottom surface of the molding material 30, and the bottom side of the metal post 14 from below. The second metal conductor 58 includes a metalized blind hole 59 that directly contacts the metal post 14 and extends laterally on the crack prevention layer 57.

As shown in the above embodiments, the present invention constructs a unique interconnection substrate having interconnection pads superimposed on the stress adjusting member and exhibiting better reliability. In a preferred embodiment of the present invention, the interconnect substrate includes: a stress adjusting member with a thermal expansion coefficient of less than 10 ppm/°C; a first series of metal pillars disposed around the peripheral edge of the stress adjusting member, And keep a distance from the peripheral edge of the stress adjusting member; a mold sealing material covering the peripheral edges of the stress adjusting member and the side walls of the metal pillars; a first crack prevention layer covering the stress adjusting member The top surface extends laterally to the interface between the stress regulator and the molding material, and covers the top surface of the molding material and the top side of the first series of metal columns; and the first metal conductor, which extends laterally A top surface of the crack prevention layer, wherein the first metal conductors have interconnection pads overlying the top surface of the stress regulator, and are electrically connected to the plurality of blind metallization holes in the first crack prevention layer The first series of metal columns. In addition, the interconnection substrate of another preferred embodiment of the present invention is substantially the same as the above-mentioned interconnection substrate, the difference is mainly that (i) the interconnection substrate does not have a first crack prevention layer, (ii) the mold sealing material is more Covering the top surface of the stress adjusting member, and optionally covering the top side of the first series of metal columns, (iii) the first metal conductor is deposited on the top surface of the molding material and is electrically connected to the first series of metal columns.

The stress adjusting member is a non-electronic component, and no signal is connected to the stress adjusting member, and the thermal expansion coefficient of the stress adjusting member is usually less than 10 ppm/°C. Since the low CTE of the stress adjusting member can reduce the CTE mismatch between the chip and the pad setting area (covered by the stress adjusting member), and suppress the warping phenomenon of the pad setting area during thermal cycling, it is possible to avoid aligning the stress adjusting member And the conductive contacts (such as bumps) completely covered by the stress adjusting member are cracked. In addition, the stress adjusting member may have an unpatterned top metal layer electrically connected to at least one of the first metal conductors through an additional metalized blind hole in the first crack prevention layer or the molding material To form a ground connection.

The first series of metal columns surround the stress regulator laterally and can serve as a vertical signal conduction path or provide a ground/power plane for energy transfer and return. Since the first series of metal pillars can be formed by a metal etching process, they have tapered sidewalls. In a preferred embodiment, the height of the first series of metal pillars is less than the thickness of the stress adjusting member, and the lateral dimension of the first series of metal pillars extends from the bottom surface of the mold sealing material to the mold sealing material as the first series metal pillars The top surface becomes smaller.

The mold sealing material can provide a mechanical joint force between the stress adjusting member and the first series of metal columns, and the mold sealing material has a larger thickness where it contacts the stress adjusting member and a smaller thickness where it contacts the first series of metal columns. Through the planarization process, the mold sealing material may have a flat top surface that is substantially coplanar with the top surface of the stress adjusting member and the top side of the first series of metal pillars. Or, the top surface of the stress adjusting member is located at a height between the top surface and the bottom surface of the molding material, and the top side of the first series of metal columns and the top surface of the molding material are substantially coplanar, or the top side of the first series of metal columns is located The height between the top surface and the bottom surface of the molding material. In a preferred embodiment, the mold sealing material mainly includes an organic resin binder and a granular inorganic filler. Because the thermal expansion coefficient of the granular inorganic filler is less than 10 ppm/°C, the CTE of the mold sealing material can be adjusted to better match the metal post and stress regulator.

The first anti-cracking layer can serve as an insulating layer for electrical insulation and can provide a stable platform on which the circuit is deposited. Since the reinforcing fibers in the first crack prevention layer are interlaced, the cracks generated at the interface between the stress regulator and the molding material can be suppressed from extending into the first crack prevention layer, thereby ensuring that the cracks on the first crack prevention layer The stability of the routing line. Examples of reinforcing fibers include carbon fiber, silicon carbide fiber, glass fiber, nylon fiber, polyester fiber and polyamide fiber.

The first metal conductors can provide interconnection pads on the top surface of the stress adjusting member, and further extend laterally from the interconnection pad across the area on the interface between the stress adjusting member and the molding material to be electrically connected to The first series of metal columns. Since the interconnection pads used to connect the elements overlap on the top surface of the stress regulator, the problem of I/O connection failure between the interconnection pads and the semiconductor device on which the flip-chip is placed on the interconnection pads can be avoided. In addition, the first metal conductor can be electrically connected to the top metal layer of the stress adjusting member and/or the metal ring surrounding the peripheral edge of the stress adjusting member through the metallized blind hole in the first crack prevention layer or the molding material To form a ground connection.

The interconnect substrate may further include a second series of metal pillars, which contact the bottom side of the first series of metal pillars and protrude from the bottom surface of the molding material. The added height of the first series of metal columns and the second series of metal columns can be substantially equal to the thickness of the stress adjusting member or greater than the thickness of the stress adjusting member. Since the second series of metal pillars can be formed by a metal etching process, they have tapered sidewalls that are not covered by the molding material. In a preferred embodiment, the bottom side of the second series of metal pillars and the bottom surface of the stress adjusting member are substantially coplanar. In addition, when the second series of metal pillars face away from the bottom surface of the molding material and the bottom of the first series of metal pillars When the lateral direction is extended, the lateral dimension of the second series of metal pillars becomes smaller and smaller.

For further winding, the interconnect substrate may further include a second crack prevention layer and a second metal conductor on the second crack prevention layer. The second anti-cracking layer covers the bottom surface of the mold sealing material and the bottom surface of the stress adjusting member to serve as an insulating layer for electrical insulation and provide a stable platform on which the circuit is deposited. The second metal conductors extend laterally on the bottom surface of the second crack prevention layer, and are electrically connected to the first metal conductor through the first series of metal pillars and the selective second series of metal pillars. In addition, the second metal conductor can be electrically connected to the metal ring surrounding the stress adjusting member to form a ground connection.

The present invention also provides a semiconductor assembly, in which a semiconductor element (such as a wafer) is electrically connected to the interconnection pad of the interconnection substrate through a plurality of bumps aligned and covered by a stress adjusting member. Preferably, each bump used for the connecting element is completely located in the area completely covered by the stress adjusting member, and each bump does not extend laterally beyond the peripheral edge of the stress adjusting member.

The term "coverage" means incomplete and complete coverage in the vertical and/or lateral direction. For example, in a preferred embodiment, the stress adjusting member completely covers the bump, regardless of whether another element (such as the first crack prevention layer and the first metal conductor) is located between the stress adjusting member and the bump.

The meaning of "connected" includes contact and non-contact with a single or multiple components. For example, in a preferred embodiment, the semiconductor element may be placed on the interconnection pad, regardless of whether the semiconductor element is separated from the interconnection pad by bumps.

The term "alignment" means the relative position between components, regardless of whether the components are kept at a distance or adjacent to each other, or one component is inserted and extends into another component. For example, in a preferred embodiment, when the imaginary horizontal line intersects the inner wall of the perforation of the metal plate and the peripheral edge of the stress regulator, the inner wall of the perforation of the metal plate is laterally aligned with the peripheral edge of the stress regulator, regardless of the perforation of the metal plate Is there any other element that intersects the imaginary horizontal line between the inner side wall and the peripheral edge of the stress adjusting member, and whether there is another element that intersects the peripheral edge of the stress adjusting member but does not intersect the inner side wall of the metal plate, or the inner side of the metal plate An imaginary horizontal line where the side wall intersects but does not intersect the peripheral edge of the stress regulator. Similarly, in a preferred embodiment, when the imaginary vertical line intersects the bump and the stress adjusting member, the bump is aligned with the stress adjusting member, regardless of whether there are other An element that intersects a vertical line, whether or not it has another imaginary vertical line that intersects the stress regulator but does not intersect the bump, or intersects the bump but does not intersect the stress regulator.

The term "close" means that the width of the gap between the components does not exceed the maximum acceptable range. As is known in the art, when the gap between the peripheral edge of the stress regulator and the inner wall of the perforation of the metal plate or the peripheral edge of the stress regulator and the inner wall of the metal ring is not narrow enough, the stress regulator cannot be accurately limited to the predetermined position. The maximum acceptable limit of the gap between the peripheral edge of the stress adjusting member and the perforated inner wall of the metal plate or between the peripheral edge of the stress adjusting member and the inner wall of the metal ring can be determined according to the degree of accuracy desired when the stress adjusting member is set at the predetermined position . Therefore, the descriptions of "the peripheral edge of the stress adjusting member is close to the inner wall of the metal ring" and "the peripheral edge of the stress adjusting member is close to the inner wall of the perforation of the metal plate" refer to the relationship between the peripheral edge of the stress adjusting member and the inner wall of the metal ring or The gap between the inner wall of the perforation of the metal plate is narrow enough to prevent the position error of the stress adjusting member from exceeding the acceptable maximum error limit.

The term "electrical connection" means direct or indirect electrical connection. For example, in a preferred embodiment, the second series of metal pillars are electrically connected to the first metal conductor by the first series of metal pillars, and the second series of metal pillars are kept away from the first metal conductor and not A metal conductor is in contact.

The interconnect substrate prepared by this method is highly reliable, inexpensive, and very suitable for mass production. The manufacturing method of the present invention has high applicability and uses a variety of mature electrical and mechanical connection technologies in a unique and progressive way. In addition, the manufacturing method of the present invention can be implemented without expensive tools. Therefore, compared with traditional technology, this manufacturing method can greatly improve the yield, yield, performance and cost-effectiveness.

The embodiments described herein are for illustrative purposes, and these embodiments may simplify or omit elements or steps well known in the art to avoid obscuring the characteristics of the present invention. Similarly, in order to make the drawings clear, the drawings may omit repeated or unnecessary elements and element symbols.

100, 200, 300, 400, 500, 600, 700, 760, 800, 860, 900, 960 110, 210, 310, 710, 770, 810, 870 10‧‧‧Metal plate 101‧‧‧Perforation 11‧‧‧support carrier board 12, 14‧‧‧Metal pillar 13, 15‧‧‧Metal ring 20‧‧‧Stress adjuster 21‧‧‧Ceramic block 23‧‧‧Top metal layer 30‧‧‧mold sealing material 41‧‧‧ Primary metal conductor 42‧‧‧The first anti-cracking layer 421‧‧‧Resin base 423‧‧‧reinforced fiber 424‧‧‧ Fiber interlaced structure 43, 53‧‧‧ blind hole 44,54,59‧‧‧Metalized blind hole 45‧‧‧Metal sheet 45’, 55’‧‧‧ coating 46‧‧‧First metal conductor 461‧‧‧Interconnect pad 52‧‧‧Second anti-crack layer 56, 58‧‧‧ Second metal conductor 57‧‧‧Anti-crack layer 61‧‧‧Semiconductor components 71‧‧‧Bump 81‧‧‧ Primer 91‧‧‧solder ball

With reference to the accompanying drawings, the present invention can be more clearly understood by the following detailed description of the preferred embodiments, in which: FIGS. 1 and 2 are respectively a cross-sectional view and a top perspective schematic view of a metal plate in the first embodiment of the present invention; 3 and 4 are the first embodiment of the present invention, the cross-sectional view and top perspective schematic view of the structure provided in Figures 1 and 2; Figures 5 and 6 are the first embodiment of the present invention, Figures 3 and 4 on the structure A cross-sectional view and a top perspective schematic view of forming a mold sealing material; FIG. 7 is a cross-sectional view of a first crack prevention layer and a metal sheet formed on the structure of FIG. 5 in the first embodiment of the invention; FIGS. 8 and 9 are the first embodiment of the invention, respectively In Fig. 7, a cross-sectional view and a top perspective schematic view of a blind hole formed on the structure of Fig. 7; Figs. 10 and 11 are respectively a cross-sectional view and a top perspective schematic view of a first metal conductor formed on the structure of Figs. 8 and 9 in the first embodiment of the invention; Fig. 12 13 and 13 are respectively a cross-sectional view and a bottom perspective view of the structure of FIGS. 10 and 11 where the bottom of the metal plate is selectively removed to complete the fabrication of the interconnect substrate in the first embodiment of the invention; FIG. 14 is a semiconductor of the first embodiment of the invention FIG. 15 is a cross-sectional view of a semiconductor assembly electrically connected to the interconnection substrate of FIG. 12; FIG. 15 is a cross-sectional view of a primer formed in the semiconductor assembly of FIG. 14 in the first embodiment of the invention; FIG. 16 is a first embodiment of the invention , A cross-sectional view of a solder ball formed in the semiconductor assembly of FIG. 15; FIG. 17 is a cross-sectional view of a second crack prevention layer and a blind hole formed on the structure of FIG. 12 in a second embodiment of the invention; FIG. 18 is a second embodiment of the invention In Fig. 17, a second metal conductor is formed on the structure to complete the fabrication of the interconnect substrate; Fig. 19 is a cross-sectional view of the semiconductor assembly in which the semiconductor device is electrically connected to the interconnect substrate of Fig. 18 in the second embodiment of the invention; 20 is a cross-sectional view of the primary metal conductor formed on the structure of FIG. 5 in the third embodiment of the present invention; FIG. 21 is a cross-sectional view of the first crack prevention layer and the blind hole formed on the structure of FIG. 20 in the third embodiment of the present invention; FIG. 22 In the third embodiment of the present invention, a cross-sectional view of the first metal conductor is formed on the structure of FIG. 21; FIG. 23 is a cross-sectional view of the structure of FIG. 22 in which the bottom of the metal plate is selectively removed in the third embodiment of the present invention; In the third embodiment, the second crack prevention layer and the second metal conductor are formed on the structure of FIG. 23 to complete the fabrication of the interconnect substrate; FIG. 25 is the third embodiment of the present invention, the semiconductor device is electrically connected to FIG. 24 A cross-sectional view of the semiconductor assembly of the interconnection substrate; FIG. 26 is the stress of the fourth embodiment of the invention FIG. 27 is a cross-sectional view of a perforated metal plate inserted into a perforation; FIG. 27 is a cross-sectional view of a molding material formed on the structure of FIG. 26 in the fourth embodiment of the present invention; FIG. Cross-sectional view of the split layer and the blind hole; FIG. 29 is a cross-sectional view of the first metal conductor formed on the structure of FIG. 28 in the fourth embodiment of the invention; FIG. 30 is a selective removal of metal in the structure of FIG. 29 in the fourth embodiment of the invention A cross-sectional view of the bottom of the board; FIG. 31 is a cross-sectional view of forming a second crack prevention layer and a second metal conductor on the structure of FIG. 30 to complete the fabrication of an interconnect substrate in the fourth embodiment of the present invention; FIGS. 32 and 33 are the first In the fifth embodiment, a cross-sectional view and a top perspective schematic view of the first crack prevention layer and the blind hole formed on the structure of FIG. 5; FIG. 34 is a cross-sectional view of the first metal conductor formed on the structure of FIG. 32 in the fifth embodiment of the present invention; In the fifth embodiment of the present invention, the structure of FIG. 34 selectively removes the bottom of the metal plate to complete the fabrication of the interconnect substrate; FIG. 36 is the sixth embodiment of the present invention, the structure of FIG. 34 completely removes the bottom of the metal plate Cross-sectional view; FIG. 37 is a cross-sectional view of forming a second crack prevention layer and a second metal conductor on the structure of FIG. 36 to complete the fabrication of an interconnect substrate in the sixth embodiment of the invention; FIG. 38 is a stress of the seventh embodiment of the invention FIG. 39 is a cross-sectional view of the seventh embodiment of the present invention, forming a molding material on the structure of FIG. 38; FIG. 40 is a seventh embodiment of the present invention, the first metal conductor is formed on the structure of FIG. 39 41 is a cross-sectional view of the structure of FIG. 40 selectively removing the bottom of the metal plate to complete the fabrication of the interconnect substrate; FIG. 42 is a cross-sectional view of the seventh embodiment of the present invention; FIG. 42 is a seventh embodiment of the present invention, the semiconductor devices are electrically connected 41 is a cross-sectional view of the semiconductor assembly of the interconnect substrate; FIG. 43 is a cross-sectional view of another aspect of the interconnect substrate in the seventh embodiment of the present invention; FIG. 44 is a semiconductor device in the seventh embodiment of the present invention is electrically connected to Fig. 43 is a cross-sectional view of the semiconductor assembly of the interconnection substrate; Fig. 45 is a cross-sectional view of the molding material and blind holes formed on the structure of Fig. 3 in the eighth embodiment of the invention; Fig. 46 is a structure of Fig. 45 in the eighth embodiment of the invention A cross-sectional view of a first metal conductor formed on the top; FIG. 47 is a cross-sectional view of the structure of FIG. 46 with the bottom of the metal plate completely removed in the eighth embodiment of the invention to complete the fabrication of the interconnect substrate; FIG. 48 is a eighth embodiment of the invention. The semiconductor element is electrically connected to the semiconductor of the interconnection substrate of FIG. 47 Sectional view of a body assembly; FIG. 49 is a sectional view of another aspect of an interconnect substrate in an eighth embodiment of the invention; FIG. 50 is a semiconductor element electrically connected to a semiconductor of the interconnection substrate of FIG. 49 in an eighth embodiment of the invention Sectional view of the assembly; FIG. 51 is a sectional view of the molding material and blind holes formed on the structure of FIG. 26 in the ninth embodiment of the invention; FIG. 52 is a structure of the first metal conductor formed on the structure of FIG. 51 in the ninth embodiment of the invention 53 is a ninth embodiment of the present invention, the structure of FIG. 52 selectively removes the bottom of the metal plate to complete the interconnection substrate fabrication; FIG. 54 is a ninth embodiment of the present invention, another form of mutual Cross-sectional view of the substrate.

100‧‧‧Interconnect substrate

13, 15‧‧‧Metal ring

30‧‧‧mold sealing material

44‧‧‧Metalized blind hole

461‧‧‧Interconnect pad

12, 14‧‧‧Metal pillar

20‧‧‧Stress adjuster

42‧‧‧The first anti-cracking layer

46‧‧‧First metal conductor

Claims (34)

A method for manufacturing an interconnect substrate, comprising: providing a metal plate having a first series of metal posts and a support carrier, wherein the first series of metal posts contact the top side of the support carrier and are supported by the support The top side of the carrier plate protrudes; 　　　　　 Set a stress adjusting member at a predetermined position laterally surrounded by the first series of metal columns, wherein the thermal expansion coefficient of the stress adjusting member is less than 10 ppm/°C; at the support A mold sealing material is provided on the top side of the carrier board, wherein the mold sealing material joins the stress adjusting member and fills the spaces between the first series of metal columns; a first crack prevention layer is provided, which covers the stress adjusting member The top surface, and extends laterally to the interface between the stress regulating member and the molding material, and covers the top surface of the molding material and the top side of the first series of metal pillars, wherein the first prevention The crack layer includes a resin base layer and reinforcing fibers, the reinforcing fibers are blended in the resin base layer, and form a fiber interlaced structure; depositing a plurality of first metal conductors on the top surface of the first crack prevention layer, of which The first metal conductor has an interconnection pad overlapping the top surface of the stress adjusting member, and is electrically connected to the first series of metal pillars through a plurality of blind metallization holes in the first crack prevention layer; And removing at least a selected portion of the supporting carrier of the metal plate to expose the bottom surface of the molding material. A method for manufacturing an interconnect substrate, comprising: providing a metal plate having a first series of metal posts and a support carrier, wherein the first series of metal posts contact the top side of the support carrier and are supported by the support The top side of the carrier plate protrudes; 　　　　　 Set a stress adjusting member at a predetermined position laterally surrounded by the first series of metal columns, wherein the thermal expansion coefficient of the stress adjusting member is less than 10 ppm/°C; at the support A mold sealing material is provided on the top side of the carrier board, wherein the mold sealing material joins the stress adjusting member and fills the space between the first series of metal pillars, and covers the top surface of the stress adjusting member; A metal conductor on the top surface of the molding material, wherein the first metal conductors have interconnection pads overlapping the top surface of the stress adjusting member, and are electrically connected to the first series of metal pillars; and At least a selected portion of the supporting carrier of the metal plate is removed to reveal the bottom surface of the molding material. The manufacturing method as described in item 1 of the patent application scope, wherein the reinforcing fibers of the first anti-cracking layer include carbon fibers, silicon carbide fibers, glass fibers, nylon fibers, polyester fibers, or polyamide fibers. The manufacturing method as described in item 1 of the scope of the patent application further includes: forming a second crack prevention layer covering the bottom surface of the mold sealing material and the bottom surface of the stress adjusting member; and depositing a plurality of second metal conductors on the On the bottom surface of the second crack prevention layer, the second metal conductors are electrically connected to the first metal conductors through the first series of metal pillars. The manufacturing method as described in item 1 of the patent application scope, wherein the metal plate further has a metal ring that contacts the top side of the support carrier plate and protrudes from the top side of the support carrier plate, and the The metal ring surrounds the predetermined position, and the step of disposing the stress adjusting member at the predetermined position includes disposing the stress adjusting member in the metal ring. The manufacturing method as described in item 5 of the patent application scope, wherein the metal ring is electrically connected to at least one of the first metal conductors through an additional metalized blind hole in the first crack prevention layer . The manufacturing method as described in item 1 of the patent application scope, wherein the stress adjusting member has a top metal layer on a top surface thereof, and the stress adjusting member is blinded by an additional metallization in the first anti-cracking layer The hole is further electrically connected to at least one of the first metal conductors. The manufacturing method as described in item 2 of the patent application scope, wherein the molding material further covers the top sides of the first series of metal pillars, and the first metal conductors are metallized by the pluralities in the molding material The blind hole is electrically connected to the first series of metal pillars. The manufacturing method as described in item 2 of the patent application scope further includes: forming a crack prevention layer covering the bottom surface of the mold sealing material and the bottom surface of the stress adjusting member; and depositing a plurality of second metal conductors on the crack prevention On the bottom surface of the layer, the second metal conductors are electrically connected to the first metal conductors through the first series of metal pillars. The manufacturing method as described in item 2 of the patent application scope, wherein the metal plate further has a metal ring which contacts the top side of the support carrier plate and protrudes from the top side of the support carrier plate, and the The metal ring surrounds the predetermined position, and the step of disposing the stress adjusting member at the predetermined position includes disposing the stress adjusting member in the metal ring. The manufacturing method as described in item 10 of the patent application scope, wherein the metal ring is electrically connected to at least one of the first metal conductors through an additional metalized blind hole in the molding material. The manufacturing method as described in item 2 of the patent application scope, wherein the stress adjusting member has a top metal layer on a top surface thereof, and the stress adjusting member is additionally metallized by a blind hole in the mold sealing material, It is further electrically connected to at least one of the first metal conductors. The manufacturing method as described in any one of claims 1 to 12, wherein the step of disposing the stress adjusting member at the predetermined position includes: disposing the stress adjusting member in a perforation of the metal plate And, the mold sealing material further fills the space between the peripheral edge of the stress adjusting member and the inner wall of the perforation of the metal plate. The manufacturing method according to any one of claims 1 to 12, wherein the step of removing at least a selected portion of the support carrier of the metal plate is to completely remove the support carrier. The manufacturing method according to any one of claims 1 to 12, wherein the step of removing at least a selected portion of the support carrier of the metal plate includes retaining the rest of the support carrier To form a second series of metal pillars, each of the second series of metal pillars is aligned with its corresponding first series of metal pillars, and is electrically connected to at least one of the first metal conductors. The manufacturing method as described in any one of claims 1 to 12, wherein the first series of metal pillars are formed by a metal etching process, and the sidewalls of each of the first series of metal pillars In the shape of a cone, the lateral dimensions of the first series of metal pillars become smaller as the first series of metal pillars extend away from the top side of the support carrier. The manufacturing method as described in item 15 of the patent application scope, wherein the side walls of each of the second series of metal pillars are tapered, and the lateral dimensions of the second series of metal pillars follow the second series of metals The column extends away from the bottom surface of the molding material and becomes smaller. A method for manufacturing a semiconductor assembly, comprising: manufacturing the interconnect substrate by the manufacturing method as described in any one of claims 1 to 17; and disposing a semiconductor element on the interconnect On the substrate, the semiconductor element is electrically coupled to the interconnection pads of the first metal conductors by a plurality of bumps, wherein the bumps of the semiconductor element are aligned with the stress adjusting member, and Covered by the stress regulator. An interconnect substrate, comprising: a stress adjusting member with a thermal expansion coefficient of less than 10 ppm/°C; a first series of metal pillars that laterally surround the stress adjusting member; and a mold sealing material that engages the stress adjusting member The peripheral edge and fill the space between the first series of metal pillars; a first anti-cracking layer covering the top surface of the stress adjusting member and extending laterally between the stress adjusting member and the molding material On the interface, and cover the top surface of the mold sealing material and the top sides of the first series of metal pillars; a plurality of first metal conductors are provided on the top surface of the first crack prevention layer, of which the first The metal conductor has an interconnection pad overlying the top surface of the stress adjusting member, and the first metal conductors are electrically connected to the first ones through a plurality of blind metallization holes in the first crack prevention layer A series of metal columns; and a second series of metal columns extending from the bottom surface of the molding material, and the bottom side of each of the second series of metal columns and the bottom surface of the stress adjusting member are substantially coplanar, each of which The second series of metal pillars are aligned with the corresponding first series of metal pillars, and are electrically connected to at least one of the first metal conductors. The interconnection substrate as described in item 19 of the patent application scope, wherein the first crack prevention layer includes a resin base layer and reinforcing fibers, the reinforcing fibers are blended in the resin base layer, and the reinforcing fibers include carbon fibers, Silicon carbide fiber, glass fiber, nylon fiber, polyester fiber or polyamide fiber. The interconnection substrate as described in item 19 of the patent application scope further includes: a second crack prevention layer covering the bottom surface of the mold sealing material and the bottom surface of the stress adjusting member; and a plurality of second metal conductors provided on On the bottom surface of the second crack prevention layer, the second metal conductors are electrically connected to the first metal conductors through the first series of metal pillars. The interconnection substrate as described in item 19 of the patent application scope further includes: a metal ring surrounding the stress adjusting member in a lateral direction, wherein (i) the first series of metal pillars are located around the metal ring Outside the area, (ii) the mold sealing material further joins the inner and outer edges of the metal ring, and (iii) the first crack prevention layer further covers the top side of the metal ring. The interconnect substrate as described in Item 22 of the patent application range, wherein the metal ring is electrically connected to at least one of the first metal conductors through an additional metalized blind hole in the first crack prevention layer By. The interconnect substrate of claim 19, wherein the stress adjusting member has a top metal layer on a top surface thereof, and the stress adjusting member is additionally metallized by one of the first crack prevention layers The blind hole is further electrically connected to at least one of the first metal conductors. An interconnect substrate, which includes: a stress adjusting member with a thermal expansion coefficient of less than 10 ppm/°C; a first series of metal pillars that laterally surround the stress adjusting member and a molding material that joins the periphery of the stress adjusting member Edge, and fill the space between the first series of metal pillars, and cover the top surface of the stress adjusting member; and a plurality of first metal conductors, which are provided on the top surface of the molding material, wherein the first The metal conductor has an interconnection pad overlapping the top surface of the stress adjusting member, and the first metal conductors are electrically connected to the first series of metal pillars. The interconnection substrate as described in item 25 of the patent application range, wherein the molding material further covers the top sides of the first series of metal pillars, and the first metal conductors pass through the plural metals in the molding material The blind holes are electrically connected to the first series of metal pillars. The interconnection substrate as described in item 25 of the patent application scope further includes: a crack prevention layer covering the bottom surface of the molding material and the bottom surface of the stress adjusting member; and a plurality of second metal conductors provided on the On the bottom surface of the crack prevention layer, the second metal conductors are electrically connected to the first metal conductors through the first series of metal pillars. The interconnect substrate as described in item 25 of the patent application scope further includes: a metal ring surrounding the stress adjusting member in a lateral direction, wherein the first series of metal pillars are located outside the area surrounded by the metal ring, Moreover, the mold sealing material further joins the inner edge and the outer edge of the metal ring, and covers the top side of the metal ring. The interconnection substrate as described in item 28 of the patent application range, wherein the metal ring is electrically connected to at least one of the first metal conductors through an additional metalized blind hole in the molding material. The interconnection substrate of claim 25, wherein the stress adjusting member has a top metal layer on a top surface thereof, and the stress adjusting member is additionally metallized by a blind hole in the molding material , Further electrically connected to at least one of the first metal conductors. The interconnection substrate as described in item 25 of the patent application scope further includes: a second series of metal pillars protruding from the bottom surface of the mold sealing material and not covered by the mold sealing material in the lateral direction, wherein each The second series of metal posts are aligned with and contact the corresponding first series of metal posts, and are electrically connected to at least one of the first metal conductors. The interconnect substrate as described in any one of patent application items 19 to 31, wherein the side walls of each of the first series of metal pillars are tapered, and the lateral dimensions of the first series of metal pillars It becomes smaller as the first series of metal pillars extend away from the bottom surface of the molding material. The interconnection substrate as described in any one of items 19 to 24 and 31 of the patent application range, wherein each of the second series of metal pillars has a cone shape and is not covered by the molding material On the side walls, the lateral dimensions of the second series of metal pillars become smaller as the second series of metal pillars extend away from the bottom surface of the molding material. A semiconductor assembly comprising: the interconnect substrate as described in any one of the patent application items 19 to 33; and a semiconductor element which is provided on the interconnect substrate and comprises a plurality of bumps , The interconnection pads electrically coupled to the first metal conductors, wherein the bumps of the semiconductor element are aligned with and covered by the stress adjusting member.

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