TW202004508A - Switch card and server - Google Patents

Abstract

A switch card and a server are provided. The switch card includes a storage device, a processing circuit, a first connection portion, and a plurality of first sub-connection portions. The storage device stores at least one configuration table. When the first connection portion is externally coupled to a riser card, the processing circuit receives a setting signal of the riser card via the first connection portion. The processing circuit reads one of the at least one configuration table stored in the storage device according to the setting signal. When the first sub-connection portions are externally coupled to a plurality of second sub-connections portions of the hard disk drive array, the second sub-connections are coupled to a plurality of hard disk drives of the hard drive array via a plurality of first cables. The processing circuit determines a configuration setting between the first cables and the hard disk drives according to the one of the at least one configuration table.

Description

Switch card and server

The invention relates to an internal structure design of a server, and particularly relates to a switching card and a server.

Generally speaking, the server includes a server motherboard and a hard disk array. The server motherboard needs to be connected to the hard disk array through an adapter card and a switch card. Since multiple hard disk devices of the hard disk array need to be connected to the riser card and the switch card separately, the switch card needs to be connected to these hard disk devices through a large number of cables (or signal cables). However, the routing of these cables on the backplane of the hard disk array depends on the preset hard disk number and digital signal processor number. Therefore, when the server motherboard is connected to a different hard disk array, the On the printed circuit board (PCB) of the backplane of the hard disk array, the routing of these cables may become complicated, which leads to an increase in the cable length of these cables and causes server design and Manufacturing costs are rising.

For example, the routing of multiple cables on the hard disk array with fewer hard disk devices on the printed circuit board of the backplane depends on the specific configuration table stored in the switch card. However, under normal circumstances, if the server motherboard is connected to another hard drive array with more hard drive devices, the server must replace the corresponding another switch card to make the hard drive with more hard drive devices The routing of these cables on the printed circuit board of the backplane can be configured according to another specific configuration table to avoid the routing of these cables becoming complicated or the required cable length increase. In other words, under normal circumstances, traditional servers cannot simultaneously correspond to different types of hard disk arrays through a single switch card. Therefore, when setting up a traditional server, it often requires more design and manufacturing costs. In view of this, the solutions of several embodiments will be proposed below.

The invention provides a switching card and a server, which can effectively simplify the routing configuration of a plurality of cables arranged on the back panel of the hard disk array, so as to reduce the winding length of these cables.

A switching card of the present invention includes a storage device, a processing circuit, a first connection portion, and a plurality of first sub-connection portions. The storage device is used to store the configuration table. The processing circuit is coupled to the storage device. The first connection part is coupled to the processing circuit. When the first connection portion is externally coupled to the adapter card, the processing circuit receives the setting signal of the adapter card via the first connection portion, and the processing circuit reads the configuration table stored in the storage device according to the setting signal. The plurality of first sub-connections are coupled to the processing circuit. When the plurality of first sub-connecting portions are externally coupled to the plurality of second sub-connecting portions of the hard disk array, the plurality of second sub-connecting portions are coupled to the plurality of hard disk arrays via a plurality of first cables Hard drives. The processing circuit determines the configuration settings between the plurality of first cables and the plurality of hard disks according to the configuration table.

A server of the present invention includes an adapter card, a hard disk array, a switching card, and a motherboard. The hard disk array includes multiple hard disks. The switch card includes a storage device, a processing circuit, a first connection part, and a plurality of first sub-connection parts. The storage device is used to store the configuration table. The processing circuit is coupled to the storage device. The first connection part is coupled to the processing circuit. When the first connection portion is externally coupled to the adapter card, the processing circuit receives the setting signal of the adapter card via the first connection portion, and the processing circuit reads the configuration table stored in the storage device according to the setting signal. The plurality of first sub-connections are coupled to the processing circuit. When the plurality of first sub-connecting portions are externally coupled to the plurality of second sub-connecting portions of the hard disk array, the plurality of second sub-connecting portions are coupled to the plurality of hard disk arrays via a plurality of first cables Hard drives. The processing circuit determines the configuration settings between the plurality of first cables and the plurality of hard disks according to the configuration table. The second connection portion of the riser card is externally coupled to the motherboard.

Based on the above, the switch card and the server of the present invention can be applied to a variety of hard disk arrays having different numbers of hard disks arranged according to the Peripheral Component Interconnect Express (PCIe) standard, and can be tailored for different hard disk arrays. Do not provide the corresponding simplified wiring configuration of multiple cables arranged on the backplane of the hard disk array to effectively reduce the length of these cables on the printed circuit board (PCB) . Therefore, the switching card and the server of the present invention can effectively reduce the design and manufacturing cost of the server.

In order to make the above-mentioned features and advantages of the present invention more obvious and understandable, the embodiments are specifically described below in conjunction with the accompanying drawings for detailed description as follows.

In order to make the content of the present invention easier to understand, the following specific embodiments are taken as examples on which the present invention can indeed be implemented. In addition, wherever possible, elements/components/steps with the same reference numerals in the drawings and embodiments represent the same or similar components.

FIG. 1 is a block diagram of a switch card according to an embodiment of the invention. Referring to FIG. 1, the switching card 100 includes a processing circuit 110, a storage device 120, a first connection portion 130, and a plurality of first sub-connection portions 1401, 1402 to 140N. The processing circuit 110 is coupled to the storage device 120, the first connection portion 130, and the plurality of first sub-connection portions 1401, 1402~140N. In this embodiment, the switch card 100 can be externally coupled to the riser (Riser) and the server motherboard (Motherboard) through the first connection part 130, and the first sub-connection parts 1401, 1402 can be used ~140N multiple hard drives externally coupled to the hard drive array. The switch card 100 can be used to expand the number of bus channels of the server motherboard. For example, the motherboard of the server supports PCIe interface and provides 8 PCIe transmission channels. The switch card 100 is coupled to the slot of the main board of the server via the riser card to expand the eight PCIe channels of the main board to 32 PCIe channels. That is to say, if each hard disk of the hard disk array needs 4 PCIe channels, it means that the switch card 100 can be coupled to 8 hard disks through the first sub-connecting parts 1401, 1402~140N.

In this embodiment, the storage device 120 is used to store one or more configuration tables. When the first connection portion 130 is externally coupled to the adapter card, the processing circuit 110 receives the setting signal of the adapter card through the first connection portion 130, and the processing circuit 110 reads one or the data stored in the storage device 120 according to the setting signal One of multiple configuration tables. In this embodiment, the first sub-connecting parts 1401, 1402 to 140N are externally coupled to the second sub-connecting parts of the backplane of the disk array through a plurality of cables (or signal line traces), and The second sub-connecting parts are coupled to the hard disks through other cables. In this embodiment, the configuration of the other plurality of connecting the second sub-connections and the hard disks can be determined according to the configuration table. In other words, since the type of riser card depends on the arrangement of the hard drives in the hard drive array, different hard drive arrays are suitable for different riser cards. In this embodiment, the switch card 100 can automatically detect the type of the adapter card and select the corresponding configuration table.

In this embodiment, the processing circuit 110 includes a processor. The processor can be a central processing unit (Central Processing Unit, CPU), a system on chip (SOC) or other programmable general-purpose or special-purpose microprocessor (Microprocessor), a digital signal processor ( Digital Signal Processor (DSP), programmable controller, application specific integrated circuits (ASIC), programmable logic device (Programmable Logic Device, PLD), other similar processing devices, or a combination of these devices, However, the present invention is not limited to this.

In this embodiment, the storage device 120 may include one or more memories. The memory may be a non-transitory computer-readable recording medium. The non-transitory computer-readable recording medium can be read-only memory (Read-Only Memory, ROM), erasable programmable read-only memory (Electrically-Erasable Programmable Read-Only Memory, EPROM) or electronic erasable The type of rewritable read-only memory (Electrically-Erasable Programmable Read-Only Memory, EEPROM), etc. is not limited by the present invention. Moreover, in this embodiment, each memory is used to store a configuration table.

In this embodiment, the first connection part 130 and the first sub-connection parts 1401, 1402~140N can support the Peripheral Component Interconnect Express (PCIe) or other bus standards, but the invention is not limited to this. In an embodiment, the first connecting portion 130 and the first sub-connecting portions 1401, 1402~140N can also be applied with Universal Serial Bus (USB) or Serial Advanced Technology Attachment (SATA) ) Busbars, etc.

2 is a schematic diagram of a switch card according to an embodiment of the invention. Referring to FIG. 2, the switching card 200 includes a processing circuit 210, a storage device 220, a first connection part 230, and first sub-connection parts 2401~2404. The switching card 200 includes a circuit board. The first connection part 230 is located on one side of the circuit board, and the first connection part 230 includes a plurality of metal terminals. For example, the first connection part 230 is a gold finger (Gold Finger, G/F). In this embodiment, the processing circuit 210 includes a processor 211 and a control circuit 212. The storage device 220 includes memories 221 and 222. The processor 211 is coupled to the first connection portion 230 and the first sub-connection portions 2401~2404, and the control circuit 212 is coupled to the memories 221, 222 and the first connection portion 230. In this embodiment, the memories 221 and 222 are used to store different configuration tables, respectively. When the first connection portion 230 is externally coupled to the adapter card, the control circuit 212 receives the setting signal SEL of the adapter card via the first connection portion 230, and the processor 211 reads the storage signals 221 and 222 according to the setting signal SEL The configuration table in one of them.

In this embodiment, the control circuit 212 may include a switch circuit, so that the control circuit 212 can decide to connect the processor 211 to the memory 221 or the memory 222 according to the setting signal SEL of the adapter card. For example, when the switch card 200 is coupled to a specific type of riser card through the first connection part 230, the first connection part 230 provides a setting signal SEL (SEL=1) to the control circuit 212, which controls the processor 212 The 211 is connected to the memory 221. However, when the switch card 200 is coupled to another specific type of riser card through the first connection part 230, the first connection part 230 provides a setting signal SEL (SEL=0) to the control circuit 212, which controls the processor The 211 is connected to the memory 222.

3 is a schematic diagram of a server according to an embodiment of the invention. Referring to FIG. 3, the server 30 includes a switch card 300, a riser card 400, a motherboard 500, and a hard disk array 600. The switch card 300, the riser card 400, and the motherboard 500 of FIG. 3 may be represented as schematic side views of respective circuit boards, and the hard disk array 600 of FIG. 3 may be represented as a schematic view of the backplane, for example. In this embodiment, the processor 310 of the switch card 300 can determine the type of the riser card 400 according to the setting signal provided by the first connection part 330 to determine to read the corresponding configuration table. In this embodiment, the switch card 300 can be combined with the slot 440 of the riser card 400 through the first connection part 330, and the riser card 400 can be combined with the slot 540 of the motherboard 500 through the second connection part 430. The first connection portion 330 and the second connection portion 430 are gold fingers.

In this embodiment, the plurality of first sub-connecting parts 3401~3404 of the switch card 300 are coupled to the plurality of second sub-connecting parts 6401~6404 on the backplane of the hard disk array 600 through cables C1~C4. The pairing method between the first sub-connecting parts 3401~3404 and the second sub-connecting parts 6401~6404 is determined according to the configuration table read by the processor 310. Moreover, the second sub-connecting parts 6401 to 6404 are coupled to the hard disks 603 to 610 of the hard disk array 600 through the cables D1 to D8. The routing configuration of the cables D1~D8 is determined according to the configuration table read by the processor 310. In this embodiment, the number of cables C1~C4 is smaller than the number of cables D1~D8.

表1For example, the motherboard 500 can provide eight PCIe channels, and the processor 510 of the motherboard 500 can be directly coupled to the two hard disks 601 and 602 of the hard disk array 600. The switch card 300 and the adapter card 400 are installed on the motherboard 500. The switch card 300 can automatically detect the number of channels provided by the motherboard 500 to determine the corresponding number of channels that can be provided to the hard disk array 600 correspondingly. The switch card 300 is used to expand the 8 PCIe channels provided by the motherboard 500 to 32 PCIe channels. In other words, the number of channels provided by the switching card 300 to the second sub-connecting parts 6401 to 6404 is greater than the number of channels between the switching card 300 and the adapter card 400. In addition, each of the first sub-connecting parts 3401~3404 and the cables C1~C4 provide 8 PCIe channels respectively, so that each second sub-connecting part 6401~6404 provides 8 PCIe channels to the hard disk array 600 respectively . Since the hard disks 603 to 610 each require four PCIe channels, the second sub-connecting parts 6401 to 6404 are respectively coupled to two of the hard disks 603 to 610 through cables D1 to D8. The configuration table read by the processor 510 may be as shown in Table 1 below.

Table 1

In this example, the hard disks 603~610 are preset to correspond to different digital signal processor numbers DSP#1~DSP#8, respectively. Therefore, in Table 1, the second sub-connecting parts 6401 to 6404 correspond to two of the hard disks 603 to 610, respectively, and the hard disks 603 to 610 are preset to sequentially correspond to the digital signal processor number DSP# 1~DSP#8. In other words, the user can connect the cables D1 and D2 between the hard disks 606 and 607 and the second sub-connector 6401 based on the configuration table in Table 1, and connect the cables D3 and D4 to the hard disks 603 and 604 And the second sub-connecting part 6402, the cables D5, D6 are connected between the hard disks 608, 609 and the second sub-connecting part 6403, and the cables D7, D8 are connected to the hard disks 605, 610, and the second Between the sub-connectors 6404. Therefore, the second sub-connecting parts 6401~6404 can be coupled to the hard disks 603~610 through the cables D1~D8 in the shortest distance. In other words, the layout of the cables D1 to D8 coupled to the hard disks 603 to 610 is determined according to Table 1 above.

In addition, the number of channels provided by the switch card 300 of this embodiment to the second sub-connecting parts 6401~6404 is greater than or equal to the number of channels between the second sub-connecting parts 6401~6404 coupled to the hard disks 601~610. In other words, the number and arrangement of hard disks in the hard disk array of the present invention are not limited to those shown in FIG. 3. The number and arrangement of hard disks of the hard disk array of the present invention can be designed according to different server requirements. In addition, for the detailed implementation and circuit details of the switch card 300 of this embodiment, reference may be made to the above-mentioned embodiments of FIG. 1 and FIG. 2 to obtain sufficient teachings, suggestions, and implementation descriptions, which will not be repeated here.

FIG. 4 is a schematic diagram of a server according to another embodiment of the invention. Referring to FIG. 4, the server 70 includes a switch card 700, a riser card 800, a motherboard 900 and a hard disk array 1000. The switching card 700, the riser card 800, and the motherboard 900 of FIG. 4 can be represented as schematic side views of respective circuit boards, and the hard disk array 1000 of FIG. 4 can be represented as a schematic view of the backplane, for example. In this embodiment, the switching card 700 may be the switching card 300 of the embodiment of FIG. 3, but the present example is not limited to this. In this embodiment, the processor 710 of the switch card 700 can automatically determine the type of the riser card 800 to decide to read its corresponding configuration table. In this embodiment, the switching card 700 can be combined with the slot 840 of the riser card 800 through the first connection part 730, and the riser card 800 can be combined with the slot 940 of the motherboard 900 through the second connection part 830. The first connection part 730 and the second connection part 830 are gold fingers.

In this embodiment, the plurality of first sub-connecting parts 7401~7404 of the switch card 700 are coupled to the plurality of second sub-connecting parts 10401~10404 of the backplane of the hard disk array 1000 through cables C1'~C4'. The pairing method of the first sub-connecting parts 7401~7404 and the second sub-connecting parts 10401~10404 is determined according to the configuration table read by the processor 710. Moreover, the second sub-connecting parts 10401 to 10404 are coupled to the hard disks 1001 to 1008 of the hard disk array 1000 through cables D1' to D8'. The routing configuration of the cables D1'~D8' is determined according to the configuration table read by the processor 710.

Compared with FIG. 3, due to the different arrangement of hard disks, the switching card 700 of the embodiment of FIG. 4 is coupled to the hard disks 1001 to 1008 of the hard disk array 1000, and the hard disks 1009 and 1010 are directly coupled to the motherboard 900的processor910.

表2For example, the motherboard 900 can provide 16 PCIe channels, and the processor 910 of the motherboard 900 can be directly coupled to the two hard disks 1009, 1010 of the hard disk array 1000. The switch card 700 and the adapter card 800 are installed on the motherboard 900. The switch card 700 can automatically detect the number of channels that the motherboard 900 can provide to determine the corresponding number of channels that can be provided to the hard disk array 1000 correspondingly. For the eight PCIe channels corresponding to FIG. 3 among the 16 PCIe channels, the switch card 700 can be used to expand the eight PCIe channels provided by the motherboard 900 to 32 PCIe channels. That is to say, the number of channels provided by the switch card 700 to the second sub-connecting parts 10401 to 10404 is greater than the number of channels between the switch card 700 and the adapter card 800. In addition, each of the first sub-connecting parts 7401~7404 and the cables C1'~C4' provide 8 PCIe channels, so that each second sub-connecting part 10401~10404 provides 8 PCIe channels to the hard disk Array 1000. Since the hard disks 1001 to 1008 each require four PCIe channels, the second sub-connecting parts 10401 to 10404 are respectively coupled to two of the hard disks 1001 to 1008 through cables D1' to D8'. The configuration table read by the processor 710 may be as shown in Table 2 below.

Table 2

In this example, the hard disks 1001~1008 are preset to correspond to different digital signal processor numbers DSP#1~DSP#8, respectively. Therefore, in Table 2, the sub-connecting parts 10401 to 10404 correspond to two of the hard disks 1001 to 1008, respectively, and the hard disks 1001 to 1008 sequentially correspond to the digital signal processor numbers DSP#1 to DSP#8. In other words, the user can connect the cables D1' and D2' between the hard disks 1001 and 1002 and the sub-connecting portion 10401 based on the configuration table in Table 2, and connect the cables D3' and D4' to the hard disk 1003 , 1004 and the sub-connecting part 10402, the cables D5', D6' are connected between the hard disks 1005, 1006 and the sub-connecting parts 10403, and the cables D7', D8' are connected to the hard disks 1007, 1008 and Between the sub-connections 10404. Therefore, the sub-connecting parts 10401 to 10404 can be coupled to the hard disks 603 to 610 through the cables D1' to D8' in the shortest distance. In other words, the layout of the cables D1'~D8' coupled to the hard drives 1001~1008 is determined according to Table 2 above.

Compared with FIG. 3, due to the different arrangement of the hard disks, the hard disks 1001~1008 correspond to the processor numbers DSP#1~DSP#8, respectively. However, if the switch card 700 adopts the settings in Table 1, the sub-connection part 10401 needs to be coupled to the hard disks 1004 and 1005. The sub-connection part 10402 needs to be coupled to the hard disks 1001 and 1002. The sub-connection portion 10403 needs to be coupled to the hard disks 1006 and 1007. The sub-connection portion 10404 needs to be coupled to the hard disks 1003 and 1008. In other words, the routing configuration of cables D1'~D8' will be more complicated and require a longer routing length. Therefore, the switch card 700 of this embodiment can determine to read the corresponding configuration table by determining the type of the riser card 800 corresponding to the hard disk array 1000, so as to effectively reduce the movement of the cables D1'~D8' Line configuration.

In addition, for the detailed implementation and circuit details of the switch card 700 of this embodiment, reference may be made to the above-mentioned embodiments of FIG. 1 to FIG. 3 to obtain sufficient teaching, suggestions, and implementation descriptions, which will not be repeated here.

In summary, the switch card and the server of the present invention can automatically determine the type of hard disk array by detecting the adapter card, so that the processor of the switch card can read the corresponding memory to obtain the corresponding configuration table. In addition, the processor of the switch card can use the corresponding configuration table to set the cable layout of the hard disk array backplane. Accordingly, the switch card and the server of the present invention can be applied to various types of hard disk arrays without replacing the switch card, and can effectively simplify the cable routing configuration on the printed circuit board of the back plate of the hard disk array.

Although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be subject to the scope defined in the appended patent application.

30, 70‧‧‧ Server 100, 200, 300, 700‧‧‧ switch card 110, 210, 310, 710‧‧‧ processing circuit 120, 220‧‧‧ storage device 130, 230, 330, 730‧‧‧ The first connection part 430, 830‧‧‧The second connection part 1401, 1402~140N, 2401~2404, 3401~3404, 7401~7404‧‧‧The first sub connection part 6401~6404, 10401~10404‧‧‧ Two sub-connector 211‧‧‧ processor 212‧‧‧ control circuit 221, 222‧‧‧ memory 400, 800‧‧‧ conversion card 440, 540, 840, 940‧‧‧ slot 500, 900‧‧‧ Motherboard 510, 910‧‧‧ processor 600, 1000‧‧‧ hard drive array 601~610, 1001~1010‧‧‧ hard drive C1~C4, D1~D8, C1'~C4', D1'~D8' ‧‧‧Cable SEL‧‧‧Set signal

FIG. 1 is a block diagram of a switch card according to an embodiment of the invention. 2 is a schematic diagram of a switch card according to an embodiment of the invention. 3 is a schematic diagram of a server according to an embodiment of the invention. FIG. 4 is a schematic diagram of a server according to another embodiment of the invention.

100‧‧‧switch card

110‧‧‧ processing circuit

120‧‧‧Storage device

130‧‧‧First connection

1401, 1402~140N‧‧‧The first sub-connection

Claims (20)

A switching card includes: a storage device for storing at least one configuration table; a processing circuit coupled to the storage device; a first connection portion coupled to the processing circuit, when the first connection portion is externally coupled to a When switching the card, the processing circuit receives a setting signal of the switching card via the first connection part, and the processing circuit reads one of the at least one configuration table stored in the storage device according to the setting signal One; and a plurality of first sub-connecting parts, coupled to the processing circuit, when the first sub-connecting parts are externally coupled to a plurality of second sub-connecting parts of a hard disk array, the second sub-connecting parts pass through A plurality of first cables are coupled to the plurality of hard disks of the hard disk array, and the processing circuit determines the arrangement between the first cables and the hard disks according to one of the at least one configuration table set up. The switch card as described in item 1 of the patent application scope, wherein the storage device includes a plurality of memories, and the memories are used to store a plurality of configuration tables, respectively, wherein the processing circuit reads the ones according to the setting signal One of the configuration tables, and the processing circuit determines the configuration settings between the first cables and the hard disks according to one of the configuration tables. The switch card according to item 2 of the patent application scope, wherein the processing circuit includes a processor and a control circuit, and the processor is coupled to the control circuit, wherein the control circuit is coupled to the memories and the first The connection part determines that the processor is coupled to one of the memories according to the setting signal, so that the processor reads one of the configuration tables. The switch card according to item 1 of the patent application scope, wherein the first sub-connecting portions are externally coupled to the second sub-connecting portions of the hard disk array via a plurality of second cables, and the second cables The number of wires is smaller than the number of the first cables. The switch card as described in item 1 of the patent application, wherein the type of the riser card depends on the arrangement of the hard drives of the hard drive array. The switch card as described in item 1 of the patent application range, wherein the number of channels provided by the switch card to the second sub-connections is greater than the number of channels between the switch card and the adapter card. The switch card as described in item 1 of the patent scope, wherein the number of channels provided by the switch card to the second sub-connecting parts is greater than or equal to the number of channels between the second sub-connecting parts and the hard drives Quantity. The switch card as described in item 1 of the patent application scope, wherein each of the second sub-connecting portions is coupled to the two of the hard disks of the hard disk array via the first cables The switch card as described in item 1 of the patent application scope, wherein the at least one configuration table is used to record a plurality of hard disk numbers of the hard disks and corresponding to a plurality of digital signal processor numbers, so that the first cables The routing configuration of the wires coupled to the hard drives is determined by one of the at least one configuration table. The switch card as described in item 1 of the patent application scope, wherein a second connection portion of the riser card is externally coupled to a motherboard, and the motherboard is directly coupled to the plurality of hard disks of the hard disk array. A server includes: a riser card; a hard disk array including a plurality of hard disks; a switch card, including: a storage device for storing at least one configuration table; a processing circuit coupled to the storage device; A first connection portion is coupled to the processing circuit. When the first connection portion is coupled to the adapter card, the processing circuit receives a setting signal of the adapter card through the first connection portion, and the processing circuit is based on The setting signal to read one of the at least one configuration table stored in the storage device; and a plurality of first sub-connecting parts, coupled to the processing circuit, when the first sub-connecting parts are externally coupled to a When a plurality of second sub-connecting portions of the hard disk array, the second sub-connecting portions are coupled to the plurality of hard disks of the hard disk array via a plurality of first cables, and the processing circuit is based on the at least one configuration table One of them determines the configuration settings between the first cables and the hard drives; and a motherboard, wherein a second connection portion of the riser card is externally coupled to the motherboard. The server as described in item 11 of the patent application scope, wherein the storage device includes a plurality of memories, and the memories are used to store a plurality of configuration tables respectively, and the processing circuit reads the plurality of the tables according to the setting signal One of the configuration tables, and the processing circuit determines the configuration settings between the first cables and the hard disks according to one of the configuration tables. The server as described in item 12 of the patent application scope, wherein the processing circuit includes a processor and a control circuit, and the processor is coupled to the control circuit, wherein the control circuit is coupled to the memories and the first The connection part determines that the processor is coupled to one of the memories according to the setting signal, so that the processor reads one of the configuration tables. The server as described in item 11 of the patent application range, wherein the first sub-connecting portions are externally coupled to the second sub-connecting portions of the hard disk array via a plurality of second cables, and the second cables The number of wires is smaller than the number of the first cables. The server as described in item 11 of the patent application, wherein the type of the riser card is determined by the arrangement of the hard drives of the hard drive array. The server as described in item 11 of the patent application range, wherein the number of channels provided by the switch card to the second sub-connections is greater than the number of channels between the switch card and the adapter card. The server as described in item 11 of the patent application range, wherein the number of channels provided by the switching card to the second sub-connecting parts is greater than or equal to the number of channels between the second sub-connecting parts and the hard drives Quantity. The server as described in item 11 of the patent application range, wherein each of the second sub-connecting portions is coupled to two of the hard disks of the hard disk array via the first cables. The server as described in item 11 of the patent application scope, wherein the at least one configuration table is used to record a plurality of hard disk numbers of the hard disks and corresponding to a plurality of digital signal processor numbers, so that the first cables The routing configuration of the wires coupled to the hard drives is determined by one of the at least one configuration table. The server as described in item 11 of the patent application scope, wherein the motherboard is directly coupled to another plurality of hard disks of the hard disk array.

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