TW201942724A - Conductive member, conductive film, display device having same, touch panel, production method of wiring pattern of conductive member and production method of wiring pattern of conductive film - Google Patents
Conductive member, conductive film, display device having same, touch panel, production method of wiring pattern of conductive member and production method of wiring pattern of conductive film Download PDFInfo
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- TW201942724A TW201942724A TW108110730A TW108110730A TW201942724A TW 201942724 A TW201942724 A TW 201942724A TW 108110730 A TW108110730 A TW 108110730A TW 108110730 A TW108110730 A TW 108110730A TW 201942724 A TW201942724 A TW 201942724A
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- H01B5/14—Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B33/00—Electroluminescent light sources
- H05B33/02—Details
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
- H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
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- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
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- G06F2203/04112—Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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- H10K59/1201—Manufacture or treatment
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- H10K59/80—Constructional details
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Abstract
Description
本發明係關於一種導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法，詳細而言，係關於具有即使重疊於顯示裝置的像素排列圖案上亦提供疊紋（moire）的可見性得到改善之畫質之網格狀配線圖案之導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法。The present invention relates to a method for producing a conductive member, a conductive film, a display device including the same, a touch panel, and a conductive member, and a method for producing a conductive film. Specifically, the present invention relates to A conductive member, a conductive film, a display device, a touch panel, a grid-shaped wiring pattern that provides improved moire visibility even if it is superimposed on a pixel arrangement pattern of a display device, A method for producing a wiring pattern of a conductive member and a method for producing a wiring pattern of a conductive film.
作為設置於顯示裝置（以下，亦稱為顯示器）的顯示單元上之導電性薄膜，例如可以舉出具有導電膜之觸控面板用的導電性薄膜等，該導電膜由具有網格狀配線圖案（以下，亦稱為網格圖案）之金屬細線構成。
在該等導電性薄膜中，由網格圖案與顯示器的像素排列圖案的干涉所產生之疊紋的辨識成為問題。在此，顯示器的像素排列圖案能夠說係例如R（紅）G（綠）B（藍）濾色器的排列圖案或作為其反轉圖案之黑矩陣（Black Matrix：以下，亦稱為BM）圖案。作為疊紋的辨識問題，亦即，一直以來已知有將等間距的配線圖案重疊於像素排列圖案上時規則性的疊紋顯眼，這成為問題。因此，提出有具有疊紋（尤其是規則性的疊紋）不會被辨識或不易被辨識之網格圖案之各種導電性薄膜（例如，參閱專利文獻1、2及3）。Examples of the conductive film provided on a display unit of a display device (hereinafter also referred to as a display) include a conductive film for a touch panel having a conductive film, and the conductive film includes a grid-like wiring pattern. (Hereinafter, also referred to as a grid pattern).
In such conductive films, identification of a moire caused by interference between a grid pattern and a pixel arrangement pattern of a display becomes a problem. Here, the pixel arrangement pattern of the display can be said to be, for example, an arrangement pattern of R (red), G (green), B (blue) color filters, or a black matrix (hereinafter, also referred to as BM) as an inverted pattern thereof. pattern. As a problem of identifying moire, that is, it has been known that regular moire is conspicuous when superimposing an equally spaced wiring pattern on a pixel arrangement pattern, which is a problem. Therefore, various conductive films having a grid pattern in which moires (especially regular moires) are not recognized or difficult to be recognized have been proposed (for example, see Patent Documents 1, 2, and 3).
本申請人的申請之專利文獻1中所揭示之技術係設置於顯示裝置的顯示單元上之導電性薄膜，其係如下者：相對於如下疊紋頻率資訊和強度，進入既定頻率範圍之疊紋強度之和為既定值以下，該疊紋頻率資訊和強度係使視覺響應特性作用於由導電性薄膜的配線圖案和像素排列圖案的二維高速傅立葉變換（2DFFT：Two Dimensional Fast Fourier Transform）光譜的頻率和強度計算出之疊紋頻率資訊和強度而得到。在專利文獻1中所揭示之技術中，能夠抑制疊紋的產生，從而能夠提高可見性。
本申請人的申請之專利文獻2中所揭示之技術係以上述專利文獻1中所揭示之技術為基礎，將配線圖案限定於菱形，根據構成網格圖案之金屬細線的寬度對上述疊紋強度之和為既定值以下的網格圖案的菱形形狀賦予不規則性者。藉由專利文獻2中所揭示之技術，亦能夠防止疊紋的產生，從而能夠提高可見性。The technology disclosed in Patent Document 1 filed by the present applicant is a conductive film provided on a display unit of a display device, which is as follows: relative to the following moire frequency information and intensity, the moire that enters a predetermined frequency range The sum of the intensity is below a predetermined value, and the moire frequency information and intensity make the visual response characteristics act on the two-dimensional fast fourier transform (2DFFT) spectrum of the conductive film wiring pattern and pixel arrangement pattern. Frequency and intensity are obtained by calculating the frequency information and intensity of the moire. In the technique disclosed in Patent Document 1, it is possible to suppress the occurrence of moire and improve visibility.
The technology disclosed in Patent Document 2 of the present applicant's application is based on the technology disclosed in the aforementioned Patent Document 1, limiting the wiring pattern to a rhombus, and measuring the strength of the moire according to the width of the thin metal wires constituting the grid pattern The sum adds irregularity to the rhombus shape of the grid pattern below a predetermined value. With the technique disclosed in Patent Document 2, it is also possible to prevent the generation of moire, thereby improving visibility.
本申請人的申請之專利文獻3中所揭示之技術係以上側（TOP）和下側（BOTTOM）的2層配線圖案且賦予有不規則之菱形的配線圖案為前提之技術。其中，TOP（上側）和BOTTOM（下側）中的至少一方係對菱形形狀的間距賦予有不規則性之配線圖案。該技術係由各顏色的疊紋的評價值計算出之疊紋的評價值成為閾值以下之方式構成2層的配線圖案者，該各顏色的疊紋的評價值係使視覺響應特性作用於由各顏色的2DFFT光譜的光譜峰值的強度及頻率和所重疊之配線圖案的2DFFT光譜的強度及頻率計算出之疊紋的頻率及強度而得到。在專利文獻3中所揭示之技術中，不依賴於觀察距離而根據顯示器的強度能夠抑制疊紋的產生，從而能夠大幅提高可見性。
[先前技術文獻]
[專利文獻]The technology disclosed in Patent Document 3 filed by the applicant is a technology premised on a two-layer wiring pattern on the upper side (TOP) and the lower side (BOTTOM) and an irregular diamond-shaped wiring pattern. Among them, at least one of TOP (upper side) and BOTTOM (lower side) is a wiring pattern having irregularities in the rhombus-shaped pitch. In this technique, a two-layer wiring pattern is formed from the evaluation value of the moire of each color to be less than a threshold value. The evaluation value of the moire of each color makes the visual response characteristics act on the The intensity and frequency of the spectral peak of the 2DFFT spectrum of each color and the intensity and frequency of the 2DFFT spectrum of the overlapped wiring pattern are obtained by calculating the frequency and intensity of the moire. In the technique disclosed in Patent Document 3, the generation of moire can be suppressed depending on the strength of the display without depending on the viewing distance, and the visibility can be greatly improved.
[Prior technical literature]
[Patent Literature]
[專利文獻1]日本特開2013-213858號公報
[專利文獻2]日本特開2013-214545號公報
[專利文獻3]日本特開2016-014929號公報[Patent Document 1] Japanese Patent Laid-Open No. 2013-213858
[Patent Document 2] Japanese Patent Laid-Open No. 2013-214545
[Patent Document 3] Japanese Patent Laid-Open No. 2016-014929
在專利文獻1中，作為配線圖案的具體例，圖示出菱形（鑽石）網格圖案。但是，當如菱形網格圖案那樣為等間距的配線圖案時，即使將該旋轉角度及間距等最優化，抑制規則性的疊紋的產生亦存在界限。Patent Document 1 illustrates a diamond (diamond) grid pattern as a specific example of the wiring pattern. However, when the wiring pattern is an equal pitch like a rhombus grid pattern, even if the rotation angle and the pitch are optimized, there is a limit to suppress the occurrence of regular moire.
相對於此，在專利文獻2～3中，為了減少規則性的疊紋，進行了對配線圖案賦予不規則性之嘗試。
然而，若對配線圖案賦予不規則性，則規則性的疊紋被減少，但是不規則性的疊紋（雜訊）會增加，因此存在其結果，疊紋（規則性的疊紋及不規則性的疊紋的總和）的可見性不變之問題。
在專利文獻3中，進行了“選擇在賦予不規則性之後疊紋評價指標成為閾值以下之配線圖案”的嘗試。然而，若進行該種嘗試，則與具有規則性之配線圖案相比能夠減少規則性的疊紋，但無法保證能夠減少規則性的疊紋和不規則性的疊紋（雜訊）兩者。在專利文獻3中，並沒有明確與具有規則性之配線圖案相比能夠減少規則性的疊紋和不規則性的疊紋（雜訊）兩者之配線圖案的特徵及其原因。In contrast, in Patent Documents 2 to 3, attempts have been made to provide irregularities to the wiring pattern in order to reduce the regular moire.
However, if irregularity is given to the wiring pattern, the regular moire will be reduced, but the irregular moire (noise) will increase. As a result, the moire (regular moire and irregularity) will occur. (The sum of sexual fringes), the problem of visibility unchanged.
In Patent Document 3, an attempt is made to "select a wiring pattern whose moire evaluation index becomes below a threshold value after the irregularity is given." However, if such an attempt is made, regular moire can be reduced compared to regular wiring patterns, but it is not possible to guarantee both regular moire and irregular moire (noise). In Patent Document 3, the characteristics and causes of wiring patterns that can reduce both regular moire and irregular moire (noise) compared to regular wiring patterns are not clear.
本發明的目的在於解決上述以往技術的問題點，並提供一種在將2個方向以上的直線配線重疊而成之網格狀的配線圖案或將1個方向以上的直線配線和其他的1個方向以上的非直線配線的線配線重疊而成之網格狀的配線圖案中，根據像素排列圖案的頻率資訊在至少1個方向的直線配線中將既定根數的配線的重複間距設為等間距且將既定根數的各個配線的間距設為非等間距，藉此具有比等間距的配線圖案更能夠減少疊紋之配線圖案、尤其能夠同時減少規則性的疊紋和不規則性的疊紋（雜訊）之配線圖案之導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法。An object of the present invention is to solve the problems of the above-mentioned conventional technologies, and to provide a grid-shaped wiring pattern in which linear wirings in two or more directions are overlapped, or linear wirings in one or more directions and one other direction. In the grid-like wiring pattern in which the above non-linear wiring lines are superimposed, the repeating pitch of a predetermined number of wirings is set to an equal pitch in at least one linear wiring based on the frequency information of the pixel arrangement pattern and Set the pitch of each wiring of a predetermined number to be non-equidistant, thereby having a wiring pattern that can reduce the moire more than a wiring pattern with an equal pitch, and in particular, can reduce regular moire and irregular moire ( Noise), a conductive member of a wiring pattern, a conductive film, a method of manufacturing a wiring pattern including a display device, a touch panel, and a conductive member, and a method of manufacturing a wiring pattern of a conductive film.
為了達成上述目的，本發明的第1態樣之導電性構件係如下導電性構件具有由複數個金屬細線構成之配線部，其中配線部具有將線配線沿2個方向以上重疊而成之網格狀的配線圖案，該線配線由在1個方向上平行地排列之複數個金屬細線構成，至少1個方向的線配線係複數個金屬細線為直線的直線配線，至少1個方向的直線配線係既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中至少2個間距不同之非等間距的配線圖案。
在此，2個方向以上的所有方向的前述線配線的複數個金屬細線全部由直線構成為較佳。
又，導電性構件係設置於顯示裝置的顯示單元上者，網格狀的配線圖案重疊於顯示單元的像素排列圖案上為較佳。
又，非等間距的配線圖案中之疊紋評價值小於由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個前述金屬細線的間距相等之等間距的配線圖案中之疊紋評價值，疊紋評價值係疊紋的各頻率成分的強度的總和為較佳，該疊紋的各頻率成分的強度係使人的視覺響應特性作用於由非等間距的配線圖案及等間距的配線圖案的透射率的二維傅立葉頻率分佈的各頻率成分和像素排列圖案的亮度或透射率的二維傅立葉頻率分佈的各頻率成分計算出之疊紋的各頻率成分而得到。In order to achieve the above object, the conductive member according to the first aspect of the present invention is a conductive member having a wiring portion composed of a plurality of thin metal wires, wherein the wiring portion has a grid formed by overlapping wire wiring in two or more directions. The wiring pattern consists of a plurality of thin metal wires arranged in parallel in one direction. The line wiring in at least one direction is a straight line wiring in which the plurality of metal thin wires are straight lines. The line wiring system in at least one direction is a linear wiring system. The repeating pitch of a predetermined number of thin metal wires is a non-equidistant wiring pattern having an equal pitch and at least two of the pitches of each of the predetermined thin metal wires having different pitches.
Here, it is preferable that the plurality of thin metal wires of the line wiring in all directions of two or more directions are all formed by straight lines.
In addition, it is preferable that the conductive member is provided on a display unit of the display device, and the grid-shaped wiring pattern is superposed on the pixel arrangement pattern of the display unit.
In addition, the evaluation value of the moire in the non-equidistant wiring pattern is smaller than that composed of a plurality of straight metal thin lines, the predetermined pitch of the metal thin lines is equal to the non-equidistant wiring pattern, and the pitch of each of the foregoing metal thin lines is equal The moire evaluation value in the equally spaced wiring pattern, the moire evaluation value is the sum of the intensities of the frequency components of the moire, and the intensity of the frequency components of the moire is based on the human visual response characteristics. The frequency components of the two-dimensional Fourier frequency distribution of the transmittance of the non-equidistant wiring pattern and the equally spaced wiring pattern and the frequency components of the two-dimensional Fourier frequency distribution of the brightness or transmittance of the pixel arrangement pattern are calculated. It is obtained by each frequency component.
又，為了達成上述目的，本發明的第2態樣之導電性薄膜係如下導電性薄膜，其具有透明基體；及配線部，形成於透明基體的至少一個面且由複數個金屬細線構成，其中配線部具有將直線配線沿2個方向以上重疊而成之網格狀的配線圖案，該直線配線由在1個方向上平行地排列之複數個金屬細線構成，至少1個方向的線配線係複數個金屬細線為直線的直線配線，至少1個方向的前述直線配線係既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中至少2個間距不同之非等間距的配線圖案。In order to achieve the above object, the conductive film of the second aspect of the present invention is a conductive film having a transparent substrate, and a wiring portion formed on at least one surface of the transparent substrate and composed of a plurality of thin metal wires, wherein The wiring section has a grid-like wiring pattern in which linear wirings are superimposed in two or more directions. The linear wiring is composed of a plurality of thin metal wires arranged in parallel in one direction. At least one direction of the wiring is plural. The thin metal wires are straight and straight lines. The repeating pitch of the predetermined number of thin metal wires in at least one direction is an equal pitch and at least two of the pitches of each of the thin metal wires are different. Wiring pattern.
又，為了達成上述目的，本發明的第3態樣之顯示裝置具備：顯示單元，以既定的像素排列圖案排列而成；及本發明的第1態樣之導電性構件或本發明的第2態樣之導電性薄膜，設置於該顯示單元上。
在此，顯示單元係有機EL顯示器（OELD），紅色（R）、綠色（G）及藍色（B）中至少2個顏色的像素排列圖案不同為較佳。
又，為了達成上述目的，本發明的第4態樣之觸控面板係使用本發明的第1態樣之導電性構件或本發明的第2態樣之導電性薄膜者。In order to achieve the above object, a display device according to a third aspect of the present invention includes: a display unit arranged in a predetermined pixel arrangement pattern; and the conductive member according to the first aspect of the present invention or the second aspect of the present invention. An aspect of the conductive film is disposed on the display unit.
Here, the display unit is an organic EL display (OELD), and it is preferable that pixel arrangement patterns of at least two colors of red (R), green (G), and blue (B) are different.
In order to achieve the above-mentioned object, the touch panel of the fourth aspect of the present invention is one using the conductive member of the first aspect of the present invention or the conductive film of the second aspect of the present invention.
又，為了達成上述目的，本發明的第5態樣之導電性構件的配線圖案的製作方法係如下導電性構件的配線圖案的製作方法，該導電性構件設置於顯示裝置的顯示單元上且具有由複數個金屬細線構成之配線部，配線部具有將線配線沿2個方向以上重疊而成之網格狀的配線圖案，該線配線由在1個方向上平行地排列之複數個金屬細線構成，其中至少1個方向的線配線係複數個金屬細線為直線的直線配線，網格狀的配線圖案重疊於顯示單元的像素排列圖案上，至少1個方向的直線配線係既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中至少2個間距不同之非等間距的配線圖案，獲取像素排列圖案的亮度或透射率，對非等間距的配線圖案及由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案分別獲取配線圖案的透射率，對非等間距的配線圖案及等間距的配線圖案分別導出配線圖案的透射率的二維傅立葉頻率分佈，並且導出像素排列圖案的亮度或透射率的二維傅立葉頻率分佈，由非等間距的配線圖案及等間距的配線圖案的透射率的二維傅立葉頻率分佈的各頻率成分和像素排列圖案的亮度或透射率的二維傅立葉頻率分佈的各頻率成分計算疊紋的各頻率成分，使人的視覺響應特性作用於如此計算出之疊紋的各頻率成分而求出各頻率成分的強度的總和亦即疊紋評價值，製作如此求出之非等間距的配線圖案中之疊紋評價值小於等間距的配線圖案中之疊紋評價值的非等間距的配線圖案。
在此，線配線係在2個方向以上的所有方向上為直線配線為較佳。
又，為了達成上述目的，本發明的第6態樣之導電性薄膜的製作方法係如下導電性薄膜的配線圖案的製作方法，該導電性薄膜設置於顯示裝置的顯示單元上且具有透明基體和配線部，該配線部形成於透明基體的至少一個面且由複數個金屬細線構成，配線部具有將線配線沿2個方向以上重疊而成之網格狀的配線圖案，該線配線由在1個方向上平行地排列之複數個金屬細線構成，其中至少1個方向的線配線係複數個金屬細線為直線的直線配線，網格狀的配線圖案重疊於顯示單元的像素排列圖案上，至少1個方向的直線配線係既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中至少2個間距不同之非等間距的配線圖案，獲取像素排列圖案的亮度或透射率，對非等間距的配線圖案及由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案分別獲取配線圖案的透射率，對非等間距的配線圖案及等間距的配線圖案分別導出配線圖案的透射率的二維傅立葉頻率分佈，並且導出像素排列圖案的亮度或透射率的二維傅立葉頻率分佈，由非等間距的配線圖案及等間距的配線圖案的透射率的二維傅立葉頻率分佈的各頻率成分和像素排列圖案的亮度或透射率的二維傅立葉頻率分佈的各頻率成分計算疊紋的各頻率成分，使人的視覺響應特性作用於如此計算出之疊紋的各頻率成分而求出各頻率成分的強度的總和亦即疊紋評價值，製作如此求出之非等間距的配線圖案中之疊紋評價值小於等間距的配線圖案中之疊紋評價值的非等間距的配線圖案。In order to achieve the above-mentioned object, a method for producing a wiring pattern of a conductive member according to a fifth aspect of the present invention is a method for producing a wiring pattern of a conductive member, which is provided on a display unit of a display device and has A wiring section composed of a plurality of thin metal wires. The wiring section has a grid-like wiring pattern formed by overlapping wire wiring in two or more directions. The wire wiring is composed of a plurality of thin metal wires arranged in parallel in one direction. Among them, the wire wiring in at least one direction is a plurality of thin metal wires that are straight and straight lines. The grid-shaped wiring pattern is superimposed on the pixel arrangement pattern of the display unit. The linear wiring in at least one direction is a predetermined number of thin metal wires. The repeating pitch is at least 2 non-equidistant wiring patterns with different pitches among the pitches of each thin metal wire with a uniform pitch and a predetermined number. The brightness or transmittance of the pixel arrangement pattern is obtained. Consisting of straight metal thin wires, the repeating pitch of a predetermined number of thin metal wires is equal to the non-equidistant wiring pattern, and each metal The fine-pitch and equally-spaced wiring patterns obtain the transmittance of the wiring patterns, respectively. For the non-equidly-spaced wiring patterns and the equally-spaced wiring patterns, the two-dimensional Fourier frequency distribution of the transmittance of the wiring patterns is derived, and the pixel arrangement pattern is derived. Two-dimensional Fourier frequency distribution of brightness or transmittance, the frequency components of the two-dimensional Fourier frequency distribution of the two-dimensional Fourier frequency distribution of non-equidistant wiring patterns and equally-spaced wiring patterns, and the two-dimensional luminance or transmittance of pixel arrangement patterns Each frequency component of the Fourier frequency distribution calculates each frequency component of the moire, so that the human visual response characteristic acts on each frequency component of the moire thus calculated to obtain the sum of the intensity of each frequency component, which is the moire evaluation value. A non-equid pitch wiring pattern having a moire evaluation value in the non-equid pitch wiring pattern obtained in this way is smaller than a moire evaluation value in a regular pitch wiring pattern.
Here, it is preferable that the line wiring is a straight line wiring in all directions of two or more directions.
In addition, in order to achieve the above object, a method for manufacturing a conductive film according to a sixth aspect of the present invention is a method for manufacturing a wiring pattern of a conductive film, which is provided on a display unit of a display device and has a transparent substrate and A wiring portion formed on at least one surface of the transparent substrate and composed of a plurality of thin metal wires. The wiring portion has a grid-like wiring pattern formed by overlapping wire wiring in two or more directions. A plurality of thin metal wires are arranged in parallel in each direction. Among them, the wire wiring in at least one direction is a straight line with a plurality of thin metal wires. The grid-shaped wiring pattern is superimposed on the pixel arrangement pattern of the display unit. The linear wiring system in each direction has a predetermined number of metal thin wires with a repeating pitch of equal spacing and a predetermined number of metal thin wires with at least two non-equidistance wiring patterns with different pitches to obtain the brightness or transmission of the pixel arrangement pattern. Rate, repeating non-equidistant wiring patterns and thin metal wires composed of a plurality of straight lines and a predetermined number of thin metal wires Equivalent to non-equidly spaced wiring patterns and equally spaced wiring patterns of each thin metal wire to obtain the transmittance of the wiring patterns, respectively. For non-equidly spaced wiring patterns and equally spaced wiring patterns, the transmittance of the wiring patterns is derived respectively. And the two-dimensional Fourier frequency distribution of the brightness or transmittance of the pixel arrangement pattern, and the frequency components of the two-dimensional Fourier frequency distribution of the transmittance of the non-equidistant wiring pattern and the equally-spaced wiring pattern. And the frequency components of the two-dimensional Fourier frequency distribution of the brightness or transmittance of the pixel arrangement pattern. Each frequency component of the moire is calculated, and the human visual response characteristic is applied to each frequency component of the moire thus calculated to obtain each frequency. The sum of the component intensities, that is, the moire evaluation value, is a non-equidistance wiring pattern in which the moire evaluation value in the non-equal-pitch wiring pattern obtained in this way is smaller than the moire evaluation value in the equi-pitch wiring pattern.
在上述第1～第6態樣中的任意1個態樣中，視覺響應特性以下述式（1）所表示之視覺傳遞函數VTF給出為較佳。
k≤log（0.238/0.138）/0.1
VTF=1
k＞log（0.238/0.138）/0.1
VTF=5.05e-0.138k
（1-e0.1k
） ……（1）
k=πdu/180
其中，log為自然對數，k為以立體角定義之空間頻率（週期/deg），u為以長度定義之空間頻率（週期/mm），d為100mm～1000mm的範圍內的觀察距離（mm）。In any one of the first to sixth aspects, the visual response characteristic is preferably given by the visual transfer function VTF represented by the following formula (1).
k≤log （0.238 / 0.138） /0.1
VTF = 1
k ＞ log （0.238 / 0.138） /0.1
VTF = 5.05e -0.138k (1-e 0.1k ) …… (1)
k = πdu / 180
Among them, log is the natural logarithm, k is the spatial frequency (period / deg) defined by the solid angle, u is the spatial frequency (period / mm) defined by the length, and d is the observation distance (mm) in the range of 100mm to 1000mm. .
又，視覺響應特性的觀察距離d係300mm～800mm中的任一距離為較佳。
又，當將疊紋評價值設為I時，疊紋評價值I係利用下述式（2）由疊紋的各頻率成分的強度導出者為較佳。
I=（Σ（R[i]）x
）1/x
……（2）
其中，R[i]為疊紋的第i個頻率成分的強度，次數x為1～4中的任一值。
又，次數x係2為較佳。The observation distance d of the visual response characteristic is preferably any distance from 300 mm to 800 mm.
When the moire evaluation value is set to I, the moire evaluation value I is preferably derived from the intensity of each frequency component of the moire using the following formula (2).
I = (Σ (R [i]) x ) 1 / x …… (2)
Here, R [i] is the intensity of the ith frequency component of the moire, and the number of times x is any value from 1 to 4.
The number x is preferably 2.
又，疊紋評價值係利用疊紋的各頻率成分的強度的非線性和導出者為較佳。
又，疊紋評價值還包含由像素排列圖案的頻率0和配線圖案的各頻率成分計算出之疊紋的頻率成分為較佳。The evaluation value of the moire is preferably derived from the non-linearity of the intensity of each frequency component of the moire.
The moire evaluation value preferably includes the moire frequency component calculated from the frequency 0 of the pixel arrangement pattern and each frequency component of the wiring pattern.
又，在非等間距的配線圖案中對疊紋貢獻最大的疊紋的頻率成分的強度小於在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中對疊紋貢獻最大的疊紋的頻率成分的強度為較佳。
又，在非等間距的配線圖案中對疊紋貢獻最大的疊紋的頻率成分的頻率大於在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中對疊紋貢獻最大的疊紋的頻率成分的頻率為較佳。
又，在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中對疊紋貢獻最大的疊紋的頻率成分的頻率以下，非等間距的配線圖案的疊紋評價值小於等間距的配線圖案的疊紋評價值為較佳，疊紋評價值係疊紋的各頻率成分的強度的總和，該疊紋的各頻率成分的強度係使人的視覺響應特性作用於由非等間距的配線圖案及等間距的配線圖案的透射率的二維傅立葉頻率分佈的各頻率成分和像素排列圖案的亮度或透射率的二維傅立葉頻率分佈的各頻率成分計算出之疊紋的各頻率成分而得到。
又，在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中對疊紋貢獻最大的疊紋的頻率成分的頻率下，非等間距的配線圖案的疊紋的頻率成分的強度小於等間距的配線圖案的疊紋的頻率成分的強度為較佳。In addition, the intensity of the frequency component of the moire that contributes most to the moire in the non-equidistant wiring pattern is smaller than the repeating pitch and non-equidistant wiring pattern of a predetermined number of metal fine wires composed of a plurality of straight metal fine wires. The intensity of the frequency component of the moire which has the largest contribution to the moire among the equal-pitch wiring patterns that are equal and have equal pitches of the respective thin metal wires is preferred.
Also, the frequency of the frequency component of the moire that contributes most to the moire in the non-equidistant wiring pattern is greater than that in a wiring pattern consisting of a plurality of straight metal thin lines with a predetermined number of metal fine lines and a non-equidistant wiring pattern. The frequency of the frequency component of the moire which has the largest contribution to the moire among the equally spaced wiring patterns that are equal and have equal pitches of the respective thin metal wires is preferred.
In addition, in a wiring pattern composed of a plurality of straight metal thin wires, a predetermined number of metal thin wires having a repeating pitch equal to a non-equally-spaced wiring pattern, and an equal-pitch wiring pattern with the same pitch of each metal thin wire, the largest contribution to the overlap Below the frequency of the frequency component of the grain, the evaluation value of the moire of the wiring pattern of the non-equid pitch is smaller than the evaluation value of the moire of the wiring pattern of the equal pitch, and the evaluation value of the moire is the sum of the intensity of each frequency component of the moire. The intensity of each frequency component of the moire enables human visual response characteristics to act on the brightness of each frequency component of the two-dimensional Fourier frequency distribution and the brightness of the pixel arrangement pattern of the two-dimensional Fourier frequency distribution of the non-equidistence wiring pattern and the equally spaced wiring pattern. Or each frequency component of the moire is calculated by calculating each frequency component of the two-dimensional Fourier frequency distribution of the transmittance.
In addition, in a wiring pattern composed of a plurality of straight metal thin wires, a predetermined number of metal thin wires having a repeating pitch equal to a non-equally-spaced wiring pattern, and an equal-pitch wiring pattern with the same pitch of each metal thin wire, the largest contribution to the overlap At the frequency of the frequency component of the pattern, it is preferable that the intensity of the frequency component of the moire of the non-equidistance wiring pattern is smaller than the intensity of the frequency component of the moire of the equidistant wiring pattern.
又，在非等間距的配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之非等間距的配線圖案的頻率成分的強度小於在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之等間距的配線圖案的頻率成分的強度為較佳。
又，在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之等間距的配線圖案的頻率成分的頻率下，非等間距的配線圖案的頻率成分的強度小於等間距的配線圖案的頻率成分的強度為較佳。In addition, the non-equidistant wiring pattern is the cause of the frequency component of the moire that contributes most to the moiré among the non-equidistant wiring patterns. The intensity of the frequency component of the non-equidistant wiring pattern is smaller than a predetermined number of thin metal wires composed of a plurality of straight lines. The repeating pitch of the fine metal wires is equal to the non-equidistant wiring pattern, and the equal pitch pitch of the individual metal thin wires is equal to the frequency component of the moire that contributes the largest moire to the moire. The strength of the ingredients is preferred.
In addition, an equal-spaced wiring pattern composed of a plurality of straight metal thin wires, a predetermined number of metal thin wires having a repeating pitch equal to a non-equally-spaced wiring pattern, and an equal pitch of each metal thin wire, has become the largest contribution to the moire. The cause of the frequency component of the moire is that at a frequency of the frequency component of the equally-spaced wiring pattern, the intensity of the frequency component of the non-equally-spaced wiring pattern is preferably lower than the intensity of the frequency component of the equally-spaced wiring pattern.
又，在非等間距的配線圖案中，將既定根數設為n且將各個金屬細線設為金屬細線1、金屬細線2、......及金屬細線n時，距金屬細線1之各個金屬細線的間距p至少滿足下述條件1和條件2中的任一個為較佳。
條件1：間距p屬於（N-d）*T＜p＜（N+d）*T的區間之金屬細線的根數與間距p屬於（N+0.5-d）*T＜p＜（N+0.5+d）*T的區間之金屬細線的根數的差分為1根以下。
條件2：間距p屬於（N+0.25-d）*T＜p＜（N+0.25+d）*T的區間之金屬細線的根數與間距p屬於（N+0.75-d）*T＜p＜（N+0.75+d）*T的區間之金屬細線的根數的差分為1根以下。
其中，T為將在由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之等間距的配線圖案的頻率成分的頻率、或在僅由金屬細線1、金屬細線2、......及金屬細線n中的任一金屬細線構成之配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之金屬細線的配線圖案的頻率成分的頻率設為F而以1/F給出之週期，N為0或正的整數且為將由複數個直線的金屬細線構成、既定根數的金屬細線的重複間距與非等間距的配線圖案相等且各個金屬細線的間距相等之等間距的配線圖案的間距設為PA而（n*PA/T）以下的整數，d為0.025～0.25的範圍中的任一值。
又，像素排列圖案係黑矩陣圖案為較佳。
又，既定根數係16根以下為較佳。In a non-equidistant wiring pattern, when a predetermined number is set to n and each metal thin line is set to metal thin line 1, metal thin line 2, ..., and metal thin line n, the distance from metal thin line 1 is one. It is preferable that the pitch p of each thin metal wire satisfies at least one of the following conditions 1 and 2.
Condition 1: The number of metal wires and the distance p between the interval p belonging to the interval (Nd) * T <p <(N + d) * T and the interval p belonging to (N + 0.5-d) * T <p <(N + 0.5 + d) The difference in the number of thin metal wires in the interval * T is one or less.
Condition 2: The number p of the fine metal wires and the distance p between the interval p belonging to the interval (N + 0.25-d) * T <p <(N + 0.25 + d) * T and (N + 0.75-d) * T <p The difference in the number of metal thin wires in the section of <(N + 0.75 + d) * T is 1 or less.
Among them, T is to be an overlapping pattern in an equally spaced wiring pattern composed of a plurality of straight metal thin wires, a repeating pitch of a predetermined number of metal thin wires is equal to a non-equally-spaced wiring pattern, and the pitch of each metal thin wire is equal. The cause of the frequency component that contributes the largest overlap is the frequency of the frequency component of the equally-spaced wiring pattern, or any of the metal fine wires 1, metal fine wires 2, ..., and metal fine wires n. Among the formed wiring patterns, the frequency component of the wiring pattern that contributes the most to the moire. The frequency of the frequency component of the wiring pattern of the thin metal wire is set to F and the period is given as 1 / F. N is 0 or a positive integer. And to set the pitch of the equally spaced wiring pattern composed of a plurality of straight metal thin wires, the repeating pitch of a predetermined number of thin metal wires to a non-equidistant wiring pattern, and the pitch of each metal thin wire to be equal to PA (n * PA / T) and d is any value in the range of 0.025 to 0.25.
The pixel arrangement pattern is preferably a black matrix pattern.
The predetermined number is preferably 16 or less.
又，配線部具有將線配線沿2個方向重疊而成之網格狀的配線圖案且所有前述複數個金屬細線係直線為較佳。
又，將線配線沿2個方向重疊而成之網格狀的配線圖案係左右非對稱的配線圖案為較佳。
又，2個方向的線配線所成之角度係40度～140度為較佳。
又，沿2個方向以上重疊之線配線中至少1個方向的線配線之平均間距係30μm～600μm為較佳。
進而，平均間距係300μm以下為更佳。
又，配線部可以具有2個方向以上的線配線中至少1個方向的線配線之平均間距與其他的至少1個方向的線配線之平均間距相同之配線圖案，但亦可以具有不同之配線圖案。
又，2個方向以上的線配線中平均間距最窄的方向的線配線的配線圖案係非等間距的配線圖案為較佳。
[發明效果]Further, it is preferable that the wiring section has a grid-like wiring pattern formed by overlapping wire wirings in two directions, and all of the plurality of thin metal wires are straight lines.
Further, it is preferable that the grid-shaped wiring pattern in which the line wiring is overlapped in two directions is a left-right asymmetric wiring pattern.
Moreover, it is preferable that the angle formed by the line wiring in two directions is 40 degrees to 140 degrees.
Moreover, it is preferable that the average pitch of the line wirings in at least one of the line wirings overlapping in two or more directions is 30 μm to 600 μm.
The average pitch is more preferably 300 μm or less.
In addition, the wiring section may have a wiring pattern having an average pitch of at least one of the line wirings in at least one direction and an average pitch of the other line wirings in at least one direction. .
In addition, it is preferable that the wiring pattern of the line wiring in the direction with the narrowest average pitch among the line wirings of two or more directions is a non-equid pitch wiring pattern.
[Inventive effect]
如以上所說明，依本發明，能夠提供一種具有比等間距的配線圖案更能夠減少疊紋之配線圖案之導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法。
又，依本發明，能夠提供一種具有能夠減少疊紋、尤其能夠同時減少規則性的疊紋和不規則性的疊紋（雜訊）之配線圖案之導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法。As described above, according to the present invention, it is possible to provide a conductive member, a conductive film, a display device, a touch panel, and a conductive member having a wiring pattern capable of reducing a moire more than a wiring pattern having an equal pitch. A method for producing a wiring pattern and a method for producing a conductive film.
Furthermore, according to the present invention, it is possible to provide a conductive member, a conductive film, and a wiring pattern having a wiring pattern capable of reducing moire, particularly regular moire and irregular moire (noise). A method for manufacturing a display device, a touch panel, a wiring pattern of a conductive member, and a wiring pattern of a conductive film.
以下，參閱附圖所示之較佳的實施形態，對本發明之導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法進行詳細說明。
本發明中，將至少具有由複數個金屬細線構成之配線部者定義為導電性構件，其中將具備透明基體者定義為導電性薄膜。亦即，本發明的導電性構件既包含直接配置於顯示單元上之情況或直接配置於顯示單元的像素排列上之情況等中所使用之不具有透明基體者，亦包含具備透明基體之導電性薄膜。因此，本發明以由複數個金屬細線構成之配線圖案為特徵，與透明基體無關地，無論在未規定透明基體之導電性構件中，還是在具備透明基體之導電性薄膜中，均係關於由金屬細線構成之特徵性的配線圖案其本身者。以下，關於本發明，主要對具有透明基體之導電性薄膜進行說明，但本發明的特徵為由複數個金屬細線構成之配線圖案，因此其說明當然係關於上位概念的導電性構件者。在此，本發明的導電性構件係能夠稱為感測器構件者。
又，以下，關於本發明之導電性構件及導電性薄膜，以觸控面板用的導電性薄膜為代表例進行說明，但本發明並不限定於此。例如，本發明的導電性薄膜只要為具有具備如下配線圖案之配線部者，則可以為任何者，該配線圖案形成於透明基體的至少一個面且包含非等間距的配線圖案，該非等間距的配線圖案在至少1個方向的直線配線中既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距為非等間距。因此，本發明的導電性薄膜的配線部的配線圖案只要為包含非等間距的配線圖案者即可。Hereinafter, referring to a preferred embodiment shown in the drawings, a method for manufacturing a conductive member, a conductive film, a display device including the same, a touch panel, and a conductive member of the present invention, and a method of wiring the conductive film A method of making a pattern will be described in detail.
In the present invention, a conductive member is defined as having a wiring portion composed of a plurality of thin metal wires, and a conductive film is defined as a conductive member. That is, the conductive member of the present invention includes a case without a transparent substrate used in a case where it is directly arranged on a display unit or a case where it is directly arranged on a pixel arrangement of a display unit, and also includes a conductive material having a transparent substrate. film. Therefore, the present invention is characterized by a wiring pattern composed of a plurality of thin metal wires. Regardless of the transparent substrate, whether in a conductive member in which a transparent substrate is not specified, or in a conductive film provided with a transparent substrate, A characteristic wiring pattern composed of thin metal wires. Hereinafter, the present invention will be described mainly with a conductive film having a transparent substrate. However, the present invention is characterized by a wiring pattern composed of a plurality of thin metal wires, and therefore its description is of course related to a conductive member of a high-level concept. Here, the conductive member of the present invention can be referred to as a sensor member.
In the following, the conductive member and the conductive film of the present invention will be described using a conductive film for a touch panel as a representative example, but the present invention is not limited to this. For example, the conductive film of the present invention may be any one as long as it has a wiring portion having a wiring pattern formed on at least one side of a transparent substrate and including a non-equidistant wiring pattern. The repeating pitch of a predetermined number of thin metal wires in the linear pattern of at least one direction of the wiring pattern is equal pitch, and the pitch of each thin metal wire of a predetermined number is non-equidistant. Therefore, the wiring pattern of the wiring portion of the conductive film of the present invention may be any one that includes wiring patterns that are not equally spaced.
又，本發明只要為具備該種配線圖案之導電性薄膜且為設置於顯示裝置的各種發光強度的顯示單元上之導電性薄膜，則可以為任何者。例如，本發明當然可以為電磁波屏蔽件用的導電性薄膜等。在此，具有設置本發明的導電性薄膜之顯示單元之顯示裝置當然可以為液晶顯示器（LCD：Liquid Crystal Display）、電漿顯示器（PDP：Plasma Display Panel）、有機EL顯示器（OELD：Organic Electro-Luminescence Display）或無機EL顯示器等。
在此，形成於透明基體的至少一個面之配線圖案係指包括“僅配置於透明基體的一側之配線圖案”或“配置於透明基體的兩側的各個面之配線圖案中的一個面的配線圖案或兩個面的配線圖案”或“積層於透明基體的一面之配線圖案中的1個配線圖案或2個以上的配線圖案”等，並且還係指“將配置於透明基體的兩側的各個面之配線圖案重疊（重合）而成之配線圖案”或“將積層於透明基體的一面之配線圖案中的2個以上的配線圖案重疊（重合）而成之配線圖案”或“貼合分別配置於2片透明基體之配線圖案而將2個配線圖案重疊（重合）而成之配線圖案”。在後面進行詳細敘述。In addition, the present invention may be any conductive film having such a wiring pattern as long as it is a conductive film provided on a display unit having various light emitting intensities of a display device. For example, it is needless to say that the present invention may be a conductive film or the like for an electromagnetic wave shield. Here, a display device having a display unit provided with the conductive film of the present invention may of course be a liquid crystal display (LCD: Liquid Crystal Display), a plasma display (PDP: Plasma Display Panel), or an organic EL display (OELD: Organic Electro- Luminescence Display) or inorganic EL display.
Here, the wiring pattern formed on at least one surface of the transparent substrate refers to one of the wiring patterns including “a wiring pattern disposed only on one side of the transparent substrate” or “a wiring pattern disposed on each side of both sides of the transparent substrate”. "Wiring pattern or two-sided wiring pattern" or "one wiring pattern or two or more wiring patterns among wiring patterns laminated on one side of a transparent substrate", and also means "to be arranged on both sides of a transparent substrate Wiring patterns formed by overlapping (overlapping) the wiring patterns on each side "or" wiring patterns formed by overlapping (overlapping) two or more wiring patterns among the wiring patterns laminated on one side of the transparent substrate "or" lamination " A wiring pattern obtained by arranging wiring patterns on two transparent substrates and overlapping (overlapping) the two wiring patterns. " Details will be described later.
另外，重疊本發明的導電性薄膜之顯示裝置的顯示單元（以下，亦稱為顯示器）只要為各像素按照像素排列圖案（以下，亦稱為BM圖案）排列而成且在由導電性薄膜的重疊所產生之疊紋的可見性的評價中能夠考慮其發光強度（亮度）者，則並不特別限制。或者，只要為射出包含互不相同之至少3個顏色例如紅、綠及藍的3個顏色之複數個顏色的光之各個子像素按照各個子像素的像素排列圖案排列而成且在由導電性薄膜的重疊所產生之疊紋的可見性的評價中能夠考慮其發光強度（亮度）者，則並不特別限制。例如，可以為如以往那樣RGB等複數個顏色中之各個顏色的子像素的像素排列圖案（子像素的形狀、尺寸、像素排列的週期及方向）全部相同且能夠以G子像素為代表之顯示單元，亦可以為如前述之OELD那樣在複數個顏色中並不全部相同，亦即對於至少2個顏色，子像素的像素排列圖案不同之顯示單元。
又，成為本發明的對象之顯示裝置的顯示器可以為如高解析度智慧手機或平板終端等那樣發光強度高的顯示器，亦可以為如低解析度的桌上型電腦或電視（TV）等那樣發光強度低的顯示器，亦可以為如中解析度筆記型電腦等那樣發光強度中等程度的顯示器。In addition, a display unit (hereinafter, also referred to as a display) of a display device in which the conductive film of the present invention is superimposed is formed by arranging each pixel in a pixel arrangement pattern (hereinafter, also referred to as a BM pattern), and The evaluation of the visibility of the moire caused by the superposition is not particularly limited as long as its luminous intensity (brightness) can be considered. Alternatively, as long as each of the sub-pixels emits a plurality of colors of light including at least three colors different from each other, for example, three colors of red, green, and blue, the sub-pixels are arranged in accordance with the pixel arrangement pattern of each sub-pixel, and are electrically conductive. The evaluation of the visibility of the moire caused by the overlap of the thin films is not particularly limited as long as the luminous intensity (brightness) can be considered. For example, the pixel arrangement pattern (the shape, size, period and direction of the pixel arrangement) of the sub-pixels of each of a plurality of colors, such as RGB, may be the same as in the past, and may be displayed by the G sub-pixel. The unit may also be a display unit in which a plurality of colors are not the same as in the aforementioned OELD, that is, for at least two colors, the pixel arrangement pattern of the sub-pixels is different.
The display of the display device targeted by the present invention may be a display with a high light intensity, such as a high-resolution smartphone or a tablet terminal, or may be a low-resolution desktop computer or a television (TV). A display having a low light emission intensity may be a display having a medium light emission intensity, such as a medium-resolution notebook computer or the like.
圖1係示意性地表示本發明的第1實施形態之導電性薄膜的一例之局部剖面圖，圖2係示意性地表示圖1所示之導電性薄膜的配線部的配線圖案的一例之平面圖。
如圖1及圖2所示，本實施形態的導電性薄膜10係設置於顯示裝置的顯示單元上者，且係具有在對於顯示單元的像素排列抑制疊紋的產生之觀點上優異之配線圖案、尤其在重疊於像素排列圖案時相對於像素排列圖案在疊紋的可見性的觀點上被最優化之配線圖案之導電性薄膜。
圖1中所例示之導電性薄膜10具有：透明基體12；形成於透明基體12的一個面（圖1中上側的面），由複數個金屬製的細線（以下，稱為金屬細線）14構成，且成為第1電極部之第1配線部16a；以被覆金屬細線14之方式經由第1黏接層18a黏接於第1配線部16a的大致整個面之第1保護層20a；形成於透明基體12的另一個面（圖1中下側的面），由複數個金屬製的細線14構成，且成為第2電極部之第2配線部（電極）16b；及經由第2黏接層18b黏接於第2配線部16b的大致整個面之第2保護層20b。
另外，以下將第1配線部16a及第2配線部16b總稱時簡稱為配線部16，將第1黏接層18a及第2黏接層18b總稱時簡稱為黏接層18，將第1保護層20a及第2保護層20b總稱時簡稱為保護層20。
另外，導電性薄膜10只要至少具有透明基體12和第1配線部16a即可，雖未圖示，但可以在透明基體12與第1配線部16a之間或透明基體12與第2配線部16b之間設置密接強化層、底塗層等功能層。1 is a partial cross-sectional view schematically showing an example of a conductive film according to a first embodiment of the present invention, and FIG. 2 is a plan view schematically showing an example of a wiring pattern of a wiring portion of the conductive film shown in FIG. 1. .
As shown in FIGS. 1 and 2, the conductive film 10 of this embodiment is provided on a display unit of a display device, and has a wiring pattern excellent in terms of suppressing the occurrence of moire with respect to the pixel arrangement of the display unit. In particular, a conductive film of a wiring pattern which is optimized from the viewpoint of the visibility of the moire when the pixel array pattern is superimposed on the pixel array pattern.
The conductive thin film 10 illustrated in FIG. 1 includes a transparent substrate 12 and one surface (the upper surface in FIG. 1) formed on the transparent substrate 12 and composed of a plurality of thin metal wires (hereinafter, referred to as thin metal wires) 14. And a first wiring portion 16a serving as a first electrode portion; a first protective layer 20a adhered to substantially the entire surface of the first wiring portion 16a via a first adhesive layer 18a by covering the thin metal wire 14; formed on a transparent surface The other surface (lower surface in FIG. 1) of the base 12 is composed of a plurality of thin metal wires 14 and serves as a second wiring portion (electrode) 16b of the second electrode portion; and via a second adhesive layer 18b The second protective layer 20b is adhered to substantially the entire surface of the second wiring portion 16b.
In the following, the first wiring portion 16a and the second wiring portion 16b are collectively referred to as the wiring portion 16 when collectively referred to, and the first adhesive layer 18a and the second adhesive layer 18b are collectively referred to as the adhesive layer 18 collectively to protect the first protection. The layer 20a and the second protective layer 20b are collectively referred to as the protective layer 20 for short.
The conductive film 10 is only required to have at least the transparent substrate 12 and the first wiring portion 16a. Although not shown, it may be between the transparent substrate 12 and the first wiring portion 16a or between the transparent substrate 12 and the second wiring portion 16b. Functional layers such as a close-knit reinforcement layer and an undercoat layer are provided between them.
透明基體12只要由透明且具有電絕緣性亦即絕緣性且透光性高的材料構成且能夠支撐第1配線部16a及第2配線部16b，則並不受特別限定。作為構成透明基體12之材料，例如能夠舉出樹脂、玻璃及矽等材料。作為玻璃，例如能夠舉出強化玻璃及無鹼玻璃等。作為樹脂，例如能夠舉出聚對酞酸乙二酯（PET：polyethylene terephthalate）、聚萘二甲酸乙二酯（PEN：polyethylene naphthalate）、聚甲基丙烯酸甲酯（PMMA：Polymethyl methacrylate）、環烯烴聚合物（COP：cyclo-olefin polymer）、環狀烯烴・共聚物（COC：cyclic olefin copolymer）、聚碳酸酯（PC：polycarbonate）、丙烯酸樹脂、聚乙烯（PE：polyethylene）、聚丙烯（PP：polypropylene）、聚苯乙烯（PS：polystyrene）、聚氯乙烯（PVC：polyvinyl chloride）、聚偏二氯乙烯（PVDC：polyvinylidene chloride）、三乙醯纖維素（TAC：cellulose triacetate）等。透明基體12的厚度例如為20～1000μm，尤其30～100μm為較佳。
本發明中，“透明”係指透光率在波長400～800nm的可見光波長區域中為至少30%以上，較佳為50%以上，更佳為70%以上，進一步更佳為90%以上。透光率係使用JIS K 7375：2008中規定之“塑膠--全光線透射率及全光線反射率的求法”測定者。
又，透明基體12的全光線透射率係30%～100%為較佳。全光線透射率例如係使用JIS K 7375：2008中規定之“塑膠--全光線透射率及全光線反射率的求法”測定者。The transparent substrate 12 is not particularly limited as long as it is made of a transparent and electrically insulating material, that is, an insulating and highly translucent material, and can support the first wiring portion 16a and the second wiring portion 16b. Examples of the material constituting the transparent substrate 12 include materials such as resin, glass, and silicon. Examples of the glass include tempered glass and alkali-free glass. Examples of the resin include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polymethyl methacrylate (PMMA), and cycloolefins. Polymer (COP: cyclo-olefin polymer), cyclic olefin copolymer (COC: cyclic olefin copolymer), polycarbonate (PC: polycarbonate), acrylic resin, polyethylene (PE: polyethylene), polypropylene (PP: polypropylene), polystyrene (PS: polystyrene), polyvinyl chloride (PVC: polyvinyl chloride), polyvinylidene chloride (PVDC: polyvinylidene chloride), triacetyl cellulose (TAC: cellulose triacetate), etc. The thickness of the transparent substrate 12 is, for example, 20 to 1000 μm, and particularly preferably 30 to 100 μm.
In the present invention, "transparent" means that the light transmittance is at least 30% or more, preferably 50% or more, more preferably 70% or more, and even more preferably 90% or more in the visible light wavelength region with a wavelength of 400 to 800 nm. The light transmittance is measured by using "plastics-total light transmittance and total light reflectance" stipulated in JIS K 7375: 2008.
The total light transmittance of the transparent substrate 12 is preferably 30% to 100%. The total light transmittance is measured using, for example, “Plastics—Method for determining total light transmittance and total light reflectance” specified in JIS K 7375: 2008.
另外，本發明的第1實施態樣之導電性構件係在圖1所示之本發明的第1實施形態之導電性薄膜中至少具有配線部16a者，圖2係示意性地表示本發明的第1實施態樣之導電性構件的配線部的配線圖案的一例之平面圖，可以說係表示本發明的第1實施態樣之導電性構件之圖。
金屬細線14只要為導電性高的金屬製的細線，則並不特別限制，例如能夠舉出由金（Au）、銀（Ag）或銅（Cu）的線材等構成者。從可見性的觀點而言，金屬細線14的線寬細為較佳，例如為30μm以下即可。另外，在觸控面板用途中，金屬細線14的線寬係0.1μm以上且15μm以下為較佳，1μm以上且9μm以下為更佳，1μm以上且7μm以下為進一步較佳。另外，1μm以上且4μm以下為特佳。The conductive member according to the first embodiment of the present invention includes at least the wiring portion 16a in the conductive film according to the first embodiment of the present invention shown in FIG. 1. FIG. 2 schematically shows It can be said that a plan view of an example of a wiring pattern of a wiring portion of a conductive member according to a first embodiment is a view showing a conductive member according to a first embodiment of the present invention.
The metal thin wire 14 is not particularly limited as long as it is a metal thin wire having high conductivity, and examples thereof include a wire made of gold (Au), silver (Ag), or copper (Cu). From the viewpoint of visibility, the line width of the thin metal wire 14 is preferably thin, and may be, for example, 30 μm or less. In addition, for touch panel applications, the line width of the thin metal wires 14 is preferably 0.1 μm or more and 15 μm or less, more preferably 1 μm or more and 9 μm or less, and more preferably 1 μm or more and 7 μm or less. In addition, 1 μm or more and 4 μm or less is particularly preferred.
如圖2所示，配線部16（16a、16b）由具有網格狀的配線圖案24（24a、24b）之配線層28（28a及28b）構成，該網格狀的配線圖案24係將由圖3所示之在1個方向上平行地排列之複數個金屬細線14構成之直線配線21a和由圖4所示之在另1個方向上平行地排列之複數個金屬細線14構成之直線配線21b重疊而排列成網格狀。在此，配線層28a的配線圖案24a與配線層28b的配線圖案24b可以為相同之網格狀的配線圖案，亦可以為不同之網格狀的配線圖案，以下，視為相同之網格狀的配線圖案而不進行區分，設為網格狀的配線圖案（以下，明確是網格狀時，亦簡稱為配線圖案）24而進行說明。
在圖2所示之配線圖案24中，直線配線21a及21b係均分別具有4根金屬細線14的重複間距Pra和Prb，各個重複間距Pra和Prb為等間距（Pra和Prb為恆定值），直線配線21a的4根的各個金屬細線14的間距P1a、P2a、P3a及P4a為非等間距（P1a、P2a、P3a及P4a中至少2個間距不同）的非等間距配線圖案。同時，係直線配線21b的4根的各個金屬細線14的間距P1b、P2b、P3b及P4b為非等間距（P1b、P2b、P3b及P4b中至少2個間距不同）的非等間距配線圖案。又，直線配線21a和21b的4根金屬細線14各自的重複間距Pra和Prb相同（Pra=Prb），直線配線21a和21b的4根的各個金屬細線14的間距亦相同（P1a=P1b且P2a=P2b且P3a=P3b且P4a=P4b）。As shown in FIG. 2, the wiring portion 16 (16a, 16b) is composed of a wiring layer 28 (28a and 28b) having a grid-like wiring pattern 24 (24a, 24b). The grid-like wiring pattern 24 will be shown in FIG. The straight wiring 21a composed of a plurality of thin metal wires 14 arranged in parallel in one direction as shown in 3 and the straight wiring 21b composed of a plurality of thin metal wires 14 arranged in parallel in another direction shown in FIG. 4 Overlaid and arranged in a grid. Here, the wiring pattern 24a of the wiring layer 28a and the wiring pattern 24b of the wiring layer 28b may be the same grid-like wiring pattern, or may be different grid-like wiring patterns. Hereinafter, they are considered to be the same grid-like pattern. Without distinguishing the wiring pattern, a grid-shaped wiring pattern (hereinafter, also referred to as a wiring pattern when the grid-shaped pattern is clear) 24 will be described.
In the wiring pattern 24 shown in FIG. 2, the linear wirings 21 a and 21 b each have a repeating pitch Pra and Prb of four metal fine wires 14, and each repeating pitch Pra and Prb is an equal pitch (Pra and Prb are constant values), The pitches P1a, P2a, P3a, and P4a of the four thin metal wires 14 of the linear wiring 21a are non-equidistant wiring patterns with non-equidistant pitches (at least two of P1a, P2a, P3a, and P4a are different). At the same time, the pitches P1b, P2b, P3b, and P4b of the four thin metal wires 14 of the linear wiring 21b are non-equidistant wiring patterns with non-uniform pitches (at least two of P1b, P2b, P3b, and P4b are different). The repeating pitches Pra and Prb of the four thin metal wires 14 of the linear wirings 21a and 21b are the same (Pra = Prb), and the pitches of the four thin metal wires 14 of the linear wirings 21a and 21b are also the same (P1a = P1b and P2a). = P2b and P3a = P3b and P4a = P4b).
如圖2所示，配線圖案24係排列有既定形狀的開口部（單元）22（22a、22b、22c、22d）之本發明的第1實施例的網格狀的配線圖案25a，該開口部係藉由作為非等間距的配線圖案之直線配線21a與直線配線21b的重疊將複數個金屬細線14彼此相互交叉而形成。
因此，網格狀的配線圖案25a能夠說係具有平面視時相互保存既定角度且間距（因此尺寸）不同之複數種平行四邊形的形狀之開口部22（22a、22b、22c、22d）在成既定角度之2個方向上複數個連續相連而成之配線圖案。As shown in FIG. 2, the wiring pattern 24 is a grid-shaped wiring pattern 25 a according to the first embodiment of the present invention in which predetermined openings (cells) 22 (22 a, 22 b, 22 c, and 22 d) are arranged. The plurality of thin metal wires 14 are formed by crossing the plurality of thin metal wires 14 with each other by overlapping the linear wiring 21a and the linear wiring 21b, which are non-equidistant wiring patterns.
Therefore, it can be said that the grid-shaped wiring pattern 25a has a plurality of parallelogram-shaped openings 22 (22a, 22b, 22c, 22d) that have a predetermined angle and a different pitch (hence the size) from each other in plan view. A plurality of wiring patterns which are continuously connected in two directions of the angle.
在圖2所示之網格狀的配線圖案25a的直線配線21a及21b中，4根金屬細線14的重複間距為等間距，4根的各個金屬細線14的間距為非等間距，但本發明並不限定於此，只要為既定根數的金屬細線14的重複間距為等間距且該既定根數的各個金屬細線14的間距為非等間距的非等間距配線圖案即可。
能夠設為非等間距之金屬細線14的最小根數為2根，因此既定根數為2根以上。又，既定根數係64根以下為較佳，32根以下為更佳，16根以下為進一步較佳。特佳的既定根數為2根以上且8根以下。其原因如後面所說明，是因為，越增加設為非等間距之既定根數，直線配線21的最小頻率越降低，直線配線21本身越容易被辨識。又，認為是因為，越增加既定根數，直線配線21的頻率成分越細地擴大，因此，其結果會導致較細地產生複數個疊紋成分，無論如何將既定根數的金屬細線14的間距最優化，亦難以使複數個疊紋的全部遠離像素排列圖案的各頻率成分。另外，本發明中，無需既定根數的金屬細線14全部的間距不同，只要既定根數的金屬細線14中至少2根金屬細線的間距不同即可。In the linear wirings 21a and 21b of the grid-like wiring pattern 25a shown in FIG. 2, the repeating pitch of the four metal thin wires 14 is an equal pitch, and the pitch of each of the four metal thin wires 14 is a non-equal pitch, but the present invention It is not limited to this, as long as the repeating pitch of the predetermined number of thin metal wires 14 is an equal pitch, and the pitch of each predetermined number of thin metal wires 14 is a non-uniform pitch wiring pattern.
The minimum number of fine metal wires 14 that can be non-equidistant is two, so the predetermined number is two or more. The predetermined number is preferably 64 or less, more preferably 32 or less, and even more preferably 16 or less. A particularly good predetermined number is two or more and eight or less. The reason for this will be described later. The more the predetermined number of non-equidistant pitches is increased, the lower the minimum frequency of the linear wiring 21 is, and the more easily the linear wiring 21 itself can be identified. In addition, it is considered that the frequency component of the linear wiring 21 becomes finer as the predetermined number is increased. As a result, a plurality of moiré components are generated finely. In any case, the predetermined number of thin metal wires 14 is reduced. Optimizing the pitch also makes it difficult to keep all of the multiple moires away from each frequency component of the pixel arrangement pattern. In addition, in the present invention, it is not necessary that the pitches of all the metal thin wires 14 of a predetermined number are different, and it is only necessary that the pitches of at least two of the metal thin wires 14 of a predetermined number are different.
又，在圖2所示之例子中，由在1個方向上平行地排列之複數個金屬細線14構成之直線配線21為直線配線21a及21b這2個方向，但本發明並不限定於此，亦可以將3個方向以上的直線配線21進行重疊。另外，重疊方向不同之直線配線21的方向的數量係8個方向以下為較佳，4個方向以下為更佳，2個方向為進一步較佳。其原因如後面所說明，是因為為了確保透射率，每單位面積的金屬細線14的根數存在上限，因此直線配線21的方向的數量少時，能夠增加每1個方向的金屬細線14的根數，結果能夠縮小金屬細線14的配線間距而使疊紋難以產生。又，是因為，金屬細線14的配線間距窄時，在不影響直線配線21本身的可見性之範圍內能夠更自由地將既定根數的金屬細線14的間距最優化而減少疊紋。另一方面，為了防止作為導電性薄膜的觸控感測器之功能欠缺，直線配線21的方向的數量最少需要2個方向，因此2個方向為最佳。
在圖2所示之配線圖案25a中，將重複間距相等之直線配線21a及21b在2個方向上進行了重疊，但本發明並不限定於此，亦可以將重複間距不同之直線配線在2個方向以上進行重疊。在此，在將直線配線沿2個方向重疊而成之配線圖案中，當如圖2所示之例子那樣2個方向的重複間距相等時，以該重複間距的單位成為菱形，當2個方向的重複間距不同時，以該重複間距的單位成為平行四邊形。In the example shown in FIG. 2, the linear wiring 21 composed of a plurality of thin metal wires 14 arranged in parallel in one direction is two directions of the linear wiring 21 a and 21 b. However, the present invention is not limited to this. It is also possible to overlap the linear wirings 21 in three or more directions. In addition, the number of directions of the linear wirings 21 having different overlapping directions is preferably 8 or less, more preferably 4 or less, and 2 more preferably. The reason for this is as described below. In order to ensure the transmittance, there is an upper limit on the number of thin metal wires 14 per unit area. Therefore, when the number of linear wiring 21 is small, the number of thin metal wires 14 in each direction can be increased. As a result, it is possible to reduce the wiring pitch of the thin metal wires 14 and make it difficult to generate overlapping. Further, when the wiring pitch of the thin metal wires 14 is narrow, the pitch of the predetermined number of the thin metal wires 14 can be optimized more freely to reduce the moire within a range that does not affect the visibility of the linear wiring 21 itself. On the other hand, in order to prevent the lack of the function of the touch sensor as a conductive film, the number of directions of the linear wiring 21 requires at least two directions, so two directions are optimal.
In the wiring pattern 25 a shown in FIG. 2, the linear wirings 21 a and 21 b having the same repeated pitch are overlapped in two directions, but the present invention is not limited to this, and the linear wirings having different repeated pitches may also be arranged in two directions. Overlap in more than one direction. Here, in a wiring pattern in which linear wirings are overlapped in two directions, when the repeating pitch in the two directions is equal as in the example shown in FIG. 2, the unit of the repeating pitch becomes a rhombus, and when the repeating pitch is in the two directions, When the repeating pitch is different, the unit of the repeating pitch becomes a parallelogram.
又，在圖2所示之例子中，網格狀的配線圖案25a係在直線配線21a及21b的2個方向的直線配線21中既定根數（4根）的金屬細線14的重複間距為等間距且既定根數（4根）的金屬細線14的間距為非等間距的非等間距配線圖案，但本發明並不限定於此。本發明中，如圖5所示之本發明的第2實施例的配線圖案25b那樣，作為既定根數的金屬細線14的重複間距為等間距且既定根數的各個金屬細線14的間距為非等間距的非等間距配線圖案之方向不同之直線配線可以僅為1個方向的直線配線21（直線配線21a及21b中的任一個）。又，雖未圖示，但亦可以為3個方向以上的直線配線21全部係既定根數的金屬細線14的重複間距為等間距且既定根數的各個金屬細線14的間距為非等間距的非等間距配線圖案。In the example shown in FIG. 2, the grid-like wiring pattern 25 a is a predetermined number (4) of the metal wire 14 in the linear wiring 21 in two directions of the linear wiring 21 a and 21 b. The pitch and the pitch of a predetermined number (4) of the thin metal wires 14 are non-equid pitch non-equid pitch wiring patterns, but the present invention is not limited to this. In the present invention, as shown in the wiring pattern 25b of the second embodiment of the present invention shown in FIG. 5, the repeating pitch of the predetermined number of thin metal wires 14 is equal, and the pitch of each of the predetermined number of thin metal wires 14 is not. The straight-line wirings with different directions in the non-equid-spaced wiring patterns with equal pitches may be only the straight-line wirings 21 (any of the straight-line wirings 21 a and 21 b) in one direction. Also, although not shown, the repeating pitch of all the thin metal wires 14 having a predetermined number of linear wirings 21 in three directions or more may be an equal pitch, and the pitch of each of the thin metal wires 14 of a predetermined number may be a non-equidistant pitch. Non-equidistant wiring pattern.
圖5所示之配線圖案25b係將直線配線21a和直線配線21c重疊而排列成網格狀之網格狀的配線圖案，直線配線21a係在圖3所示之1個方向上平行地排列，既定根數（4根）的金屬細線14的重複間距為等間距且既定根數（4根）的金屬細線14的間距為非等間距，該直線配線21c由圖6所示之在另1個方向上平行地且以等間距排列之複數個金屬細線14構成。如此，本發明中，至少具有由在1個方向上平行地排列、既定根數的金屬細線14的重複間距為等間距且既定根數的金屬細線14的間距為非等間距的直線配線構成之配線圖案即可。在此，重疊於具有該本發明的特徵之直線配線上之由在另1個方向上平行地排列之複數個金屬細線構成之線配線無需一定為直線配線，亦可以為曲線配線、例如如後述之圖59所示之曲線配線23c，亦可以為由折線構成之線配線。本發明中，將由直線配線、曲線配線及折線構成之線配線等統稱為線配線。本發明中，為了減少疊紋，被重疊之2個方向以上的線配線係在被重疊之2個方向以上的所有方向上為直線配線為較佳。另外，以下以被重疊之2個方向以上的線配線全部為直線配線的例子為代表例進行說明，但只要被重疊之2個方向以上的線配線中至少1個方向的線配線為具有本發明的特徵之直線配線，則其他的至少1個方向的線配線為非直線配線的情況當然亦包含於本發明中。The wiring pattern 25b shown in FIG. 5 is a grid-shaped wiring pattern in which the linear wiring 21a and the linear wiring 21c are superimposed and arranged in a grid shape. The linear wiring 21a is arranged in parallel in one direction shown in FIG. The repeating pitch of a predetermined number (4) of thin metal wires 14 is an equal pitch and the pitch of a predetermined number (4) of thin metal wires 14 is a non-equidistant. The linear wiring 21c is shown in FIG. 6 in another one. The plurality of thin metal wires 14 are arranged in parallel in the direction and arranged at equal intervals. As described above, in the present invention, at least the linear wiring having a predetermined number of metal thin wires 14 arranged in parallel in one direction with an equal pitch and a predetermined number of metal thin wires 14 with a non-equal pitch is configured. The wiring pattern is sufficient. Here, the wire wiring composed of a plurality of thin metal wires arranged in parallel in the other direction and superimposed on the straight wiring having the characteristics of the present invention need not necessarily be a straight wiring, but may also be a curved wiring, for example, as described later. The curve wiring 23c shown in FIG. 59 may be a wire wiring composed of a folded line. In the present invention, a line wiring composed of a straight line wiring, a curved line wiring, and a polyline is collectively referred to as a line wiring. In the present invention, in order to reduce the moire, it is preferable that the line wirings in the two or more directions that are overlapped are linear wires in all the directions that are in the two or more directions that are overlapped. In addition, in the following, an example in which all the line wirings in two or more directions that are overlapped are linear wirings is described as a representative example. However, as long as the line wirings in at least one of the two or more overlapped line wirings are provided with the present invention, The characteristic linear wiring is naturally included in the present invention when the other linear wiring in at least one direction is a non-linear wiring.
因此，配線圖案25b包含直線配線21a的非等間距的配線圖案，因此能夠說係具有平面視時相互保存既定角度且間距（因此尺寸）不同之複數種平行四邊形的形狀之開口部22在成既定角度之2個方向上複數個連續相連而成之配線圖案。
另外，既定根數的金屬細線14的重複間距為等間距且既定根數的金屬細線14的間距為非等間距的方向不同之直線配線21的數量當然為被重疊之方向不同之直線配線的方向的數量以下，但與被重疊之方向不同之直線配線的方向的數量相等為較佳。亦即，在被重疊之所有方向的直線配線21中，既定根數的金屬細線14的重複間距為等間距且既定根數的金屬細線14的間距為非等間距為較佳。其原因如後面所說明，是因為在各個方向的直線配線21中，將既定根數的金屬細線14分別設為非等間距以相互抵消導致產生疊紋之頻率成分，藉此與設為等間距相比更能夠減少疊紋，因此在所有方向的直線配線21中設為非等間距以相互抵消導致產生疊紋之頻率成分來減少疊紋為較佳。又，本發明中，設為非等間距之既定根數的金屬細線14的重複間距、各個金屬細線14的間距及既定根數可以在所有方向上相同，亦可以在各個方向上不同。Therefore, the wiring pattern 25b includes the non-equidistant wiring patterns of the linear wiring 21a. Therefore, it can be said that the openings 22 having a plurality of parallelogram shapes with a predetermined angle and different pitches (hence dimensions) from each other when viewed in plan form a predetermined shape. A plurality of wiring patterns which are continuously connected in two directions of the angle.
In addition, the repeating pitch of the predetermined number of thin metal wires 14 is equal, and the interval of the predetermined number of thin metal wires 14 is non-equidistant. The number of linear wirings 21 in different directions is of course the direction of the linear wirings in different directions. It is preferable that the number of the linear wirings is equal to or less than the number of directions of the linear wirings which are different from the overlapping direction. That is, in the linear wiring 21 superimposed in all directions, it is preferable that the repeating pitch of the predetermined number of metal thin wires 14 is an equal pitch, and the pitch of the predetermined number of metal thin wires 14 is a non-equal pitch. The reason for this is as described later. In the linear wiring 21 in each direction, the predetermined number of thin metal wires 14 are set at non-equal intervals to cancel out the frequency components that cause moiré, which is equal to the equal spacing. The moire can be reduced more than that. Therefore, it is better to reduce the moire by setting the non-uniform pitch in the linear wiring 21 in all directions to cancel the frequency components that cause moire. Furthermore, in the present invention, the repeating pitch of the metal fine wires 14 having a predetermined number of non-equidistant pitches, the pitch of each of the metal fine wires 14 and the predetermined number may be the same in all directions, or may be different in each direction.
另外，在配線圖案25a及25b的直線配線21（21a、21b）中，關於重複間距為等間距的既定根數的金屬細線14中至少2根金屬細線的非等間距，將重複間距除以既定根數的平均間距設為100%時，為了不使直線配線21本身被辨識，10%以上或190%以下為較佳，又，為了得到減少疊紋之效果，99%以下或101%以上為較佳。亦即，為了使直線配線21本身不被辨識而得到減少疊紋之效果，至少2根金屬細線的非等間距係10%以上且99%以下或101%以上且190%以下為較佳。
又，作為既定根數的重複間距的偏差，在±20%以內為較佳，在±10%以內為更佳，在±5%以內為進一步較佳。In addition, in the linear wiring 21 (21a, 21b) of the wiring patterns 25a and 25b, regarding the non-equidistance of at least two of the metal thin wires 14 having a predetermined number of repeating pitches at a predetermined pitch, the repeating pitch is divided by the predetermined pitch. When the average pitch of the number is set to 100%, in order to prevent the linear wiring 21 itself from being recognized, 10% or more or 190% or less is preferable, and in order to obtain the effect of reducing moire, 99% or less or 101% or more is Better. That is, in order to obtain the effect of reducing the wrinkles without identifying the linear wiring 21 itself, the non-equidistance of at least two thin metal wires is preferably 10% or more and 99% or less, or 101% or more and 190% or less.
In addition, the deviation of the repeating pitch of a predetermined number is preferably within ± 20%, more preferably within ± 10%, and even more preferably within ± 5%.
另外，詳細後述，本發明的導電性薄膜10係具有如下配線圖案者：該配線圖案係將由在1個方向上平行地排列之複數個金屬細線14構成之直線配線21沿2個方向以上重疊而成之配線圖案，且包含在至少1個方向的直線配線21中既定根數的金屬細線14的重複間距為等間距且既定根數的各個金屬細線14的間距為非等間距的非等間距配線圖案，相對於顯示單元的既定亮度的像素排列圖案在疊紋可見性的觀點上被最優化。另外，本發明中，相對於既定亮度的像素排列圖案在疊紋可見性的觀點上被最優化之配線圖案係指相對於既定亮度的像素排列圖案，疊紋不會被人的視覺察覺之配線圖案。
因此，配線圖案24（24a、24b）係具有非等間距的配線圖案者，且係相對於顯示單元的既定亮度的像素排列圖案在疊紋可見性的觀點上被最優化之配線圖案，並且係由配線圖案24a及24b（的透射率圖像資料）重合而成之合成配線圖案24的合成圖像資料和分別熄滅顯示器的複數個顏色的光時的各顏色的像素排列圖案的亮度資料求出之疊紋的評價指標成為既定評價閾值以下之配線圖案。亦即，配線圖案24能夠說係包含如下非等間距的配線圖案之配線圖案，該非等間距的配線圖案重疊於既定發光強度的顯示器的顯示畫面而能夠充分抑制疊紋的產生，從而能夠提高可見性，並且相對於顯示單元的既定亮度的像素排列圖案在疊紋可見性的觀點上被最優化。In addition, as will be described in detail later, the conductive film 10 of the present invention has a wiring pattern in which linear wirings 21 composed of a plurality of thin metal wires 14 arranged in parallel in one direction are stacked in two or more directions and A non-equidistant wiring with a predetermined number of metal fine wires 14 included in at least one direction of the linear wiring 21 and the repeating pitch of the predetermined number of metal fine wires 14 is equal and the pitch of each metal thin wire 14 is a non-equidistant The pattern, the pixel arrangement pattern with respect to a predetermined brightness of the display unit, is optimized from the viewpoint of moire visibility. In addition, in the present invention, the wiring pattern optimized for the visibility of the moire with respect to the pixel arrangement pattern of a predetermined brightness refers to the wiring for which the moire is not perceived by human vision with respect to the pixel arrangement pattern of the predetermined brightness. pattern.
Therefore, the wiring pattern 24 (24a, 24b) is a wiring pattern having a non-equidistant wiring pattern, and is a wiring pattern whose pixel arrangement pattern of a predetermined brightness of the display unit is optimized from the viewpoint of visibility of the moire, and The composite image data of the composite wiring pattern 24 formed by overlapping the wiring patterns 24a and 24b (transmittance image data) and the brightness data of the pixel arrangement pattern of each color when the plurality of colors of light of the display are turned off respectively are obtained The evaluation index of the moire is a wiring pattern below a predetermined evaluation threshold. That is, the wiring pattern 24 can be said to be a wiring pattern including a non-equidistant wiring pattern that overlaps a display screen of a display with a predetermined light emission intensity, can sufficiently suppress the occurrence of moire, and can improve visibility. The pixel arrangement pattern with respect to a predetermined brightness of the display unit is optimized from the viewpoint of moire visibility.
本發明中，如上所述，藉由使用如下非等間距的配線圖案，能夠生成疊紋的可見性優異之配線圖案，該非等間距的配線圖案係將2個方向以上的直線配線重疊而成之配線圖案，且係在至少1個方向的直線配線中既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距為非等間距的非等間距配線圖案，並且相對於顯示單元的既定亮度的像素排列圖案在疊紋可見性的觀點上被最優化。
又，包含在該種被最優化之配線圖案之配線圖案24中，在構成開口部22之金屬細線14的邊（直線配線21）上可以形成有斷線（斷路），亦可以如後述之虛設電極部及電極內虛設圖案部那樣，為了形成電絕緣性而金屬細線14由斷線（斷路）在中途被切斷。另外，在重疊於非等間距的配線圖案的直線配線21a之圖5所示之等間距的直線配線21c中，當然亦可以在構成開口部22之金屬細線14的邊上形成有斷線（斷路），亦可以金屬細線14在中途被切斷。作為該種具有斷路（斷線部）之網格狀配線圖案的形狀，能夠適用本申請人的申請之日本專利6001089號或WO2013/094729中所記載之導電性薄膜的網格狀配線圖案的形狀。In the present invention, as described above, by using a non-equid pitch wiring pattern, it is possible to generate a wiring pattern excellent in visibility of a moire. The non-equid pitch wiring pattern is formed by overlapping linear wirings in two or more directions. Wiring pattern, and the repeating pitch of a predetermined number of thin metal wires in a straight line in at least one direction is an equal pitch and the pitch of each metal thin wire of a predetermined number is a non-equidistant non-equidistant wiring pattern, and The pixel arrangement pattern of a predetermined brightness of the display unit is optimized from the viewpoint of moire visibility.
In addition, the wiring pattern 24 included in the optimized wiring pattern may have a disconnection (open circuit) on the side (the straight wiring 21) of the thin metal wire 14 constituting the opening 22, or may be a dummy as described later. As in the electrode portion and the dummy pattern portion in the electrode, the thin metal wire 14 is cut in the middle by a disconnection (open circuit) in order to form electrical insulation. In addition, of course, in the linear wiring 21c of the equal pitch shown in FIG. 5, which is superimposed on the non-equidistant wiring pattern, the linear wiring 21c shown in FIG. ), Or the thin metal wire 14 may be cut in the middle. As the shape of such a grid-like wiring pattern having a disconnection (disconnection portion), the shape of the grid-like wiring pattern of the conductive film described in Japanese Patent No. 6001089 or WO2013 / 094729 filed by the applicant can be applied. .
在圖1所示之實施形態的導電性薄膜10中，在圖1中，透明基體12的上側（觀察側）的第1配線部16a的複數個金屬細線14和下側（顯示器側）的第2配線部16b的複數個金屬細線14均具有包含圖2所示之非等間距的配線圖案之配線圖案25a或包含圖5所示之非等間距的配線圖案之配線圖案25b來分別作為配線圖案24a及24b，並構成由包含上側及下側的非等間距的配線圖案之配線圖案24a及24b的重合而形成之合成配線圖案24。在圖1所示之實施形態的導電性薄膜10中，合成配線圖案24與配線圖案24a及24b同樣地係包含非等間距的配線圖案之配線圖案。而且，配線圖案24a及24b係包含相對於顯示單元的既定亮度的像素排列圖案在疊紋可見性的觀點上被最優化之非等間距的配線圖案之配線圖案，並且合成配線圖案24亦係包含在疊紋可見性的觀點上被最優化之非等間距的配線圖案之配線圖案。In the conductive film 10 according to the embodiment shown in FIG. 1, in FIG. 1, the plurality of thin metal wires 14 of the first wiring portion 16 a on the upper side (viewing side) of the transparent substrate 12 and the first wiring portion 16 a on the lower side (display side). The plurality of thin metal wires 14 of the wiring portion 16b each have a wiring pattern 25a including a non-equidistant wiring pattern shown in FIG. 2 or a wiring pattern 25b including a non-equidistant wiring pattern shown in FIG. 5 as the wiring pattern, respectively. 24a and 24b, and constitute a composite wiring pattern 24 formed by overlapping wiring patterns 24a and 24b including non-equal pitch wiring patterns on the upper and lower sides. In the conductive film 10 according to the embodiment shown in FIG. 1, the composite wiring pattern 24 is a wiring pattern including wiring patterns with non-equid pitches, as with the wiring patterns 24 a and 24 b. Further, the wiring patterns 24a and 24b are wiring patterns including non-equidistant wiring patterns optimized for the visibility of the moire from a pixel array pattern of a predetermined brightness of the display unit, and the synthetic wiring pattern 24 also includes A wiring pattern of a non-equidistant wiring pattern that is optimized from the viewpoint of moire visibility.
亦即，在圖1所示之例子中，將第1配線部16a及第2配線部16b均由具有包含如圖2或圖5所示之在疊紋可見性的觀點上被最優化之非等間距的配線圖案之配線圖案之複數個金屬細線構成（其結果，由第1配線部16a及第2配線部16b的金屬細線的配線圖案的重合而形成之合成配線圖案亦包含在疊紋可見性的觀點上被最優化之非等間距的配線圖案）。然而，本發明並不限定於此，只要在任一個配線部16的至少一部分具有具備包含圖2或圖5所示之非等間距的配線圖案之配線圖案25a或25b之複數個金屬細線即可。或者，亦可以以第1配線部16a的配線圖案24a和第2配線部16b的配線圖案24b均不包含圖2或圖5所示之非等間距的配線圖案而在由該等的重合而形成之合成配線圖案24中包含如圖2或圖5所示之非等間距的配線圖案之方式構成第1配線部16a及第2配線部16b的複數個金屬細線。That is, in the example shown in FIG. 1, each of the first wiring portion 16a and the second wiring portion 16b has a structure that is optimized from the viewpoint of visibility of the moire as shown in FIG. 2 or FIG. 5. A plurality of thin metal wires of the wiring pattern of the equally spaced wiring pattern (as a result, a composite wiring pattern formed by overlapping the wiring patterns of the thin metal wires of the first wiring portion 16a and the second wiring portion 16b is also included in the overlapping pattern. (Non-equidistant wiring pattern) optimized from the viewpoint of performance). However, the present invention is not limited to this, as long as at least a portion of any one of the wiring portions 16 has a plurality of thin metal wires including a wiring pattern 25a or 25b including a wiring pattern having an uneven pitch as shown in FIG. 2 or FIG. 5. Alternatively, the wiring pattern 24a of the first wiring portion 16a and the wiring pattern 24b of the second wiring portion 16b may not be formed by overlapping the wiring patterns of non-equal pitch as shown in FIG. 2 or FIG. 5. The composite wiring pattern 24 includes a plurality of thin metal wires of the first wiring portion 16 a and the second wiring portion 16 b in a manner including a non-equidistant wiring pattern as shown in FIG. 2 or 5.
如此，藉由將導電性薄膜的上側或下側的配線部16（配線部16a或16b）的全部或一部分金屬細線由包含非等間距的配線圖案之配線圖案25a或25b構成，和/或，藉由以在由兩個配線部16的配線圖案的重合而形成之合成配線圖案24中包含配線圖案25a或25b那樣的非等間距的配線圖案之方式構成兩個配線部16的複數個金屬細線，能夠使由兩個配線部16的配線圖案的重合而形成之合成配線圖案24包含在疊紋可見性的觀點上被最優化之非等間距的配線圖案來改善由與顯示器的干涉而產生之疊紋的可見性。亦可以將兩個配線部16的配線圖案均由具有等間距的配線圖案（例如，後述之圖12所示之等間距的配線圖案25c）之複數個金屬細線14構成，同時以使由兩個配線部16的配線圖案的重合而形成之合成配線圖案24成為在疊紋的可見性的觀點上被最優化之非等間距的配線圖案之方式構成兩個配線部16的複數個金屬細線。In this way, all or a part of the thin metal wires of the wiring portion 16 (wiring portion 16a or 16b) on the upper side or the lower side of the conductive film is composed of wiring patterns 25a or 25b including wiring patterns of non-equid pitch, and / or, The plurality of metal thin wires of the two wiring portions 16 are configured so that the non-equidistant wiring patterns such as the wiring patterns 25a or 25b are included in the composite wiring pattern 24 formed by the overlapping of the wiring patterns of the two wiring portions 16. The composite wiring pattern 24 formed by the overlapping of the wiring patterns of the two wiring portions 16 can include non-equidistant wiring patterns optimized in view of the visibility of the moire to improve the interference caused by the display. Visibility of moire. The wiring patterns of the two wiring portions 16 may each be composed of a plurality of thin metal wires 14 having a wiring pattern having an equal pitch (for example, a wiring pattern 25c having an equal pitch shown in FIG. 12 to be described later). The composite wiring pattern 24 formed by overlapping the wiring patterns of the wiring portion 16 is a plurality of thin metal wires forming the two wiring portions 16 in such a manner as to be a non-equidistant wiring pattern optimized in view of the visibility of the moire.
又，亦可以將第1配線部16a及第2配線部16b由具有不同之配線圖案24之複數個金屬細線構成。例如，可以將透明基體12的上側的第1配線部16a由具有包含圖2或圖5所示之非等間距的配線圖案（以下，以圖2為代表）之配線圖案25a或25b之複數個金屬細線14（以下，以25a為代表）構成，將透明基體12的下側的第2配線部16b由具有後述之圖12所示之等間距的配線圖案25c之複數個金屬細線14構成，相反地，亦可以將第1配線部16a由具有圖12所示之等間距的配線圖案25c之複數個金屬細線14構成，將第2配線部16b由具有包含非等間距的配線圖案之配線圖案25a之複數個金屬細線14構成。由於在由該種包含非等間距的配線圖案之配線圖案25a與等間距的配線圖案25c的重合而形成之合成配線圖案中亦包含在疊紋的可見性的觀點上被最優化之非等間距的配線圖案，所以利用該合成配線圖案能夠改善由與顯示器的干涉而產生之疊紋的可見性。The first wiring portion 16a and the second wiring portion 16b may be composed of a plurality of thin metal wires having different wiring patterns 24. For example, the first wiring portion 16a on the upper side of the transparent substrate 12 may be composed of a plurality of wiring patterns 25a or 25b including a non-equid pitch wiring pattern (hereinafter, represented by FIG. 2) shown in FIG. 2 or FIG. The thin metal wires 14 (hereinafter referred to as 25a) are constituted, and the second wiring portion 16b on the lower side of the transparent base 12 is constituted by a plurality of thin metal wires 14 having a wiring pattern 25c having an equal pitch as shown in FIG. 12 described later. Alternatively, the first wiring portion 16a may be composed of a plurality of thin metal wires 14 having a wiring pattern 25c having an equal pitch as shown in FIG. 12, and the second wiring portion 16b may be composed of a wiring pattern 25a having a wiring pattern having an uneven pitch. The plurality of thin metal wires 14 are formed. The composite wiring pattern formed by the superposition of the wiring pattern 25a including the non-equid pitch wiring pattern and the uniform pitch wiring pattern 25c also includes the non-equid spacing optimized from the viewpoint of the visibility of the moire. The use of this synthetic wiring pattern can improve the visibility of the moire caused by interference with the display.
又，如上所述，亦可以將第1配線部16a及第2配線部16b中的至少任一個的複數個金屬細線14利用斷線（斷路）分斷為構成配線層28之電極部17（17a、17b）和虛設電極部（非電極部）26，將電極部17（17a、17b）及虛設電極部26中的任一個由具有包含圖2所示之非等間距的配線圖案之配線圖案25a之複數個金屬細線14構成，將另一個由具有圖12所示之等間距的配線圖案25c之複數個金屬細線14構成，從而製成本發明的第2實施形態的導電性薄膜11。由於在該種由包含非等間距的配線圖案之配線圖案25a及等間距的配線圖案25c的組合與配線圖案25a或配線圖案25c的重合而形成之合成配線圖案中亦包含在疊紋的可見性的觀點上被最優化之非等間距的配線圖案，所以利用該合成配線圖案能夠改善由與顯示器的干涉而產生之疊紋的可見性。
另外，關於圖7所示之本發明的第2實施形態的導電性薄膜11的結構，將在後面進行敘述。Further, as described above, the plurality of thin metal wires 14 of at least any one of the first wiring portion 16 a and the second wiring portion 16 b may be divided into electrode portions 17 (17 a constituting the wiring layer 28 by a disconnection (open circuit). 17b) and the dummy electrode portion (non-electrode portion) 26, and one of the electrode portions 17 (17a, 17b) and the dummy electrode portion 26 is a wiring pattern 25a having a wiring pattern including a non-equidistant wiring pattern as shown in FIG. 2. The conductive thin film 14 according to the second embodiment of the present invention is made of a plurality of metal thin wires 14 and the other is composed of a plurality of metal fine wires 14 having a wiring pattern 25c having an equal pitch as shown in FIG. 12. The visibility of the overlay pattern is also included in the composite wiring pattern formed by the combination of the wiring pattern 25a including the wiring pattern 25a of the non-equid pitch and the wiring pattern 25c overlapping with the wiring pattern 25a or the wiring pattern 25c. The non-equidistant wiring pattern is optimized from the standpoint of view, so the use of this composite wiring pattern can improve the visibility of the moire caused by interference with the display.
The structure of the conductive thin film 11 according to the second embodiment of the present invention shown in FIG. 7 will be described later.
如上所述，第1保護層20a以被覆第1配線部16a的金屬細線14之方式利用第1黏接層18a黏接於由第1配線部16a構成之配線層28a的大致整個面。又，第2保護層20b以被覆第2配線部16b的金屬細線14之方式利用第2黏接層18b黏接於由第2配線部16b構成之配線層28b的大致整個面。
在上述例子中，第1保護層20a利用第1黏接層18a黏接於配線層28a，第2保護層20b利用第2黏接層18b黏接於配線層28b的大致整個面，但本發明並不限定於此，保護層只要藉由被覆配線層的配線部的金屬細線而能夠對其進行保護，則無需一定要將兩者黏接，亦可以沒有黏接層。又，本發明中，亦可以沒有第1保護層20a和/或第2保護層20b。
在此，作為黏接層18（第1黏接層18a及第2黏接層18b）的材料，可以舉出濕式層合（wet laminate）黏接劑、乾式層合（dry laminate）黏接劑或熱熔體（hot melt）黏接劑等，但第1黏接層18a的材質和第2黏接層18b的材質可以相同，亦可以不同。
又，與透明基體12同樣地，保護層20（第1保護層20a及第2保護層20b）由包含樹脂、玻璃、矽之透光性高的材料構成，但第1保護層20a的材質和第2保護層20b的材質可以相同，亦可以不同。As described above, the first protective layer 20a is adhered to substantially the entire surface of the wiring layer 28a composed of the first wiring portion 16a with the first adhesive layer 18a so as to cover the thin metal wires 14 of the first wiring portion 16a. In addition, the second protective layer 20b is adhered to substantially the entire surface of the wiring layer 28b composed of the second wiring portion 16b with the second adhesive layer 18b so as to cover the thin metal wires 14 of the second wiring portion 16b.
In the above example, the first protective layer 20a is adhered to the wiring layer 28a by the first adhesive layer 18a, and the second protective layer 20b is adhered to substantially the entire surface of the wiring layer 28b by the second adhesive layer 18b. However, the present invention The protective layer is not limited to this, as long as the protective layer can be protected by the thin metal wires covering the wiring portion of the wiring layer, it is not necessary to adhere the two, and there may be no adhesive layer. In the present invention, the first protective layer 20a and / or the second protective layer 20b may not be provided.
Here, examples of the material of the adhesive layer 18 (the first adhesive layer 18a and the second adhesive layer 18b) include a wet laminate adhesive and a dry laminate adhesive. Or a hot melt adhesive, but the material of the first adhesive layer 18a and the material of the second adhesive layer 18b may be the same or different.
The protective layer 20 (the first protective layer 20a and the second protective layer 20b) is made of a highly transparent material including resin, glass, and silicon in the same manner as the transparent substrate 12. The material of the second protective layer 20b may be the same or different.
第1保護層20a的折射率n1及第2保護層20b的折射率n2均係與透明基體12的折射率n0相等或接近其的值為較佳。在該情況下，相對於第1保護層20a之透明基體12的相對折射率nr1及相對於第2保護層20b之透明基體12的相對折射率nr2均成為接近1的值。
在此，本說明書中之折射率係指在波長589.3nm（鈉的D線）的光中之折射率，例如在樹脂中以作為國際標準規格之ISO 14782：1999（對應於JIS K 7105）來定義。又，透明基體12相對於第1保護層20a之相對折射率nr1以nr1=（n1/n0）來定義，透明基體12相對於第2保護層20b之相對折射率nr2以nr2=（n2/n0）來定義。
在此，相對折射率nr1及相對折射率nr2只要在0.86以上且1.15以下的範圍即可，更佳為0.91以上且1.08以下。
另外，藉由將相對折射率nr1及相對折射率nr2的範圍限定在該範圍來控制透明基體12與保護層20（20a、20b）的構件之間的光的透射率，能夠進一步提高並改善疊紋的可見性。The refractive index n1 of the first protective layer 20a and the refractive index n2 of the second protective layer 20b are both preferably equal to or close to the refractive index n0 of the transparent substrate 12. In this case, the relative refractive index nr1 of the transparent substrate 12 with respect to the first protective layer 20a and the relative refractive index nr2 of the transparent substrate 12 with respect to the second protective layer 20b both have values close to 1.
Here, the refractive index in this specification refers to the refractive index in light having a wavelength of 589.3 nm (the D line of sodium). For example, in a resin, ISO 14782: 1999 (corresponding to JIS K 7105) is used. definition. The relative refractive index nr1 of the transparent substrate 12 with respect to the first protective layer 20a is defined by nr1 = (n1 / n0), and the relative refractive index nr2 of the transparent substrate 12 with respect to the second protective layer 20b is nr2 = (n2 / n0 ) To define.
Here, the relative refractive index nr1 and the relative refractive index nr2 may be in a range of 0.86 to 1.15, and more preferably 0.91 to 1.08.
In addition, by limiting the ranges of the relative refractive index nr1 and the relative refractive index nr2 to this range, controlling the light transmittance between the transparent substrate 12 and the members of the protective layer 20 (20a, 20b) can further improve and improve the stacking. Visibility of lines.
在圖1所示之實施形態的導電性薄膜10中，透明基體12的上側及下側這兩側的配線部16（16a及16b）均成為具備複數個金屬細線14之電極部，但本發明並不限定於此，亦可以將第1配線部16a及第2配線部16b中的至少一個由電極部和非電極部（虛設電極部）構成。
圖7係表示本發明的第2實施形態之導電性薄膜的一例之示意性局部剖面圖。另外，圖7所示之本發明的第2實施形態的導電性薄膜的配線圖案的平面圖與圖2、圖5或圖12所示之配線圖案的平面圖相同，因此在此省略。In the conductive film 10 according to the embodiment shown in FIG. 1, the wiring portions 16 (16 a and 16 b) on both the upper and lower sides of the transparent substrate 12 are electrode portions provided with a plurality of thin metal wires 14. It is not limited to this, and at least one of the first wiring portion 16 a and the second wiring portion 16 b may be composed of an electrode portion and a non-electrode portion (dummy electrode portion).
Fig. 7 is a schematic partial cross-sectional view showing an example of a conductive film according to a second embodiment of the present invention. The plan view of the wiring pattern of the conductive film according to the second embodiment of the present invention shown in FIG. 7 is the same as the plan view of the wiring pattern shown in FIG. 2, FIG. 5, or FIG. 12, and is omitted here.
如圖7所示，本發明的第2實施形態的導電性薄膜11具有：由形成於透明基體12的一個（圖7的上側）面之第1電極部17a及虛設電極部26構成之第1配線部16a；由形成於透明基體12的另一個（圖7的下側）面之第2電極部17b構成之第2配線部16b；經由第1黏接層18a黏接於由第1電極部17a及虛設電極部26構成之第1配線部16a的大致整個面之第1保護層20a；及經由第2黏接層18b黏接於由第2電極部17b構成之第2配線部16b的大致整個面之第2保護層20b。As shown in FIG. 7, the conductive thin film 11 according to the second embodiment of the present invention includes a first electrode portion 17 a and a dummy electrode portion 26 formed on one (upper side of FIG. 7) surface of the transparent substrate 12. Wiring portion 16a; second wiring portion 16b composed of second electrode portion 17b formed on the other (lower side of FIG. 7) surface of transparent substrate 12; and bonded to first electrode portion via first adhesive layer 18a The first protective layer 20a on substantially the entire surface of the first wiring portion 16a constituted by 17a and the dummy electrode portion 26; and approximately the second wiring portion 16b constituted by the second electrode portion 17b through the second adhesive layer 18b. The entire second protective layer 20b.
在導電性薄膜11中，第1電極部17a及虛設電極部26分別由複數個金屬細線14構成，並且作為配線層28a而形成於透明基體12的一個（圖7的上側）面，第2電極部17b由複數個金屬細線14構成，且作為配線層28b而形成於透明基體12的另一個（圖7下側）面。在此，與第1電極部17a同樣地，虛設電極部26形成於透明基體12的一個（圖7的上側）面，如圖示例那樣，由與在形成於另一個（圖7的下側）面之第2電極部17b的複數個金屬細線14相對應之位置上同樣地排列之複數個金屬細線14構成。In the conductive thin film 11, the first electrode portion 17 a and the dummy electrode portion 26 are each composed of a plurality of thin metal wires 14 and are formed on one (upper side of FIG. 7) surface of the transparent substrate 12 as a wiring layer 28 a. The second electrode The portion 17 b is composed of a plurality of thin metal wires 14 and is formed on the other (lower side in FIG. 7) surface of the transparent substrate 12 as a wiring layer 28 b. Here, like the first electrode portion 17a, the dummy electrode portion 26 is formed on one (upper side of FIG. 7) surface of the transparent substrate 12, and is formed on the other (lower side of FIG. 7) as shown in the example. ) Surface is constituted by a plurality of metal thin wires 14 which are similarly arranged at positions corresponding to the plurality of metal thin wires 14 of the second electrode portion 17b.
虛設電極部26與第1電極部17a分開既定間隔而配置，並處於與第1電極部17a電絕緣之狀態下。
在本實施形態的導電性薄膜11中，在透明基體12的一個（圖7的上側）面上亦形成有由與形成於透明基體12的另一個（圖7的下側）面之第2電極部17b的複數個金屬細線14相對應之複數個金屬細線14構成之虛設電極部26，因此能夠控制透明基體12的一個（圖7的上側）面上的由金屬細線所引起之散射，從而能夠改善電極可見性。The dummy electrode portion 26 is arranged at a predetermined interval from the first electrode portion 17a, and is in a state of being electrically insulated from the first electrode portion 17a.
In the conductive thin film 11 of this embodiment, a second electrode formed on one surface (upper side in FIG. 7) of the transparent substrate 12 and another surface (lower side in FIG. 7) formed on the transparent substrate 12 is also formed. The dummy electrode portion 26 constituted by the plurality of thin metal wires 14 corresponding to the plurality of thin metal wires 14 in the portion 17b can control the scattering caused by the thin metal wires on one (upper side of FIG. 7) of the transparent substrate 12, thereby enabling Improve electrode visibility.
在此，配線層28a的第1電極部17a及虛設電極部26具有金屬細線14和由開口部22形成之網格狀的配線圖案24a。又，與第1電極部17a同樣地，配線層28b的第2電極部17b具有金屬細線14和由開口部22形成之網格狀的配線圖案24b。如上所述，透明基體12由絕緣性材料構成，第2電極部17b處於與第1電極部17a及虛設電極部26電絕緣之狀態下。
另外，第1電極部17a、第2電極部17b及虛設電極部26分別能夠由與圖1所示之導電性薄膜10的配線部16相同之材料相同地形成。Here, the first electrode portion 17 a and the dummy electrode portion 26 of the wiring layer 28 a include thin metal wires 14 and a grid-shaped wiring pattern 24 a formed by the opening portion 22. In addition, like the first electrode portion 17 a, the second electrode portion 17 b of the wiring layer 28 b includes thin metal wires 14 and a grid-shaped wiring pattern 24 b formed by the opening portion 22. As described above, the transparent substrate 12 is made of an insulating material, and the second electrode portion 17b is in a state of being electrically insulated from the first electrode portion 17a and the dummy electrode portion 26.
The first electrode portion 17a, the second electrode portion 17b, and the dummy electrode portion 26 can be formed of the same material as the wiring portion 16 of the conductive film 10 shown in FIG. 1.
另外，第1保護層20a以被覆第1配線部16a的第1電極部17a及虛設電極部26各自的金屬細線14之方式利用第1黏接層18a黏接於由第1電極部17a及虛設電極部26構成之配線層28a的大致整個面。
又，第2保護層20b以被覆第2配線部16b的第2電極部17b的金屬細線14之方式利用第2黏接層18b黏接於由第2電極部17b構成之配線層28b的大致整個面。
另外，圖7所示之導電性薄膜11的第1黏接層18a及第2黏接層18b以及第1保護層20a及第2保護層20b與圖1所示之導電性薄膜10相同，因此省略其說明。如上所述，亦可以沒有第1保護層20a、第2保護層20b、第1黏接層18a及第2黏接層18b。In addition, the first protective layer 20a is adhered to the first electrode portion 17a and the dummy with the first adhesive layer 18a so as to cover the metal thin wires 14 of the first electrode portion 17a and the dummy electrode portion 26 of the first wiring portion 16a. The wiring layer 28 a formed by the electrode portion 26 is substantially the entire surface.
In addition, the second protective layer 20b is adhered to substantially the entire wiring layer 28b composed of the second electrode portion 17b by the second adhesive layer 18b so as to cover the thin metal wires 14 of the second electrode portion 17b of the second wiring portion 16b. surface.
The first adhesive layer 18a and the second adhesive layer 18b, the first protective layer 20a, and the second protective layer 20b of the conductive film 11 shown in FIG. 7 are the same as the conductive film 10 shown in FIG. The description is omitted. As described above, the first protective layer 20a, the second protective layer 20b, the first adhesive layer 18a, and the second adhesive layer 18b may not be provided.
另外，在本實施形態的導電性薄膜11中，具備第2電極部17b之第2配線部16b不具有虛設電極部，但本發明並不限定於此，亦可以在第2配線部16b中與第1配線部16a的第1電極部17a相對應之位置上配置與第1電極部17a分開既定間隔而處於與第2電極部17b電絕緣之狀態下之由金屬細線14構成之虛設電極部。
在本實施形態的導電性薄膜11中，亦能夠藉由在上述第1配線部16a設置虛設電極部，又，在第2配線部16b設置該種虛設電極部，而使第1配線部16a的第1電極部17a與第2配線部16b的第2電極部17b的各網格配線對應配置，因此能夠控制透明基體12的一個（例如，圖7的上側或下側）面上的由金屬細線所引起之散射，從而能夠改善電極可見性。另外，在此所說之虛設電極部相當於WO2013/094729中所記載之非導電圖案。In addition, in the conductive thin film 11 of this embodiment, the second wiring portion 16b provided with the second electrode portion 17b does not have a dummy electrode portion, but the present invention is not limited to this, and the second wiring portion 16b may be connected to A dummy electrode portion composed of a thin metal wire 14 is disposed at a position corresponding to the first electrode portion 17a of the first wiring portion 16a and is separated from the first electrode portion 17a by a predetermined interval and is electrically insulated from the second electrode portion 17b.
In the conductive thin film 11 of this embodiment, a dummy electrode portion may be provided in the first wiring portion 16a and a dummy electrode portion may be provided in the second wiring portion 16b. Since the first electrode portion 17a is arranged corresponding to each grid wiring of the second electrode portion 17b of the second wiring portion 16b, it is possible to control a thin metal wire on one (for example, upper or lower side of FIG. 7) surface of the transparent substrate 12. The resulting scattering can improve electrode visibility. The dummy electrode portion referred to herein corresponds to a non-conductive pattern described in WO2013 / 094729.
在圖1所示之第1實施形態的導電性薄膜10及圖7所示之第2實施形態的導電性薄膜11中，在透明基體12的上側及下側這兩側分別形成有配線部16（16a及16b），但本發明並不限定於此，亦可以如圖8A所示之本發明的第3實施形態的導電性薄膜11A那樣，設為將如下導電性薄膜要素重疊2個之結構，該導電性薄膜要素係在透明基體12的一個面（圖8A中上側的面）形成有由複數個金屬細線14構成之配線部16，並在配線部16的大致整個面以被覆金屬細線14之方式經由黏接層18黏接有保護層20。
圖8A所示之本發明的第3實施形態的導電性薄膜11A具有：圖8A中下側的透明基體12b；形成於該透明基體12b的上側面之由複數個金屬細線14所形成之第2配線部16b；經由第2黏接層18b黏接於第2配線部16b上之第2保護層20b；例如利用黏接劑等黏接並配置於第2保護層20b上之上側的透明基體12a；形成於該透明基體12a的上側面之由複數個金屬細線14構成之第1配線部16a；及經由第1黏接層18a黏接於第1配線部16a上之第1保護層20a。
在此，第1配線部16a和/或第2配線部16b的金屬細線14的至少一個的全部或一部分係包含圖2所示之非等間距的配線圖案之配線圖案。或者，由第1配線部16a的配線圖案與第2配線部16b的配線圖案的重合而形成之合成配線圖案係包含圖2所示之非等間距的配線圖案之配線圖案。In the conductive film 10 of the first embodiment shown in FIG. 1 and the conductive film 11 of the second embodiment shown in FIG. 7, wiring portions 16 are formed on both sides of the upper and lower sides of the transparent substrate 12. (16a and 16b), but the present invention is not limited to this. As shown in FIG. 8A, the conductive film 11A according to the third embodiment of the present invention may have a structure in which two conductive film elements are overlapped as follows The conductive thin film element is formed on one surface (the upper surface in FIG. 8A) of the transparent substrate 12 with a wiring portion 16 composed of a plurality of thin metal wires 14, and a thin metal wire 14 is coated on substantially the entire surface of the wiring portion 16. In this way, a protective layer 20 is adhered via an adhesive layer 18.
The conductive film 11A according to the third embodiment of the present invention shown in FIG. 8A includes: a transparent substrate 12b on the lower side in FIG. 8A; and a second substrate formed of a plurality of thin metal wires 14 formed on the upper side of the transparent substrate 12b. The wiring portion 16b; the second protective layer 20b adhered to the second wiring portion 16b via the second adhesive layer 18b; for example, a transparent substrate 12a that is adhered and disposed on the upper side of the second protective layer 20b with an adhesive or the like A first wiring portion 16a made of a plurality of thin metal wires 14 formed on the upper side of the transparent substrate 12a; and a first protective layer 20a adhered to the first wiring portion 16a via a first adhesive layer 18a.
Here, all or a part of at least one of the thin metal wires 14 of the first wiring portion 16a and / or the second wiring portion 16b is a wiring pattern including a non-equid pitch wiring pattern shown in FIG. 2. Alternatively, the composite wiring pattern formed by the overlap of the wiring pattern of the first wiring portion 16a and the wiring pattern of the second wiring portion 16b is a wiring pattern including a non-equidistant wiring pattern shown in FIG. 2.
在圖1第1實施形態的導電性薄膜10及圖7所示之第2實施形態的導電性薄膜11中，在透明基體12的上側及下側這兩側分別形成有配線部16（16a及16b），但本發明並不限定於此，亦可以如圖8B所示之本發明的第4實施形態的導電性薄膜11B那樣設為僅具有1個如下導電性薄膜要素之結構，該導電性薄膜要素係在透明基體12的一個面（圖8B中上側的面）形成有由複數個金屬細線14構成之配線部16，並在配線部16的大致整個面以被覆金屬細線14之方式經由黏接層18黏接有保護層20。
圖8B所示之本發明的第4實施形態的導電性薄膜11B具有：透明基體12；形成於該透明基體12的上側面之由複數個金屬細線14構成之第1配線部16a；經由第1黏接層18a黏接於第1配線部16a上之第1保護層20a；及經由第2黏接層18b黏接於透明基體12的下側的大致整個面之第2保護層20b。此時，亦可以沒有透明基體12的下側的面的黏接層18及保護層20。
在此，配線部16a的金屬細線14的全部或一部分係包含圖2所示之非等間距的配線圖案之配線圖案。In the conductive film 10 of the first embodiment in FIG. 1 and the conductive film 11 of the second embodiment shown in FIG. 7, wiring portions 16 (16a and 16a) are formed on both sides of the upper and lower sides of the transparent substrate 12. 16b), but the present invention is not limited to this, and may have a structure having only one conductive thin film element as shown in the conductive thin film 11B of the fourth embodiment of the present invention as shown in FIG. 8B. The thin film element is formed on one surface (the upper surface in FIG. 8B) of the transparent substrate 12 with a wiring portion 16 composed of a plurality of thin metal wires 14, and the entire entire surface of the wiring portion 16 is covered with the thin metal wires 14 by bonding. The connection layer 18 is adhered with a protective layer 20.
The conductive film 11B according to the fourth embodiment of the present invention shown in FIG. 8B includes: a transparent substrate 12; a first wiring portion 16a composed of a plurality of thin metal wires 14 formed on the upper side of the transparent substrate 12; The adhesive layer 18a is adhered to the first protective layer 20a on the first wiring portion 16a; and the second protective layer 20b is adhered to the substantially entire surface of the lower side of the transparent substrate 12 via the second adhesive layer 18b. At this time, the adhesive layer 18 and the protective layer 20 on the lower surface of the transparent substrate 12 may not be required.
Here, all or a part of the thin metal wires 14 of the wiring portion 16 a are wiring patterns including wiring patterns of non-equid pitches as shown in FIG. 2.
上述本發明的第1實施形態的導電性薄膜10、第2實施形態的導電性薄膜11、第3實施形態的導電性薄膜11A及第4實施形態的導電性薄膜11B例如適用於圖9中示意性地表示之顯示單元30（顯示器）的觸控面板（44：參閱圖10），係在導電性薄膜的上側或下側的配線部的全部或一部分金屬細線的配線圖案和/或由兩個配線部的配線圖案的重合而形成之合成配線圖案中包含相對於顯示器的像素排列（BM）圖案在疊紋可見性的觀點上被最優化之配線圖案者。
另外，關於本發明中必須之配線圖案相對於顯示器的像素排列圖案之疊紋可見性的最優化，將在後面進行敘述。
本發明的導電性薄膜基本上如上構成。The conductive film 10 according to the first embodiment of the present invention, the conductive film 11 according to the second embodiment, the conductive film 11A according to the third embodiment, and the conductive film 11B according to the fourth embodiment are, for example, schematically illustrated in FIG. 9. The touch panel (44: see FIG. 10) of the display unit 30 (display), which is shown schematically, is a wiring pattern of all or a part of the thin metal wires on the upper or lower wiring portion of the conductive film and / or two The composite wiring pattern formed by the overlapping of the wiring patterns in the wiring section includes a wiring pattern optimized for the visibility of the moire with respect to the pixel arrangement (BM) pattern of the display.
In addition, the optimization of the visibility of the overlapping pattern of the wiring pattern necessary for the pixel arrangement pattern of the display in the present invention will be described later.
The conductive film of the present invention is basically constituted as described above.
圖9係示意性地表示適用本發明的導電性薄膜之顯示單元的一部分像素排列圖案的一例之概略說明圖。
如圖9中示出其一部分那樣，在顯示單元30中，複數個像素32排列成矩陣狀而構成有既定的像素排列圖案。1個像素32係3個子像素（紅色子像素32r、綠色子像素32g及藍色子像素32b）在水平方向上排列而構成。1個子像素呈沿垂直方向縱長之長方形狀。像素32的水平方向的排列間距（水平像素間距Ph）與像素32的垂直方向的排列間距（垂直像素間距Pv）大致相同。亦即，由1個像素32和包圍該1個像素32之黑矩陣（BM）34（圖案材）構成之形狀（參閱以陰影線表示之區域36）呈正方形。又，在圖9的例子中，1個像素32的縱橫比（aspect ratio）並非1，而成為水平方向（橫）的長度＞垂直方向（縱）的長度。FIG. 9 is a schematic explanatory diagram schematically showing an example of a pixel arrangement pattern of a part of a display unit to which the conductive film of the present invention is applied.
As shown in a part of FIG. 9, in the display unit 30, a plurality of pixels 32 are arranged in a matrix to form a predetermined pixel arrangement pattern. One pixel 32 is formed by arranging three sub-pixels (red sub-pixel 32r, green sub-pixel 32g, and blue sub-pixel 32b) in the horizontal direction. One sub-pixel has a rectangular shape that is vertically long in the vertical direction. The horizontal arrangement pitch (horizontal pixel pitch Ph) of the pixels 32 is substantially the same as the vertical arrangement pitch (vertical pixel pitch Pv) of the pixels 32. That is, the shape (refer to the area | region 36 shown by the hatched line) which consists of one pixel 32 and the black matrix (BM) 34 (pattern material) which surrounds this one pixel 32 is a square. In the example of FIG. 9, the aspect ratio of one pixel 32 is not 1, but the length in the horizontal direction (horizontal)> the length in the vertical direction (vertical).
由圖9明確可知，由複數個像素32各自的子像素32r、32g及32b構成之像素排列圖案以分別包圍該等子像素32r、32g及32b之BM34的BM圖案38來規定。將顯示單元30和導電性薄膜10、11、11A或11B重疊時所產生之疊紋係因以顯示單元30的BM34的BM圖案38規定之子像素32r、32g及32b各自的像素排列圖案與導電性薄膜10、11、11A或11B的配線圖案24的干涉而產生。As is clear from FIG. 9, the pixel arrangement pattern composed of the sub-pixels 32r, 32g, and 32b of the plurality of pixels 32 is defined by the BM pattern 38 of the BM 34 surrounding the sub-pixels 32r, 32g, and 32b, respectively. The moire generated when the display unit 30 and the conductive film 10, 11, 11A, or 11B are overlapped are due to the pixel arrangement patterns and conductivity of the sub-pixels 32r, 32g, and 32b defined by the BM pattern 38 of the BM34 of the display unit 30, respectively. The interference of the wiring pattern 24 of the thin film 10, 11, 11A, or 11B occurs.
當在具有上述子像素32r、32g及32b各自的像素排列圖案之顯示單元30的顯示面板上例如配置導電性薄膜10、11、11A或11B時，就導電性薄膜10、11、11A或11B的配線圖案24（配線圖案24a與24b的合成配線圖案）而言，配線圖案24a和24b中的至少一個和/或合成配線圖案24包含非等間距的配線圖案，並且相對於子像素32r、32g及32b各自的像素排列圖案在疊紋可見性的觀點上被最優化，因此不存在子像素32r、32g及32b各自的像素排列圖案與導電性薄膜10、11、11A或11B的金屬細線14的配線圖案之間的空間頻率的干涉，可抑制疊紋的產生，成為疊紋的可見性優異者。以下，以導電性薄膜10為代表例進行說明，但在導電性薄膜11、11A或11B中亦相同。
另外，圖9所示之顯示單元30可以由液晶面板、電漿面板、有機EL面板、無機EL面板等顯示面板構成，其發光強度可以根據解析度而不同。When the conductive film 10, 11, 11A, or 11B is arranged on the display panel of the display unit 30 having the pixel arrangement patterns of the sub-pixels 32r, 32g, and 32b, for example, the conductive film 10, 11, 11A, or 11B As for the wiring pattern 24 (composite wiring patterns of the wiring patterns 24a and 24b), at least one of the wiring patterns 24a and 24b and / or the synthetic wiring pattern 24 includes a non-equidistant wiring pattern, and is The respective pixel arrangement patterns of 32b are optimized from the standpoint of visibility of the moire. Therefore, there is no wiring of the pixel arrangement patterns of the sub-pixels 32r, 32g, and 32b and the thin metal wires 14 of the conductive film 10, 11, 11A, or 11B The interference of the spatial frequency between the patterns can suppress the occurrence of moire and become the one with excellent visibility of moire. Hereinafter, the conductive film 10 will be described as a representative example, but the same applies to the conductive film 11, 11A, or 11B.
In addition, the display unit 30 shown in FIG. 9 may be composed of a display panel such as a liquid crystal panel, a plasma panel, an organic EL panel, or an inorganic EL panel, and its light emission intensity may vary according to the resolution.
能夠適用於本發明之顯示器的像素排列圖案及其發光強度並不特別限制，可以為以往公知的任何顯示器的像素排列圖案及其發光強度，可以為OELD等RGB的各顏色的週期和/或強度不同者，亦可以為如圖9所示之由同一形狀的RGB子像素構成且子像素內的強度偏差大者、或子像素內的強度偏差小且僅考慮強度最高的G子像素（通道）即可者，尤其可以為如智慧手機或平板終端等強度高的顯示器等。作為OELD的像素圖案，例如有日本特開2018-198198號公報中所揭示之PenTile排列。作為組裝有本發明的導電性薄膜之顯示裝置的顯示器，可以為PenTile排列的OELD。The pixel arrangement pattern and its luminous intensity applicable to the display of the present invention are not particularly limited, and may be the pixel arrangement pattern and its luminous intensity of any conventionally known display, and may be the period and / or intensity of each color of RGB such as OELD The difference may also be a RGB sub-pixel of the same shape as shown in FIG. 9, and the intensity deviation within the sub-pixel is large, or the intensity deviation within the sub-pixel is small and only the highest intensity G sub-pixel (channel) is considered. That is, it may be a high-strength display such as a smart phone or a tablet terminal. As a pixel pattern of the OELD, there is, for example, a PenTile arrangement disclosed in Japanese Patent Application Laid-Open No. 2018-198198. The display of the display device incorporating the conductive film of the present invention may be an OELD arranged in a PenTile array.
接著，參閱圖10對組裝有本發明的導電性薄膜之顯示裝置進行說明。在圖10中，作為顯示裝置40，舉出組裝有本發明的第1實施形態之導電性薄膜10之投影型靜電電容方式的觸控面板為代表例進行說明，當然本發明並不限定於此。
如圖10所示，顯示裝置40具有：能夠顯示彩色圖像和/或單色圖像之顯示單元30（參閱圖9）；檢測從輸入面42（箭頭Z1方向側）之接觸位置之觸控面板44；及收容顯示單元30及觸控面板44之框體46。經由設置於框體46的一面（箭頭Z1方向側）之大的開口部，使用者能夠接觸觸控面板44。Next, a display device incorporating the conductive film of the present invention will be described with reference to FIG. 10. In FIG. 10, as the display device 40, a typical example of a projection type capacitive touch panel incorporating the conductive film 10 according to the first embodiment of the present invention will be described as a representative example, but the present invention is not limited thereto .
As shown in FIG. 10, the display device 40 includes a display unit 30 (see FIG. 9) capable of displaying a color image and / or a monochrome image; Panel 44; and a frame 46 housing the display unit 30 and the touch panel 44. The user can touch the touch panel 44 through a large opening provided on one surface (the direction of the arrow Z1 direction) of the housing 46.
觸控面板44除了上述導電性薄膜10（參閱圖1及圖2）以外，還具備積層於導電性薄膜10的一面（箭頭Z1方向側）之覆蓋構件48、經由電纜50與導電性薄膜10電連接之可撓性基板52及配置於可撓性基板52上之檢測控制部54。
在顯示單元30的一面（箭頭Z1方向側）經由黏接層56黏接有導電性薄膜10。導電性薄膜10以使另一個主面側（第2配線部16b側）與顯示單元30對向之方式配置於顯示畫面上。In addition to the conductive film 10 (see FIGS. 1 and 2), the touch panel 44 further includes a cover member 48 laminated on one surface (the direction of the arrow Z1 direction) of the conductive film 10, and electrically communicates with the conductive film 10 through a cable 50. The connected flexible substrate 52 and a detection control unit 54 disposed on the flexible substrate 52.
The conductive film 10 is adhered to one surface (arrow Z1 direction side) of the display unit 30 via an adhesive layer 56. The conductive film 10 is arranged on the display screen so that the other main surface side (the second wiring portion 16 b side) faces the display unit 30.
覆蓋構件48藉由被覆導電性薄膜10的一面而發揮作為輸入面42之功能。又，藉由防止接觸體58（例如，手指或觸控筆）的直接接觸，能夠抑制擦傷的產生和/或塵埃的附著等，能夠使導電性薄膜10的導電性穩定。
覆蓋構件48的材質例如可以為玻璃、強化玻璃或樹脂薄膜。可以使覆蓋構件48的一面（箭頭Z2個方向側）以用氧化矽等塗佈之狀態與導電性薄膜10的一面（箭頭Z1方向側）密接。又，為了防止由摩擦等所引起之損傷，可以將導電性薄膜10及覆蓋構件48貼合而構成。The cover member 48 functions as an input surface 42 by covering one surface of the conductive film 10. In addition, by preventing direct contact of the contact body 58 (for example, a finger or a stylus pen), it is possible to suppress the occurrence of scratches and / or the adhesion of dust, and to stabilize the conductivity of the conductive film 10.
The material of the cover member 48 may be glass, tempered glass, or a resin film, for example. One surface (direction side of arrow Z2) of the cover member 48 may be closely adhered to one side (direction side of arrow Z1) of the conductive film 10 in a state of being coated with silicon oxide or the like. In addition, in order to prevent damage caused by friction or the like, the conductive film 10 and the cover member 48 may be bonded together and configured.
可撓性基板52係具備可撓性之電子基板。在本圖示例中，固定於框體46的側面內壁，但配設位置可以進行各種變更。檢測控制部54構成電子電路，該電路電路在使作為導體之接觸體58與輸入面42接觸（或接近）時，掌握接觸體58與導電性薄膜10之間的靜電電容的變化來檢測該接觸位置（或靠近位置）。
適用本發明的導電性薄膜之顯示裝置基本上如上構成。The flexible substrate 52 is an electronic substrate having flexibility. In the example shown in the figure, it is fixed to the side inner wall of the frame body 46, but the arrangement position can be variously changed. The detection control unit 54 constitutes an electronic circuit that detects a change in electrostatic capacitance between the contact body 58 and the conductive film 10 when the contact body 58 as a conductor is brought into contact with (or approaches) the input surface 42. Location (or near location).
The display device to which the conductive film of the present invention is applied is basically configured as described above.
接著，本發明中，對如下進行說明：在將2個方向以上的直線配線重疊而成之配線圖案中，在至少1個方向上根據像素排列圖案的頻率資訊將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距，藉此成為在該方向上疊紋比等間距的配線圖案少的配線圖案。另外，以下以被重疊之2個方向以上的線配線全部為直線配線的配線圖案為代表例進行說明，但如上所述，若被重疊之2個方向以上的線配線中至少1個方向的線配線為直線配線，則藉由在該直線配線中本發明的“將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距”，在該直線配線中當然會成為疊紋比等間距的配線圖案少的配線圖案。
首先，對將像素排列圖案和配線圖案重疊時產生疊紋之原理進行說明，接著，基於該原理，對藉由本發明的“將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距”而與等間距相比能夠減少疊紋之原因進行說明。Next, in the present invention, a description will be given of a repeating pitch of a predetermined number of wirings based on the frequency information of the pixel arrangement pattern in at least one direction in a wiring pattern formed by overlapping linear wirings in two or more directions. It is set as an equal pitch, and the pitch of each wiring of a predetermined number is set as a non-equidistant pitch, thereby becoming a wiring pattern with less moire in this direction than a uniform pitched wiring pattern. In the following description, a wiring pattern in which all of the line wirings in two or more directions that are overlapped are linear wirings will be described as a representative example. The wiring is a straight wiring. According to the present invention, "the repetitive pitch of a predetermined number of wirings is set to an equal pitch, and the pitch of each wiring of a predetermined number is set to a non-equidistant pitch." Of course, in a linear wiring, there are wiring patterns with less moire than wiring patterns with an equal pitch.
First, the principle of generating moire when a pixel arrangement pattern and a wiring pattern are overlapped will be explained. Then, based on this principle, the "repeated pitch of a predetermined number of wirings is set to an equal pitch and the predetermined root is set at the same time. The reason why the pitch of each wiring is set to be non-equidistant "will be explained because the moire can be reduced compared to the equal pitch.
（將像素排列圖案和配線圖案重疊時產生疊紋之原理）
為了進行容易理解之說明，一維地進行考慮。
首先，將像素排列的發光亮度圖案設為bm（x）。其中，bm（x）表示位置x上之亮度。若對bm（x）進行傅立葉級數展開，則能夠如下述式（3）那樣表示。其中，記號“*”表示乘法運算。又，bm（x）設為週期2*Lb的週期函數，ω1、ω2、ω3、......分別為π/Lb、2*π/Lb、3*π/Lb、......。
bm（x）=A0+（a1*cos（ω1*x）+b1*sin（ω1*x）+a2*cos（ω2*x）+b2*sin（ω2*x）.......） ......（3）
根據歐拉公式，cos（ωn*x）及sin（ωn*x）分別能夠如下那樣以複數表示。其中，i表示虛數單位。
cos（ωn*x）=（exp（i*ωn*x）+exp（-i*ωn*x））/2
sin（ωn*x）=（exp（i*ωn*x）-exp（-i*ωn*x））/（2*i）
因此，上述式（3）成為如下述式（4）那樣。
bm（x）=A0+（（（a1-i*b1）/2）*exp（i*ω1*x）+（（a1+i*b1）/2）*exp（-i*ω1*x）） ......（4）
如此，上述式（4）能夠以複數如下述式（5）那樣表示。
bm（x）=A0+Σ（An*exp（i*ωn*x）+Bn*exp（-i*ωn*x）） ...…（5）
其中，An及Bn如下那樣均以複數成為共軛關係。
An=（an-i*bn）/2
Bn=（an+i*bn）/2(Principle of overlapping when pixel arrangement pattern and wiring pattern overlap)
For easy-to-understand explanations, consider one-dimensionally.
First, let the pixel array light emission brightness pattern be bm (x). Among them, bm (x) represents the brightness at the position x. When Fourier series expansion is performed on bm (x), it can be expressed as the following formula (3). The symbol "*" indicates a multiplication operation. In addition, bm (x) is a periodic function of the period 2 * Lb, ω1, ω2, ω3, ... are π / Lb, 2 * π / Lb, 3 * π / Lb, .... ..
bm (x) = A0 + (a1 * cos (ω1 * x) + b1 * sin (ω1 * x) + a2 * cos (ω2 * x) + b2 * sin (ω2 * x) .......) ... (3)
According to Euler's formula, cos (ωn * x) and sin (ωn * x) can be expressed as complex numbers, respectively, as follows. Among them, i represents an imaginary unit.
cos (ωn * x) = (exp (i * ωn * x) + exp (-i * ωn * x)) / 2
sin (ωn * x) = (exp (i * ωn * x) -exp (-i * ωn * x)) / (2 * i)
Therefore, the above formula (3) is as shown in the following formula (4).
bm (x) = A0 + (((a1-i * b1) / 2) * exp (i * ω1 * x) + ((a1 + i * b1) / 2) * exp (-i * ω1 * x)) ... (4)
In this way, the above-mentioned formula (4) can be expressed in a plural number as shown in the following formula (5).
bm (x) = A0 + Σ (An * exp (i * ωn * x) + Bn * exp (-i * ωn * x)) ... (5)
Among them, An and Bn each have a complex conjugate relationship as follows.
An = （an-i * bn） / 2
Bn = （an + i * bn） / 2
同樣地，若將配線的透射率圖案設為mesh（x）而以複數的傅立葉級數表示mesh（x），則能夠如下述式（6）那樣表示。
mesh（x）=C0+Σ（Cm*exp（i*βm*x）+Dm*exp（-i*βm*x）） ……（6）
其中，mesh（x）設為週期2*Lm的週期函數，βm表示m*π/Lm。又，Cm及Dm如下那樣均以複數成為共軛關係。
Cm=（cm-i*dm）/2
Dm=（cm+i*dm）/2Similarly, if the transmittance pattern of the wiring is mesh (x) and the mesh (x) is represented by a complex Fourier series, it can be expressed as the following formula (6).
mesh (x) = C0 + Σ (Cm * exp (i * βm * x) + Dm * exp (-i * βm * x)) …… (6)
Among them, mesh (x) is a periodic function with a period of 2 * Lm, and βm represents m * π / Lm. In addition, both Cm and Dm have a conjugate relationship with a complex number as follows.
Cm = （cm-i * dm） / 2
Dm = （cm + i * dm） / 2
將像素排列圖案和配線圖案重疊而成之圖案成為上述像素排列的發光亮度圖案（5）和配線的透射率圖案（6）的乘法運算，因此可如下表示。
bm（x）*mesh（x）=A0*C0
+C0*（Σ（An*exp（i*ωn*x）+Bn*exp（-i*ωn*x）））
+A0*（Σ（Cm*exp（i*βm*x）+Dm*exp（-i*βm*x）））
+ΣΣ（An*exp（i*ωn*x）+Bn*exp（-i*ωn*x））
*（Cm*exp（i*βm*x）+Dm*exp（-i*βm*x）） ……（7）
上述式（7）中，第1行的A0*C0表示重疊圖案的平均亮度，第2行表示乘以配線圖案的平均透射率C0而得到之像素排列的亮度圖案的各頻率成分，第3行表示乘以像素排列圖案的平均亮度A0而得到之配線圖案的各頻率成分。
利用第4行的式給出重疊圖案的疊紋。關於第4行的式，若對一個n與m的組合進行展開，則能夠以下述式（8）表示。
（An*exp（i*ωn*x）+Bn*exp（-i*ωn*x））*（Cm*exp（i*βm*x）+Dm*exp（-i*βm*x））
=An*Cm*exp（i*（ωn*x+βm*x））+Bn*Dm*exp（-i*（ωn*x+βm*x））
+An*Dm*exp（i*（ωn*x-βm*x））+Bn*Cm*exp（-i*（ωn*x-βm*x）） ……（8）The pattern in which the pixel array pattern and the wiring pattern are superimposed is a multiplication operation of the light emission luminance pattern (5) of the pixel array and the transmittance pattern (6) of the wiring, and can be expressed as follows.
bm (x) * mesh (x) = A0 * C0
+ C0 * (Σ (An * exp (i * ωn * x) + Bn * exp (-i * ωn * x)))
+ A0 * (Σ (Cm * exp (i * βm * x) + Dm * exp (-i * βm * x)))
+ ΣΣ (An * exp (i * ωn * x) + Bn * exp (-i * ωn * x))
* （Cm * exp （i * βm * x） + Dm * exp （-i * βm * x）） …… (7)
In the above formula (7), A0 * C0 in the first line represents the average brightness of the overlapping pattern, the second line represents each frequency component of the brightness pattern of the pixel arrangement obtained by multiplying the average transmittance C0 of the wiring pattern, and the third line Represents each frequency component of the wiring pattern obtained by multiplying the average brightness A0 of the pixel arrangement pattern.
The moire of the overlapping pattern is given by the formula in the fourth line. The expression in the fourth line can be expressed by the following expression (8) if a combination of n and m is developed.
(An * exp (i * ωn * x) + Bn * exp (-i * ωn * x)) * (Cm * exp (i * βm * x) + Dm * exp (-i * βm * x))
= An * Cm * exp (i * (ωn * x + βm * x)) + Bn * Dm * exp (-i * (ωn * x + βm * x))
+ An * Dm * exp (i * (ωn * x-βm * x)) + Bn * Cm * exp (-i * (ωn * x-βm * x)) …… (8)
其中，An與Bn為共軛關係，Cm與Dm亦為共軛關係，基於此，可知上式的An*Cm與Bn*Dm及An*Dm與Bn*Cm為共軛關係。
又，可知上式的An*Cm*exp（i*（ωn*x+βm*x））與Bn*Dm*exp（-i*（ωn*x+βm*x））及An*Dm*exp（i*（ωn*x-βm*x））與Bn*Cm*exp（-i*（ωn*x-βm*x））亦為共軛關係。
在此，An*Cm及Bn*Dm能夠如下表示。
An*Cm=ABS（An*Cm）*exp（i*θ1）
Bn*Dm=ABS（An*Cm）*exp（-i*θ1）
如此一來，上述式（8）的An*Cm*exp（i*（ωn*x+βm*x））+Bn*Dm*exp（-i*（ωn*x+βm*x））成為2*ABS（An*Cm）*cos（ωn*x+βm*x+θ1），能夠僅以實數來表示。其中，ABS（An*Cm）表示複數An*Cm的絕對值。
同樣地，上述式（8）的An*Dm*exp（i*（ωn*x-βm*x））+Bn*Cm*exp（-i*（ωn*x-βm*x））成為2*ABS（An*Dm）*cos（ωn*x-βm*x+θ2），能夠僅以實數來表示。
結果，關於上述式（7）式的第4行的式，若對一個n與m的組合進行展開，則成為下述式（9）。
2*ABS（An*Cm）*cos（ωn*x+βm*x+θ1）+2*ABS（An*Dm）*cos（ωn*x-βm*x+θ2） ......（9）Among them, An and Bn are conjugated, and Cm and Dm are also conjugated. Based on this, it can be known that An * Cm and Bn * Dm and An * Dm and Bn * Cm are conjugated.
In addition, we can see that An * Cm * exp (i * (ωn * x + βm * x)) and Bn * Dm * exp (-i * (ωn * x + βm * x)) and An * Dm * exp (I * (ωn * x-βm * x)) and Bn * Cm * exp (-i * (ωn * x-βm * x)) are also conjugated.
Here, An * Cm and Bn * Dm can be expressed as follows.
An * Cm = ABS (An * Cm) * exp (i * θ1)
Bn * Dm = ABS (An * Cm) * exp (-i * θ1)
In this way, An * Cm * exp (i * (ωn * x + βm * x)) + Bn * Dm * exp (-i * (ωn * x + βm * x)) in the above formula (8) becomes 2 * ABS (An * Cm) * cos (ωn * x + βm * x + θ1) can be expressed only by real numbers. Among them, ABS (An * Cm) represents the absolute value of the complex number An * Cm.
Similarly, An * Dm * exp (i * (ωn * x-βm * x)) + Bn * Cm * exp (-i * (ωn * x-βm * x)) in the above formula (8) becomes 2 * ABS (An * Dm) * cos (ωn * x-βm * x + θ2) can be expressed only by real numbers.
As a result, when the expression of the fourth line of the above expression (7) is expanded by a combination of n and m, it becomes the following expression (9).
2 * ABS (An * Cm) * cos (ωn * x + βm * x + θ1) + 2 * ABS (An * Dm) * cos (ωn * x-βm * x + θ2) ...... ( 9)
由上述式（9）可知，若將像素排列圖案和配線圖案進行重疊（亦即，乘法運算），則在各自的頻率ωn及βm之和的頻率ωn+βm下產生強度2*ABS（An*Cm）=2*ABS（An）*ABS（Cm）的疊紋，在差的頻率ωn-βm下產生強度2*ABS（An*Dm）=2*ABS（An）*ABS（Dm）的疊紋。其中，ABS（Cm）和ABS（Dm）均為配線圖案的頻率βm的強度且成為相同之值。
另外，如在至今為止的說明中可知那樣，ABS（An）、ABS（Bn）、ABS（Cm）、ABS（Dm）分別為複數傅立葉級數下之強度，因此成為實數的傅立葉級數下之強度的1/2（這是因為，在複數傅立葉級數中分離為共軛關係的2個複數）。
又，由上述式（8）可知，在將像素排列圖案和配線圖案重疊（乘法運算）而成之圖案的一維頻率分佈中，將像素排列圖案的一維頻率分佈中之各頻率ωn的成分的係數An及Bn與配線圖案的一維頻率分佈中之各頻率βm的成分的係數Cm及Dm的乘法運算值（複數）作為係數之疊紋成分係在將各個頻率進行加法運算而得到之頻率下產生。其中，將係數Bn的頻率視為-ωn，將係數Dm的頻率視為-βm。該等疊紋中成為問題之疊紋係頻率ωn-βm（及‐（ωn‐βm））的疊紋。這是因為，人的視覺響應特性對低頻圖案具有靈敏度，因此即使像素排列圖案和配線圖案的各自的頻率ωn及βm的圖案不被辨識，由於頻率ωn-βm的疊紋為低頻，因此亦有可能被辨識。It can be known from the above formula (9) that if the pixel arrangement pattern and the wiring pattern are overlapped (that is, multiplication operation), an intensity 2 * ABS (An * is generated at a frequency ωn + βm which is the sum of the respective frequencies ωn and βm. Cm) = 2 * ABS (An) * ABS (Cm) overlapping pattern, which produces intensity 2 * ABS (An * Dm) = 2 * ABS (An) * ABS (Dm) overlapping at poor frequency ωn-βm Pattern. Among them, ABS (Cm) and ABS (Dm) are both the intensity of the frequency βm of the wiring pattern and have the same value.
In addition, as can be seen from the description so far, ABS (An), ABS (Bn), ABS (Cm), and ABS (Dm) are the strengths of the complex Fourier series, so they are the same as those of the real Fourier series. 1/2 of the intensity (this is because the complex numbers are separated into two complex numbers in a conjugate relationship in the complex Fourier series).
Furthermore, as can be seen from the above formula (8), in the one-dimensional frequency distribution of the pattern in which the pixel arrangement pattern and the wiring pattern are overlapped (multiplied), the components of each frequency ωn in the one-dimensional frequency distribution of the pixel arrangement pattern are obtained. The multiplication value (complex number) of the coefficients An and Bn and the coefficients Cm and Dm of the components of each frequency βm in the one-dimensional frequency distribution of the wiring pattern is the frequency obtained by adding the respective frequencies as the overlapping component of the coefficients. Next generation. Here, the frequency of the coefficient Bn is regarded as -ωn, and the frequency of the coefficient Dm is regarded as -βm. Among these moire patterns, moire frequencies ωn-βm (and-(ωn-βm)) are problematic. This is because human visual response characteristics are sensitive to low-frequency patterns. Therefore, even if the patterns of the respective frequencies ωn and βm of the pixel arrangement pattern and the wiring pattern are not recognized, since the moire of the frequency ωn-βm is low-frequency, there are also May be identified.
至今為止，為了容易理解說明，一維地考慮了像素排列的亮度圖案和配線的透射率圖案。兩個圖案實際上為二維，但在二維的情況下，不僅考慮x方向的頻率，還考慮y方向的頻率即可，能夠同樣導出表示疊紋之式。作為結論，在二維的情況下，在像素排列的亮度圖案和配線的透射率圖案的x方向及y方向各自的頻率成分之差的頻率與和的頻率下會產生各個強度之積的強度的疊紋。Hitherto, for easy understanding of the explanation, the luminance pattern of the pixel arrangement and the transmittance pattern of the wiring have been considered one-dimensionally. The two patterns are actually two-dimensional, but in the case of two-dimensional, it is sufficient to consider not only the frequency in the x direction but also the frequency in the y direction, and a formula representing the moire can be derived similarly. As a conclusion, in the two-dimensional case, the intensity of the product of each intensity is generated at the frequency of the difference between the frequency components of the luminance pattern of the pixel arrangement and the transmittance pattern of the wiring and the y direction of the wiring and the frequency of the sum. Folding.
接著，利用具體例進行說明。在圖11中示意性地表示圖9所示之顯示單元30的子像素32r、32g及32b中的任一像素排列的亮度圖案的一例。又，在圖12中示意性地表示等間距的配線圖案（亦即，配線的透射率的圖案）25c。
其中，將圖12所示之配線圖案25c的開口部22的形狀設為菱形，在圖12中示出與x方向所成之角度為26°、間距為101μm的例子。當配線圖案25c的開口部22的形狀為菱形時，能夠由2個方向的直線配線的配線圖案的重疊來表示。在圖13中示出2個方向中右方向的（沿在左（上）方向上延伸之右（上）方向排列）直線配線21d。另外，在圖6中示出2個方向中左方向的（沿在右（上）方向上延伸之左（上）方向排列）直線配線21c。其中，直線的配線的“方向”係指直線的配線排列之方向，係相對於直線垂直之方向。
又，圖14係圖11的像素排列圖案（亦即，像素排列的亮度的圖案）的二維頻率分佈，以圓的面積表示各頻率成分的強度。圖15係圖12的配線圖案25c的二維頻率分佈，以圓的面積表示各頻率成分的強度。另外，在圖14及圖15的二維頻率分佈中僅示出第1象限和第2象限。圖15的第1象限的頻率成分表示圖12的右方向的直線配線21d的頻率成分，圖15的第2象限的頻率成分表示圖12的左方向的直線配線21c的頻率成分。
另外，本發明中，作為顯示單元，能夠使用如有機EL顯示器（OELD）那樣，對於紅色（R）、綠色（G）及藍色（B）中至少2個顏色，像素排列圖案不同之顯示器的顯示單元。在圖64中示意性地表示該種有機EL顯示器（OELD）的顯示單元30a的子像素RGB中的任一像素排列的亮度圖案的另一例。又，圖65係圖64的像素排列圖案（亦即，像素排列的亮度的圖案）的二維頻率分佈，以圓的面積表示各頻率成分的強度。其中，圖64表示對應於圖11之像素排列圖案，圖65表示對應於圖14之二維頻率分佈。Next, a specific example will be described. FIG. 11 schematically shows an example of a brightness pattern of any one of the sub-pixels 32r, 32g, and 32b of the display unit 30 shown in FIG. 9. In addition, FIG. 12 schematically illustrates a wiring pattern (ie, a pattern of transmittance of wiring) 25c having an equal pitch.
Here, the shape of the opening 22 of the wiring pattern 25c shown in FIG. 12 is a rhombus, and FIG. 12 shows an example in which the angle with the x direction is 26 ° and the pitch is 101 μm. When the shape of the opening portion 22 of the wiring pattern 25c is a rhombus, it can be represented by the overlap of the wiring pattern of the linear wiring in two directions. FIG. 13 shows the straight wiring 21d in the right direction (arranged in the right (up) direction extending in the left (up) direction) of the two directions. In addition, in FIG. 6, the linear wiring 21 c in the left direction (arranged in the left (up) direction extending in the right (up) direction) is shown in the left direction. The “direction” of the straight wiring refers to the direction of the straight wiring arrangement, and refers to the direction perpendicular to the straight line.
14 is a two-dimensional frequency distribution of the pixel arrangement pattern (that is, the pattern of the brightness of the pixel arrangement) in FIG. 11, and the intensity of each frequency component is represented by the area of a circle. FIG. 15 is a two-dimensional frequency distribution of the wiring pattern 25c in FIG. 12, and the intensity of each frequency component is represented by the area of a circle. Note that only the first and second quadrants are shown in the two-dimensional frequency distributions of FIGS. 14 and 15. The frequency component of the first quadrant in FIG. 15 represents the frequency component of the linear wiring 21d in the right direction of FIG. 12, and the frequency component of the second quadrant in FIG. 15 represents the frequency component of the linear wiring 21c in the left direction of FIG. 12.
In addition, in the present invention, as the display unit, it is possible to use a display having a pixel arrangement pattern different for at least two colors of red (R), green (G), and blue (B), such as an organic EL display (OELD). Display unit. FIG. 64 schematically illustrates another example of a luminance pattern of any one of the sub-pixels RGB of the display unit 30 a of the organic EL display (OELD). 65 is a two-dimensional frequency distribution of the pixel arrangement pattern (that is, the pattern of the brightness of the pixel arrangement) in FIG. 64, and the intensity of each frequency component is represented by the area of a circle. Among them, FIG. 64 shows a pixel arrangement pattern corresponding to FIG. 11, and FIG. 65 shows a two-dimensional frequency distribution corresponding to FIG. 14.
圖16係計算由圖14所示之像素排列圖案的各頻率成分和圖15所示之配線圖案25c的各頻率成分計算出之疊紋成分亦即頻率之差，並在該差分的頻率上標繪各個強度的乘法運算值之圖。其中，圖16的x頻率及y頻率的刻度範圍與圖14及圖15不同，又，各成分的圓的面積與強度的關係亦不同。
在此，由上述式（8）可知，為了準確地導出疊紋成分，需要對像素排列圖案的所有頻率成分（包括共軛關係的成分）及配線的所有頻率成分乘法運算各成分的係數（複數）並標繪在各成分的頻率之和的頻率上（與負頻率之和相當於計算上述差）。然而，為了簡化說明而省略。圖16係標繪有像素排列圖案的二維頻率分佈中y頻率為0以下的區域的各成分和配線圖案的二維頻率分佈中y頻率為0以上的區域中除頻率0的成分以外的各成分的疊紋之圖。FIG. 16 is a calculation of the difference between the frequency components of the pixel arrangement pattern shown in FIG. 14 and the frequency components of the wiring pattern 25c shown in FIG. 15, that is, the frequency difference, and the difference frequency is superscripted. Plot the multiplication values for each intensity. The scale ranges of the x frequency and the y frequency in FIG. 16 are different from those in FIG. 14 and FIG. 15, and the relationship between the area and the intensity of the circle of each component is also different.
Here, it can be known from the above formula (8) that in order to accurately derive the moire component, it is necessary to multiply the coefficients (complex numbers) of each component of all the frequency components (including the components of the conjugate relationship) of the pixel arrangement pattern and all the frequency components of the wiring. ) And plot the frequency at the sum of the frequencies of the components (the sum with the negative frequency is equivalent to calculating the above difference). However, it is omitted to simplify the description. FIG. 16 shows the components of a region having a y frequency of 0 or less in a two-dimensional frequency distribution with a pixel arrangement pattern and the components other than a component of frequency 0 in a region of a y frequency of 0 or more in a two-dimensional frequency distribution of a wiring pattern. Composition of moire.
在此，由上述式（7）可知，在將像素排列圖案和配線圖案重疊而成之圖案中，除了以上述式（7）的第4行的式給出之疊紋以外，還包含以上述式（7）的第3行給出之“乘以像素排列圖案的平均亮度而得到之配線圖案的各頻率成分”。在圖16中還包含該成分。具體而言，對像素排列圖案的頻率0的成分（相當於上述式（7）的A0）和配線的各成分進行乘法運算並標繪在頻率0的成分與配線的各成分的頻率之和亦即配線的各成分的頻率上。
在將像素排列圖案和配線圖案重疊而成之圖案中還包含以上述式（7）的第2行給出之“乘以配線圖案的平均透射率而得到之像素排列的亮度圖案的各頻率成分”，但在圖16中不包含該成分。具體而言，在將像素排列圖案的各頻率成分與配線圖案的各頻率成分的乘法運算值標繪在各成分的頻率之和的頻率上時，配線圖案的頻率0的成分（相當於上述式（7）的C0）除外。在圖16的標繪中，不需要各疊紋成分的相位資訊，只要導出強度即可，因此能夠由圖14的像素排列圖案的各頻率成分和圖15的配線圖案的各頻率成分簡單地導出。亦即，單純地由圖15的配線圖案的各頻率成分計算與圖14的像素排列圖案的各頻率成分的頻率之差，並在該差的頻率上標繪各個成分的強度的乘法運算值即可。Here, it can be known from the above formula (7) that the pattern formed by overlapping the pixel arrangement pattern and the wiring pattern includes the above-mentioned pattern in the fourth line of the above formula (7), and also includes the above The third line of the formula (7) gives "the frequency components of the wiring pattern obtained by multiplying the average brightness of the pixel arrangement pattern". This component is also included in FIG. 16. Specifically, the component of the pixel arrangement pattern with a frequency of 0 (corresponding to A0 of the above formula (7)) and each component of the wiring are multiplied and the sum of the frequency of the component at the frequency of 0 and the frequency of each component of the wiring is also plotted. That is, the frequency of each component of the wiring.
The pattern in which the pixel arrangement pattern and the wiring pattern are overlapped also includes each frequency component of the brightness pattern of the pixel arrangement obtained by multiplying the average transmittance of the wiring pattern given in the second line of the above formula (7). ", But this component is not included in Figure 16. Specifically, when the multiplication value of each frequency component of the pixel arrangement pattern and each frequency component of the wiring pattern is plotted on the frequency of the sum of the frequencies of the respective components, the component of the frequency 0 of the wiring pattern (equivalent to the above formula) (7) except C0). In the plot of FIG. 16, phase information of each moire component is not required, and only the intensity needs to be derived. Therefore, it can be easily derived from each frequency component of the pixel arrangement pattern of FIG. 14 and each frequency component of the wiring pattern of FIG. . That is, the difference between the frequency components of the wiring pattern in FIG. 15 and the frequency components of the pixel arrangement pattern in FIG. 14 is simply calculated, and the multiplication value of the intensity of each component is plotted on the difference frequency. can.
在此，如前面所說明，在圖16的標繪中還包含“乘以像素排列圖案的平均亮度而得到之配線圖案的各頻率成分”，因此在圖14的像素排列圖案的頻率分佈中包含頻率0的成分（相當於上述式（7）的A0），又，不包含“乘以配線圖案的平均透射率而得到之像素排列圖案的各頻率成分”，因此在圖15的配線圖案的頻率分佈中不包含頻率0的成分（相當於上述式（7）的C0）。本發明中，假設不僅是圖16，以後說明中之任何疊紋成分的圖均包含“乘以像素排列圖案的平均亮度而得到之配線圖案的各頻率成分”，又，不包含“乘以配線圖案的平均透射率而得到之像素排列圖案的各頻率成分”。Here, as described above, the plot of FIG. 16 also includes “the frequency components of the wiring pattern obtained by multiplying the average brightness of the pixel arrangement pattern”. Therefore, the frequency distribution of the pixel arrangement pattern of FIG. 14 is included. The component of frequency 0 (corresponding to A0 of the above formula (7)) does not include "each frequency component of the pixel arrangement pattern obtained by multiplying the average transmittance of the wiring pattern". Therefore, the frequency of the wiring pattern in FIG. 15 The distribution does not include a component of frequency 0 (corresponding to C0 in the above formula (7)). In the present invention, it is assumed that not only the figure of any moire component in the following description includes "the frequency components of the wiring pattern obtained by multiplying the average brightness of the pixel arrangement pattern", but also does not include "multiplying by the wiring Each frequency component of the pixel arrangement pattern obtained from the average transmittance of the pattern ".
人眼的視覺響應特性對低頻具有靈敏度，亦即圖16的疊紋成分中只有低頻成分會被人眼辨識。
圖17表示圖16所示之各疊紋成分乘以人眼的視覺響應特性的靈敏度而得到之結果。在此，圖17的x頻率及y頻率的刻度範圍與圖16不同。又，各成分的圓的面積所表示之強度亦不同，圖17中，以更大面積的圓標繪了各成分。本發明中，作為人眼的視覺響應特性的靈敏度，使用下述式（1）所表示之Dooley-Shaw的式（R.P.Dooley, R.Shaw: Noise Perception in Electrophotography, J.Appl.Photogr.Eng., 5, 4（1979）,pp.190-196.）。其中，下述式（1）係作為視覺傳遞函數VTF而給出。
k≤log（0.238/0.138）/0.1
VTF=1
k＞log（0.238/0.138）/0.1
VTF=5.05e-0.138k
（1-e-0.1k
） ……（1）
k=πdu/180
其中，k為以立體角定義之空間頻率（週期/deg），以上述式表示。u為以長度定義之空間頻率（週期/mm），d以觀察距離（mm）定義。
另外，Dooley-Shaw的式係以上述式（1）的VTF=5.05e-0.138k
（1-e-0.1k
）給出，在0週期/mm附近小於1，具有所謂的帶通濾波器的特性。然而，本發明中，即使為低空間頻帶（k≤log（0.238/0.138）/0.1），藉由將VTF的值設為1，亦能夠消除低頻成分的靈敏度的衰減。
在圖18A及圖18B中，作為VTF的例子，示出觀察距離500mm及觀察距離750mm的例子。在本說明書的說明中，作為人眼的視覺響應特性的靈敏度，使用觀察距離500mm的VTF。The visual response characteristics of the human eye are sensitive to low frequencies, that is, only the low frequency components in the moire component of FIG. 16 will be recognized by the human eye.
FIG. 17 shows the results obtained by multiplying each moire component shown in FIG. 16 by the sensitivity of the visual response characteristics of the human eye. Here, the scale ranges of the x frequency and the y frequency in FIG. 17 are different from those in FIG. 16. In addition, the intensity indicated by the area of the circle of each component is also different. In FIG. 17, each component is plotted as a circle with a larger area. In the present invention, as the sensitivity of the visual response characteristic of the human eye, the Dooley-Shaw formula (RPDooley, R. Shaw: Noise Perception in Electrophotography, J. Appl. Photogr. Eng., Expressed by the following formula (1) is used. 5, 4 (1979), pp. 190-196.). The following formula (1) is given as the visual transfer function VTF.
k≤log （0.238 / 0.138） /0.1
VTF = 1
k ＞ log （0.238 / 0.138） /0.1
VTF = 5.05e -0.138k (1-e -0.1k ) …… (1)
k = πdu / 180
Among them, k is the spatial frequency (period / deg) defined by the solid angle, and is expressed by the above formula. u is the spatial frequency (period / mm) defined by length, and d is defined by the observation distance (mm).
In addition, Dooley-Shaw's formula is given by VTF = 5.05e -0.138k (1-e -0.1k ) of the above formula (1), which is less than 1 near 0 cycles / mm, and has a so-called bandpass filter. characteristic. However, in the present invention, even in the low spatial frequency band (k ≦ log (0.238 / 0.138) /0.1), the attenuation of the sensitivity of the low-frequency component can be eliminated by setting the value of VTF to 1.
In FIGS. 18A and 18B, examples of the VTF include examples of an observation distance of 500 mm and an observation distance of 750 mm. In the description of this specification, as the sensitivity of the visual response characteristics of the human eye, a VTF with an observation distance of 500 mm is used.
在圖17中可知，在1週期/mm以下的低頻區域存在疊紋成分，存在被人眼辨識之疊紋。
該疊紋係由在圖14的像素排列圖案的頻率分佈中以黑箭頭表示之成分（x=22.2週期/mm、y=44.4週期/mm）和在圖15的配線圖案的頻率分佈中以黑箭頭表示之成分（x=21.8週期/mm、y=44.6週期/mm）而產生。
如此，可知若在像素排列圖案的頻率分佈和配線圖案的頻率分佈中存在頻率接近的成分，則產生被人眼辨識之低頻的疊紋。
另外，關於如圖17中以黑箭頭表示之成分那樣使人眼的視覺響應特性起作用而得到之各疊紋成分中強度最大的成分，以下亦稱為“對疊紋貢獻最大的疊紋的頻率成分”及“主疊紋成分”。As can be seen in FIG. 17, there is a mottled component in a low frequency region of 1 cycle / mm or less, and a moire recognized by the human eye exists.
This moire is composed of a component (x = 22.2 cycle / mm, y = 44.4 cycle / mm) indicated by a black arrow in the frequency distribution of the pixel arrangement pattern of FIG. 14 and a black distribution in the frequency distribution of the wiring pattern of FIG. 15. The components indicated by the arrows (x = 21.8 cycles / mm, y = 44.6 cycles / mm) are generated.
In this way, it can be seen that if there are components with close frequencies in the frequency distribution of the pixel arrangement pattern and the frequency distribution of the wiring pattern, a low-frequency moire is recognized by the human eye.
In addition, the component with the highest intensity among the moiré components obtained by making the visual response characteristics of the human eye act as the component indicated by the black arrow in FIG. 17 is also hereinafter referred to as “the moiré that contributes the most to moiré” Frequency component "and" main moire component ".
（基於本發明之減少疊紋之原理）
由上述疊紋產生的原理可知，若能夠使配線圖案的各頻率成分的頻率與像素排列圖案的各頻率成分的頻率分離，則不會產生被人眼辨識之低頻的疊紋。本發明中，藉由“將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距”來達成疊紋的減少。
以圖12所示之配線圖案為代表例進行說明。在圖12所示之配線圖案（配線的透射率圖案）中，若沿著配線的方向觀察1個方向的直線配線亦即右方向的直線配線21d或左方向的直線配線21c，則成為如圖19那樣。在圖19中有4根配線。該等4根的各個配線的間距當然均相同，為101μm。在圖19中僅示出4根配線，但其之後亦有配線，其間距當然亦為101μm。在此，在圖19中僅抽出第2個配線並示於圖20。該第2個配線以配線4根量的間距404μm重複。(Based on the principle of reducing moire in the present invention)
It can be known from the above-mentioned principle of moire that if the frequency of each frequency component of the wiring pattern can be separated from the frequency of each frequency component of the pixel arrangement pattern, no low-frequency moire can be recognized by the human eye. In the present invention, the "repeating pitch of a predetermined number of wirings is set to an equal pitch, and the pitch of each wiring of a predetermined number is set to a non-equidistant pitch", thereby reducing the overlap.
The wiring pattern shown in FIG. 12 will be described as a representative example. In the wiring pattern (transmittance pattern of the wiring) shown in FIG. 12, if the straight wiring in one direction is viewed along the wiring direction, that is, the straight wiring 21d in the right direction or the straight wiring 21c in the left direction, it becomes as shown in FIG. 12. 19 like that. There are four wirings in FIG. 19. Of course, the pitch of each of the four wires is the same, and is 101 μm. Although only four wirings are shown in FIG. 19, there are wirings thereafter, and the pitch is of course 101 μm. Here, only the second wiring is extracted in FIG. 19 and shown in FIG. 20. This second wiring was repeated at a pitch of 404 μm in the amount of four wirings.
在此，將圖19及圖20所示之配線圖案的一維頻率分佈示於圖21。由圖21可知，與原來的配線相比，第2個抽出配線的頻率成分多（細）4倍，又，最小頻率亦低（1/4）。第2個抽出配線比原來的配線長4倍間距，因此頻率成分相反地存在於細4倍的頻率中，又，最小頻率亦成為低1/4。相對於第2個抽出配線具有多4倍的頻率成分，原來的配線的頻率成分少的原因在於，第2個抽出配線的各頻率成分與其他配線的各頻率成分抵消。亦即，第1個配線、第2個配線、第3個配線及第4個配線分別具有比原來的配線多4倍的頻率成分。然而，若將該等配線的各頻率成分全部進行加法運算，則只有特定頻率（相當於原來的配線的間距之頻率的整數倍的頻率）的成分被加法運算而增強並殘留，其他頻率的成分則抵消而消失，從而成為原來的配線的頻率成分。頻率空間中之加法運算依據相互加法運算之各成分的相位關係而亦會成為減法運算（負的加法運算），因此有時會相互抵消。頻率空間中之加法運算以各成分的實部和虛部分別進行加法運算，但實部和虛部分別依據相位而亦會成為負值（參閱圖21），因此有時會相互抵消。Here, the one-dimensional frequency distribution of the wiring pattern shown in FIGS. 19 and 20 is shown in FIG. 21. As can be seen from FIG. 21, compared with the original wiring, the frequency component of the second extraction wiring is 4 times more (fine) and the minimum frequency is also lower (1/4). The second extraction wiring is 4 times longer than the original wiring. Therefore, the frequency component exists in the fine 4 times of the opposite frequency, and the minimum frequency becomes 1/4 lower. The frequency component of the original wiring is smaller than the frequency component of the second extraction wiring by four times, because each frequency component of the second extraction wiring cancels each frequency component of the other wiring. That is, each of the first wiring, the second wiring, the third wiring, and the fourth wiring has a frequency component that is four times greater than the original wiring. However, if all the frequency components of these wirings are added, only components with a specific frequency (a frequency equivalent to an integer multiple of the frequency of the original wiring pitch) are added and left over, and components of other frequencies are added. Then it cancels and disappears, and becomes the frequency component of the original wiring. The addition operation in the frequency space is also a subtraction operation (negative addition operation) depending on the phase relationship of the components of the mutual addition operation, and therefore may sometimes cancel each other out. The addition operation in the frequency space adds the real part and the imaginary part of each component separately, but the real part and the imaginary part also become negative depending on the phase (see FIG. 21), so they sometimes cancel each other.
在此，本發明人得到了如下見解：藉由將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距，能夠改變配線的頻率分佈。關於這點，以上述例（既定根數為4根時的例子）進行說明。第1個配線、第3個配線及第4個配線各自的頻率成分的強度與圖21的黑點（菱形）所示之第2個配線的強度相同。而且，即使改變各個配線的位置（亦即，即使改變各配線的間距），4根的重複間距亦不會變，因此各頻率成分的強度不會變而仍然與圖21的以黑點表示之第2個配線的強度相同。然而，當改變了各個配線的位置時（當改變了各配線的間距時），由於相位改變，所以各頻率成分的實部和虛部的值發生變化。若改變第2個配線的位置，則圖21所示之實部和虛部的值發生變化。藉由該變化，能夠改變將第1個配線、第2個配線、第3個配線及第4個配線各自的頻率成分進行加法運算之結果的頻率分佈。
由於圖21的以黑箭頭表示之成分接近圖14的像素排列圖案的黑箭頭的頻率成分，所以如圖17那樣產生了被人眼辨識之低頻的疊紋。Here, the present inventors have found that the frequency distribution of the wiring can be changed by setting the repeating pitch of a predetermined number of wirings to be an equal pitch and the pitch of each wiring of a predetermined number to be non-equal. This point will be described using the above-mentioned example (an example when the predetermined number is four). The intensity of the frequency component of each of the first wiring, the third wiring, and the fourth wiring is the same as that of the second wiring shown by the black dots (diamonds) in FIG. 21. Moreover, even if the position of each wiring is changed (that is, even if the pitch of each wiring is changed), the repeating pitch of the four wires will not change, so the intensity of each frequency component will not change and will remain the same as the black dot shown in FIG. The second wiring has the same strength. However, when the position of each wiring is changed (when the pitch of each wiring is changed), the value of the real part and imaginary part of each frequency component changes due to the phase change. When the position of the second wiring is changed, the values of the real part and the imaginary part shown in FIG. 21 change. With this change, it is possible to change the frequency distribution of the result of adding the frequency components of the first wiring, the second wiring, the third wiring, and the fourth wiring.
Since the components indicated by the black arrows in FIG. 21 are close to the frequency components of the black arrows in the pixel arrangement pattern of FIG. 14, a low-frequency moire recognized by the human eye is generated as shown in FIG. 17.
因此，對第1個配線、第2個配線、第3個配線及第4個配線的位置（間距）的最優化進行了探討，以使圖21的以黑箭頭表示之成分變小。將其結果示於圖22及圖23。
圖22係最優化結果的4根配線的透射率的一維輪廓。圖23表示頻率分佈。由圖23明確可知，能夠減小以黑箭頭表示之頻率成分的強度。
又，在圖2及圖3中示出最優化結果的配線的透射率圖案。在圖2及圖3所示之配線圖案中，4根配線的重複間距與圖12及圖13相同，為404μm。圖24係圖2所示之配線圖案的二維頻率分佈，以圓的面積表示各頻率成分的強度。可知在圖14的像素排列圖案的頻率分佈中，接近以黑箭頭表示之成分的成分（以黑箭頭表示）的強度比圖15小。
圖25示出由圖14所示之像素排列圖案的各頻率成分和圖2所示之配線圖案的各頻率成分計算出之疊紋成分，圖26示出圖25所示之疊紋成分乘以上述式（1）所示之表示人眼的視覺響應特性的靈敏度之視覺傳遞函數VTF而得到之結果。可知不存在在圖17中觀察到之低頻的疊紋。另外，圖15和圖24、圖16和圖25及圖17和圖26的各成分的圓的面積所表示之強度的大小分別相同。Therefore, the optimization of the positions (pitch) of the first wiring, the second wiring, the third wiring, and the fourth wiring has been examined so that the components indicated by the black arrows in FIG. 21 become smaller. The results are shown in FIGS. 22 and 23.
FIG. 22 is a one-dimensional profile of the transmittance of the four wirings as a result of optimization. Figure 23 shows the frequency distribution. It is clear from FIG. 23 that the intensity of the frequency component indicated by the black arrow can be reduced.
The transmittance patterns of the wirings as a result of the optimization are shown in FIGS. 2 and 3. In the wiring patterns shown in FIG. 2 and FIG. 3, the repeating pitch of the four wires is the same as that of FIGS. 12 and 13, and is 404 μm. FIG. 24 is a two-dimensional frequency distribution of the wiring pattern shown in FIG. 2, and the intensity of each frequency component is represented by the area of a circle. It can be seen that in the frequency distribution of the pixel arrangement pattern in FIG. 14, the intensity of a component (indicated by a black arrow) close to the component indicated by the black arrow is smaller than that in FIG. 15.
FIG. 25 shows a moire component calculated from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 2, and FIG. 26 shows the moire component shown in FIG. 25 multiplied by The result obtained by the visual transfer function VTF representing the sensitivity of the visual response characteristics of the human eye shown by the above formula (1). It can be seen that there is no low-frequency moire observed in FIG. 17. In addition, the magnitudes of the strengths indicated by the areas of the circles of the respective components in FIGS. 15 and 24, FIG. 16 and FIG. 25, and FIG. 17 and FIG. 26 are the same.
在此，藉由圖21與圖23的比較以及圖15與圖24的比較可知，與等間距的配線相比，本發明的“將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距”之配線圖案中，配線圖案的最小頻率小。例如，如圖22、圖2及圖3那樣既定根數為4根時，最小頻率成為1/4。其原因能夠如下那樣說明。如已說明，圖21所示之第1個配線～第4個配線分別具有比原來的等間距的配線多4倍的頻率成分，又，最小頻率亦成為1/4。而且，若將該等配線的各頻率成分進行加法運算，則在等間距的情況下，只有相當於原來的配線的間距（第1個配線～第4個配線的1/4的間距）之頻率的整數倍的頻率被加法運算而增強並殘留，其他頻率的成分則抵消而消失。Here, according to the comparison between FIG. 21 and FIG. 23 and the comparison between FIG. 15 and FIG. 24, it is known that the “repeating pitch of a predetermined number of wirings is set to an equal pitch, and In the wiring pattern in which the pitch of each wiring of a predetermined number is set to be non-equidistant, the minimum frequency of the wiring pattern is small. For example, when the predetermined number is four as shown in FIGS. 22, 2 and 3, the minimum frequency becomes 1/4. The reason can be explained as follows. As described above, the first to fourth wirings shown in FIG. 21 each have a frequency component that is four times greater than that of the original equally-spaced wiring, and the minimum frequency is also 1/4. In addition, if the frequency components of these wirings are added together, in the case of an equal pitch, there is only a frequency equivalent to the pitch of the original wiring (the pitch of the first wiring to the fourth of the fourth wiring). Frequencies that are integer multiples of are enhanced and left over by addition operations, and components of other frequencies are cancelled and disappear.
但是，如本發明那樣，若將第1個配線～第4個配線的各個配線的間距設為非等間距，則不會抵消而殘留。如此，本發明中，與等間距的配線相比產生配線圖案的低頻成分，因此需注意避免使配線圖案被辨識。為此，在表示將像素排列圖案和配線圖案重疊而成之圖案之上述式（7）中，不僅是第4行的式的疊紋成分，第3行的式的“乘以像素排列圖案的平均亮度A0而得到之配線圖案的各頻率成分”亦進行評價即可。具體而言，在由圖14的像素排列圖案的各頻率成分和圖24所示之配線圖案的各頻率成分導出圖25的疊紋成分時，只要在像素排列圖案的頻率分佈中包含頻率0的成分（相當於上述式（7）的A0）即可。如此，圖25所示之疊紋成分係在像素排列圖案的頻率分佈中包含頻率0的成分而導出之疊紋成分。只要沒有特別指定，以下所示之疊紋成分亦指“在像素排列圖案的頻率分佈中包含頻率0的成分而導出之疊紋成分”。However, as in the present invention, if the pitch of each of the first to fourth wirings is set to a non-equidistant pitch, they will not be offset and remain. In this way, in the present invention, a low-frequency component of a wiring pattern is generated as compared with an equal-pitch wiring, so care must be taken to avoid the wiring pattern from being recognized. Therefore, in the above formula (7) showing the pattern in which the pixel arrangement pattern and the wiring pattern are overlapped, not only the moire component of the formula of the fourth line, but the "multiplying by the pixel arrangement pattern of the formula of the third line" Each frequency component of the wiring pattern obtained by averaging the brightness A0 may be evaluated. Specifically, when the moire component of FIG. 25 is derived from each frequency component of the pixel arrangement pattern in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 24, as long as the frequency distribution of the pixel arrangement pattern includes a frequency of 0, A component (corresponding to A0 of the said Formula (7)) is sufficient. In this way, the moiré component shown in FIG. 25 is a moiré component derived by including a component of frequency 0 in the frequency distribution of the pixel arrangement pattern. Unless otherwise specified, the moire component shown below also refers to "a moire component derived by including a component with a frequency of 0 in the frequency distribution of the pixel arrangement pattern".
現在整理並說明一下基於本發明之減少疊紋之原理。首先，考慮將配線圖案的既定根數設為n根，並且僅抽出第1個配線、……、第n個配線之各個配線圖案（在此，成為子配線圖案）。各個子配線圖案具有比原來的配線圖案細且多n倍的頻率成分（在圖21中為4倍），而且，包含接近像素排列圖案的各頻率成分且導致產生被人眼辨識之低頻的疊紋之頻率成分。若將各個子配線圖案以等間距進行重疊（相當於原來的配線圖案），則最能夠抵消並減少各頻率成分，又，亦能夠提高最小頻率。另一方面，會殘留各個子配線圖案中所包含之導致產生疊紋之頻率成分（在圖21中，以黑箭頭表示其最大的一個）。因此，藉由將各個子配線圖案以相互抵消各個子配線圖案中所包含之導致產生疊紋之頻率成分之間距進行重疊，與以等間距重疊之情況相比，頻率成分的數量增多，又，雖然最小頻率降低，但能夠減少疊紋。其係本發明的減少疊紋之原理。The principle of reducing moire based on the present invention will now be summarized and explained. First, it is considered that the predetermined number of wiring patterns is set to n, and only each wiring pattern of the first wiring,..., And n-th wiring is extracted (here, referred to as a sub wiring pattern). Each sub-wiring pattern has a frequency component that is thinner and more than n times larger than the original wiring pattern (4 times in FIG. 21). Moreover, each sub-wiring pattern contains frequency components close to the pixel arrangement pattern and causes superposition of low frequencies recognized by the human eye. Grain frequency component. When the sub-wiring patterns are superposed at equal intervals (equivalent to the original wiring pattern), each frequency component can be most canceled and reduced, and the minimum frequency can be increased. On the other hand, a frequency component (in FIG. 21, the largest one is indicated by a black arrow) that causes the occurrence of moire is left in each of the sub-wiring patterns. Therefore, by overlapping each sub-wiring pattern to offset the frequency components of the frequency components contained in each sub-wiring pattern that cause moire, the number of frequency components is increased compared to the case of overlapping at equal intervals. Although the minimum frequency is reduced, the moire can be reduced. It is the principle of reducing moire of the present invention.
本發明的特徵為，相對於等間距的配線圖案的如圖16及圖17那樣的疊紋的頻率分佈，具有如圖25及圖26那樣的疊紋的頻率分佈之“既定根數的重複間距為等間距，但既定根數各自的間距為非等間距的”配線圖案。
本發明的導電性薄膜中所使用之配線圖案（以下，亦稱為本發明的配線圖案）的特徵為，“既定根數的重複間距為等間隔”；及如圖25及圖26的疊紋的頻率分佈那樣，與如圖16及圖17所示之等間距的配線圖案時的疊紋的頻率分佈相比，疊紋的總和減小。
如在圖21中所說明，本發明中，越增加設為非等間距之根數，最小頻率越降低，因此配線圖案有可能被辨識。又，同樣地，由圖21可知，本發明中，越增多設為非等間距之根數，子配線圖案的頻率成分變得越細且越多，其中，亦會包含很多導致產生被人眼辨識之低頻的疊紋之頻率成分，因此認為相互抵消該等頻率成分之間距的最優化變得困難。The present invention is characterized in that the frequency distribution of the moire as shown in FIGS. 16 and 17 with respect to the equally-spaced wiring pattern has a “predetermined number of repeated pitches” of the frequency distribution of the moire as shown in FIGS. 25 and 26. "Equivalent pitch", but the predetermined number of pitches are non-equidistant "wiring patterns.
The wiring pattern used in the conductive film of the present invention (hereinafter, also referred to as the wiring pattern of the present invention) is characterized in that "the repeating pitch of a predetermined number is an equal interval"; and the overlapping pattern as shown in Figs. 25 and 26 As shown in FIG. 16 and FIG. 17, the frequency distribution of the moire is smaller than the frequency distribution of the moire when the wiring pattern is equally spaced as shown in FIGS. 16 and 17.
As illustrated in FIG. 21, in the present invention, as the number of non-equidistant pitches is increased, the minimum frequency is reduced, so that the wiring pattern may be recognized. Similarly, as can be seen from FIG. 21, in the present invention, as the number of non-equidistant pitches is increased, the frequency components of the sub-wiring patterns become thinner and more numerous, and among them, there are also many that may cause human eyes. It is considered that it is difficult to optimize the distance between the frequency components of the low-frequency moire which can cancel each other.
因此，盡量減少設為非等間距之根數為較佳。依本發明人的實驗，與等間距的配線圖案相比，藉由將既定根數的配線的間距設為非等間距而能夠減少疊紋之根數為最多16根以下。即使將16根以上的配線的間距設為非等間距，減少疊紋之效果亦不會變或者反而變差，另一方面，配線圖案本身亦容易被辨識。在多數情況下，作為設為非等間距之配線的根數，2～8根左右時，減少疊紋之效果變得最大，即使將根數增加至其以上亦不會變或者反而變差。因此，為了在配線圖案不被辨識之狀態下充分減少疊紋，將設為非等間距之根數設為最多16根以下為較佳。圖22及圖23所示之例子為對4根配線的間距的最優化進行探討之例子，在結果上2根配線的重複間距幾乎成為等間距，亦即表示藉由2根配線的間距的最優化可得到同等的疊紋減少效果。Therefore, it is better to minimize the number of non-equidistant roots. According to the experiments of the present inventor, by setting the pitch of a predetermined number of wirings to be non-equal, as compared with the wiring pattern having a constant pitch, the number of overlapping patterns can be reduced to a maximum of 16 or less. Even if the pitch of more than 16 wires is set to be non-equidistant, the effect of reducing the moire will not be changed or deteriorated. On the other hand, the wiring pattern itself is easy to be identified. In most cases, the number of non-equidistant wirings is about 2 to 8 and the effect of reducing the moire becomes the largest. Even if the number is increased to more than the same, it will not change or worse. Therefore, in order to sufficiently reduce the moire in a state where the wiring pattern is not recognized, it is preferable to set the number of non-equidistances to a maximum of 16 or less. The examples shown in FIG. 22 and FIG. 23 are examples of optimizing the pitches of the four wirings. In the result, the repeated pitches of the two wirings are almost equal, which means that the maximum pitches of the two wirings are the same. Optimized to get the same moire reduction effect.
在上述專利文獻2及3中所記載之現有技術中，針對賦予給配線的間距之不規則性，本發明中有“既定根數的重複間距為等間距”的限定。又，本發明相對於上述現有技術，明示了利用該種配線圖案，與如圖16及圖17那樣的等間距的配線圖案的疊紋相比能夠如圖26那樣減小疊紋的總和及其原理。本發明中進一步記載有“為了在配線圖案不被辨識之狀態下充分減少疊紋，將設為非等間距之根數設為最多16根以下為較佳”。嘗試性地，將設為非等間距之根數增加至512根並對間距賦予16%左右的隨機的不規則性而對疊紋成分進行了調查。將其結果示於圖27～圖29。圖27係配線圖案的二維頻率分佈。圖28係由圖14的像素排列圖案的頻率分佈和圖27的配線圖案的頻率分佈導出之疊紋的頻率分佈。又，圖29示出乘以上述式（1）所示之視覺傳遞函數VTF而得到之分佈。在此，圖27與圖15及圖24、圖28與圖16及圖25、圖29與圖17及圖26的各成分的圓的面積所表示之強度的大小相同。In the prior art described in the above-mentioned Patent Documents 2 and 3, with regard to the irregularity of the pitch given to the wiring, the present invention has a limitation of "the repeated pitch of a predetermined number is an equal pitch". In addition, compared with the above-mentioned prior art, the present invention clearly shows that the use of such a wiring pattern can reduce the sum of the moire as shown in FIG. 26 as compared with the moire of the wiring pattern with an equal pitch as shown in FIG. 16 and FIG. principle. In the present invention, it is further described that "in order to sufficiently reduce the moire in a state where the wiring pattern is not recognized, it is preferable to set the number of non-equidistant pitches to a maximum of 16 or less". An attempt was made to investigate the mottled component by increasing the number of non-equidistant pitches to 512 and giving a random irregularity of about 16% to the pitch. The results are shown in FIGS. 27 to 29. FIG. 27 is a two-dimensional frequency distribution of a wiring pattern. FIG. 28 is a frequency distribution of a moire derived from the frequency distribution of the pixel arrangement pattern of FIG. 14 and the frequency distribution of the wiring pattern of FIG. 27. In addition, FIG. 29 shows a distribution obtained by multiplying the visual transfer function VTF expressed by the above formula (1). Here, the magnitudes of the intensity indicated by the areas of the circles of the respective components in FIGS. 27 and 15 and 24, FIG. 28 and FIG. 16 and FIG. 25, and FIG. 29 and FIG. 17 and FIG. 26 are the same.
若比較本發明的分佈之圖24～圖26和設想上述現有技術的賦予有不規則性之分佈之圖27～圖29，則可知存在明確的差異。在圖24～圖26中，接近像素排列圖案的頻率成分的配線圖案頻率成分（以黑箭頭表示）的強度明確小於等間距的配線圖案（參閱圖15），其結果，可知不存在等間距的配線圖案中觀察到之低頻的疊紋成分（參閱圖16及圖17）。另一方面，在圖27～圖29中，可知配線圖案的頻率成分較細地擴大，其結果，雖然不存在等間距的配線圖案中觀察到之特定的低頻疊紋成分（參閱圖16及圖17），但產生了細的複數個疊紋成分。該等細的複數個疊紋成分作為不規則的雜訊而被辨識。與圖17所示之疊紋相比，圖29的疊紋雖然不存在特定的大的疊紋，但疊紋的總和反而大。24 to 26 of the distribution of the present invention are compared with those of FIG. 27 to FIG. 29 in which the distribution of irregularity imparted to the above-mentioned prior art is assumed to be clear. In FIGS. 24 to 26, the intensity of the frequency component (indicated by the black arrow) of the wiring pattern close to the frequency component of the pixel arrangement pattern is clearly smaller than that of the equally-spaced wiring pattern (see FIG. 15). As a result, it can be seen that there are no equally-spaced wiring patterns. The low-frequency moire component observed in the wiring pattern (see Fig. 16 and Fig. 17). On the other hand, in FIGS. 27 to 29, it can be seen that the frequency component of the wiring pattern is finely enlarged. As a result, although there is no specific low-frequency moire component observed in the equally-spaced wiring pattern (see FIG. 16 and FIG. 17), but produced a plurality of fine moire components. The fine multiple mottled components are identified as irregular noise. Compared with the moire shown in FIG. 17, although the moire of FIG. 29 does not have a specific large moire, the sum of the moire is rather large.
（在2個方向以上的各個方向上配線的間距不同之配線圖案）
接著，作為本發明的應用，對在“係將2個方向以上的直線配線重疊而成之配線圖案，且係在至少2個方向以上的各個方向上配線的平均間距不同之配線圖案”中適用本發明之例子亦進行說明。
因此，首先對“在2個方向以上的各個方向上配線的間距不同之配線圖案”進行說明。
在圖30中示出右方向和左方向這2個方向的配線的間距不同之配線圖案25d。在圖31中示出由在1個方向（右向）上平行地排列之複數個金屬細線14構成之直線配線21e。在圖32中示出由在另1個方向（左向）上平行地排列之複數個金屬細線14構成之直線配線21f。圖31所示之直線配線21e的複數個金屬細線14的配線間距與圖32所示之直線配線21f的複數個金屬細線14的配線間距不同。圖30所示之配線圖案25d能夠說係既定形狀的開口部（單元）22排列成網格狀之各方向非等間距的配線圖案，該開口部係將配線間距互不相同之圖31所示之直線配線21e和圖32所示之直線配線21f進行重疊並使複數個金屬細線14彼此相互交叉而形成。(Wiring patterns with different pitches of wiring in each of two or more directions)
Next, as an application of the present invention, it is applicable to a "wiring pattern formed by overlapping linear wirings in two or more directions and having a different average pitch of wirings in each of at least two directions". Examples of the present invention will also be described.
Therefore, "a wiring pattern having different pitches of wiring in each of two or more directions" will be described first.
FIG. 30 shows a wiring pattern 25d having different pitches of the wirings in the right and left directions. FIG. 31 shows a linear wiring 21 e composed of a plurality of thin metal wires 14 arranged in parallel in one direction (right direction). FIG. 32 shows a linear wiring 21f composed of a plurality of thin metal wires 14 arranged in parallel in the other direction (left direction). The wiring pitch of the plurality of thin metal wires 14 of the straight wiring 21e shown in FIG. 31 is different from the wiring pitch of the plurality of thin metal wires 14 of the straight wiring 21f shown in FIG. 32. The wiring pattern 25d shown in FIG. 30 can be said to be a wiring pattern with a predetermined shape of the openings (cells) 22 arranged in a grid shape in each direction and having an uneven pitch in each direction. The openings are shown in FIG. 31 where the wiring pitch is different from each other The linear wiring 21e and the linear wiring 21f shown in FIG. 32 are formed by overlapping a plurality of thin metal wires 14 with each other.
圖33係圖30所示之右方向與左方向的配線的間距不同之各方向非等間距的配線圖案25d的二維頻率分佈的圖。圖34係圖30所示之各方向非等間距的配線圖案25d的疊紋的頻率分佈的圖，且係標繪有由圖14所示之像素排列圖案的各頻率成分和圖33所示之配線圖案的各頻率成分計算出之疊紋成分之圖。
又，圖35係由圖14所示之像素排列圖案的各頻率成分和圖33所示之配線圖案25d的各頻率成分中的右方向的配線圖案（圖31所示之直線配線21e）的頻率成分（第1象限的成分）計算出之疊紋成分的圖。亦即，圖35係圖34所示之疊紋成分中根據圖31所示之直線配線21e計算出之疊紋成分的圖。圖36係由圖14所示之像素排列圖案的各頻率成分和圖33所示之配線圖案25d的各頻率成分中左方向的配線圖案（圖32所示之直線配線21f）的頻率成分（第2象限的成分）計算出之疊紋成分的圖。亦即，圖36係圖34所示之疊紋成分中根據圖32所示之直線配線21f計算出之疊紋成分的圖。FIG. 33 is a diagram showing a two-dimensional frequency distribution of a wiring pattern 25d having non-equal pitches in each direction with different pitches of the wirings in the right direction and the left direction shown in FIG. 30. FIG. 34 is a diagram showing the frequency distribution of the moire of the wiring pattern 25d with non-equal pitches in each direction shown in FIG. 30, and plots each frequency component of the pixel arrangement pattern shown in FIG. 14 and the frequency components shown in FIG. 33. A figure of the moiré component calculated for each frequency component of the wiring pattern.
In addition, FIG. 35 shows the frequency of the right-side wiring pattern (the straight wiring 21e shown in FIG. 31) from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern 25d shown in FIG. 33. The component (component of the 1st quadrant) is calculated from the moire component. That is, FIG. 35 is a diagram of a moire component calculated from the linear wiring 21e shown in FIG. 31 among the moire components shown in FIG. 34. FIG. 36 shows the frequency components of the left-side wiring pattern (the straight wiring 21f shown in FIG. 32) from the frequency components of the pixel arrangement pattern shown in FIG. 14 and the frequency components of the wiring pattern 25d shown in FIG. 33 (No. 2 quadrant component) Calculate the figure of the moire component. That is, FIG. 36 is a diagram of the moire component calculated from the linear wiring 21f shown in FIG. 32 among the moire components shown in FIG. 34.
圖30所示之配線圖案25d和圖12所示之配線圖案25c的每單位面積的配線的根數相等，亦即平均透射率相等。在此，在將右向的直線配線的間距設為p1且將左向的直線配線的間距設為p2時，若（1/p1+1/p2）的值相等，則每單位面積的金屬細線14的配置根數變相等。亦即，若將圖30所示之配線圖案25d的圖31所示之右向的直線配線21e的間距設為p1、將圖32所示之左向的直線配線21f的間距設為p2、將圖12所示之配線圖案25c的圖6及圖13所示之左向的直線配線21c及右向的直線配線21d的間距設為p，則1/p1+1/p2=2/p成立。
又，圖33所示之配線圖案25d的頻率分佈與圖15所示之配線圖案25c的頻率分佈的各成分的圓的面積所表示之強度的大小相同，又，圖34所示之配線圖案25d的疊紋的頻率分佈與圖16所示之配線圖案25c的疊紋的頻率分佈的各成分的圓的面積所表示之強度的大小相同。
又，在圖30所示之配線圖案25d中，圖31所示之右向的配線圖案（直線配線21e）的角度例如與圖12所示之所有方向等間距的配線圖案25c的直線配線21c及21d相同，為26°，但圖32所示之左向的配線圖案（直線配線21f）的角度為24°。又，在圖30所示之配線圖案25d中，圖31所示之右向的直線配線21e的配線間距例如為74μm，圖32所示之左向的直線配線21f的配線間距例如為149μm。The number of wirings per unit area of the wiring pattern 25d shown in FIG. 30 and the wiring pattern 25c shown in FIG. 12 is the same, that is, the average transmittance is the same. Here, when the pitch of the straight line wiring in the right direction is set to p1 and the pitch of the straight line wiring in the left direction is set to p2, if the value of (1 / p1 + 1 / p2) is equal, the thin metal wire per unit area The number of 14 configuration roots becomes equal. That is, if the pitch of the right-hand linear wiring 21e shown in FIG. 31 in the wiring pattern 25d shown in FIG. 30 is set to p1, and the pitch of the left-hand linear wiring 21f shown in FIG. 32 is set to p2, 6 and FIG. 13 of the wiring pattern 25c shown in FIG. 12 and the distance between the left straight line 21c and the right straight line 21d is p, and 1 / p1 + 1 / p2 = 2 / p holds.
The frequency distribution of the wiring pattern 25d shown in FIG. 33 is the same as the magnitude of the intensity indicated by the area of each circle of the components of the frequency distribution of the wiring pattern 25c shown in FIG. 15, and the wiring pattern 25d shown in FIG. 34 is the same. The frequency distribution of the moire is the same as the magnitude of the intensity indicated by the area of the circle of each component of the moire frequency distribution of the wiring pattern 25c shown in FIG. 16.
In the wiring pattern 25d shown in FIG. 30, the angle of the rightward wiring pattern (straight wiring 21e) shown in FIG. 31 is, for example, the straight wiring 21c of the wiring pattern 25c and 21d is the same and is 26 °, but the angle of the leftward wiring pattern (straight wiring 21f) shown in FIG. 32 is 24 °. Further, in the wiring pattern 25d shown in FIG. 30, the wiring pitch of the rightward straight wiring 21e shown in FIG. 31 is, for example, 74 μm, and the wiring pitch of the leftward straight wiring 21f shown in FIG. 32 is 149 μm.
若比較圖16和圖34，則可知在圖34中不存在所有方向等間距的配線圖案25c的疊紋頻率分佈（參閱圖16）中觀察到之低頻的疊紋成分（在圖16中以黑箭頭表示）。在圖33所示之配線圖案25d的頻率分佈中，以黑箭頭表示最接近圖14中以黑箭頭表示之像素排列圖案的頻率成分的頻率成分。由圖30所示之配線圖案25d的圖34所示之疊紋的頻率分佈可知，與圖12所示之所有方向等間距的配線圖案25c的圖16所示之疊紋頻率分佈中觀察到之低頻的疊紋成分（在圖16中以黑箭頭表示）相比，產生了高頻的疊紋成分。若圖34所示之疊紋成分乘以上述式（1）的VTF，則成為如圖26所示那樣，在該圖表中不存在能夠以圓的面積表示之水準的大小的疊紋成分。亦即，可知若在圖35及圖36中以箭頭表示之低頻的疊紋成分乘以上述式（1）的VTF，則如圖26所示會消失。亦即，可知關於疊紋成分的總和亦即疊紋評價值，圖30所示之配線圖案25d小於圖12所示之配線圖案25c。Comparing FIG. 16 and FIG. 34, it can be seen that the low-frequency moire component (black in FIG. 16 in black in FIG. 16) is not observed in the moire frequency distribution (see FIG. 16) of the wiring pattern 25 c having equal intervals in all directions. Arrow). In the frequency distribution of the wiring pattern 25 d shown in FIG. 33, the black component indicates the frequency component closest to the frequency component of the pixel arrangement pattern indicated by the black arrow in FIG. 14. From the frequency distribution of the moire shown in FIG. 34 of the wiring pattern 25d shown in FIG. 30, it can be seen from the frequency distribution of the moire shown in FIG. 16 of the wiring pattern 25c shown in FIG. 12 that is equally spaced in all directions. A low-frequency moire component (indicated by a black arrow in FIG. 16) compared to a high-frequency moire component. When the moire component shown in FIG. 34 is multiplied by the VTF of the above formula (1), as shown in FIG. 26, moire components of a level that can be expressed by the area of a circle do not exist in the graph. That is, it can be seen that if the low-frequency moire component indicated by the arrows in FIGS. 35 and 36 is multiplied by the VTF of the above formula (1), it disappears as shown in FIG. 26. That is, it can be seen that the total of the moire components, that is, the moire evaluation value, is that the wiring pattern 25d shown in FIG. 30 is smaller than the wiring pattern 25c shown in FIG. 12.
若與圖15所示之所有方向等間距的配線圖案25c的頻率分佈相比，如圖30所示那樣改變了右向和左向的配線圖案（直線配線21e和21f）的間距時，至少在右向的配線圖案（直線配線21e）中，圖33所示之各頻率成分的頻率比所有方向等間距的情況（參閱圖15）更分離，因此難以產生接近圖14所示之像素排列圖案的各頻率成分的成分，從而難以產生低頻的疊紋。
另一方面，在左向的配線圖案（直線配線21f）中，圖33所示之各頻率成分的頻率比所有方向等間距的情況（參閱圖15）更接近，因此認為產生接近圖14所示之像素排列圖案的各頻率成分的成分，從而容易產生低頻的疊紋。If the frequency distribution of the right and left wiring patterns (straight wiring 21e and 21f) is changed as shown in FIG. In the rightward wiring pattern (straight wiring 21e), the frequency of each frequency component shown in FIG. 33 is more separated than the case where the pitch is uniform in all directions (see FIG. 15). The components of each frequency component make it difficult to produce low-frequency moire.
On the other hand, in the left-side wiring pattern (straight-line wiring 21f), the frequencies of the frequency components shown in FIG. 33 are closer than the case where the pitch is uniform in all directions (see FIG. 15). The components of each frequency component of the pixel arrangement pattern are liable to produce low-frequency moire.
因此，本發明人在（1/p1+1/p2）不超過既定值之範圍（透射率容許的範圍內）對右向和左向的配線的間距進行各種改變，又，對右向和左向的配線各自的角度亦進行各種改變而求出了疊紋成分的總和值亦即疊紋評價值。在此，圖11所示之像素排列圖案（及圖14的像素排列圖案的頻率分佈）為左右對稱，因此當右向和左向的配線的間距相同時（參閱圖12），疊紋以相同之配線的角度變得最良好。然而，當右向和左向的配線的間距不同時（參閱圖30），疊紋未必一定以相同之角度變得最良好，因此如此個別地改變右向和左向的配線各自的角度而對疊紋成分的總和值亦即疊紋評價值進行了調查。
其結果，得知存在比右向和左向的配線為等間距的情況更能夠減少疊紋之情況。亦即，得知並非相同地改變右向和左向的配線圖案的角度和間距，而是對各自進行個別的改變，藉此存在與相同之情況相比更能夠減少疊紋之情況。認為疊紋的減少程度根據像素排列圖案、透射率的容許範圍或配線的角度範圍等而不同。Therefore, the present inventors made various changes to the pitch of the right and left wirings within a range of (1 / p1 + 1 / p2) that does not exceed a predetermined value (within the transmittance allowable range). The angles of the individual wirings were also changed in various ways, and the total value of the moire component, that is, the moire evaluation value was obtained. Here, the pixel arrangement pattern shown in FIG. 11 (and the frequency distribution of the pixel arrangement pattern of FIG. 14) are bilaterally symmetrical. Therefore, when the pitches of the right and left wiring lines are the same (see FIG. 12), the overlapping patterns are the same. The angle of the wiring becomes the best. However, when the pitches of the right and left wirings are different (see FIG. 30), the moire may not necessarily become the best at the same angle, so the angles of the right and left wirings are individually changed to The total value of the moire component, that is, the moire evaluation value was investigated.
As a result, it was found that there is a case where the moire can be reduced more than the case where the right and left wirings are equidistant. That is, it was learned that instead of changing the angles and pitches of the right and left wiring patterns in the same way, each of them was individually changed, whereby there may be cases where the moire can be reduced more than in the same case. It is considered that the degree of reduction of the moire varies depending on the pixel arrangement pattern, the allowable range of transmittance, the angular range of the wiring, and the like.
（在2個方向以上的各個方向上配線的間距不同之配線圖案中之本發明的適用例）
接著，作為本發明的應用，對“在2個方向以上的各個方向上配線的平均間距不同之配線圖案”中適用本發明之例子進行說明。
在圖37中示出“在2個方向以上的各個方向上配線的平均間距不同之配線圖案”中適用本發明之第3實施例的配線圖案25e。在圖37所示之配線圖案25e中，如圖38所示，只有右向的直線配線21g將4根配線的重複間距設為等間距，同時將平均間距與圖31所示之右向的直線配線21e幾乎不改變（亦即，將4根配線的重複間距與圖31所示之右向的直線配線21e幾乎不改變）而將4根的各個配線的間距設為非等間距。另一方面，左向的直線配線21f與圖32相同。圖38所示之右向的直線配線21g的平均間距與圖32所示之左向的直線配線21f的平均間距不同。亦即，圖37所示之配線圖案25e係本發明的“將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距之配線圖案”，並且係“將2個方向以上的直線配線重疊而成之配線圖案，且係在至少2個方向以上的各個方向上配線的平均間距不同之配線圖案”。(Application example of the present invention in a wiring pattern having different pitches of wiring in each of two or more directions)
Next, as an application of the present invention, an example in which the present invention is applied to “wiring patterns having different average pitches of wirings in each of two or more directions” will be described.
FIG. 37 shows a wiring pattern 25e to which the third embodiment of the present invention is applied in “a wiring pattern having different average pitches of the wiring in each of two or more directions”. In the wiring pattern 25e shown in FIG. 37, as shown in FIG. 38, only the straight line 21g in the right direction sets the repeating pitch of the four wires to be the same pitch, and at the same time, the average pitch is equal to the right line shown in FIG. The wiring 21e is hardly changed (that is, the repeated pitch of the four wirings is hardly changed from the right-handed straight wiring 21e shown in FIG. 31), and the pitch of each of the four wirings is set to a non-equidistant pitch. On the other hand, the left-right linear wiring 21f is the same as that of FIG. 32. The average pitch of the straight line wiring 21g shown in FIG. 38 is different from the average pitch of the straight line wiring 21f shown in FIG. 32. That is, the wiring pattern 25e shown in FIG. 37 is a “wiring pattern in which the repeating pitch of a predetermined number of wirings is set to an equal pitch and the pitch of each wiring of a predetermined number is set to a non-equidistant pitch”, In addition, it is a "wiring pattern in which linear wirings in two or more directions are superimposed and the average pitch of the wirings is different in at least two directions."
圖39係圖37所示之配線圖案25e的二維頻率分佈的圖。圖40係圖37所示之配線圖案25e的疊紋的頻率分佈，且係標繪有由圖14所示之像素排列圖案的各頻率成分和圖39所示之配線圖案的各頻率成分計算出之疊紋成分之圖。圖41係僅基於右向的直線配線21g之疊紋成分的頻率分佈。另外，圖39及圖33所示之配線圖案的頻率分佈及圖40及圖41以及圖34、圖35及圖36所示之疊紋頻率分佈中之各成分的圓的面積所表示之強度的大小相同。FIG. 39 is a diagram of a two-dimensional frequency distribution of the wiring pattern 25e shown in FIG. 37. FIG. 40 is a frequency distribution of the moire of the wiring pattern 25e shown in FIG. 37, and is calculated by plotting each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 39. Figure of the moire composition. FIG. 41 shows the frequency distribution of the moiré component based on the right-handed straight wiring 21g only. In addition, the intensity distributions of the frequency distributions of the wiring patterns shown in FIGS. 39 and 33 and the areas of the circles of the components in the moire frequency distributions shown in FIGS. 40 and 41 and 34, 35, and 36 are shown in FIG. The same size.
在此，由僅基於圖35所示之右向的直線配線21e（參閱圖31）之疊紋頻率分佈可知，僅基於圖41所示之右向的直線配線21g（參閱圖38）之疊紋頻率分佈的低頻的疊紋少。
又，圖42係圖35的疊紋成分乘以上述式（1）的VTF而得到之疊紋頻率分佈的圖，圖43係圖41的疊紋成分乘以上述式（1）的VTF而得到之疊紋頻率分佈的圖。可知圖43的疊紋成分的總和小。
如此，藉由在“在2個方向以上的各個方向上配線的平均間距不同之配線圖案”中亦適用本發明的“將既定根數的配線的重複間距設為等間距，同時將既定根數的各個配線的間距設為非等間距之配線圖案”，能夠進一步減少疊紋。另外，在圖37中，僅對右方向的線配線圖案適用了本發明，但當然亦可以適用於左方向的配線圖案。Here, from the frequency distribution of the moire based on the right-handed straight wiring 21e (see FIG. 31) shown in FIG. 35, it is known that the moire is based only on the right-handed straight wiring 21g (see FIG. 38) shown in FIG. 41. The low-frequency moire of the frequency distribution is small.
42 is a graph of a moiré frequency distribution obtained by multiplying a moiré component of FIG. 35 by the VTF of the above formula (1), and FIG. 43 is a moiré component of FIG. 41 multiplied by a VTF of the above formula (1). A plot of the fringing frequency distribution. It can be seen that the sum of the moire components in FIG. 43 is small.
As described above, the present invention is also applicable to "a wiring pattern having different average pitches of wiring in each of two or more directions". "The repeating pitch of a predetermined number of wires is set to an equal pitch, and the predetermined number of wires is set at the same time." The pitch of each wiring is set to a non-equidistant wiring pattern ", which can further reduce the moire. In addition, in FIG. 37, the present invention is applied only to the line wiring pattern in the right direction, but it can be applied to the left wiring pattern as a matter of course.
但是，如已說明，當如本發明那樣將配線設為非等間距的配線圖案時，在配線的頻率中產生低頻成分，因此盡量在配線的平均間距窄的方向上適用非等間距的配線圖案時，能夠在配線不被人眼辨識之範圍內改變間距之餘地大，因此能夠減少疊紋之餘地大。
另外，與圖2所示之配線圖案25a的情況同樣地，圖37所示之第3實施例的配線圖案25e的情況係將4根配線設為非等間距來探討疊紋減少之結果，與圖2所示之配線圖案25a的情況同樣地，示出在結果上2根配線的重複間距幾乎成為等間距，亦即藉由2根配線的間距的最優化可得到同等的疊紋減少效果。However, as explained, when the wiring is set to a non-equidistant wiring pattern as in the present invention, low-frequency components are generated in the frequency of the wiring. Therefore, a non-equidistant wiring pattern should be applied in a direction where the average pitch of the wiring is narrow as much as possible In this case, there is a large margin for changing the pitch in a range where the wiring cannot be recognized by human eyes, and therefore a large margin for reducing the moire can be reduced.
In addition, as in the case of the wiring pattern 25a shown in FIG. 2, in the case of the wiring pattern 25e of the third embodiment shown in FIG. 37, the results of reducing the moire are compared with the four wirings having non-equal pitches, and Similarly, in the case of the wiring pattern 25 a shown in FIG. 2, it is shown that the repeating pitch of the two wirings becomes almost equal in the result, that is, the same effect of reducing the overlap can be obtained by optimizing the pitch of the two wirings.
（本發明的配線圖案的特徵總結與配線圖案的製作方法）
以下，總結本發明的配線圖案的特徵，並對本發明的導電性薄膜的配線圖案的製作方法進行說明。
若總結本發明的配線圖案的特徵，則本發明的配線圖案具有以下特徵。
・係將2個方向以上的直線配線重疊而成之網格狀的配線圖案或將1個方向以上的直線配線和另1個方向以上的非直線配線的線配線重疊而成之網格狀的配線圖案。
・在至少1個方向的直線配線中，
・既定根數的配線的重複間距為等間距，
・既定根數的各個配線的間距為非等間距。
又，本發明的配線圖案還具有以下特徵。
・由像素排列的亮度圖案和非等間距的直線配線的配線圖案導出之疊紋成分的總和（疊紋評價值）小於平均間距相同之等間距的直線配線的配線圖案的疊紋成分的總和。亦即，非等間距的直線配線的配線圖案的疊紋評價值小於非等間距的直線配線與既定根數的金屬細線的重複間距相等之等間距的直線配線的配線圖案的疊紋評價值（以下，將“非等間距的直線配線的配線圖案”亦簡稱為“非等間距的配線圖案”。又，將“等間距的直線配線的配線圖案”亦簡稱為“等間距的配線圖案”）。(Summary of the characteristics of the wiring pattern of the present invention and a method for manufacturing the wiring pattern)
Hereinafter, the characteristics of the wiring pattern of the present invention will be summarized, and a method of manufacturing the wiring pattern of the conductive film of the present invention will be described.
If the characteristics of the wiring pattern of this invention are summarized, the wiring pattern of this invention has the following characteristics.
・ It is a grid-like wiring pattern formed by overlapping linear wiring in two or more directions or a grid-like wiring pattern formed by overlapping linear wiring in one or more directions and non-linear wiring in one or more directions. Wiring pattern.
・ For straight wiring in at least one direction,
・ The repeating pitch of a predetermined number of wires is equal.
・ The pitch of each wiring of a predetermined number is non-equidistant.
The wiring pattern of the present invention has the following features.
・ The sum of the moiré components derived from the brightness pattern of the pixel arrangement and the wiring pattern of the non-equidistant straight wiring (the moiré evaluation value) is smaller than the sum of the moiré components of the wiring pattern of the straight wiring of the same pitch with the same average pitch. That is, the moire evaluation value of the wiring pattern of the non-equidly spaced straight line wiring is smaller than the moire evaluation value of the wiring pattern of the non-equidly spaced straight line wiring and the equal-spaced straight line wiring of a predetermined number of thin metal wires. Hereinafter, the "wiring pattern of non-equidistant linear wiring" is also simply referred to as "non-equidistant wiring pattern". Also, the "wiring pattern of equidistant linear wiring" is also simply referred to as "equal interval wiring pattern") .
其中，上述疊紋成分係使人眼的視覺響應特性起作用而得到之疊紋成分。使人眼的視覺響應特性起作用係指乘以上述式（1）所表示之視覺傳遞函數VTF（Dooley-Shaw的式）。另外，上述式（1）的觀察距離d設為100mm～1000mm的範圍的任一距離。其中，觀察距離係300mm～800mm中的任一值為較佳。其中，在本發明的實施例中，將觀察距離設為500mm。The moire component is a moire component obtained by making the visual response characteristics of the human eye work. Making the visual response characteristics of the human eye work means multiplying the visual transfer function VTF (Dooley-Shaw's formula) expressed by the above formula (1). The observation distance d in the above formula (1) is set to any distance in the range of 100 mm to 1000 mm. Among them, any one of the observation distances is preferably 300 mm to 800 mm. However, in the embodiment of the present invention, the observation distance is set to 500 mm.
又，疊紋成分的總和亦即疊紋的評價值I的計算方法使用在過去的視覺研究中作為概率加法運算模型的近似而由Quick等提唱之下述式（2）為較佳。
I=（Σ（R[i]）x
）1/x
……（2）
其中，R[i]表示疊紋的第i個頻率成分的強度，亦即VTF乘法運算後的各疊紋成分（參閱圖17、圖26、圖29、圖42及圖43）。又，次數x設為在過去的視覺研究中作為對視覺實驗結果良好地擬合（fit）之次數而提出之1～4的範圍中的任一值。作為代表性次數，採用由Quick提出之次數x=2。In addition, the calculation method of the sum value of the moire component, that is, the moire evaluation value I, is preferably an equation (2) described by Quick et al. As an approximation of a probability addition model in past visual studies.
I = (Σ (R [i]) x ) 1 / x …… (2)
Among them, R [i] represents the intensity of the i-th frequency component of the moire, that is, each moire component after the VTF multiplication operation (see FIGS. 17, 26, 29, 42 and 43). In addition, the number of times x is set to any value in the range of 1 to 4 which has been proposed as the number of times that the results of visual experiments are well fit in past visual studies. As the representative number, the number x = 2 proposed by Quick is used.
若將VTF乘法運算後的各疊紋成分（參閱圖17、圖26、圖29、圖42及圖43）中強度最大的成分定義為主疊紋成分，將基於本發明的非等間距的配線圖案之主疊紋成分定義為非等間距主疊紋成分，且將基於平均間距相同之等間距的配線圖案之主疊紋成分定義為等間距主疊紋成分，則本發明的配線圖案還具有以下中的任一特徵。
・非等間距主疊紋成分的強度小於等間距主疊紋成分。
・等間距主疊紋成分的頻率以下的頻率範圍中之疊紋成分的總和小於等間距的配線圖案。
又，若將成為產生主疊紋成分之原因之配線圖案的頻率成分定義為主配線頻率成分，將本發明的非等間距的配線圖案的主配線頻率成分定義為非等間距主配線頻率成分，將平均間距相同之等間距的配線圖案的主配線頻率成分定義為等間距主配線頻率成分，則本發明的配線圖案還具有以下中的任一特徵。
・非等間距主配線頻率成分的強度小於等間距主配線頻率成分。
・等間距主配線頻率成分的頻率下之強度小於等間距的配線圖案。If the most intense component of each moire component (refer to FIGS. 17, 26, 29, 42 and 43) after VTF multiplication is defined as the main moire component, the non-equidistant wiring based on the present invention will be used. The main moire component of the pattern is defined as a non-equidistant main moire component, and the main moire component of an equally-spaced wiring pattern based on the same average pitch is defined as a main moire component of equal pitch. The wiring pattern of the present invention also has Any of the following features.
・ The strength of the non-equidistant main moire component is less than that of the equally-spaced main moire component.
・ The sum of the moiré components in the frequency range below the frequency of the main moiré component of the equal pitch is smaller than the wiring pattern of the equal pitch.
In addition, if the frequency component of the wiring pattern that causes the main moire component is defined as the main wiring frequency component, and the main wiring frequency component of the non-equidistant wiring pattern of the present invention is defined as the non-equidistant main wiring frequency component, When the main wiring frequency components of the equally-spaced wiring patterns with the same average pitch are defined as the equally-spaced main wiring frequency components, the wiring pattern of the present invention also has any of the following features.
・ The intensity of the frequency components of the non-equidistant main wiring is smaller than that of the equal-distance main wiring.
・ The intensity of the frequency component of the equally-spaced main wiring is lower than that of the equally-spaced wiring pattern.
由本發明的“等間距主配線頻率成分的頻率下之強度小於等間距的配線圖案”的特徵，還可導出與本發明的配線的間距有關之特徵。在圖2及圖12所示之例子中進行具體說明。
在此，在圖2所示之例子中，2根配線的重複間距幾乎為等間距，但為了說明，將4根配線的重複間距視為等間距而進行說明。首先，圖12的配線圖案的主配線頻率成分的頻率係圖15的以黑箭頭表示之成分的頻率。在圖15中以黑箭頭表示之成分係從接近頻率0之一側起第5個成分。由於圖12的配線間距為101μm，所以圖15的第1個成分的頻率成為（1000μm/101μm=）約9.9週期/mm。另外，在此所說之頻率表示在配線的方向（與y方向所成之角度為26°）上之頻率。第5個成分的頻率成為（9.9週期/mm*5=）49.5週期/mm。
在本發明的圖2所示之例子中，該等間距主配線頻率成分的頻率49.5週期/mm下之強度（圖24的以黑箭頭表示之成分的強度）小，因此可導出與配線的間距有關之特徵。From the feature of the "equal-pitch main wiring frequency component, the intensity at a frequency smaller than that of the regular-pitch wiring pattern" of the present invention, the feature related to the pitch of the wiring of the present invention can be derived. This will be specifically described in the examples shown in FIGS. 2 and 12.
Here, in the example shown in FIG. 2, the repeating pitch of the two wirings is almost the same pitch, but for the sake of explanation, the repeating pitch of the four wirings will be described as an equal pitch. First, the frequency of the main wiring frequency component of the wiring pattern of FIG. 12 is the frequency of the component indicated by the black arrow in FIG. 15. The component indicated by the black arrow in FIG. 15 is the fifth component from one side closer to the frequency 0. Since the wiring pitch in FIG. 12 is 101 μm, the frequency of the first component in FIG. 15 becomes (1000 μm / 101 μm =) approximately 9.9 cycles / mm. In addition, the frequency mentioned here means the frequency in the wiring direction (the angle formed with the y direction is 26 °). The frequency of the fifth component is (9.9 cycles / mm * 5 =) 49.5 cycles / mm.
In the example shown in FIG. 2 of the present invention, the intensity at the frequency of the frequency component of the main wiring at the same pitch is 49.5 cycles / mm (the intensity of the component indicated by the black arrow in FIG. 24) is small. Related characteristics.
圖44的粗實線係在圖12的配線的透射率圖案中沿著配線的方向觀察1個方向的直線配線亦即右方向的直線配線21d或左方向的直線配線21c之一維輪廓。另外，為了說明，該粗實線的輪廓中將透射率的1和0反轉，亦即將無配線之部分的透射率設為0，將有配線之部分的透射率設為1。又，無窮小地表示配線的寬度。示出將第1個配線的位置設為0μm，從該配線起以101μm的等間距在位置101μm、202μm、303μm及404μm上分別有第2個、第3個、第4個及第5個配線之情況。在圖44中還示出主配線頻率成分的頻率49.5週期/mm的cos（餘弦）波（點線）及sin（正弦）波（實線）。圖44中之透射率輪廓乘以圖44的cos波及sin波而對所有位置進行了積分之值分別相當於主配線頻率成分的實部及虛部，實部與虛部的平方和的平方根成為主配線頻率成分的強度。由圖44可知，第1個～第5個配線全部屬於cos波成為正值之區間。在圖45中示出配線的透射率輪廓乘以cos波而得到之輪廓。第1個～第5個配線全部的透射率成為正值。該等配線的透射率的積分值為主配線頻率成分的在頻率49.5週期/mm下之實部，能夠理解該值變大。另外，由圖44可知，第1個～第5個配線全部分佈於sin波的0附近，因此乘以sin波而進行了積分之值變小，亦即在頻率49.5週期/mm下之虛部為接近0的值。亦即，在此能夠理解主配線頻率成分的強度由實部確定並成為大的值。The thick solid line in FIG. 44 is a one-dimensional outline of the straight line wiring in one direction, that is, the straight line wiring 21d in the right direction or the straight line wiring 21c in the left direction as viewed in the direction of the wiring in the transmittance pattern of the wiring shown in FIG. In addition, for the sake of explanation, the outline of the thick solid line is reversed by 1 and 0 of the transmittance, that is, the transmittance of the portion without wiring is set to 0, and the transmittance of the portion with wiring is set to 1. The width of the wiring is infinitely small. It is shown that the position of the first wiring is set to 0 μm, and from this wiring, there are second, third, fourth, and fifth wirings at positions 101 μm, 202 μm, 303 μm, and 404 μm at equal intervals of 101 μm. Situation. FIG. 44 also shows cos (cosine) waves (dotted lines) and sin (sine) waves (solid lines) at a frequency of 49.5 cycles / mm of the main wiring frequency component. The transmittance profile in FIG. 44 is multiplied by the cos wave and sin wave of FIG. 44 and the values integrated at all positions correspond to the real and imaginary parts of the main wiring frequency component, respectively. The square root of the sum of the squares of the real and imaginary parts becomes The intensity of the frequency component of the main wiring. As can be seen from FIG. 44, all of the first to fifth wirings belong to a section where the cos wave becomes a positive value. FIG. 45 shows a profile obtained by multiplying the transmittance profile of the wiring by the cos wave. The transmittances of all the first to fifth wirings are positive. The integrated value of the transmittance of these wirings is the real part of the main wiring frequency component at a frequency of 49.5 cycles / mm, and it can be understood that this value becomes larger. In addition, it can be seen from FIG. 44 that the first to fifth wirings are all distributed near 0 of the sin wave, so the value integrated by multiplying the sin wave becomes smaller, that is, the imaginary part at a frequency of 49.5 cycles / mm. Is a value close to 0. That is, it can be understood here that the intensity of the frequency component of the main wiring is determined by the real part and becomes a large value.
接著，在圖46中以粗實線示出在圖2所示之配線的透射率圖案中1個方向的直線配線亦即右方向的直線配線21a或左方向的直線配線21b的透射率圖案的一維輪廓。圖46只有透射率輪廓與圖44不同，其他與圖44相同。在圖46中，將第1個配線的位置設為0μm，從該配線起在位置71μm、202μm及272μm處分別有第2個、第3個及第4個配線。在此，4根配線的重複間距為（101μm*4=）404μm的等間距，因此第5個配線的位置成為404μm。又，由於4根配線以404μm的等間距重複，構成該配線圖案之所有頻率成分以404μm的間距重複，因此，在此僅著眼於404μm的區間的第1個～第4個配線即可（第5個配線為第1個配線的重複，第6個配線為第2個配線的重複、……。）。由圖46可知，第1個和第3個配線屬於cos波成為正值之區間，第2個和第4個配線屬於cos波成為負值之區間。將圖46的透射率輪廓乘以cos波而得到之輪廓示於圖47。由圖47可知，第1個和第3個配線的透射率成為正值，第2個和第4個配線的透射率成為負值。藉此，能夠理解將該等值進行了積分之等間距主配線頻率成分的頻率49.5週期/mm下之實部成為小的值。在此，由圖46可知，第1個～第4個配線全部分佈於sin波的0附近，因此乘以sin波而進行了積分之值變小，亦即頻率49.5週期/mm下之虛部為接近0的值。亦即，在此能夠理解主配線頻率成分的強度由實部確定並成為小的值。Next, in FIG. 46, the transmission lines of the wiring pattern shown in FIG. 2 in one direction, that is, the straight wiring 21a in the right direction or the transmission pattern of the straight wiring 21b in the left direction are shown by thick solid lines. One-dimensional outline. FIG. 46 differs from FIG. 44 only in the transmittance profile, and is otherwise the same as FIG. 44. In FIG. 46, the position of the first wiring is set to 0 μm, and from this wiring, there are second, third, and fourth wirings at positions of 71 μm, 202 μm, and 272 μm, respectively. Here, the repeating pitch of the four wirings is an equal pitch of (101 μm * 4 =) 404 μm, so the position of the fifth wiring becomes 404 μm. In addition, since the four wirings are repeated at an equal pitch of 404 μm, and all frequency components constituting the wiring pattern are repeated at a pitch of 404 μm, only the first to fourth wirings in the 404 μm section may be focused here. 5 wirings are the duplication of the first wiring, 6th wiring is the duplication of the second wiring, ...). It can be seen from FIG. 46 that the first and third wirings belong to a section where the cos wave becomes a positive value, and the second and fourth wirings belong to a section where the cos wave becomes a negative value. The profile obtained by multiplying the transmittance profile of FIG. 46 by the cos wave is shown in FIG. 47. As can be seen from FIG. 47, the transmittances of the first and third wirings have positive values, and the transmittances of the second and fourth wirings have negative values. Thereby, it can be understood that the real part at the frequency of 49.5 cycles / mm of the equally spaced main wiring frequency component in which the equivalent values are integrated becomes a small value. Here, it can be seen from FIG. 46 that the first to fourth wirings are all distributed near 0 of the sin wave, so the value integrated by multiplying the sin wave becomes smaller, that is, the imaginary part at a frequency of 49.5 cycles / mm. Is a value close to 0. That is, it can be understood here that the intensity of the frequency component of the main wiring is determined by the real part and becomes a small value.
藉由圖31的右方向的直線配線21e的配線圖案與圖38的右方向的直線配線21g的配線圖案的比較亦同樣地呈現上述情況。首先，圖31的右方向的直線配線21e的配線圖案的主配線頻率成分的頻率係圖33的以黑箭頭表示之成分的頻率。在圖33中以黑箭頭表示之成分係從接近頻率0之一側起第4個成分。將圖31所示之直線配線21e的配線間距設為79μm，圖33的第1個成分的頻率成為1000μm/79μm≒12.66週期/mm，第4個成分的頻率成為12.66週期/mm*4≒50.6週期/mm。
將該主配線頻率成分的頻率的cos波（點線）及sin波（實線）示於圖48。又，將圖31所示之右方向的直線配線21e的配線圖案的透射率輪廓（將1和0反轉）以粗實線亦示於圖48。表示將第1個配線的位置設為0μm，從該配線起以79μm的等間距在位置79μm、158μm、237μm及316μm處分別有第2個、第3個、第4個及第5個配線。在圖49中示出配線的透射率輪廓乘以cos波而得到之輪廓。The above situation is similarly shown by comparing the wiring pattern of the linear wiring 21 e in the right direction in FIG. 31 and the wiring pattern of the linear wiring 21 g in the right direction in FIG. 38. First, the frequency of the main wiring frequency component of the wiring pattern of the straight wiring 21e in the right direction in FIG. 31 is the frequency of the component indicated by the black arrow in FIG. 33. The component indicated by the black arrow in FIG. 33 is the fourth component from one side near the frequency 0. The wiring pitch of the linear wiring 21e shown in FIG. 31 is set to 79 μm, the frequency of the first component in FIG. 33 is 1000 μm / 79 μm ≒ 12.66 cycles / mm, and the frequency of the fourth component is 12.66 cycles / mm * 4 ≒ 50.6 Cycle / mm.
The cos wave (dotted line) and sin wave (solid line) of the frequency of the main wiring frequency component are shown in FIG. 48. The transmittance profile (inverting 1 and 0) of the wiring pattern of the straight line wiring 21e in the right direction shown in FIG. 31 is also shown in FIG. 48 as a thick solid line. It means that the position of the first wiring is set to 0 μm, and from this wiring, there are second, third, fourth, and fifth wirings at positions of 79 μm, 158 μm, 237 μm, and 316 μm at equal intervals of 79 μm. FIG. 49 shows a profile obtained by multiplying the transmittance profile of the wiring by the cos wave.
圖50的粗實線表示圖38所示之右方向的直線配線21g的配線圖案的透射率輪廓。圖50只有透射率輪廓與圖48不同，其他與圖48相同。在圖50中，將第1個配線的位置設為0μm，從該配線起在位置108μm、158μm及265μm處分別有第2個、第3個及第4個配線。在此，4根配線的重複間距為79μm*4=316μm的等間距，因此第5個配線的位置成為316μm。由圖50可知，第1個及第3個配線屬於cos波成為正值之區間，第2個和第4個配線屬於cos波成為負值之區間。
將圖50的透射率輪廓乘以cos波而得到之輪廓示於圖51。由圖51可知，第1個和第3個配線的透射率成為正值，第2個和第4個配線的透射率成為負值。藉此，能夠理解將該等值進行了積分之等間距主配線頻率成分的頻率50.6週期/mm下之實部成為小的值。在此，由圖50可知，第1個～第4個配線全部分佈於sin波的0附近，因此乘以sin波而進行了積分之值變小，亦即頻率50.6週期/mm下之虛部為接近0的值。亦即，在此能夠理解主配線頻率成分的強度由實部確定並成為小的值。The thick solid line in FIG. 50 indicates the transmittance profile of the wiring pattern of the linear wiring 21 g in the right direction shown in FIG. 38. FIG. 50 is different from FIG. 48 only in the transmittance profile, and the other is the same as FIG. 48. In FIG. 50, the position of the first wiring is set to 0 μm, and from this wiring, there are second, third, and fourth wirings at positions 108 μm, 158 μm, and 265 μm, respectively. Here, the repeating pitch of the four wirings is an equal pitch of 79 μm * 4 = 316 μm, so the position of the fifth wiring is 316 μm. It can be seen from FIG. 50 that the first and third wirings belong to a section where the cos wave becomes a positive value, and the second and fourth wirings belong to a section where the cos wave becomes a negative value.
The profile obtained by multiplying the transmittance profile of FIG. 50 by the cos wave is shown in FIG. 51. As can be seen from FIG. 51, the transmittances of the first and third wirings have positive values, and the transmittances of the second and fourth wirings have negative values. Thereby, it can be understood that the real part at a frequency of 50.6 cycles / mm of the equally-spaced main wiring frequency component obtained by integrating these values becomes a small value. Here, it can be seen from FIG. 50 that the first to fourth wirings are all distributed near 0 of the sin wave, so the value integrated by multiplying the sin wave becomes smaller, that is, the imaginary part at a frequency of 50.6 cycles / mm. Is a value close to 0. That is, it can be understood here that the intensity of the frequency component of the main wiring is determined by the real part and becomes a small value.
由以上說明總結與本發明的配線的間距有關之特徵。在圖44～圖47及圖48～圖51的例子中，在等間距的情況下，從第1個配線的第1個、第2個、第3個及第4個配線的間距全部屬於等間距主配線頻率成分的頻率的cos波成為正值之區間，另一方面，在本發明的非等間距的情況下，屬於cos波成為正值之區間之根數（第1個和第3個）與屬於成為負值之區間之根數（第2個和第4個）相等。在此，在圖44及圖48的例子中，4根配線全部屬於cos波成為正值之區間，但並不是等間距，當對間距賦予不規則性時，還有可能存在屬於cos波成為負值之區間之配線。亦即，第1個配線必定屬於cos波成為正值之區間（但間距為0），因此其他配線藉由不規則性的賦予而間距從等間距的配線的間距發生比±π/2大的相位的量的變化而還有可能屬於cos波成為負值之區間。
但是，即使單純地對間距賦予不規則性，屬於cos波成為正值之區間之配線和屬於成為負值之區間之配線的根數亦存在偏差。因此，乘以cos波而進行積分之結果，各配線的cos波乘法運算後的透射率存在正負的偏差，並不被充分抵消，其結果，等間距主配線頻率成分的頻率下之實部的絕對值的大小成為與本發明相比大的值。The above description summarizes the features related to the pitch of the wiring of the present invention. In the examples of FIG. 44 to FIG. 47 and FIG. 48 to FIG. 51, in the case of equal spacing, the pitches from the first, second, third, and fourth wirings of the first wiring are all equal. The cos wave of the frequency of the main wiring frequency component becomes a positive interval. On the other hand, in the case of the non-equidistant interval of the present invention, the number of roots belonging to the interval where the cos wave becomes positive (the first and the third) ) Is equal to the number of roots (second and fourth) belonging to the interval that becomes negative. Here, in the examples of FIGS. 44 and 48, all four wirings belong to the interval where the cos wave becomes a positive value, but they are not equally spaced. When irregularity is given to the distance, there may be a cos wave that becomes negative. Wiring in the range of values. That is, the first wiring must belong to the interval where the cos wave becomes a positive value (but the spacing is 0). Therefore, the spacing of other wirings from the spacing of the equally-spaced wirings is larger than ± π / 2 by the irregularity. The change in the amount of phase may also belong to the interval where the cos wave becomes negative.
However, even if the irregularity is simply given to the pitch, the number of wirings belonging to the interval where the cos wave becomes a positive value and the number of wirings belonging to the interval where the cos wave becomes a negative value are different. Therefore, as a result of multiplying the cos wave and integrating it, the transmittance of the cos wave multiplication of each wiring has a positive and negative deviation, which is not fully offset. As a result, the real part of the frequency of the frequency component of the main wiring at equal intervals The magnitude of the absolute value is a value larger than that of the present invention.
亦即，為了如本發明那樣充分減小等間距主配線頻率成分的頻率下之強度，需要以使屬於cos波成為正值之區間之配線與屬於成為負值之區間之配線的根數大致相等之方式將間距最優化。本發明中，在“等間距主配線頻率成分的頻率下之強度小於等間距的配線圖案”那樣對配線的間距的最優化進行探討之結果中，屬於cos波成為正值之區間之根數與屬於成為負值之區間之根數之差大致為±1以下。
另一方面，即使單純地將屬於cos波成為正值之區間之根數與屬於成為負值之區間之根數設為大致相等，亦存在等間距主配線頻率成分的頻率下之強度不會充分減小之情況。亦即，等間距主配線頻率成分的頻率下之強度為實部與虛部的平方和的平方根，因此不僅是實部，虛部亦需要減小。亦即，不僅是cos波（對應於實部），屬於sin波（對應於虛部）成為正值之區間之根數與屬於成為負值之區間之根數亦需要大致相等。但是，如圖46～圖47及圖50～圖51的例子那樣，各配線的間距在sin波的0附近的小的值的區間時，虛數對強度之貢獻小，因此即使屬於sin波成為正值之區間之根數與屬於成為負值之區間之根數存在偏差，使強度增大之影響亦小。That is, in order to sufficiently reduce the strength at the frequency of the frequency component of the equidistant main wiring as in the present invention, it is necessary to make the number of wirings belonging to the interval where the cos wave becomes positive and the number of wirings belonging to the interval to become negative. This method optimizes the pitch. In the present invention, as a result of examining the optimization of the pitch of the wiring such as "the intensity of the frequency component of the equally-spaced main wiring frequency is smaller than that of the equally-spaced wiring pattern", the number of roots and The difference in the number of roots belonging to the interval that becomes a negative value is approximately ± 1 or less.
On the other hand, even if the number of roots belonging to the interval where the cos wave becomes positive is equal to the number of roots belonging to the interval to become negative, the intensity at the frequency of the frequency component of the equal interval main wiring is not sufficient. Reduced case. That is, the intensity at the frequency of the equally spaced main wiring frequency component is the square root of the sum of the squares of the real part and the imaginary part, so not only the real part but also the imaginary part needs to be reduced. That is, not only the cos wave (corresponding to the real part), but also the number of roots belonging to the interval where the sin wave (corresponding to the imaginary part) becomes positive and the number of roots belonging to the interval which becomes negative. However, as in the examples of FIG. 46 to FIG. 47 and FIG. 50 to FIG. 51, when the distance between the wirings is in a small value interval near 0 of the sin wave, the contribution of the imaginary number to the intensity is small, so even if it belongs to the sin wave, it becomes positive There is a deviation between the number of roots of a value interval and the number of roots belonging to a negative interval, and the effect of increasing the intensity is also small.
綜上，如本發明那樣，為了充分減少等間距主配線頻率成分的頻率下之強度，需要將等間距主配線頻率成分的頻率的cos波或sin波中至少1個（對強度之貢獻大的一個）波屬於正值的區間之配線的根數與屬於負值的區間之配線的根數設為大致相等（±1根以下）。
將第1個配線的位置設為0，cos波成為正值之區間以（N-0.25）*T＜x＜（N+0.25）*T給出，成為負值之區間以（N+0.25）*T＜x＜（N+0.75）*T給出。另一方面，sin波成為正值之區間以N*T＜x＜（N+0.5）*T給出，成為負值之區間以（N+0.5）*T＜x＜（N+1.0）*T給出。其中，N表示0、1、……的整數。T表示等間距主配線頻率成分的週期，若將等間距主配線頻率成分的頻率設為F（週期/mm），則具有1000/F（μm）的關係。In summary, as in the present invention, in order to sufficiently reduce the intensity at the frequency of the equidistant main wiring frequency components, at least one of the cos waves or sin waves of the frequency of the equidistant main wiring frequency components needs to be made (A) The number of wirings in a section where the wave belongs to a positive value is set to approximately the same as the number of wirings in a section where the wave belongs to a negative value (± 1 or less).
Set the position of the first wiring to 0, the interval where the cos wave becomes positive is given by (N-0.25) * T <x <(N + 0.25) * T, and the interval when it becomes negative is (N + 0.25) * T <x <(N + 0.75) * T is given. On the other hand, the interval when the sin wave becomes positive is given by N * T <x <(N + 0.5) * T, and the interval when the sin wave becomes negative is (N + 0.5) * T <x <(N + 1.0) * T is given. Here, N represents an integer of 0, 1, .... T represents the period of the frequency components of the equally-spaced main wiring. If the frequency of the frequency components of the equally-spaced main wiring is set to F (cycle / mm), it has a relationship of 1000 / F (μm).
因此，可以說本發明的配線具有以下特徵。
・在將配線的既定根數設為n且將各個配線設為配線1、配線2、……、配線n時，將配線1作為原點之各個配線的間距p至少滿足下述條件1及條件2中的任一個。
條件1：間距屬於（N-0.25）*T＜p＜（N+0.25）*T的區間之金屬細線的根數與間距p屬於（N+0.25）*T＜p＜（N+0.75）*T的區間之金屬細線的根數的差分為1根以下。
條件2：間距p屬於N*T＜p＜（N+0.5）*T的區間之金屬細線的根數與間距p屬於（N+0.5）*T＜p＜（N+1.0）*T的區間之金屬細線的根數的差分為1根以下。
其中，T為平均間距相等之等間距配線的主配線頻率成分的週期，將等間距主配線頻率成分的頻率設為F（週期/mm）而以1000/F（μm）（1/F（mm））給出。又，N為0、1、……的整數，且為將平均間距設為PA而（n*PA/T）以下的整數。
上述特徵的條件1表示“cos波屬於正值的區間和負值的區間之配線的根數大致相等”的特徵。
上述特徵的條件2表示“sin波屬於正值的區間和負值的區間之配線的根數大致相等”的特徵。Therefore, it can be said that the wiring of the present invention has the following characteristics.
・ When the predetermined number of wirings is set to n and each wiring is set to wiring 1, wiring 2, ..., wiring n, the pitch p of each wiring with wiring 1 as the origin satisfies at least the following condition 1 and conditions Either of two.
Condition 1: The number of metal thin wires and the distance p between the interval (N-0.25) * T <p <(N + 0.25) * T and the interval p belong to (N + 0.25) * T <p <(N + 0.75) * The difference between the number of thin metal wires in the interval T is one or less.
Condition 2: The number of fine metal wires and the distance p between the interval p belonging to the interval of N * T <p <(N + 0.5) * T and the interval p belonging to the interval of (N + 0.5) * T <p <(N + 1.0) * T The difference in the number of thin metal wires is one or less.
Among them, T is the period of the frequency component of the main wiring of the equally-spaced equal-distance wiring, and the frequency of the frequency component of the equally-spaced main wiring is set to F (cycle / mm) and 1000 / F (μm) (1 / F (mm )) Gives. In addition, N is an integer of 0, 1, ..., and is an integer of (n * PA / T) or less with an average pitch of PA.
The condition 1 of the feature described above is a feature that "the number of wires of the cos wave belonging to a positive value interval and a negative value interval is approximately equal".
Condition 2 of the feature described above is a feature that "the number of wirings of the sin wave belonging to a positive value interval and a negative value interval is approximately equal".
另外，為了判斷上述特徵而將cos波或sin波屬於正值或負值的區間之配線的根數進行計數時，分別位於cos波或sin波的0附近之配線成為計數的誤差，因此將其除外為較佳。因此，能夠如下那樣重新定義上述特徵。
・在將配線的既定根數設為n且將各個配線設為配線1、配線2、……、配線n時，將配線1作為原點之各個配線的間距p至少滿足下述條件1及條件2中的任一個。
條件1：間距p屬於（N-d）*T＜p＜（N+d）*T的區間之金屬細線的根數與間距p屬於（N+0.5-d）*T＜p＜（N+0.5+d）*T的區間之金屬細線的根數的差分為1根以下。
條件2：間距p屬於（N+0.25-d）*T＜p＜（N+0.25+d）*T的區間之金屬細線的根數與間距p屬於（N+0.75-d）*T＜p＜（N+0.75+d）*T的區間之金屬細線的根數的差分為1根以下。In addition, in order to determine the above characteristics, when counting the number of wirings in which the cos wave or sin wave belongs to the interval of positive or negative value, the wiring located near 0 of the cos wave or sin wave, respectively, becomes a counting error. Except for better. Therefore, the above features can be redefined as follows.
・ When the predetermined number of wirings is set to n and each wiring is set to wiring 1, wiring 2, ..., wiring n, the pitch p of each wiring with wiring 1 as the origin satisfies at least the following condition 1 and conditions Either of two.
Condition 1: The number of metal wires and the distance p between the interval p belonging to the interval (Nd) * T <p <(N + d) * T and the interval p belonging to (N + 0.5-d) * T <p <(N + 0.5 + d) The difference in the number of thin metal wires in the interval * T is one or less.
Condition 2: The number p of the fine metal wires and the distance p between the interval p belonging to the interval (N + 0.25-d) * T <p <(N + 0.25 + d) * T and (N + 0.75-d) * T <p The difference in the number of metal thin wires in the section of <(N + 0.75 + d) * T is 1 or less.
其中，T係平均間距相等之等間距配線的主配線頻率成分的週期，將等間距主配線頻率成分的頻率設為F（週期/mm）而以1000/F（μm）（1/F（mm））給出。亦即，係將在等間距的配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之等間距的配線圖案的頻率成分的頻率設為F而以1/F給出之週期。或者，T係將在僅由金屬細線1、金屬細線2、......及金屬細線n中的任一金屬細線構成之配線圖案中成為對疊紋貢獻最大的疊紋的頻率成分的原因之金屬細線的配線圖案的頻率成分的頻率設為F而以1/F給出之週期。
又，N為0、1、……的整數（0或正的整數）且為將等間距的配線圖案的間距（平均間距）設為PA而（n*PA/T）以下的整數。
又，d為0.025～0.25的範圍中的任一值。
上述d表示以cos波或sin波的最大或最小的位置為中心之區間的範圍，當d為0.25時表示cos波或sin波成為正值或負值之區間的所有範圍，當d為0.025時表示cos波或sin波成為正值或負值之區間的1/10的範圍。d的值越小，越能夠僅將對實部或虛部的大小貢獻大的配線進行計數。Among them, the T is the period of the main wiring frequency component of the equally-spaced equal-distance wiring with equal average pitch. The frequency of the frequency component of the equally-spaced main wiring is set to F (cycle / mm) and 1000 / F (μm) (1 / F (mm )) Gives. That is, the frequency of the frequency component of the equally-spaced wiring pattern, which is the cause of the frequency component of the moire that contributes most to the moire among the equally-spaced wiring patterns, is set to F and the period is given as 1 / F. Alternatively, the T system will become the frequency component of the moire which contributes the moire most in the wiring pattern consisting of any of the metal fine wires 1, the metal fine wires 2, ..., and the metal fine wires n. The frequency of the frequency component of the wiring pattern of the thin metal wire is set to F and the period is given by 1 / F.
In addition, N is an integer (0 or a positive integer) of 0, 1,... And is an integer in which the pitch (average pitch) of the equally spaced wiring patterns is set to PA and equal to or less than (n * PA / T).
In addition, d is any value in the range of 0.025 to 0.25.
The above d indicates the range of the interval centered on the maximum or minimum position of the cos wave or sin wave. When d is 0.25, it means all the ranges of the interval where the cos wave or sin wave becomes positive or negative. When d is 0.025 A range of 1/10 of the interval where the cos wave or sin wave becomes a positive value or a negative value. The smaller the value of d, the more it is possible to count only the wirings that have a large contribution to the size of the real or imaginary part.
如已在“基於本發明之減少疊紋之原理”的項中所說明，將配線的既定根數設為n根，將僅抽出第1個配線、……、第n個配線之各個配線圖案定義為子配線圖案。如此一來，以相互抵消各個子配線圖案中所包含之導致產生疊紋之頻率成分之間距重疊而成之配線圖案係本發明的配線圖案。亦即，若將子配線圖案重疊於像素排列圖案上時被人眼辨識之最大的疊紋成分（VTF乘法運算後強度最大的疊紋成分）定義為子主疊紋成分，將成為產生子主疊紋成分之原因之子配線圖案的頻率成分定義為子主配線頻率成分，則將T作為子主配線頻率成分的週期而本發明的配線具有與上述完全相同之特徵。亦即，本發明的配線圖案的間距係抵消子配線圖案中所包含之成為疊紋的原因之各頻率成分之間距，因此至少針對成為最大的疊紋的原因之子主配線頻率成分，以滿足上述特徵之間距相互抵消。在此，子配線圖案的頻率成分包含等間距的配線圖案的頻率成分的頻率，同時在細n倍的頻率下存在，因此子主配線頻率成分與等間距主配線頻率成分當然並不一定一致。但是，在圖15的例子（圖21的例子）及圖33的例子中一致。As explained in the item of "the principle of reducing moire based on the present invention", if the predetermined number of wirings is set to n, only the first wiring, ..., each wiring pattern of the nth wiring will be extracted. Defined as a sub-wiring pattern. In this way, the wiring pattern formed by overlapping the pitches of the frequency components that cause the occurrence of moire included in the respective sub-wiring patterns is the wiring pattern of the present invention. That is, if the largest moire component recognized by the human eye when the sub-wiring pattern is superimposed on the pixel arrangement pattern (the mottled component with the strongest intensity after VTF multiplication) is defined as the sub-master moire component, it will become a sub-master motif. The frequency component of the sub-wiring pattern is defined as the frequency component of the sub-main wiring. The period of the frequency component of the sub-main wiring is T, and the wiring of the present invention has exactly the same characteristics as described above. That is, the pitch of the wiring pattern of the present invention cancels the distance between the frequency components of the sub-wiring pattern, which is the cause of the moire. Therefore, at least the sub-wiring frequency component of the cause of the largest moire is satisfied to satisfy the above. The distances between features cancel each other out. Here, the frequency components of the sub-wiring patterns include the frequencies of the frequency components of the equally-spaced wiring patterns and exist at a frequency of n times finer. Therefore, the frequency components of the sub-main wirings and the frequency components of the equally-spaced main wirings do not necessarily coincide. However, the example in FIG. 15 (the example in FIG. 21) and the example in FIG. 33 agree with each other.
如已說明，本發明對於對專利文獻2及3中之配線的間距賦予之不規則性，具有“既定根數的重複間距為等間距”的制約。如已提出之圖27～圖29那樣，若增多設為非等間距之根數，則配線圖案的頻率成分較細地擴大，在結果上導致產生細的複數個疊紋成分（作為不規則的雜訊而被辨識）。如已說明，在本發明人見識之結果中，為了在配線圖案不被辨識之狀態下充分減少疊紋，將設為非等間距之根數設為最多16根以下為良好。作為即使增加既定根數，減少疊紋之效果亦不會變或者反而變差之原因之一，本發明人認為是因為，如上所述，導致產生複數個疊紋成分，怎麼將配線的間距最優化，亦難以使複數個疊紋成分全部從被人眼辨識之低頻區域脫離（使複數個配線圖案的頻率成分全部遠離像素排列圖案的各頻率成分）。
本發明中，關於需要將既定根數的重複間距設為等間距及將既定根數設為最多16根以下為較佳之情況，在現有專利中連暗示之記載亦沒有。該制約亦可以說係本發明的特徵。As described above, the present invention has a restriction that "regular pitches of a predetermined number are equal pitches" to the irregularity given to the pitches of the wirings in Patent Documents 2 and 3. As has been proposed in Figures 27 to 29, if the number of non-equidistant pitches is increased, the frequency components of the wiring pattern are finely enlarged, and as a result, a plurality of fine moiré components (as irregular) are generated. Noise). As explained, in the results of the present inventors' knowledge, in order to sufficiently reduce the moire in a state where the wiring pattern is not recognized, it is good to set the number of non-equidistant pitches to a maximum of 16 or less. As one of the reasons why the effect of reducing the moire does not change or worsens even if the predetermined number is increased, the inventor believes that, as described above, a plurality of moire components are generated, how to maximize the pitch of the wiring Optimization also makes it difficult to separate all the moire components from the low-frequency region recognized by the human eye (to make all the frequency components of the plurality of wiring patterns away from each frequency component of the pixel arrangement pattern).
In the present invention, it is preferable to set the repeating pitch of a predetermined number to be an equal pitch and to set the predetermined number to a maximum of 16 or less, and there is no suggestion in the existing patent. This restriction can also be said to be a feature of the present invention.
關於配線圖案是否具有本發明的特徵，能夠容易由像素排列的發光亮度圖案和配線的透射率圖案來確定。根據配線圖案是否滿足如下要件來判斷即可：“係將2個方向以上的直線配線重疊而成之網格狀的配線圖案或將1個方向以上的直線配線與其他的1個方向以上的非直線配線的線配線重疊而成之網格狀的配線圖案”及“至少1個方向的直線配線的既定根數的配線的重複間距為等間距且既定根數的各個配線的間距為非等間距”。另外，判斷“非等間距的直線配線的配線圖案的各頻率成分的分佈”或“由像素排列圖案和非等間距的直線配線的配線圖案導出之疊紋成分的分佈”或“非等間距的直線配線的間距”是否滿足上述特徵即可。Whether or not the wiring pattern has the features of the present invention can be easily determined from the light emission luminance pattern of the pixel arrangement and the transmittance pattern of the wiring. It can be judged based on whether the wiring pattern satisfies the following requirements: "It is a grid-like wiring pattern formed by overlapping linear wirings in more than one direction or non-linear wirings in more than one direction with other one or more directions. Grid-like wiring pattern formed by overlapping linear wirings "and" repeated pitch of a predetermined number of wirings of at least one linear wiring in one direction is an equal pitch, and the pitch of each wiring of a predetermined number is a non-uniform pitch ". In addition, determine "the distribution of each frequency component of the wiring pattern of the non-equidly spaced linear wiring" or "the distribution of the moiré component derived from the pixel arrangement pattern and the wiring pattern of the non-equally spaced linear wiring" or "non-equally spaced It is sufficient if the "pitch of the linear wiring" satisfies the above characteristics.
以下，對用於導出本發明的配線圖案之實施方法進行說明。
與等間距的配線圖案的圖15、圖16及圖17所示之頻率分佈相比，本發明以圖24、圖25及圖26所示之頻率分佈的特徵來定義，又，與等間距的配線圖案的圖44或圖45所示之間距相比，以圖46或圖47所示之間距的特徵來定義，用於得到成為該等特徵性的頻率分佈和/或間距之配線圖案之方法並沒有限制。例如，可以將既定根數定為4根，導出圖14的像素排列圖案的頻率分佈，又，導出等間距時的圖15、圖16及圖17的分佈之後，藉由反覆試驗對4根配線的間距進行各種變更，導出如圖24、圖25及圖26那樣的頻率分佈，評價與等間距的情況相比可否減少疊紋，若可減少則選定，反覆進行以上處理來得到最佳的配線圖案。關於是否能夠減少疊紋，能夠由上述中所舉出之分佈如下進行判斷。
・參閱圖14，比較圖15和圖24來確定與像素排列圖案之疊紋成分變得最大之主配線頻率成分，評價該成分是否減小。
・比較圖16和圖25，評價在被人眼辨識之低頻區域例如5週期/mm以下的頻率區域中包含強度最大的主疊紋成分之各種疊紋成分是否減小。
・比較圖17和圖26，評價包含主疊紋成分之被人眼辨識之各種疊紋成分是否減小。Hereinafter, an implementation method for deriving the wiring pattern of the present invention will be described.
Compared with the frequency distribution shown in FIG. 15, FIG. 16, and FIG. 17 of the equally spaced wiring pattern, the present invention is defined by the characteristics of the frequency distribution shown in FIG. 24, FIG. 25, and FIG. 26. The distance between the wiring patterns shown in FIG. 44 or FIG. 45 is defined by the characteristics of the distance shown in FIG. 46 or FIG. 47, and a method for obtaining a wiring pattern that has such characteristic frequency distribution and / or pitch There are no restrictions. For example, the predetermined number of roots can be set to 4 to derive the frequency distribution of the pixel arrangement pattern of FIG. 14 and the distributions of FIGS. 15, 16, and 17 at the same interval. Various changes are made to the pitch to derive the frequency distribution as shown in Figures 24, 25, and 26. Evaluate whether the moire can be reduced compared to the case with equal spacing. If it can be reduced, select it. Repeat the above process to get the best wiring. pattern. Whether or not the moire can be reduced can be judged from the distributions mentioned above as follows.
・ Refer to FIG. 14 and compare FIG. 15 and FIG. 24 to determine the main wiring frequency component where the moire component with the pixel arrangement pattern becomes the largest, and evaluate whether the component decreases.
・ Comparing FIG. 16 and FIG. 25, it is evaluated whether various moire components including the main moire component having the strongest intensity are reduced in a low-frequency region recognized by the human eye, for example, a frequency region of 5 cycles / mm or less.
・ Compare FIG. 17 and FIG. 26 and evaluate whether or not various mottle components including the main mottle component are recognized by the human eye.
如上所述，能夠由人來導出如圖14、圖15、圖16、圖17、圖24、圖25及圖26那樣的分佈並藉由反覆試驗得到最佳的配線圖案。此時，如圖46及圖47那樣，可以著眼於主配線頻率成分的cos波及sin波與間距的關係而以乘以cos波或sin波而得到之透射率成為正或負值之配線的數量變均等之方式調整間距。另外，如圖46及圖47那樣的cos波及sin波與間距的關係圖不僅能夠對主配線頻率成分進行製作，對成為疊紋的原因之各種配線頻率成分亦同樣能夠進行製作。
又，如已說明，藉由如本發明那樣將配線間距設為非等間距，會產生比等間距的配線低的頻率成分，因此配線圖案有可能被辨識。因此，對藉由將配線間距設為非等間距而產生之低頻成分，例如對在既定根數為4根的情況下原來的等間距的配線的最小頻率的1/4、2/4及3/4的頻率，亦可以製作如圖46及圖47那樣的cos波及sin波與間距的關係圖。對配線的頻率成分中成為疊紋的原因之各頻率成分及對配線的可見性產生影響之低頻成分製作如圖46及圖47那樣的cos波及sin波與間距的關係圖，能夠一邊觀察該圖，一邊調整間距以免各個頻率成分變大。As described above, it is possible for a person to derive the distribution as shown in FIG. 14, FIG. 15, FIG. 16, FIG. 17, FIG. 24, FIG. 25, and FIG. 26 and obtain an optimal wiring pattern by repeated tests. At this time, as shown in FIG. 46 and FIG. 47, the number of wirings with positive or negative transmittance obtained by multiplying the cos wave or sin wave by focusing on the relationship between the cos wave, sin wave, and pitch of the main wiring frequency component can be used. Adjust the pitch in an equal way. In addition, the cos wave, sin wave, and pitch relationship diagrams as shown in Figs. 46 and 47 can be produced not only for the main wiring frequency components, but also for various wiring frequency components that cause moire.
As described above, by setting the wiring pitch to a non-equal pitch as in the present invention, a frequency component lower than that of the equi-pitch wiring is generated, so that the wiring pattern may be recognized. Therefore, for the low-frequency components generated by setting the wiring pitch to a non-equidistant pitch, for example, for a given number of four, the minimum frequency of the original equal-pitch wiring is 1/4, 2/4, and 3 For the frequency of / 4, the relationship between the cos wave, the sin wave, and the pitch as shown in Figs. 46 and 47 can also be produced. For the frequency components of the wiring, which are the cause of the moire and the low-frequency components that affect the visibility of the wiring, make the cos wave, sin wave, and spacing diagrams as shown in Figure 46 and Figure 47, and you can observe this figure , While adjusting the spacing to prevent each frequency component from becoming larger.
另外，對主配線頻率成分，以乘以cos波或sin波而得到之透射率成為正或負值之配線的數量盡量變均等之方式調整間距為較佳。然而，對於其他的對疊紋及配線可見性之貢獻小的頻率成分，無需拘泥於乘以cos波或sin波而得到之透射率成為正或負值之配線的數量變均等，只要能夠在影響小的範圍內減小即可。
如以上所說明，人能夠使用如圖14、圖15、圖16、圖17、圖24、圖25及圖26那樣的分佈，又，還使用如圖46及圖47那樣的圖藉由反覆試驗而得到最佳的配線圖案。另一方面，亦能夠自動得到最佳的配線圖案。In addition, it is preferable to adjust the pitch of the main wiring frequency component such that the number of wirings whose transmittance becomes positive or negative obtained by multiplying the cos wave or sin wave is made as uniform as possible. However, for other frequency components that contribute little to the moire and wiring visibility, there is no need to stick to the number of wirings with positive or negative transmittance obtained by multiplying the cos wave or sin wave, as long as it can affect It can be reduced within a small range.
As described above, one can use the distributions shown in Figs. 14, 15, 16, 17, 17, 24, 25, and 26, and also use the graphs shown in Figs. 46 and 47 to perform repeated experiments. The best wiring pattern is obtained. On the other hand, an optimal wiring pattern can be obtained automatically.
以下，對用於自動得到最佳的配線圖案之本發明的導電性薄膜的配線圖案的製作方法進行說明。亦即，對本發明的導電性薄膜的配線圖案的自動最優化方法進行說明。
在圖52中示出本發明的導電性薄膜的配線圖案的製作方法的流程。
另外，以下，作為本發明的導電性薄膜的配線圖案，以被重疊之所有方向的線配線為直線配線的情況為前提進行說明，但當被重疊之線配線中還包含非直線配線的線配線時，對除非直線配線的線配線以外之各方向的直線配線，按照圖52的流程導出疊紋值總和成為最小之間距和角度來製作配線圖案即可。在該情況下，至少對除非直線配線的線配線以外之各方向的直線配線，能夠得到疊紋比等間距的配線圖案少的最佳的配線圖案。
首先，在步驟S10中，預先準備顯示器的像素排列的亮度圖案。像素排列的亮度圖案可以為利用顯微鏡等拍攝之圖像資料，亦可以像素排列圖案的數字資料乘以適當的模糊函數或進行捲積來製作。模糊函數由用拍攝自顯示器之圖像的像素排列的亮度圖案的模糊程度來確定為較佳。
另外，在此準備之像素排列的亮度圖案當然係將本像素排列實際發光時的亮度圖案再現者為較佳。亦即，當使用用顯微鏡等拍攝之圖像資料作為像素排列的亮度圖案時，或者依據用顯微鏡等拍攝之圖像確定像素排列的亮度圖案的模糊函數時，當然由顯微鏡等攝影系統所引起之模糊的影響少為較佳。亦即，用如下系統進行拍攝為較佳，該系統充分包含本像素排列實際發光時的亮度圖案的高頻成分而以不使其減少之狀態進行拍攝。因由攝影系統所引起之模糊而導致在所拍攝之圖像中像素排列的亮度圖案的高頻成分減少時，將補償了該減少之圖像資料作為像素排列的亮度圖案或者依據經補償之圖像資料確定模糊函數為較佳。
又，在步驟S10中，預先導出至二維頻率分佈為佳。
接著，在步驟S12中，將方向i設定為1（i=1）。Hereinafter, a method for producing a wiring pattern of the conductive film of the present invention for automatically obtaining an optimal wiring pattern will be described. That is, the automatic optimization method of the wiring pattern of the conductive film of this invention is demonstrated.
FIG. 52 shows a flow of a method for manufacturing a wiring pattern of a conductive film according to the present invention.
In the following, the wiring pattern of the conductive film of the present invention will be described on the premise that the line wiring in all directions is a linear wiring. However, the line wiring that is overlapped also includes a non-linear wiring. In this case, for the linear wiring in all directions other than the linear wiring, the wiring pattern may be created by deriving the sum of the values of the moire to the minimum pitch and angle according to the flow of FIG. 52. In this case, it is possible to obtain an optimal wiring pattern having less moire than a wiring pattern having an equal pitch for at least linear wiring in all directions other than the linear wiring.
First, in step S10, a brightness pattern of a pixel arrangement of a display is prepared in advance. The brightness pattern of the pixel arrangement may be image data taken with a microscope or the like, or the digital data of the pixel arrangement pattern may be multiplied by an appropriate blur function or convolution. The blur function is preferably determined by the degree of blur of a brightness pattern using a pixel arrangement of an image taken from a display.
In addition, it is a matter of course that the brightness pattern of the pixel array prepared here is preferably a brightness pattern reproducer when the pixel array actually emits light. That is, when image data taken with a microscope or the like is used as the brightness pattern of the pixel arrangement, or when a blur function of the brightness pattern of the pixel arrangement is determined based on an image taken with the microscope or the like, it is of course caused by a photography system such as a microscope. It is better if the influence of blur is small. That is, it is better to take a picture with a system that fully includes the high-frequency component of the luminance pattern when the pixel array actually emits light, and shoots without reducing it. When the high-frequency component of the brightness pattern of the pixel arrangement in the captured image is reduced due to the blur caused by the photography system, the reduced image data is used as the brightness pattern of the pixel arrangement or based on the compensated image The data confirms that the fuzzy function is better.
In step S10, a two-dimensional frequency distribution is preferably derived in advance.
Next, in step S12, the direction i is set to 1 (i = 1).
接著，在步驟S14中，獲取導電性薄膜的配線圖案的方向i的平均配線間距和角度。
接著，在步驟S16中，利用以下敘述之方法計算處理非等間距的配線圖案的疊紋值。
接著，在步驟S18中，利用以下敘述之方法，與平均配線間距及角度建立對應關聯而將所計算出之疊紋值和非等間距資訊記憶於記憶體等。
接著，在步驟S20中，判斷是否存在應獲取之方向i的平均配線間距和角度。
若存在應獲取之方向i的平均配線間距和角度（是），則返回到步驟S14，獲取所需之方向i的平均配線間距和角度，並反覆進行步驟S14～步驟S20。該循環（loop）係指對平均配線間距和角度進行各種變更之循環。
另一方面，當不存在應獲取之方向i的平均配線間距和角度（否）時，進入步驟S22。Next, in step S14, the average wiring pitch and angle in the direction i of the wiring pattern of the conductive film are obtained.
Next, in step S16, the moire value of the wiring pattern with non-equal pitch is calculated and processed by the method described below.
Next, in step S18, the method described below is used to associate the average wiring pitch and the angle with each other, and the calculated moire value and non-equidistant pitch information are stored in a memory or the like.
Next, in step S20, it is determined whether there is an average wiring pitch and angle in the direction i that should be acquired.
If there is an average wiring pitch and angle of the direction i to be obtained (Yes), return to step S14, obtain the average wiring pitch and angle of the required direction i, and repeat steps S14 to S20. The loop refers to a cycle in which various changes are made to the average wiring pitch and angle.
On the other hand, when there is no average wiring pitch and angle (No) in the direction i to be acquired, the process proceeds to step S22.
在步驟S22中，判斷方向i是否為n（i=n）（是否殘留有方向i）。
當方向i不是n（i≠n）（否）時，在步驟S24中，將方向i設為i+1（i=i+1）並返回到步驟S14，反覆進行步驟S14～步驟S20。
當方向i為n（i=n）（是）時，進入步驟S26。
接著，在步驟S26中，將方向1的疊紋值、方向2的疊紋值、……、方向n的疊紋值的總和設為疊紋值總和（疊紋評價值）而導出疊紋值總和成為最小之各方向i的間距和角度。
如此，結束本發明的導電性薄膜的配線圖案的製作方法。In step S22, it is determined whether the direction i is n (i = n) (whether the direction i remains).
When the direction i is not n (i ≠ n) (No), in step S24, the direction i is set to i + 1 (i = i + 1) and the process returns to step S14, and steps S14 to S20 are repeatedly performed.
When the direction i is n (i = n) (YES), the process proceeds to step S26.
Next, in step S26, the sum of the moire values in the direction 1, the moire values in the direction 2, ..., and the direction n is set to the sum of the moire values (moire evaluation value), and the moire value is derived. The sum becomes the smallest pitch and angle in each direction i.
In this way, the method for producing a wiring pattern of the conductive film of the present invention is completed.
在此，作為方向1、方向2、……、方向n的疊紋值的總和的計算方法，可以利用線性和來計算。亦即，可以利用以下式來計算總和。
方向1的疊紋值+方向2的疊紋值+……+方向n的疊紋值
但是，在非等間距疊紋計算處理中，藉由後述之概率性的加法運算來計算疊紋值時，其總和亦藉由概率性的加法運算來計算為較佳。亦即，利用以下式來計算總和為較佳。
（方向1的疊紋值X
+方向2的疊紋值X
+……+方向n的疊紋值X
）1/x
其中，次數x設為與非等間距的疊紋值計算處理中之概率加法運算的次數相同之值。Here, as the calculation method of the sum of the moire values in the direction 1, the direction 2, ..., and the direction n, a linear sum can be used for calculation. That is, the total can be calculated using the following formula.
The moire value in the direction 1 + the moire value in the direction 2 + ... + the moire value in the direction n. However, in the non-equidistant moire calculation processing, when the moire value is calculated by the probability addition described later. , Its sum is also calculated by a probabilistic addition operation. That is, it is better to calculate the sum using the following formula.
(Value 1 in the direction moiré Moire value X + X + 2 in the direction of the direction of the n + ...... moiré value X) 1 / x
Here, the number of times x is set to the same value as the number of times of probability addition in the non-equidistant moire value calculation process.
又，欲單純地導出在方向1、……、方向n的所有方向的配線間距與角度的組合中疊紋值成為最小之組合時，分別導出單純地在方向1、……、方向n的各個循環中疊紋值成為最小之配線間距和角度即可（無需與配線間距及角度建立對應關聯而記憶疊紋值）。但是，當需要僅限定於關於配線間距和角度而滿足某些條件之組合時，如圖52那樣，成為如下方法：首先，與各方向的配線間距及角度建立對應關聯而記憶疊紋值，最後，僅限定於各方向的配線間距與角度的組合中滿足條件之組合而導出疊紋值總和成為最小之組合。例如，在配線的透射率的觀點上欲對每單位面積的配線的根數設定限制時，成為如下方法：將方向1的配線的平均間距設為p1，將方向2的配線的平均間距設為p2、……，將方向n的配線的平均間距設為pn，僅限定於1/p1+1/p2+……+1/pn成為既定值以下之組合而計算疊紋值總和來導出成為最小之組合。In addition, when it is desired to simply derive the combination in which the moire value is the smallest among the combinations of the wiring pitch and angle in all directions 1, ..., and direction n, each of the directions simply in directions 1, ..., and direction n is derived. It is sufficient that the moire value becomes the smallest wiring pitch and angle in the cycle (there is no need to establish a corresponding relationship with the wire pitch and angle and memorize the moire value). However, when a combination that meets certain conditions is required only with respect to the wiring pitch and angle, as shown in FIG. 52, it becomes the following method: First, the correspondence with the wiring pitch and angle in each direction is associated and the moire value is memorized, and finally , Only the combinations that satisfy the conditions among the combinations of the wiring pitch and angle in each direction are derived, and the combination that the sum of the moire values becomes the smallest is derived. For example, when it is desired to set a limit on the number of wirings per unit area from the viewpoint of the transmittance of the wirings, the method is as follows: Let the average pitch of the wiring in the direction 1 be p1 and the average pitch of the wiring in the direction 2 be p2, ..., the average pitch of the wiring in the direction n is set to pn, which is limited to the combination of 1 / p1 + 1 / p2 + ... + 1 / pn below the predetermined value. combination.
又，將方向1、方向2、……、方向n的角度範圍設為0～180°（與x方向所成之角度），並使各個角度範圍不重疊（不包含相同之方向）。當方向為4個時，例如將方向1的角度範圍設定為0度以上且小於45度，將方向2的角度範圍設定為45度以上且小於90度，將方向3的角度範圍設定為90度以上且135度以下，將方向4的角度範圍設定為超過135度且180度以下。又，當方向為2個時，例如將方向1的角度範圍設定為0度以上且小於90度，將方向2的角度範圍設定為90度以上且180度以下。在此，當像素排列圖案如圖11那樣左右對稱時，像素排列圖案的二維頻率分佈亦如圖14那樣成為左右對稱，因此若已導出成為左右對稱之角度的疊紋值及非等間距資訊，則可以將該資訊轉用於成為左右對稱之另一個角度。例如，當方向為2個時且對方向1的角度範圍0度以上且小於90度的各角度、平均間距，導出疊紋值和非等間距資訊之後，將該資訊轉用於方向2的角度範圍超過90度且180度以下的成為對稱之角度即可。In addition, the angle range of direction 1, direction 2, ..., direction n is set to 0 to 180 ° (the angle formed with the x direction), and the angle ranges are not overlapped (the same direction is not included). When there are four directions, for example, the angle range of direction 1 is set to 0 degrees or more and less than 45 degrees, the angle range of direction 2 is set to 45 degrees or more and less than 90 degrees, and the angle range of direction 3 is set to 90 degrees. Above and below 135 degrees, the angle range of direction 4 is set to exceed 135 degrees and below 180 degrees. When there are two directions, for example, the angular range of the direction 1 is set to 0 degrees or more and less than 90 degrees, and the angular range of the direction 2 is set to 90 degrees or more and 180 degrees or less. Here, when the pixel arrangement pattern is bilaterally symmetric as shown in FIG. 11, the two-dimensional frequency distribution of the pixel arrangement pattern is also bilaterally symmetric as shown in FIG. , You can transfer that information to another angle of left-right symmetry. For example, when there are two directions and the angle range for direction 1 is from 0 degrees to less than 90 degrees for each angle and average interval, after deriving the moire value and non-equidistant information, the information is transferred to the direction 2 angle. It is sufficient if the range is more than 90 degrees and 180 degrees or less to be a symmetrical angle.
另外，欲單純地導出在方向1、方向2、……、方向n的所有方向的配線間距與角度的組合中疊紋值成為最小之組合時（在無需以與配線間距和角度有關之某些條件來限定組合時）且方向1、方向2、……、方向n的角度範圍為左右對稱時，若導出有在成為左右對稱之方向上疊紋值成為最小之配線間距和角度，則可以將該資訊轉用於成為左右對稱之另一個方向（角度轉換為左右對稱的角度）。例如，當方向為2個時，導出方向1的角度範圍為0度以上且小於90度並且疊紋值成為最小之配線間距和角度，即使該配線間距和角度（左右對稱的角度）為方向2的角度範圍超過90度且180度以下，疊紋值亦會成為最小之配線間距及角度。In addition, to simply derive the combination where the moire value is the smallest among the combinations of wiring pitch and angle in all directions of direction 1, direction 2, ..., direction n (when it is not necessary to use some of the wiring pitch and angle If the angle range of direction 1, direction 2, ..., direction n is left-right symmetry, if the wiring pitch and angle that minimizes the overlap value in the direction of left-right symmetry are derived, then This information is used to become the other direction of the left-right symmetry (the angle is converted to the left-right symmetry angle). For example, when there are two directions, the lead range and angle of direction 1 are 0 degrees or more and less than 90 degrees, and the moire value is the smallest, even if the wire pitch and angle (left-right symmetrical angle) is direction 2. If the angle range is more than 90 degrees and less than 180 degrees, the moire value will also become the smallest wiring pitch and angle.
另外，雖然需要探索時間，但可以探索方向1、方向2、……、方向n的所有角度範圍0～180度（可以擴大各個方向的探索角度範圍並重疊）。如此容許重疊而分別探索寬的角度範圍，藉此有可能比不重疊更能夠減小疊紋值。這是因為，存在在特定的角度範圍內存在複數個疊紋值減小之角度之情況。例如，當在角度範圍0～180度中0度以上且小於45度的角度範圍內存在疊紋值變得最小之角度，而且還存在疊紋值變得其次小的角度時，若將方向1的配線圖案的角度設為在0度以上且小於45度的角度範圍內疊紋值變得最小之角度，將方向2的配線圖案的角度設為在相同之0度以上且小於45度的角度範圍內疊紋值變得其次小的角度，則比在與0度以上且小於45度的角度範圍不同之另一角度範圍內探索方向2的配線圖案的角度更能夠減小疊紋值。但是，當如此容許重疊而分別探索寬的角度範圍時，最後導出疊紋值總和成為最小之方向1、方向2、……、方向n的配線的間距與角度的組合時，需注意避免使方向1、方向2、……、方向n的角度變得相同。In addition, although exploration time is required, all angle ranges of direction 1, direction 2, ..., direction n can be explored from 0 to 180 degrees (the range of exploration angles in each direction can be expanded and overlapped). In this way, overlapping is allowed to be explored separately and a wide angular range is explored, thereby making it possible to reduce the moire value more than not overlapping. This is because there may be a plurality of angles where the moire value decreases in a specific angle range. For example, when there is an angle where the moire value becomes the smallest in an angle range of 0 to 180 degrees and less than 45 degrees, and there is also an angle where the moire value becomes the next smallest, if the direction is 1 The angle of the wiring pattern is set to an angle where the moire value becomes the smallest in an angle range of 0 degrees or more and less than 45 degrees, and the angle of the wiring pattern in direction 2 is set to the same angle of 0 degrees or more and less than 45 degrees. The angle at which the moire value becomes the next-smallest in the range can reduce the moire value more than the angle of the wiring pattern in the search direction 2 in another angle range different from the angle range of 0 degrees or more and less than 45 degrees. However, when overlapping is explored to allow a wide range of angles, the combination of the pitch and angle of the direction 1, direction 2, ..., direction n where the sum of the moire values becomes the smallest is derived, and care must be taken to avoid making the direction The angles of direction 1, direction 2, ..., direction n become the same.
又，可以限定方向1、方向2、……、方向n中改變配線間距和角度之方向。當方向為4個時，例如可以將方向2的角度設為67.5度，將方向3的角度固定為112.5度，並且與方向2和方向3一同將配線間距亦固定為既定值，僅對方向1和方向4，改變配線間距和角度而導出疊紋值成為最小之組合。
又，關於不包含非等間距之方向，無需進行“非等間距疊紋值計算處理”，只要對指定的配線間距和角度計算疊紋值即可。疊紋值的計算方法如已說明那樣，但現在簡單說明一下。首先，以指定的配線間距和角度製作配線的透射率圖案並導出二維頻率分佈。接著，由像素排列的亮度圖案的二維頻率分佈和配線的透射率圖案的二維頻率分佈導出疊紋成分。最後，對各疊紋成分乘以VTF之後，計算總和，將其作為疊紋值。In addition, directions in which the wiring pitch and angle are changed in the direction 1, the direction 2, ..., and the direction n may be limited. When there are four directions, for example, the angle of direction 2 can be set to 67.5 degrees, the angle of direction 3 can be fixed to 112.5 degrees, and the wiring pitch can also be fixed to a predetermined value together with direction 2 and direction 3. Only for direction 1 With direction 4, change the wiring pitch and angle to derive the combination that minimizes the moire value.
Also, for directions that do not include non-equidistant pitch, it is not necessary to perform "non-equidistant pitch moire value calculation processing", as long as the moiré value is calculated for the specified wiring pitch and angle. The calculation method of the moire value is as described, but it will be briefly explained now. First, a transmittance pattern of the wiring is made at a specified wiring pitch and angle, and a two-dimensional frequency distribution is derived. Next, the moire component is derived from the two-dimensional frequency distribution of the luminance pattern of the pixel arrangement and the two-dimensional frequency distribution of the transmittance pattern of the wiring. Finally, after multiplying each moire component by VTF, the sum is calculated and used as the moire value.
以下，關於非等間距配線圖案的疊紋值的計算處理（圖52的步驟S16），記載3種實施方法。
（非等間距配線圖案的疊紋值計算處理的實施方法1）
在圖53中示出本發明中之非等間距配線圖案的疊紋值計算處理的實施方法1的流程。
該方法中，預先準備既定根數的非等間距的配線間距的資訊，對該等間距全部進行評價。
首先，在步驟S30中，預先準備既定根數的非等間距的配線間距的資訊，獲取並指定既定根數的非等間距的配線間距的資訊。
接著，在步驟S32中，以所指定之配線間距製作配線的透射率圖案，並導出二維頻率分佈。In the following, three implementation methods are described regarding the calculation processing of the moire value of the non-equidistance wiring pattern (step S16 in FIG. 52).
(Implementation method 1 for calculating the moire value of a non-equidistance wiring pattern)
FIG. 53 shows a flowchart of a first implementation method of a moire value calculation process for a non-equidistant wiring pattern in the present invention.
In this method, information on non-equidistant wiring pitches of a predetermined number is prepared in advance, and all of the equal pitches are evaluated.
First, in step S30, information on non-equidistant wiring pitches of a predetermined number is prepared in advance, and information on non-equidistant wiring pitches of a predetermined number is obtained and specified.
Next, in step S32, a transmittance pattern of the wiring is created with the specified wiring pitch, and a two-dimensional frequency distribution is derived.
接著，在步驟S34中，使用像素排列圖案的二維頻率分佈及配線圖案的二維頻率分佈導出疊紋成分。
接著，在步驟S36中，由疊紋成分導出疊紋評價值。
接著，在步驟S38中，若疊紋評價值比所記憶之疊紋評價值變得良好，則記憶該變得良好之間距資訊。
接著，在步驟S40中，當在預先準備之既定根數的非等間距的配線間距的資訊中殘留有未求出疊紋評價值之既定根數的非等間距的配線間距的資訊且存在應指定之既定根數的非等間距的配線間距的資訊（是）時，返回到步驟S30，反覆進行步驟S30～步驟S38。
另一方面，當不存在應指定之既定根數的非等間距的配線間距的資訊（否）時，結束非等間距配線圖案的疊紋值計算處理的實施方法1。Next, in step S34, the moire component is derived using the two-dimensional frequency distribution of the pixel arrangement pattern and the two-dimensional frequency distribution of the wiring pattern.
Next, in step S36, a moire evaluation value is derived from the moire component.
Next, in step S38, if the moire evaluation value becomes better than the memorized moire evaluation value, then the memorizing interval information should be memorized.
Next, in step S40, information on a non-equidistant wiring pitch of a predetermined number for which a moire evaluation value has not been obtained remains in the information on a non-equidistant wiring pitch of a predetermined number prepared in advance, and there should be If the predetermined number of non-equidistant wiring pitch information is specified (YES), the process returns to step S30, and steps S30 to S38 are repeated.
On the other hand, when there is no information (No) about the non-equidistant wiring pitches of a predetermined number to be specified, the implementation method 1 of the moire value calculation processing of the non-equidistant wiring patterns is ended.
關於非等間距的配線間距的資訊（非等間距的資訊），對等間距賦予預定之範圍的隨機數之方法簡單。
在圖52的流程中，對平均配線間距進行各種變更。因此，為了對各個平均配線間距隨意使用相同之非等間距資訊，以相對於平均間距之比率的資訊準備非等間距資訊為佳。例如，當既定根數為4根時，設為如下資訊。
-0.055154472 1.009144324 2.087233728 3.073827362
0.048012206 0.980814732 1.931622256 3.008651204
0.043818677 0.915255691 1.956276096 2.940351965
……As for the information on the non-equidistant wiring pitch (non-equidistant pitch), a method of assigning a random number in a predetermined range to the equal pitch is simple.
In the flow of FIG. 52, various changes are made to the average wiring pitch. Therefore, in order to arbitrarily use the same non-equidistant information for each average wiring pitch, it is better to prepare non-equidistant information with information on the ratio to the average pitch. For example, when the predetermined number is four, the following information is set.
-0.055154472 1.009144324 2.087233728 3.073827362
0.048012206 0.980814732 1.931622256 3.008651204
0.043818677 0.915255691 1.956276096 2.940351965
...
上述係將4根配線與第1個配線的間距分別設為0、1、2及3並對其分別賦予-0.1～+0.1的範圍的隨機數而得到之間距的資訊。上述資訊由既定數的第1個～第4個配線的間距組合的資訊構成。組合的數量越多，越能夠以很多非等間距的組合來評價疊紋，發現疊紋更小的間距組合之概率升高（但是，探索時間延長）。如上所述，藉由以比率的資訊預先具備間距，能夠對任意的平均間距隨意使用。例如，對平均間距200μm，根據間距資訊“-0.055154472 1.009144324 2.087233728 3.073827362”能夠得到“-11μm 202μm 417μm 615μm”的非等間距組合。
又，在此，作為非等間距組合，在平均間距乘以比率的間距資訊之後將小數第1位進行了四捨五入。
疊紋成分的導出方法及疊紋評價值的導出方法如已所說明。作為疊紋評價值而導出VTF乘法運算後的各疊紋成分的強度的總和時的總和的導出方法，將在後面進行說明。The above-mentioned information is obtained by setting the distance between the four wirings and the first wiring to 0, 1, 2, and 3 and assigning random numbers in the range of -0.1 to +0.1, respectively. The above-mentioned information is composed of a predetermined number of combinations of pitches of the first to fourth wirings. The greater the number of combinations, the more the moire can be evaluated with many non-equidistant combinations, and the probability of finding a mottled combination with a smaller moiré is increased (however, the exploration time is prolonged). As described above, the pitch information is provided in advance, so that an arbitrary average pitch can be used arbitrarily. For example, for an average pitch of 200 μm, according to the pitch information “-0.055154472 1.009144324 2.087233728 3.073827362”, a non-equidistant combination of “-11 μm 202 μm 417 μm 615 μm” can be obtained.
Here, as the non-equidistant pitch combination, the average pitch multiplied by the pitch pitch information is rounded to the first decimal place.
The method for deriving the moire component and the method for deriving the moire evaluation value are as described above. The method of deriving the sum when the sum of the intensities of the respective moire components after the VTF multiplication is derived as the moire evaluation value will be described later.
（非等間距配線圖案的疊紋值計算處理的實施方法2）
在圖54中示出本發明中之非等間距配線圖案的疊紋值計算處理的實施方法2的流程。
該方法係既定根數為4根的情況，對各配線在預定在等間距的配線的間距±之範圍內以預定之刻度變更間距來進行疊紋評價。
首先，在步驟S50中，作為第1個配線間距，在預定在等間距的配線的間距±之範圍內預先準備預定之刻度，並依序指定第1個配線間距。
接著，在步驟S52中，作為第2個配線間距，在預定在等間距的配線的間距±之範圍內預先準備預定之刻度，並依序指定第2個配線間距。
接著，在步驟S54中，作為第3個配線間距，在預定在等間距的配線的間距±之範圍內預先準備預定之刻度，並依序指定第3個配線間距。
接著，在步驟S56中，作為第4個配線間距，在預定在等間距的配線的間距±之範圍內預先準備預定之刻度，並依序指定第4個配線間距。(Implementation method 2 for calculating the moire value of non-equidistance wiring patterns)
FIG. 54 shows a flowchart of a second implementation method of the moire value calculation process of the non-equidistance wiring pattern in the present invention.
This method is a case where the predetermined number of wires is four, and each wire is changed in a predetermined scale within a range of the distance between the wires of an equal-spaced wire, and the pitch is changed at a predetermined scale to evaluate the overlap.
First, in step S50, as the first wiring pitch, a predetermined scale is prepared in advance within a range of the pitch ± of the wiring scheduled to be equally spaced, and the first wiring pitch is sequentially designated.
Next, in step S52, as the second wiring pitch, a predetermined scale is prepared in advance within a range of the pitch ± of the wiring scheduled to be equally spaced, and the second wiring pitch is sequentially designated.
Next, in step S54, as the third wiring pitch, a predetermined scale is prepared in advance within a range of the pitch ± of the wiring scheduled to be equally spaced, and the third wiring pitch is sequentially designated.
Next, in step S56, as the fourth wiring pitch, a predetermined scale is prepared in advance within a range of the pitch ± of the wirings having an equal pitch, and the fourth wiring pitch is sequentially designated.
接著，在步驟S58中，以所指定之第1個、第2個、第3個及第4個配線間距製作配線的透射率圖案，並導出二維頻率分佈。
接著，在步驟S60中，使用像素排列圖案的二維頻率分佈及配線圖案的二維頻率分佈導出疊紋成分。
接著，在步驟S62中，由疊紋成分導出疊紋評價值。
接著，在步驟S64中，若疊紋評價值比所記憶之疊紋評價值變得良好，則記憶該變得良好之間距資訊。
接著，在步驟S66中，若殘留有應指定之第4個配線間距，則對當前的第4個配線間距增加或減少預先準備之刻度而具有應指定之新的第4個配線間距，並返回到步驟S56，反覆進行步驟S56～步驟S64。
在步驟S66中，若未殘留應指定之第4個配線間距，則進入步驟S68。Next, in step S58, a transmittance pattern of the wiring is created with the designated first, second, third, and fourth wiring pitches, and a two-dimensional frequency distribution is derived.
Next, in step S60, the moire component is derived using the two-dimensional frequency distribution of the pixel arrangement pattern and the two-dimensional frequency distribution of the wiring pattern.
Next, in step S62, the moire evaluation value is derived from the moire component.
Next, in step S64, if the moire evaluation value becomes better than the memorized moire evaluation value, the gap information that has become good is memorized.
Next, in step S66, if the fourth wiring pitch to be specified remains, the current fourth wiring pitch is increased or decreased by a previously prepared scale to have a new fourth wiring pitch to be specified, and returns. Going to step S56, steps S56 to S64 are repeated.
In step S66, if the fourth wiring pitch to be specified does not remain, the process proceeds to step S68.
接著，在步驟S68中，若殘留有應指定之第3個配線間距，則對當前的第3個配線間距增加或減少預先準備之刻度而具有應指定之新的第3個配線間距，並返回到步驟S54，反覆進行步驟S54～步驟S66。
在步驟S68中，若未殘留應指定之第3個配線間距，則進入步驟S70。
接著，在步驟S70中，若殘留有應指定之第2個配線間距，則對當前的第2個配線間距增加或減少預先準備之刻度而具有應指定之新的第2個配線間距，並返回到步驟S52，反覆進行步驟S52～步驟S68。
在步驟S70中，若未殘留應指定之第2個配線間距，則進入步驟S72。
接著，在步驟S72中，若殘留有應指定之第1個配線間距，則對當前的第1個配線間距增加或減少預先準備之刻度而具有應指定之新的第1個配線間距，並返回到步驟S50，反覆進行步驟S50～步驟S70。
在步驟S72中，若未殘留應指定之第1個配線間距，則結束非等間距配線圖案的疊紋值計算處理的實施方法2。Next, in step S68, if there is a third wiring pitch to be specified, the current third wiring pitch is increased or decreased by a previously prepared scale to have a new third wiring pitch to be specified, and returns. Going to step S54, steps S54 to S66 are repeated.
In step S68, if the third wiring pitch to be specified does not remain, the process proceeds to step S70.
Next, in step S70, if there is a second wiring pitch to be specified, the current second wiring pitch is increased or decreased by a scale prepared in advance to have a new second wiring pitch to be specified, and returns. Going to step S52, steps S52 to S68 are repeated.
In step S70, if the second wiring pitch to be specified does not remain, the process proceeds to step S72.
Next, in step S72, if the first wiring pitch to be specified is left, the current first wiring pitch is increased or decreased by a previously prepared scale to have a new first wiring pitch to be specified, and returns. Going to step S50, steps S50 to S70 are repeated.
In step S72, if the first wiring pitch to be designated does not remain, the implementation method 2 of the moire value calculation processing of the non-equidistance wiring pattern is ended.
由於存在既定根數的間距變得相同之組合，所以為了縮短最優化時間，省略該組合為較佳。可以預先準備省略了相同間距的組合之間距資訊，並利用非等間距配線圖案的疊紋值計算處理的實施方法1進行最優化。
與圖53所示之實施方法1相比，圖54所示之實施方法2能夠包羅地進行探索，但存在需要探索時間之缺點。Since there are combinations in which the pitches of a predetermined number become the same, in order to shorten the optimization time, it is better to omit this combination. It is possible to prepare in advance the combination pitch information in which the same pitch is omitted, and use the method 1 of the non-equid pitch wiring pattern calculation processing method for optimization.
Compared with the implementation method 1 shown in FIG. 53, the implementation method 2 shown in FIG. 54 can carry out exploration in an inclusive manner, but has the disadvantage of requiring a search time.
（非等間距配線圖案的疊紋值計算處理的實施方法3）
在圖55示出本發明中之非等間距配線圖案的疊紋值計算處理的實施方法3的流程。
該方法係僅反覆進行既定次數的探索之方法。
首先，在步驟S80中，指定改變非等間距的配線間距之配線。首先，可以指定第1個配線，亦可以指定其他順序的配線。
接著，在步驟S82中，預先準備配線間距的資訊，獲取並指定配線間距的資訊。
接著，在步驟S84中，將所指定之配線設定為所指定之配線間距來製作配線的透射率圖案，並導出二維頻率分佈。(Implementation method 3 for calculating the moire value of non-equidistance wiring patterns)
FIG. 55 shows a flow of a method 3 for implementing a moire value calculation process for a non-equidistant wiring pattern in the present invention.
This method is a method of repeating a predetermined number of explorations.
First, in step S80, a wiring with a non-equal-pitch wiring pitch is designated. First, you can specify the first wiring, or you can specify wiring in another order.
Next, in step S82, information on the wiring pitch is prepared in advance, and information on the wiring pitch is acquired and specified.
Next, in step S84, the designated wiring is set to the designated wiring pitch to create a transmittance pattern of the wiring, and a two-dimensional frequency distribution is derived.
接著，在步驟S86中，使用像素排列圖案的二維頻率分佈及配線圖案的二維頻率分佈導出疊紋成分。
接著，在步驟S88中，由疊紋成分導出疊紋評價值。
接著，在步驟S90中，當在預先準備之配線間距的資訊中殘留有未求出疊紋評價值之配線間距的資訊且存在應指定之配線間距的資訊時，返回到步驟S82，反覆進行步驟S82～步驟S88。
另一方面，當不存在應指定之配線間距的資訊時，進入步驟S92。
在步驟S92中，更新為疊紋評價值最良好之配線間距。
接著，在步驟S94中，判斷改變配線間距之次數是否已完成既定次數。
當未完成既定次數（否）時，返回到步驟S80，反覆進行步驟S80～步驟S92。
當已完成既定次數（是）時，結束非等間距配線圖案的疊紋值計算處理的實施方法3。Next, in step S86, the moire component is derived using the two-dimensional frequency distribution of the pixel arrangement pattern and the two-dimensional frequency distribution of the wiring pattern.
Next, in step S88, a moire evaluation value is derived from the moire component.
Next, in step S90, when the information of the wiring pitch for which the evaluation value of the moire is not obtained remains in the information of the wiring pitch prepared in advance and the information of the wiring pitch to be specified exists, the process returns to step S82 and the process is repeated S82 to step S88.
On the other hand, if there is no information about the wiring pitch to be specified, the process proceeds to step S92.
In step S92, the wiring pitch having the best evaluation value of the moire is updated.
Next, in step S94, it is determined whether the number of times of changing the wiring pitch has been completed a predetermined number of times.
When the predetermined number of times has not been completed (NO), the process returns to step S80, and steps S80 to S92 are repeated.
When the predetermined number of times (Yes) have been completed, the method 3 of implementing the moire value calculation processing of the non-equidistance wiring pattern is ended.
圖55所示之方法係當既定的根數為4根時以第1個配線→第2個配線→第3個配線→第4個配線→第1個配線→……的順序反覆進行既定次數的探索者。順序可以從第1至第4依序進行，亦可以隨機地選擇。
對所指定之配線，將配線間距從當前的間距±（增減）既定量而導出疊紋評價值。單純地，將當前的間距設為p而以p+a、p、p-a的間距進行評價即可。其中，由於已導出間距p的疊紋評價值，所以無需重新導出。對所指定之配線，更新為疊紋評價值最良好之間距。
圖55所示之方法比圖54所示之方法不需要探索時間。又，圖55所示之方法比圖53所示之方法能夠更細地探索。但是，存在容易陷入局部解之缺點。
以上的圖52～圖55所示之本發明的導電性薄膜的配線圖案的製作方法係與和導電性薄膜的透明基體的有無無關地實施之配線部的配線圖案有關者，並未規定透明基體，亦能夠說係至少具有配線部之導電性構件的配線圖案的製作方法。亦即，圖52～圖55可以說係表示本發明的導電性構件及導電性薄膜的配線圖案的製作方法的流程者。The method shown in FIG. 55 is to repeat the predetermined number of times in the order of the first wiring → the second wiring → the third wiring → the fourth wiring → the first wiring → ... when the predetermined number is four Explorer. The order can be performed sequentially from the first to the fourth, or can be randomly selected.
For the specified wiring, the wiring pitch is derived from the current pitch ± (increase / decrease) of the given amount to derive the overlap evaluation value. Simply, the current pitch is set to p and the evaluation is performed at the pitches of p + a, p, and pa. Among them, since the moire evaluation value of the pitch p has been derived, it is not necessary to re-derive. For the specified wiring, update to the best distance between the evaluation values of the moire.
The method shown in FIG. 55 does not require a search time than the method shown in FIG. 54. The method shown in FIG. 55 can be explored in more detail than the method shown in FIG. 53. However, there is a disadvantage that it is easy to fall into a partial solution.
The manufacturing method of the wiring pattern of the conductive film of the present invention shown in FIGS. 52 to 55 described above is related to the wiring pattern of the wiring portion which is implemented regardless of the presence or absence of the transparent substrate of the conductive film. The transparent substrate is not specified It can also be said that it is a method for producing a wiring pattern of a conductive member having at least a wiring portion. That is, FIG. 52 to FIG. 55 can be said to be flow chart showing a method for producing a wiring pattern of a conductive member and a conductive film according to the present invention.
（實施的注意事項）
在專利文獻3中揭示有對菱形配線的間距賦予不規則性來判定疊紋評價值成為閾值以下之配線圖案。但是，該方法中存在課題。係“利用閾值排除強度小的疊紋成分”。
在該方法中，除了原本欲選定之“被人眼辨識之低頻區域的疊紋成分少的配線圖案”以外，還會選定閾值以下的疊紋成分多的配線圖案。
本來，若對配線的間距賦予不規則性，則配線圖案的頻率成分會增加，但在該情況下，配線圖案的各頻率成分的強度的總和必然會增加。這是因為，無論對配線間距賦予或不賦予不規則性，配線圖案的透射率的平方和亦不會變，因此根據巴色伐（parseval）定理，配線圖案的二維頻率分佈的各頻率成分的功率（強度的平方）的總和不會變。功率（強度的平方）的總和不變而頻率成分增加意味著強度的總和增加。而且，配線圖案的強度的總和增加意味著疊紋成分的強度的總和亦增加。亦即，配線圖案的頻率成分增加之結果，疊紋成分亦必然地增加而其強度（像素排列圖案的各頻率成分和配線圖案的各頻率成分的乘法運算值）的總和亦增加。
其結果，乘以VTF之後的疊紋成分的強度的總和亦具有增加之傾向。認為在該種傾向下賦予不規則性而選定了疊紋評價值（VTF乘法運算後的疊紋成分的強度的總和）低的配線圖案時，具有選定強度為閾值以下的疊紋成分多的配線圖案（將成為閾值以下之疊紋成分從評價值中排除）之傾向。亦即，認為即使賦予不規則性來進行探索，由“增加成為閾值以下之疊紋成分”所引起之疊紋評價值的減小亦大於本來作為目標之由“使各疊紋成分的頻率比被人眼辨識之低頻區域更偏向高頻側”所引起之疊紋評價值的減小，具有選定該種配線圖案之傾向。(Precautions for implementation)
Patent Document 3 discloses a wiring pattern in which irregularity is given to the pitch of the rhombus wiring to determine that the evaluation value of the moire is equal to or less than a threshold value. However, this method has problems. It is "removing low-intensity moire components by threshold".
In this method, in addition to the "wiring pattern with few moire components in the low-frequency region recognized by the human eye" to be selected originally, a wiring pattern with many moire components below a threshold value is also selected.
Originally, if irregularity is given to the pitch of the wiring, the frequency component of the wiring pattern will increase, but in this case, the sum of the intensities of the frequency components of the wiring pattern will inevitably increase. This is because the square sum of the transmittance of the wiring pattern does not change regardless of whether or not irregularity is given to the wiring pitch. Therefore, each frequency component of the two-dimensional frequency distribution of the wiring pattern is based on the Parseval theorem. The sum of the power (the square of the intensity) does not change. The sum of the power (square of the intensity) does not change and an increase in the frequency component means that the sum of the intensity increases. Moreover, an increase in the total intensity of the wiring pattern means that the total intensity of the moire component also increases. That is, as a result of an increase in the frequency component of the wiring pattern, the moire component also inevitably increases and the intensity (the sum of the multiplication values of each frequency component of the pixel arrangement pattern and each frequency component of the wiring pattern) also increases.
As a result, the sum of the intensities of the mottled components multiplied by VTF also tends to increase. It is considered that when irregularity is given under this tendency, and a wiring pattern having a low moire evaluation value (the sum of the strength of moire components after VTF multiplication) is selected, a wiring having a large moire component having a selected strength below a threshold value is selected. The tendency of the pattern to exclude mottled components below the threshold from the evaluation value. That is, it is considered that even if the irregularity is given for exploration, the reduction in the evaluation value of the moiré caused by "increasing the moiré component below the threshold value" is larger than that originally made "the frequency ratio of each moiré component The reduction of the evaluation value of the moire caused by "the low-frequency region more skewed toward the high-frequency side recognized by the human eye" has a tendency to select such a wiring pattern.
本發明人如專利文獻3的方法那樣設定疊紋成分的強度的閾值並利用實施方法探索了本發明的配線圖案之結果，導出了如上所述的配線圖案。該種配線圖案係在閾值以下附近分佈有複數個疊紋成分，若稍微減小閾值而導出疊紋評價值，則與等間距的配線圖案相比疊紋評價值反而差，並不是較佳的圖案。然而，當利用閾值不排除強度小的疊紋成分時，如本發明的配線圖案那樣，非等間距的配線圖案比等間距的配線圖案必然會產生強度小的很多頻率成分，因此如上所述，具有疊紋評價值增加之傾向，未能充分選定最佳的配線圖案。The present inventors set the threshold value of the intensity of the moire component as in the method of Patent Document 3, and explored the wiring pattern of the present invention using an implementation method, and derived the wiring pattern as described above. This type of wiring pattern has a plurality of moire components distributed below the threshold. If the moire evaluation value is derived by slightly reducing the threshold, the moire evaluation value is worse than an equal-spaced wiring pattern, which is not preferable. pattern. However, when the threshold value is not used to exclude a small-strength moire component, as in the wiring pattern of the present invention, a non-equidistant wiring pattern will inevitably generate a lot of frequency components with a lower intensity than a uniform-pitch wiring pattern. There is a tendency that the evaluation value of the moire increases, and an optimal wiring pattern cannot be sufficiently selected.
在此，在過去的視覺研究中得到了表示“複數個頻率被重疊之圖案的可見性並不是各頻率的可見性的線性和，而是非線性和”之實驗結果。因此，本發明中，即使在將配線圖案設為非等間距而使頻率成分比等間距增加之情況下，亦為了能夠導出準確的疊紋評價值而充分導出最佳的配線圖案，由各疊紋成分得到疊紋評價值，作為該種方法，並不是“利用閾值排除強度少的疊紋成分而導出強度的總和（線性和）”，又，亦不是“在無閾值之狀態下導出強度的總和（線性和）”，而設為“導出各疊紋成分的強度的非線性總和”之方法。在過去的視覺研究中主要提出有以下2種模型，並使用該等方法。
首先，利用非線性函數（設想從亮度對比（contrast）向心理對比變換之函數（轉換函數）。）對各疊紋成分的強度進行變換之後，將其總和（線性和）作為疊紋評價值而導出。在此，作為非線性變換函數（轉換函數），以Hamerly等或Wilson等所提出之式為代表提出有各種變換式，因此使用該等式中的任一個來進行變換。Here, in the past visual studies, an experimental result indicating that "the visibility of a pattern with multiple frequencies overlapped is not a linear sum of the visibility of each frequency, but a nonlinear sum" has been obtained. Therefore, in the present invention, even when the wiring pattern is set to a non-equid pitch and the frequency component ratio is increased at an equal pitch, in order to be able to derive an accurate evaluation value of the moire, the optimal wiring pattern is sufficiently derived. The wrinkle component gets the evaluation value of moire. As this method, it is not "to sum up the intensity (linear sum) by excluding the mottled component with less intensity using a threshold value", nor is it to "derive the strength without a threshold value" Sum (Linear Sum) "and set it as a method of" deriving a non-linear sum of the intensities of the moire components ". In the past visual research, the following two models were mainly proposed, and these methods were used.
First, a non-linear function (a function (conversion function) that transforms from contrast to psychological contrast) is used to transform the intensity of each moire component, and then the sum (linear sum) is used as the moire evaluation value. Export. Here, as the non-linear transformation function (transition function), various transformation formulas are proposed as representative of the formulas proposed by Hamerly et al. Or Wilson, and therefore, any one of these equations is used for transformation.
或者，將各疊紋成分的強度的概率性的加法運算值作為疊紋評價值而導出。在此，作為概率性的加法運算式，使用由Quick等提唱之下述式（2）來導出疊紋評價值I。
I=（Σ（R[i]）x
）1/x
……（2）
其中，R[i]表示疊紋的第i個頻率成分的強度亦即VTF乘法運算後的各疊紋成分。
又，概率加法運算的次數x採用在過去的視覺研究中作為對視覺實驗結果良好地擬合（fit）之次數而提出之1～4的範圍中的任一值。在此，當次數x為1時，上述式（2）意味著將各疊紋成分的強度的總和（線性和）作為疊紋評價值而導出。在該情況下，如上所述，如本發明的配線圖案那樣，非等間距的配線圖案具有疊紋評價值比等間距的配線圖案增大之傾向，因此難以選定充分最佳的配線圖案。然而，在該情況下，亦至少能夠選定疊紋比等間距的配線圖案少的非等間距的配線圖案，因此作為次數x，還採用值1。作為代表性的次數x，採用由Quick提出之值2。Alternatively, a probabilistic addition value of the intensity of each moire component is derived as a moire evaluation value. Here, as a probabilistic addition expression, the moire evaluation value I is derived using the following formula (2) sung by Quick et al.
I = (Σ (R [i]) x ) 1 / x …… (2)
Among them, R [i] represents the intensity of the i-th frequency component of the moire, that is, each moire component after the VTF multiplication operation.
In addition, the number of times of the probability addition x is any value in the range of 1 to 4 which has been proposed as the number of times that the results of visual experiments are well fit in the past visual research. Here, when the number of times x is 1, the above formula (2) means that the sum (linear sum) of the intensities of the moire components is derived as the moire evaluation value. In this case, as described above, as with the wiring pattern of the present invention, the non-equal-pitch wiring pattern tends to have a larger moire evaluation value than the uniform-pitch wiring pattern, and it is difficult to select a sufficiently optimal wiring pattern. However, in this case, it is also possible to select at least a non-equidistance wiring pattern with less moire than a uniform pitch wiring pattern. Therefore, a value of 1 is also adopted as the number of times x. As a representative number of times x, a value of 2 proposed by Quick is used.
如已說明，當將配線圖案的間距設為非等間距時，具有配線圖案其本身的可見性比等間距變差之傾向（作為配線圖案的頻率成分，產生等間距中所沒有的低頻成分），因此不僅評價疊紋，還評價配線圖案其本身的可見性為較佳。
上述式（7）中，不僅是第4行的式所表示之各疊紋成分，而且將第3行的式所表示之配線圖案的頻率成分亦編入疊紋評價值中，藉此能夠簡單地進行評價。具體而言，在圖14所示之像素排列圖案的頻率分佈中還包含頻率0（相當於上述式（7）的A0）即可。其結果，在根據圖14的像素排列圖案的各頻率成分和圖15（或圖24）所示之配線圖案的各頻率成分來導出圖16（或圖25）所示之疊紋成分時，作為與像素排列圖案的頻率0（相當於上述式（7）的A0）之疊紋成分而導出上述式（7）的第3行的式所表示之各成分，然後編入到乘以VTF而導出之總和值（疊紋評價值）中。As explained, when the pitch of the wiring pattern is set to be non-equidistant, the visibility of the wiring pattern itself tends to be worse than that of the equal pitch (as a frequency component of the wiring pattern, low-frequency components not included in the equal pitch are generated) Therefore, it is better to evaluate not only the moire but also the visibility of the wiring pattern itself.
In the above formula (7), not only each moire component represented by the formula in the fourth line, but also the frequency component of the wiring pattern represented by the formula in the third line is also incorporated into the moire evaluation value, thereby making it possible to simply Evaluate. Specifically, the frequency distribution of the pixel arrangement pattern shown in FIG. 14 may further include the frequency 0 (corresponding to A0 in the above formula (7)). As a result, when the moire component shown in FIG. 16 (or FIG. 25) is derived from each frequency component of the pixel arrangement pattern in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 15 (or FIG. 24), it is defined as The component of the moire pattern with the frequency 0 of the pixel arrangement pattern (equivalent to A0 of the above formula (7)) is derived from each component represented by the formula in the third line of the above formula (7), and then is multiplied by VTF to derive Sum value (overlap evaluation value).
關於本發明的非等間距的配線圖案，在將2個方向以上的直線配線重疊而成之配線圖案中，可以僅在1個方向上為非等間距，亦可以在所有方向上為非等間距。
本發明的非等間距的配線圖案係將2個方向的直線配線重疊而成之配線圖案為較佳。其原因在於，為了確保透射率，每單位面積的配線的根數存在上限。當每單位面積的配線的根數存在上限時，配線圖案的方向少時能夠增加每1個方向的配線的根數，其結果，能夠縮小配線間距。而且，配線間距窄時難以產生疊紋。具體而言，配線間距窄時頻率分佈中之各成分的頻率分離，因此難以產生接近像素排列圖案的各頻率成分的成分，從而難以產生低頻的疊紋。又，配線間距窄時對基於本發明的非等間距的配線圖案之疊紋減少亦有利。這是因為，在本發明的非等間距的配線圖案中，與等間距的配線圖案相比產生低頻成分，但配線間距的窄時最小頻率升高，因此如本發明的那樣，即使設為非等間距而產生低頻成分，由其所引起之對配線圖案的可見性之影響亦小。亦即，在對配線圖案的可見性不產生影響之範圍內能夠更自由地將間距最優化而減少疊紋。如此，配線圖案的方向少時對疊紋及配線圖案的可見性有利，但為了防止導電性薄膜作為觸控感測器之功能欠缺，需要最少2個方向。亦即，為了即使配線斷線亦維持感測器功能，需要將至少2個方向的配線重疊而具有交點且具有複數個通向電極之路徑（電流的路徑）之圖案。因此，將2個方向的直線配線重疊而成之配線圖案為較佳。Regarding the non-equidistant wiring pattern of the present invention, in a wiring pattern formed by overlapping linear wirings in two or more directions, it may be non-equidistant in only one direction or non-equidistant in all directions .
The non-equidistant wiring pattern of the present invention is preferably a wiring pattern obtained by overlapping linear wirings in two directions. This is because there is an upper limit to the number of wirings per unit area in order to ensure transmittance. When there is an upper limit on the number of wirings per unit area, the number of wirings in each direction can be increased when the number of wiring patterns is small. As a result, the wiring pitch can be reduced. In addition, it is difficult to generate moire when the wiring pitch is narrow. Specifically, when the wiring pitch is narrow, the frequencies of the components in the frequency distribution are separated, so it is difficult to generate components close to the components of the frequency of the pixel arrangement pattern, and it is difficult to generate low-frequency moire. In addition, when the wiring pitch is narrow, it is also advantageous to reduce the overlap of the non-equidistant wiring pattern according to the present invention. This is because, in the non-equidistant wiring pattern of the present invention, low-frequency components are generated as compared with the equal-pitch wiring pattern, but the minimum frequency increases when the wiring pitch is narrow. Therefore, even if the Low-frequency components are generated at equal intervals, and the influence on the visibility of the wiring pattern caused by them is also small. That is, in a range that does not affect the visibility of the wiring pattern, it is possible to optimize the pitch more freely and reduce the moire. In this way, when the direction of the wiring pattern is small, the visibility of the moire and the wiring pattern is favorable, but in order to prevent the lack of the function of the conductive film as a touch sensor, at least two directions are required. That is, in order to maintain the sensor function even if the wiring is disconnected, a pattern in which wirings in at least two directions are overlapped to have an intersection and have a plurality of paths (current paths) to the electrodes is required. Therefore, a wiring pattern formed by overlapping linear wirings in two directions is preferable.
當配線圖案為2層結構時，傾斜觀察時有時2層的配線圖案的位置（相位）偏離，但在該情況下，作為圖15及圖24所示之配線圖案的頻率分佈，不僅導出從正面觀察時的頻率分佈，而且還導出從傾斜的任意方向觀察時的頻率分佈，並同樣地導出疊紋成分並進行VTF乘法運算而導出疊紋評價值，從而導出該疊紋評價值的最差值比等間距配線圖案良好之非等間距配線圖案即可。
在配線圖案為2層結構的情況下，不僅包括正面觀察，還包括從任意方向的傾斜觀察在內，從至少1個方向觀察時，若係疊紋評價值比等間距配線圖案小的非等間距配線圖案，則具有本發明的特徵。又，同樣地，不僅包括正面觀察，還包括從任意方向的傾斜觀察在內，從至少1個方向觀察時，若係“配線圖案的各頻率成分的分佈”或“由像素排列圖案和配線圖案導出之疊紋成分的分佈”或“配線圖案的間距”滿足如上所述之本發明的配線圖案的特徵之非等間距配線圖案，則具有本發明的特徵。When the wiring pattern has a two-layer structure, the position (phase) of the two-layer wiring pattern may be shifted when viewed obliquely. However, in this case, the frequency distribution of the wiring pattern shown in FIGS. 15 and 24 is not only derived from The frequency distribution when viewed from the front, and also the frequency distribution when viewed from an oblique arbitrary direction. Similarly, the moire component and VTF multiplication are used to derive the moire evaluation value, so that the worst value of the moire evaluation value is derived. A non-equidistant wiring pattern having a good value ratio than a regular-pitch wiring pattern is sufficient.
When the wiring pattern has a two-layer structure, it includes not only frontal viewing, but also oblique viewing from any direction. When viewed from at least one direction, if the evaluation value of the moire is smaller than that of the equally-spaced wiring pattern, The pitch wiring pattern has the characteristics of the present invention. Also, similarly, it includes not only frontal viewing, but also oblique viewing from any direction. When viewed from at least one direction, if it is "distribution of each frequency component of the wiring pattern" or "pixel pattern and wiring pattern" A non-equidistant wiring pattern that "derives the distribution of the moire component" or "the pitch of the wiring pattern" satisfies the characteristics of the wiring pattern of the present invention as described above has the features of the present invention.
在OELD的情況下，有對於RGB中至少2個顏色，像素排列圖案不同之（例如，PenTile排列）顯示器。在該種顯示器的情況下，對於R、G、B中至少2個顏色，像素排列圖案的二維頻率分佈不同，因此疊紋亦不同。在該種顯示器的情況下，需為減少R、G、B全部的疊紋之配線圖案。在該情況下，對R、G、B的各顏色導出圖14所示之像素排列圖案的頻率分佈，由該等與配線圖案的頻率分佈，對R、G、B的各顏色導出疊紋成分並進行VTF乘法運算而導出疊紋評價值，從而導出該疊紋評價值的最差值比等間距配線圖案良好之非等間距配線圖案即可。即使在R、G、B的像素排列圖案不同之情況下，在R、G、B中的任一顏色中，若係疊紋評價值比等間距配線圖案小的非等間距配線圖案，則具有本發明的特徵。又，同樣地，在R、G、B中的任一顏色中，若係“配線圖案的各頻率成分的分佈”或“由像素排列圖案和配線圖案導出之疊紋成分的分佈”或“配線圖案的間距”滿足如上所述之本發明的配線圖案的特徵之非等間距配線圖案，則具有本發明的特徵。In the case of OELD, there are displays with different pixel arrangement patterns (for example, PenTile arrangement) for at least two colors in RGB. In the case of such a display, for at least two colors of R, G, and B, the two-dimensional frequency distribution of the pixel arrangement pattern is different, and thus the moire is also different. In the case of such a display, a wiring pattern for reducing the overlapping of all of R, G, and B is required. In this case, the frequency distribution of the pixel arrangement pattern shown in FIG. 14 is derived for each color of R, G, and B, and the moire component is derived for each color of R, G, and B from the frequency distribution of the wiring pattern. The VTF multiplication operation is performed to derive the moire evaluation value, so that the worst value of the moire evaluation value is better than the non-equal-space wiring pattern, which is better than the equi-spaced wiring pattern. Even when the pixel arrangement patterns of R, G, and B are different, if any of the colors of R, G, and B has a non-equivalent pitch wiring pattern whose evaluation value is smaller than that of the equal pitch wiring pattern, it has Features of the invention. Similarly, if any of the colors R, G, and B is “distribution of each frequency component of the wiring pattern” or “distribution of the moire component derived from the pixel arrangement pattern and the wiring pattern” or “wiring, The pattern pitch is a non-equidistant wiring pattern that satisfies the characteristics of the wiring pattern of the present invention as described above.
如圖2、圖5、圖30及圖37所示，在將直線配線沿2個方向重疊而成之配線圖案中，如圖56所示，對於如圖11所示之左右對稱的像素排列圖案，2個方向的直線配線21i與21j的傾斜角度可以不同。亦即，如圖56所示，如本發明的配線圖案可以為將傾斜角度不同之2個方向的直線配線21i及21j重疊而成之左右非對稱配線圖案25f。在此，作為左右對稱的像素排列圖案，能夠以“至少各像素的位置為左右對稱”來定義。另外，亦能夠以“還包括各像素的形狀及尺寸在內為左右對稱”來定義。
本發明中，如圖56所示，作為有時配線圖案左右為非對稱為佳之原因，可以舉出“當2個方向的直線配線的平均間距不同時，各個直線配線的疊紋成為最良好之方向（角度）未不一定相同”及“2個方向的直線配線所成之角度越接近直角（90度），作為觸控感測器，二維的接觸位置檢測的精度就越高”。
圖56係表示對於如圖11所示之左右對稱的像素排列圖案，按照圖52所示之本發明的導電性薄膜的配線圖案的製作方法的流程，在配線的透射率的觀點上對每單位面積的配線的根數設定限制之後導出之、疊紋值總和變得良好之配線圖案的1例者。在該種例子中，由於2個方向的直線配線的平均間距不同，所以在各個直線配線中疊紋值變得良好之方向（角度）不同。又，在該種例子中，2個方向的直線配線均朝向右方向。如該種例子那樣，2個方向的直線配線均朝向右方向或左方向之例子當然亦包含於本發明中。As shown in FIG. 2, FIG. 5, FIG. 30, and FIG. 37, in a wiring pattern in which straight line wiring is overlapped in two directions, as shown in FIG. 56, for the left-right symmetrical pixel arrangement pattern shown in FIG. The inclination angles of the linear wirings 21i and 21j in the two directions may be different. That is, as shown in FIG. 56, the wiring pattern according to the present invention may be a left-right asymmetric wiring pattern 25f formed by overlapping linear wirings 21i and 21j in two directions with different inclination angles. Here, as a left-right symmetrical pixel arrangement pattern, “the position of at least each pixel is left-right symmetrical” can be defined. In addition, it can also be defined as "left-right symmetry including the shape and size of each pixel".
In the present invention, as shown in FIG. 56, as the reason why the wiring pattern is sometimes not right or left, it may be mentioned that “when the average pitch of the linear wirings in the two directions is different, the stacking of each linear wiring becomes the best. The directions (angles) are not necessarily the same "and" The closer the angle formed by the straight wiring in the two directions is closer to the right angle (90 degrees), the higher the accuracy of the two-dimensional contact position detection as a touch sensor ".
FIG. 56 shows a flow of a method for producing a wiring pattern of the conductive film of the present invention shown in FIG. 52 with respect to the left-right symmetrical pixel arrangement pattern shown in FIG. One example of a wiring pattern that is derived after setting the number of wirings of the area and the sum of the moire values becomes good. In this example, since the average pitch of the straight line wirings in the two directions is different, the direction (angle) in which the moire value becomes good in each straight line wiring is different. In this example, the straight wiring in both directions is directed to the right. As in such examples, examples in which the straight wirings in both directions are directed to the right or left direction are naturally included in the present invention.
然而，在將直線配線沿2個方向重疊而成之配線圖案中，2個方向所成之角度越接近直角（90度），作為觸控感測器，二維的接觸位置檢測的精度就越高。又，當配線層存在2層以上時，例如從傾斜觀察時等，各層的配線圖案的位置有可能產生偏離。而且，有可能因該偏離而直線配線的間距發生變化，但在該情況下，根據各層的配線圖案的偏離方向和直線配線的方向而直線配線的間距的變化程度不同。當偏離方向與直線配線的方向所成之角度為直角（90度）時，間距不變，當偏離方向與直線配線的方向相同時，間距的變化最大。藉此，2個方向的直線配線所成之角度越接近直角（90度），即使各層的配線圖案的位置偏離，亦不會依賴於該偏離方向而將2個方向的直線配線重疊而成之配線圖案的總間距變化越小，因此，由該配線圖案的間距的變化所引起之疊紋的產生和/或配線圖案的可見性下降小。又，如本發明那樣，在疊紋可見性的觀點上將配線圖案的間距最優化之技術中，2個方向的直線配線所成之角度接近直角（90度）尤其有效。根據以上，2個方向的直線配線所成之角度並不特別限制，但40度～140度（90度±50度）的範圍為較佳，60度～120度（90度±30度）的範圍為更佳，75度～105度（90度±15度）的範圍為進一步較佳。However, in a wiring pattern in which linear wiring is overlapped in two directions, the closer the angle formed by the two directions is to the right angle (90 degrees), the more accurate the two-dimensional contact position detection as a touch sensor. high. In addition, when there are two or more wiring layers, for example, when viewed from an oblique position, the positions of the wiring patterns in each layer may be shifted. In addition, the pitch of the linear wiring may change due to the deviation. In this case, the degree of change in the pitch of the linear wiring varies depending on the direction of the deviation of the wiring pattern of each layer and the direction of the linear wiring. When the angle formed by the deviation direction and the direction of the linear wiring is a right angle (90 degrees), the pitch does not change. When the deviation direction is the same as the direction of the linear wiring, the change in the distance is the largest. As a result, the closer the angle formed by the linear wiring in the two directions is closer to the right angle (90 degrees), even if the position of the wiring pattern of each layer deviates, the linear wiring in the two directions will not be overlapped depending on the deviation direction. The smaller the change in the total pitch of the wiring pattern, the less the occurrence of moire and / or the decrease in the visibility of the wiring pattern caused by the change in the pitch of the wiring pattern. In addition, as in the present invention, in the technique of optimizing the pitch of the wiring pattern from the viewpoint of the visibility of the moire, it is particularly effective that the angle formed by the linear wiring in two directions approaches a right angle (90 degrees). Based on the above, the angle formed by the linear wiring in two directions is not particularly limited, but a range of 40 ° to 140 ° (90 ° ± 50 °) is preferred, and a range of 60 ° to 120 ° (90 ° ± 30 °) The range is more preferable, and the range of 75 degrees to 105 degrees (90 degrees ± 15 degrees) is more preferable.
又，直線配線的平均間距並不特別限制，但30μm～600μm為較佳。其原因在於，若平均間距窄，則透射率降低，相反地，若平均間距寬，則金屬細線容易變得顯眼，導致可見性下降。為了使透射率在能夠容許之範圍內且降低金屬細線的可見性，平均間距在上述範圍內為較佳。
本發明的特徵為，係在至少1個方向的直線配線中，既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中其至少2根金屬細線的間距為非等間距的非等間距配線圖案。在該情況下，如上所述，藉由將金屬細線的間距設為非等間距，與等間距的情況相比，配線圖案的最小頻率降低，因此需注意避免使配線圖案被辨識。因此，為了在對配線圖案的可見性不產生影響之範圍內將間距充分最優化而減少疊紋，平均間距係300μm以下為較佳，200μm以下為更佳，150μm以下為進一步較佳。The average pitch of the linear wiring is not particularly limited, but it is preferably 30 μm to 600 μm. The reason for this is that if the average pitch is narrow, the transmittance decreases. Conversely, if the average pitch is wide, the fine metal wires are likely to be conspicuous, and visibility is reduced. In order to make the transmittance within an allowable range and reduce the visibility of the thin metal wires, the average pitch is preferably within the above range.
The present invention is characterized in that in a linear wiring in at least one direction, the repeating pitch of a predetermined number of thin metal wires is an equal pitch, and the pitch of at least two of the thin metal wires among the predetermined number of thin metal wires is not Uniform pitch non-equid pitch wiring pattern. In this case, as described above, by setting the pitch of the thin metal wires to be non-equidistant, the minimum frequency of the wiring pattern is reduced compared to the case of equal pitch. Therefore, care must be taken to prevent the wiring pattern from being recognized. Therefore, in order to fully optimize the pitch and reduce the moire within a range that does not affect the visibility of the wiring pattern, the average pitch is preferably 300 μm or less, more preferably 200 μm or less, and even more preferably 150 μm or less.
本發明的特徵為，由在1個方向上平行地排列之複數個金屬細線構成之線配線（1個方向的線配線）係直線配線。然而，本發明中，金屬細線無需為完全的直線，只要在既定的範圍內，則亦可以彎曲。本發明中之直線配線能夠如下定義。
本發明中，在1個方向的線配線的透射率的二維頻率分佈中，當線配線的頻率成分僅集中於某一特定的方向上時，該線配線能夠視為直線配線。具體而言，在線配線的透射率的二維頻率分佈中，將頻率零的成分除外，若以某一特定的方向為中心從-10度以上至+10度以下的角度範圍中之頻率成分的強度的總和相對於所有頻率成分（頻率零的成分除外）的強度的總和為既定的比率以上，則能夠視為直線配線。在此，既定的比率為30%，更佳為45%，進一步較佳為55%。又，某一特定的方向係指0度以上且小於360度的角度範圍中之任意角度中某一角度的方向和與該角度相差180度之角度的方向這兩者。亦即，以某一特定的方向為中心之從-10度以上至+10度以下的角度範圍中之頻率成分的強度的總和中還包含共軛關係的頻率成分（相差180度之角度的方向（相反方向）的頻率成分）的強度。The present invention is characterized in that a wire wiring (a wire wiring in one direction) composed of a plurality of thin metal wires arranged in parallel in one direction is a straight wiring. However, in the present invention, the thin metal wire need not be a complete straight line, and may be bent as long as it is within a predetermined range. The linear wiring in the present invention can be defined as follows.
In the present invention, in the two-dimensional frequency distribution of the transmittance of the line wiring in one direction, when the frequency component of the line wiring is concentrated only in a specific direction, the line wiring can be regarded as a straight line wiring. Specifically, in a two-dimensional frequency distribution of transmittance of an online wiring, excluding a component having a frequency of zero, if the frequency component in an angle range from -10 degrees or more to +10 degrees or less is centered on a specific direction, The sum of the intensities with respect to the sum of the intensities of all frequency components (except for components with a frequency of zero) is a predetermined ratio or more, and it can be regarded as a straight wiring. Here, the predetermined ratio is 30%, more preferably 45%, and still more preferably 55%. A specific direction refers to both a direction of an angle in an arbitrary angle in an angle range of 0 degrees or more and less than 360 degrees and a direction of an angle different from the angle by 180 degrees. That is, the sum of the intensities of the frequency components in an angular range from -10 degrees to +10 degrees, centered on a specific direction, also includes the frequency components of the conjugate relationship (directions with an angle of 180 degrees apart). (In the opposite direction) of the frequency component).
在此，例如作為線配線的例子，示出圖57～圖59所示之線配線。又，在圖60～圖62中分別示出圖57～圖59所示之線配線的透射率的二維頻率分佈。另外，為了容易觀察強度，頻率分佈適當地調整了強度縮尺（scale）。又，頻率零的成分除外。圖57所示之線配線23a係完全的直線在橫向上排列而成之直線配線，圖60所示之頻率分佈亦僅集中在水平方向上。相對於此，圖59所示之線配線23c的構成配線之線為COS波的形狀，圖62所示之頻率分佈不僅在水平方向，還在周圍的方向上擴大，因此無法視為直線配線。另一方面，圖58所示之線配線23b的構成配線之線稍微呈COS波形狀，但圖61所示之頻率分佈幾乎集中在水平方向上，因此可視為直線配線。Here, as an example of the line wiring, the line wiring shown in FIGS. 57 to 59 is shown. Moreover, the two-dimensional frequency distribution of the transmittance of the line wiring shown in FIGS. 57 to 59 is shown in FIGS. 60 to 62, respectively. In addition, in order to easily observe the intensity, an intensity scale is appropriately adjusted for the frequency distribution. In addition, components with zero frequency are excluded. The line wiring 23a shown in FIG. 57 is a straight line wiring in which straight lines are arranged in the lateral direction, and the frequency distribution shown in FIG. 60 is also concentrated only in the horizontal direction. On the other hand, the wiring constituting the wiring 23c shown in FIG. 59 has the shape of a COS wave, and the frequency distribution shown in FIG. 62 is expanded not only in the horizontal direction but also in the surrounding direction, so it cannot be regarded as a straight wiring. On the other hand, the wiring constituting the wiring 23b shown in FIG. 58 has a slightly COS wave shape, but the frequency distribution shown in FIG. 61 is concentrated in the horizontal direction, so it can be regarded as a straight wiring.
圖63係表示在線配線的透射率的二維頻率分佈中，將水平方向視為角度0度，以從-90度至+90度的各個方向（及除此以外，與各個方向相差180度之角度的方向（相反的方向））為中心從-10度以上至+10度以下的角度範圍中之頻率成分（頻率零的成分除外）的強度的總和相對於所有頻率成分（頻率零的成分除外）的強度的總和之比率之曲線圖。在圖63中，實線為圖57所示之線配線23a的頻率成分的強度的比率的曲線圖，一點虛線為圖58所示之線配線23b的頻率成分的強度的比率的曲線圖，點線為圖59所示之線配線23c的頻率成分的強度的比率的曲線圖。若觀察以作為某一特定的方向之水平方向亦即角度0度的方向（及除此以外，角度180度的方向）為中心之-10度以上且+10度以下的角度範圍的頻率成分的強度的總和的比率，則在圖57所示之線配線23a的情況下，比率當然為100%，能夠視為直線配線。在圖58所示之線配線23b的情況下，比率為55%以上，該等亦能夠視為直線配線。另一方面，在圖59所示之線配線23c的情況下，比率小於30%，可知無法視為直線配線。Fig. 63 is a two-dimensional frequency distribution showing the transmittance of the online wiring. The horizontal direction is regarded as an angle of 0 degrees, and the directions from -90 degrees to +90 degrees (and other than that, are 180 degrees different from each direction). The direction of the angle (opposite direction) is the sum of the intensities of the frequency components (except for the component with zero frequency) in the angular range from -10 ° to + 10 ° with respect to all frequency components (except for components with zero frequency) ) A graph of the ratio of the sum of the intensities. In FIG. 63, the solid line is a graph of the ratio of the intensity of the frequency component of the line wiring 23 a shown in FIG. 57, and the dotted line is a graph of the ratio of the intensity of the frequency component of the line wiring 23 b shown in FIG. 58. The line is a graph of the ratio of the intensity of the frequency components of the line wiring 23c shown in FIG. 59. If you observe the horizontal component of a certain direction as a horizontal direction, that is, a direction with an angle of 0 degrees (and in addition, a direction with an angle of 180 degrees) as the center, the frequency component of an angular range of -10 degrees or more and +10 degrees or less In the case of the line wiring 23a shown in FIG. 57, the ratio of the total of the strength is, of course, 100%, and it can be regarded as a straight line wiring. In the case of the wire wiring 23b shown in FIG. 58, the ratio is 55% or more, and these can also be regarded as straight wiring. On the other hand, in the case of the wire wiring 23c shown in FIG. 59, the ratio is less than 30%, and it can be seen that it cannot be regarded as a straight wiring.
上述導電性薄膜11的虛設電極部26等虛設電極部如WO2013/094729中所記載之非導電圖案那樣係在第1配線部16a中，在相鄰之第1電極部17a之間以與第1電極部17a電絕緣（斷線）之方式設置者，又，係在第2配線部16b中，在相鄰之第2電極部17b之間以與第2電極部17b電絕緣（斷線）之方式設置者，但本發明並不限定於此。Dummy electrode portions such as the dummy electrode portion 26 of the conductive thin film 11 are included in the first wiring portion 16a as in the non-conductive pattern described in WO2013 / 094729, and are adjacent to the first electrode portion 17a adjacent to the first electrode portion 17a. The electrode portion 17a is provided in a manner of being electrically insulated (disconnected), and is also connected to the second wiring portion 16b, and is electrically insulated (disconnected) from the second electrode portion 17b between the adjacent second electrode portions 17b. The mode setting person, but the present invention is not limited to this.
當第1電極部17a和/或第2電極部17b中的至少一個的直線配線21a的間距寬時，如圖66所示，可以在網格狀的配線圖案25a的1個開口部22中，在一個直線配線21a的金屬細線14之間，以從被重疊之其他方向的直線配線21b的一個金屬細線14朝向另一個金屬細線14或者相反地從另一個金屬細線14朝向一個金屬細線14而前端不與任何金屬細線14連接亦即斷線（斷路）或者在中途中斷之方式，與一個直線配線21a的金屬細線14平行地將新的金屬細線14拉伸而形成電極內虛設圖案部27。又，相反地，可以在一個直線配線21b的金屬細線14之間，以另一個直線配線21a的一個金屬細線14朝向另一個金屬細線14或者相反地從另一個金屬細線14朝向一個金屬細線14而前端斷線（斷路）或者在中途中斷之方式，與一個直線配線21b的金屬細線14平行地將新的金屬細線14拉伸而形成電極內虛設圖案部27。另外，亦可以從形成該電極內虛設圖案部27之金屬細線14進一步與其他方向的直線配線21的金屬細線14平行地分支而形成電極內虛設圖案部27。當然，分支之金屬細線14的前端斷線（斷路）或者在中途中斷而不與任何金屬細線14連接。圖66所示之例子係表示僅形成於網格狀的配線圖案的1個開口部之電極內虛設圖案部27者，但在其他開口部中當然亦可以同樣地形成有電極內虛設圖案部27。When the pitch of the linear wiring 21a of at least one of the first electrode portion 17a and / or the second electrode portion 17b is wide, as shown in FIG. 66, one opening portion 22 of the grid-shaped wiring pattern 25a may be formed. Between the thin metal wires 14 of one straight wiring 21a, one metal thin wire 14 of the straight wiring 21b in the other direction superimposed faces the other thin metal wire 14 or vice versa from the other thin metal wire 14 toward one thin metal wire 14 and the front end The new metal thin wire 14 is stretched in parallel with the metal thin wire 14 of one linear wiring 21a to form a dummy pattern portion 27 in the electrode, without being connected to any of the metal thin wires 14, that is, disconnected (opened) or interrupted in the middle. On the other hand, between the thin metal wires 14 of one straight wiring 21b, one thin metal wire 14 of the other straight wiring 21a may face another thin metal wire 14 or vice versa. The front end is disconnected (opened) or interrupted halfway, and the new thin metal wire 14 is stretched in parallel with the thin metal wire 14 of one straight line 21 b to form a dummy pattern portion 27 in the electrode. In addition, the metal thin line 14 forming the dummy pattern portion 27 in the electrode may be further branched in parallel with the metal thin line 14 of the linear wiring 21 in another direction to form the dummy pattern portion 27 in the electrode. Of course, the front end of the branched metal thin wire 14 is broken (opened) or interrupted halfway without being connected to any of the metal thin wires 14. The example shown in FIG. 66 shows the dummy pattern portion 27 in the electrode formed only in one opening portion of the grid-shaped wiring pattern. Of course, the dummy pattern portion 27 in the electrode may be similarly formed in other opening portions. .
如此，藉由形成電極內虛設圖案部27，具有如下效果。一般而言，若縮小電極部的金屬細線的間距，則電極的寄生容量增大，其結果，導致觸控位置的檢測精度下降。另一方面，若為了提高檢測靈敏度而擴大金屬細線的間距，則金屬細線容易變得顯眼，導致可見性下降。又，導致容易產生由像素排列圖案與電極部的金屬細線的配線圖案的干涉所引起之疊紋。因此，擴大電極部的金屬細線的間距並減小電極的寄生容量來提高觸控位置檢測精度，另一方面，藉由形成電極內虛設圖案部來縮小電極部的金屬細線與電極內虛設圖案部的金屬細線的組合的間距而降低金屬細線的可見性，又，能夠使疊紋難以產生。
另外，當如此形成電極內虛設圖案部時，本發明中，在存在複數個由電極部的金屬細線與電極內虛設圖案部的金屬細線的組合所形成之配線圖案、進而存在複數個配線層之情況下，使在疊紋的可見性的觀點上被最優化之非等間距的配線圖案包含於由該等配線層中之配線圖案的重合而形成之合成配線圖案中，並利用該合成配線圖案來改善由與顯示器的干涉而產生之疊紋的可見性。例如，在圖7所示之本發明的第2實施形態的導電性薄膜11的情況下，使在疊紋的可見性的觀點上被最優化之非等間距的配線圖案包含於由2層的配線層28a及配線層28b中1個配線層28a中之第1電極部17a的金屬細線與電極內虛設圖案部的金屬細線的組合所形成之配線圖案及合成配線圖案中，並利用該合成配線圖案來改善由與顯示器的干涉而產生之疊紋的可見性，該合成配線圖案係藉由虛設電極部26的配線圖案的組合和由另一個配線層28b中之第2電極部17b的金屬細線與電極內虛設圖案部的金屬細線的組合所形成之配線圖案的重合而形成。
作為其他虛設電極部的形態，有WO2013/094729中所記載之子非導電圖案的形態。As described above, the formation of the dummy pattern portion 27 in the electrode has the following effects. Generally, if the pitch of the thin metal wires in the electrode portion is reduced, the parasitic capacity of the electrode is increased, and as a result, the detection accuracy of the touch position is reduced. On the other hand, if the pitch of the thin metal wires is increased in order to increase the detection sensitivity, the thin metal wires tend to be conspicuous, resulting in a decrease in visibility. Further, it is easy to cause moire caused by interference between the pixel arrangement pattern and the wiring pattern of the metal thin wire of the electrode portion. Therefore, the distance between the metal thin wires in the electrode portion is increased and the parasitic capacity of the electrode is reduced to improve the touch position detection accuracy. On the other hand, the metal thin lines in the electrode portion and the dummy pattern portion in the electrode are reduced by forming a dummy pattern portion in the electrode. The combined pitch of the fine metal wires reduces the visibility of the fine metal wires, and also makes it difficult to produce a moire.
In addition, when the dummy pattern portion in the electrode is formed in this way, in the present invention, there are a plurality of wiring patterns formed by a combination of the metal thin lines in the electrode portion and the metal thin lines in the dummy pattern portion in the electrode, and then there are a plurality of wiring layers. In this case, a non-equidistant wiring pattern optimized in view of the visibility of the moire is included in a synthetic wiring pattern formed by overlapping the wiring patterns in the wiring layers, and the synthetic wiring pattern is used. To improve the visibility of the moire caused by interference with the display. For example, in the case of the conductive thin film 11 according to the second embodiment of the present invention shown in FIG. 7, a non-equidistant wiring pattern optimized in view of the visibility of the moire is included in a two-layer wiring pattern. The wiring pattern and the composite wiring pattern formed by the combination of the metal thin line of the first electrode portion 17a in the wiring layer 28a and the wiring layer 28b of the first electrode portion 17a and the metal thin line of the dummy pattern portion in the electrode use the synthetic wiring Pattern to improve the visibility of the moire caused by interference with the display. The composite wiring pattern is a combination of the wiring pattern of the dummy electrode portion 26 and the thin metal wire of the second electrode portion 17b in the other wiring layer 28b. It is formed by overlapping the wiring pattern formed by the combination with the metal thin line of the dummy pattern portion in the electrode.
As another form of the dummy electrode portion, there is a form of the non-conductive pattern described in WO2013 / 094729.
另外，本發明的導電性薄膜係設置於顯示裝置的顯示單元上之導電性薄膜，其中導電性薄膜具有：透明基體；及配線部，形成於透明基體的至少一個面且由複數個金屬細線構成，配線部具有將線配線沿2個方向以上重疊而成之網格狀的配線圖案，該線配線由在1個方向上平行地排列之複數個金屬細線構成，線配線包含在至少1個方向上複數個金屬細線為直線的直線配線，網格狀的配線圖案係重疊於顯示單元的像素排列圖案上、在至少1個方向的直線配線中既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中至少2根金屬細線的間距為非等間距的非等間距配線圖案。
又，可如下：本發明的導電性薄膜係設置於顯示裝置的顯示單元上之導電性薄膜，其中導電性薄膜具有：透明基體；及配線部，形成於透明基體的至少一個面且由複數個金屬細線構成，配線部具有將直線配線沿2個方向以上重疊而成之配線圖案，該直線配線由在1個方向上平行地排列之複數個金屬細線構成，配線圖案係重疊於顯示單元的像素排列圖案上、在至少1個方向的直線配線中既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距中至少2根金屬細線的間距為非等間距的非等間距配線圖案。In addition, the conductive film of the present invention is a conductive film provided on a display unit of a display device, wherein the conductive film includes: a transparent substrate; and a wiring portion formed on at least one surface of the transparent substrate and composed of a plurality of thin metal wires. The wiring section has a grid-like wiring pattern formed by overlapping wire wiring in two or more directions. The wire wiring is composed of a plurality of thin metal wires arranged in parallel in one direction. The wire wiring includes at least one direction. The plurality of thin metal wires are straight linear wirings. The grid-shaped wiring pattern is superimposed on the pixel arrangement pattern of the display unit. The repeating pitch of a predetermined number of thin metal wires in the straight wirings in at least one direction is an equal pitch and A pitch of at least two metal thin wires among a predetermined number of metal thin wires is a non-equidistant non-equidistant wiring pattern.
In addition, the conductive film of the present invention is a conductive film provided on a display unit of a display device, wherein the conductive film includes: a transparent substrate; and a wiring portion formed on at least one surface of the transparent substrate and composed of a plurality of It is composed of thin metal wires. The wiring section has a wiring pattern formed by overlapping linear wiring in two or more directions. The straight wiring is composed of a plurality of thin metal wires arranged in parallel in one direction. The wiring pattern is superimposed on the pixels of the display unit. The repeating pitch of a predetermined number of thin metal wires in a linear pattern in at least one direction on the array pattern is an equal pitch, and the pitch of at least two of the thin metal wires among a predetermined number of thin metal wires is a non-equal pitch. Pitch wiring pattern.
又，可如下：本發明的導電性薄膜的配線圖案的製作方法係如下導電性薄膜的配線圖案的製作方法，該導電性薄膜設置於顯示裝置的顯示單元上且具有透明基體和配線部，該配線部形成於透明基體的至少一個面且由複數個金屬細線構成，配線部具有將直線配線沿2個方向以上重疊而成之配線圖案，該直線配線由在1個方向上平行地排列之複數個金屬細線構成，其中配線圖案係重疊於顯示單元的像素排列圖案上、至少1個方向的直線配線中既定根數的金屬細線的重複間距為等間距且既定根數的各個金屬細線的間距為非等間距的非等間距配線圖案，獲取像素排列圖案的亮度或透射率，對非等間距的配線圖案及既定根數的金屬細線的重複間距與非等間距的配線圖案相等之等間距的配線圖案分別獲取配線圖案的透射率，對非等間距的配線圖案及等間距的配線圖案分別導出配線圖案的透射率的二維傅立葉頻率分佈，並且導出像素排列圖案的亮度或透射率的二維傅立葉頻率分佈，由配線圖案的透射率的二維傅立葉頻率分佈的各頻率成分和像素排列圖案的亮度或透射率的二維傅立葉頻率分佈的各頻率成分導出疊紋的各頻率成分，使人的視覺響應特性作用於如此計算出之疊紋的各頻率成分而求出各頻率成分的強度的總和亦即疊紋評價值，製作如此求出之非等間距的配線圖案中之疊紋評價值小於等間距的配線圖案中之疊紋評價值的非等間距的配線圖案。The method for producing a wiring pattern of a conductive film according to the present invention may be a method for producing a wiring pattern of a conductive film, which is provided on a display unit of a display device and has a transparent substrate and a wiring portion. The wiring portion is formed on at least one surface of the transparent substrate and is composed of a plurality of thin metal wires. The wiring portion has a wiring pattern formed by overlapping linear wirings in two or more directions. The linear wirings are composed of a plurality of lines arranged in parallel in one direction. It consists of three metal thin lines, where the wiring pattern is superimposed on the pixel arrangement pattern of the display unit, the repeating pitch of a predetermined number of metal thin lines in at least one direction of the linear wiring is equal, and the pitch of each metal thin line of a predetermined number is Non-equivalently spaced non-equivalently spaced wiring patterns, to obtain the brightness or transmittance of pixel array patterns, repeating pitches of non-equivalently spaced wiring patterns and a predetermined number of thin metal wires, and equally-equivalently spaced wiring equal to non-equivalently spaced wiring patterns Patterns to obtain the transmittance of the wiring pattern, for non-equid spacing wiring patterns and equal spacing wiring diagrams The two-dimensional Fourier frequency distribution of the transmittance of the wiring pattern is derived, and the two-dimensional Fourier frequency distribution of the brightness or transmittance of the pixel arrangement pattern is derived. The frequency components and pixel arrangement of the two-dimensional Fourier frequency distribution of the transmittance of the wiring pattern are derived. Each frequency component of the two-dimensional Fourier frequency distribution of the brightness or transmittance of the pattern is used to derive each frequency component of the moire, so that the human visual response characteristic is applied to each frequency component of the moire thus calculated to obtain the intensity of each frequency component. The sum of the moire evaluation values, that is, the non-equal-pitch wiring pattern with the moire evaluation value in the non-equal-pitch wiring pattern obtained in this way is smaller than the moire evaluation value in the equi-pitch wiring pattern.
以上，對本發明之導電性構件、導電性薄膜、具備其之顯示裝置、觸控面板、導電性構件的配線圖案的製作方法及導電性薄膜的配線圖案的製作方法舉出各種實施形態及實施例進行了說明，但本發明並不限定於上述實施形態及實施例，只要不脫離本發明的要旨，則當然可以進行各種改良和/或設計的變更。In the foregoing, various embodiments and examples have been given for the method for producing the wiring pattern of the conductive member, the conductive film, the display device having the same, the touch panel, and the conductive member, and the method for producing the wiring pattern of the conductive film. Although the description has been given, the present invention is not limited to the above-mentioned embodiments and examples, and various improvements and / or design changes can be made without departing from the gist of the present invention.
10、11、11A‧‧‧導電性薄膜10, 11, 11A‧‧‧ conductive film
12、12a、12b‧‧‧透明支持體 12, 12a, 12b ‧‧‧ transparent support
14‧‧‧金屬製的細線（金屬細線） 14‧‧‧ metal thin wire (metal thin wire)
16、16a、16b‧‧‧配線部 16, 16a, 16b ‧‧‧ wiring department
17、17a、17b‧‧‧電極部 17, 17a, 17b‧‧‧ electrode
18、18a、18b‧‧‧黏接層 18, 18a, 18b ‧‧‧ Adhesive layer
20、20a、20b‧‧‧保護層 20, 20a, 20b ‧‧‧ protective layer
21、21a、21b、21c、21d、21e、21f、21g、21i、21j‧‧‧直線配線 21, 21a, 21b, 21c, 21d, 21e, 21f, 21g, 21i, 21j‧‧‧ straight wiring
22、22a、22b、22c、22d‧‧‧開口部 22, 22a, 22b, 22c, 22d ‧‧‧ openings
23a、23b、23c‧‧‧線配線 23a, 23b, 23c‧‧‧Wire Wiring
24‧‧‧配線圖案 24‧‧‧Wiring pattern
24a‧‧‧第1（上側）配線圖案 24a‧‧‧The first (upper) wiring pattern
24b‧‧‧第2（下側）配線圖案 24b‧‧‧The second (lower) wiring pattern
25a、25b、25e、25f‧‧‧包含非等間距的配線圖案之配線圖案 25a, 25b, 25e, 25f ‧‧‧ Wiring patterns including non-equid pitch wiring patterns
25c‧‧‧等間距的配線圖案 25c‧‧‧Equivalent pitch wiring pattern
25d‧‧‧2個方向的配線的間距不同之配線圖案 25d‧‧‧2 wiring patterns with different pitches of wiring
26‧‧‧虛設電極部 26‧‧‧Dummy electrode section
27‧‧‧電極內虛設圖案部 27‧‧‧Dummy pattern part in electrode
28、28a、28b‧‧‧配線層 28, 28a, 28b ‧‧‧ wiring layer
30、30a‧‧‧顯示單元 30, 30a‧‧‧ display unit
32、32r、32g、32b‧‧‧像素 32, 32r, 32g, 32b‧‧‧ pixels
34‧‧‧黑矩陣（BM） 34‧‧‧ Black Matrix (BM)
36‧‧‧區域 36‧‧‧area
38‧‧‧像素排列圖案 38‧‧‧ Pixel Arrangement
40‧‧‧顯示裝置 40‧‧‧ display device
42‧‧‧輸入面 42‧‧‧input surface
44‧‧‧觸控面板 44‧‧‧Touch Panel
46‧‧‧框體 46‧‧‧Frame
48‧‧‧覆蓋構件 48‧‧‧ cover member
50‧‧‧電纜 50‧‧‧cable
52‧‧‧可撓性基板 52‧‧‧ Flexible substrate
54‧‧‧檢測控制部 54‧‧‧ Detection Control Department
56‧‧‧黏接層 56‧‧‧ Adhesive layer
58‧‧‧接觸體 58‧‧‧contact
Prb、P1b~P4b、Pra、P1a~P4a‧‧‧間距 Prb, P1b ~ P4b, Pra, P1a ~ P4a‧‧‧Pitch
Pv‧‧‧垂直像素間距 Pv‧‧‧ Vertical Pixel Pitch
Ph‧‧‧水平像素間距 Ph‧‧‧Horizontal Pixel Pitch
圖1係示意性地表示本發明的第1實施形態之導電性薄膜的一例之局部剖面圖。FIG. 1 is a partial cross-sectional view schematically showing an example of a conductive film according to a first embodiment of the present invention.
圖2係示意性地表示圖1所示之導電性薄膜的配線部的網格狀的配線圖案的一例之平面圖。 FIG. 2 is a plan view schematically showing an example of a grid-like wiring pattern of a wiring portion of the conductive film shown in FIG. 1.
圖3係示意性地表示圖2所示之配線圖案的1個方向的直線配線中之非等間距的配線圖案之平面圖。 FIG. 3 is a plan view schematically showing a non-equidistant wiring pattern in linear wiring in one direction of the wiring pattern shown in FIG. 2.
圖4係示意性地表示圖2所示之配線圖案的另1個方向的直線配線中之非等間距的配線圖案之平面圖。 FIG. 4 is a plan view schematically showing a non-equidistant wiring pattern in linear wiring in another direction of the wiring pattern shown in FIG. 2.
圖5係示意性地表示圖1所示之導電性薄膜的配線部的網格狀的配線圖案的另一例之平面圖。 FIG. 5 is a plan view schematically showing another example of a grid-like wiring pattern of a wiring portion of the conductive film shown in FIG. 1.
圖6係示意性地表示圖5所示之配線圖案的另1個方向的直線配線中之等間距的配線圖案之平面圖。 FIG. 6 is a plan view schematically showing an equally-spaced wiring pattern in the linear wiring in the other direction of the wiring pattern shown in FIG. 5.
圖7係本發明的第2實施形態之導電性薄膜的一例的示意性地局部剖面圖。 Fig. 7 is a schematic partial cross-sectional view of an example of a conductive film according to a second embodiment of the present invention.
圖8A係本發明的第3實施形態之導電性薄膜的一例的示意性地局部剖面圖。 8A is a schematic partial cross-sectional view of an example of a conductive thin film according to a third embodiment of the present invention.
圖8B係本發明的第4實施形態之導電性薄膜的一例的示意性地局部剖面圖。 8B is a schematic partial cross-sectional view of an example of a conductive film according to a fourth embodiment of the present invention.
圖9係表示適用本發明之導電性薄膜之顯示單元的一部分像素排列圖案的一例之概略說明圖。 FIG. 9 is a schematic explanatory diagram showing an example of a part of a pixel arrangement pattern of a display unit to which the conductive film of the present invention is applied.
圖10係組裝有圖1所示之導電性薄膜之顯示裝置的一實施例的概略剖面圖。 FIG. 10 is a schematic cross-sectional view of an embodiment of a display device incorporating the conductive film shown in FIG. 1.
圖11係示意性地表示圖9所示之顯示單元的像素排列的亮度圖案的一例之平面圖。 11 is a plan view schematically showing an example of a brightness pattern of a pixel arrangement of the display unit shown in FIG. 9.
圖12係示意性地表示以往的網格狀的配線圖案（配線的透射率的圖案）之平面圖。 FIG. 12 is a plan view schematically showing a conventional grid-like wiring pattern (pattern of transmittance of wiring).
圖13係示意性地表示圖12所示之配線圖案的1個方向的直線配線中之等間距的配線圖案之平面圖。 FIG. 13 is a plan view schematically showing an equally-spaced wiring pattern among linear wirings in one direction of the wiring pattern shown in FIG. 12.
圖14係圖11所示之像素排列圖案的二維頻率分佈的圖。 FIG. 14 is a diagram of a two-dimensional frequency distribution of the pixel arrangement pattern shown in FIG. 11.
圖15係圖12所示之配線圖案的二維頻率分佈的圖。 FIG. 15 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 12.
圖16係標繪有由圖14所示之像素排列圖案的各頻率成分和圖15所示之配線圖案的各頻率成分計算出之疊紋成分之圖。 FIG. 16 is a diagram plotting a moiré component calculated from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 15.
圖17係表示圖16所示之各疊紋成分乘以人眼的視覺特性的靈敏度而得到之結果之圖。 FIG. 17 is a graph showing the results obtained by multiplying each of the moire components shown in FIG. 16 by the sensitivity of the visual characteristics of the human eye.
圖18A係表示人眼的視覺特性的靈敏度之視覺傳遞函數的曲線圖。 FIG. 18A is a graph showing the visual transfer function of the sensitivity of the visual characteristics of the human eye.
圖18B係表示人眼的視覺特性的靈敏度之另一視覺傳遞函數的曲線圖。 FIG. 18B is a graph showing another visual transfer function of the sensitivity of the visual characteristics of the human eye.
圖19係圖12所示之配線圖案的4根配線的透射率的一維輪廓（profile）。 FIG. 19 is a one-dimensional profile of the transmittance of the four wires of the wiring pattern shown in FIG. 12.
圖20係圖19所示之4根配線的第2個配線的透射率的一維輪廓。 FIG. 20 is a one-dimensional profile of the transmittance of the second wiring of the four wirings shown in FIG. 19.
圖21係圖19所示之配線圖案的一維頻率分佈的圖。 FIG. 21 is a diagram of a one-dimensional frequency distribution of the wiring pattern shown in FIG. 19.
圖22係圖2所示之最優化結果的4根配線的透射率的一維輪廓。 FIG. 22 is a one-dimensional profile of the transmittance of the four wires shown in the optimization result shown in FIG. 2.
圖23係圖22所示之配線圖案的一維頻率分佈的圖。 FIG. 23 is a diagram of a one-dimensional frequency distribution of the wiring pattern shown in FIG. 22.
圖24係圖2所示之配線圖案的二維頻率分佈的圖。 FIG. 24 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 2.
圖25係標繪有由圖14所示之像素排列圖案的各頻率成分和圖2所示之配線圖案的各頻率成分計算出之疊紋成分之圖。 FIG. 25 is a diagram plotting a moiré component calculated from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 2.
圖26係表示圖25所示之各疊紋成分乘以人眼的視覺特性的靈敏度而得到之結果之圖。 FIG. 26 is a graph showing the results obtained by multiplying the respective moire components shown in FIG. 25 by the sensitivity of the visual characteristics of the human eye.
圖27係512根配線為非等間距的配線圖案的二維頻率分佈的圖。 FIG. 27 is a diagram showing the two-dimensional frequency distribution of 512 wirings with non-equidistant wiring patterns.
圖28係標繪有由圖14所示之像素排列圖案的各頻率成分和圖27所示之配線圖案的各頻率成分計算出之疊紋成分之圖。 FIG. 28 is a diagram plotting a moiré component calculated from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 27.
圖29係表示圖28所示之各疊紋成分乘以人眼的視覺特性的靈敏度而得到之結果之圖。 FIG. 29 is a graph showing the results obtained by multiplying each of the moire components shown in FIG. 28 by the sensitivity of the visual characteristics of human eyes.
圖30係示意性地表示圖1所示之導電性薄膜的配線部的網格狀的配線圖案的一例之平面圖。 FIG. 30 is a plan view schematically showing an example of a grid-like wiring pattern of a wiring portion of the conductive film shown in FIG. 1.
圖31係示意性地表示圖30所示之配線圖案的1個方向的直線配線中之等間距的配線圖案之平面圖。 FIG. 31 is a plan view schematically showing an equally-spaced wiring pattern among linear wirings in one direction of the wiring pattern shown in FIG. 30.
圖32係示意性地表示圖30所示之配線圖案的另1個方向的直線配線中之不同之等間距的配線圖案之平面圖。 FIG. 32 is a plan view schematically showing differently-spaced wiring patterns in the linear wiring in the other direction of the wiring pattern shown in FIG. 30.
圖33係圖30所示之配線圖案的二維頻率分佈的圖。 FIG. 33 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 30.
圖34係標繪有由圖14所示之像素排列圖案的各頻率成分和圖30所示之配線圖案的各頻率成分計算出之疊紋成分之圖。 FIG. 34 is a diagram plotting a moiré component calculated from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 30.
圖35係圖34所示之疊紋成分中根據圖31所示之直線配線計算出之疊紋成分。 FIG. 35 shows a moire component calculated from the straight line wiring shown in FIG. 31 among the moire components shown in FIG. 34.
圖36係圖34所示之疊紋成分中根據圖32所示之直線配線計算出之疊紋成分。 FIG. 36 shows a moire component calculated from the straight wiring shown in FIG. 32 among the moire components shown in FIG. 34.
圖37係示意性地表示圖1所示之導電性薄膜的配線部的網格狀的配線圖案的另一例之平面圖。 FIG. 37 is a plan view schematically showing another example of the grid-like wiring pattern of the wiring portion of the conductive film shown in FIG. 1.
圖38係示意性地表示圖37所示之配線圖案的1個方向的直線配線中之非等間距的配線圖案之平面圖。 FIG. 38 is a plan view schematically showing a non-equidistant wiring pattern in linear wiring in one direction of the wiring pattern shown in FIG. 37.
圖39係圖37所示之配線圖案的二維頻率分佈的圖。 FIG. 39 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 37.
圖40係標繪有由圖14所示之像素排列圖案的各頻率成分和圖39所示之配線圖案的各頻率成分計算出之疊紋成分之圖。 FIG. 40 is a diagram plotting a moiré component calculated from each frequency component of the pixel arrangement pattern shown in FIG. 14 and each frequency component of the wiring pattern shown in FIG. 39.
圖41係圖40所示之疊紋成分中根據圖38所示之直線配線計算出之疊紋成分。 FIG. 41 is a moire component calculated from the linear wiring shown in FIG. 38 among the moire components shown in FIG. 40.
圖42係表示圖35所示之各疊紋成分乘以人眼的視覺特性的靈敏度而得到之結果之圖。 FIG. 42 is a graph showing the results obtained by multiplying the respective moire components shown in FIG. 35 by the sensitivity of the visual characteristics of the human eye.
圖43係表示圖41所示之各疊紋成分乘以人眼的視覺特性的靈敏度而得到之結果之圖。 FIG. 43 is a graph showing the results obtained by multiplying each of the moire components shown in FIG. 41 by the sensitivity of the visual characteristics of the human eye.
圖44係表示圖12所示之配線的透射率圖案的一維輪廓以及主配線頻率成分的cos波及sin波之曲線圖。 FIG. 44 is a graph showing the one-dimensional profile of the transmittance pattern of the wiring shown in FIG. 12 and the cos wave and sin wave of the main wiring frequency component.
圖45係表示圖44所示之配線的透射率圖案的一維輪廓乘以cos波而得到之輪廓之曲線圖。 FIG. 45 is a graph showing a one-dimensional profile of the transmittance pattern of the wiring shown in FIG. 44 multiplied by a cos wave.
圖46係表示圖2所示之網格狀的配線圖案（配線的透射率圖案）的一維輪廓以及主配線頻率成分的cos波及sin波之曲線圖。 FIG. 46 is a graph showing the one-dimensional profile of the grid-like wiring pattern (wiring transmittance pattern) shown in FIG. 2 and the cos wave and sin wave of the main wiring frequency component.
圖47係表示圖46所示之配線的透射率圖案的一維輪廓乘以cos波而得到之輪廓之曲線圖。 FIG. 47 is a graph showing a profile obtained by multiplying a one-dimensional profile of the transmittance pattern of the wiring shown in FIG. 46 by a cos wave.
圖48係表示圖31所示之等間距的配線圖案（配線的透射率圖案）的一維輪廓以及主配線頻率成分的cos波及sin波之曲線圖。 FIG. 48 is a graph showing the one-dimensional profile of the equally spaced wiring pattern (wiring transmittance pattern) shown in FIG. 31 and the cos wave and sin wave of the main wiring frequency component.
圖49係表示圖48所示之配線的透射率圖案的一維輪廓乘以cos波而得到之輪廓之曲線圖。 FIG. 49 is a graph showing a profile obtained by multiplying a one-dimensional profile of the transmittance pattern of the wiring shown in FIG. 48 by a cos wave.
圖50係表示圖38所示之非等間距的配線圖案（配線的透射率圖案）的一維輪廓以及主配線頻率成分的cos波及sin波之曲線圖。 FIG. 50 is a graph showing the one-dimensional profile of the non-equid-pitch wiring pattern (wiring transmittance pattern) shown in FIG. 38 and the cos wave and sin wave of the main wiring frequency component.
圖51係表示圖50所示之配線的透射率圖案的一維輪廓乘以cos波而得到之輪廓之曲線圖。 FIG. 51 is a graph showing a one-dimensional profile of the transmittance pattern of the wiring shown in FIG. 50 multiplied by a cos wave.
圖52係表示本發明之導電性薄膜的配線圖案的製作方法的一例之流程圖。 FIG. 52 is a flowchart showing an example of a method for producing a wiring pattern of the conductive film of the present invention.
圖53係表示本發明中之非等間距配線圖案的疊紋值計算處理方法的一例之流程圖。 FIG. 53 is a flowchart showing an example of a method for calculating a moire value of a non-equidistant wiring pattern in the present invention.
圖54係表示本發明中之非等間距配線圖案的疊紋值計算處理方法的另一例之流程圖。 FIG. 54 is a flowchart showing another example of a method for calculating a moire value of a non-equidistant wiring pattern in the present invention.
圖55係表示本發明中之非等間距配線圖案的疊紋值計算處理方法的另一例之流程圖。 FIG. 55 is a flowchart showing another example of a method for calculating a moire value of a non-equidistant wiring pattern in the present invention.
圖56係示意性地表示圖1所示之導電性薄膜的配線部的網格狀的配線圖案的另一例之平面圖。 FIG. 56 is a plan view schematically showing another example of the grid-like wiring pattern of the wiring portion of the conductive film shown in FIG. 1.
圖57係示意性地表示導電性薄膜的配線部的線配線的一例之平面圖。 FIG. 57 is a plan view schematically showing an example of wire wiring in a wiring portion of a conductive film.
圖58係示意性地表示導電性薄膜的配線部的線配線的另一例之平面圖。 FIG. 58 is a plan view schematically showing another example of the wire wiring of the wiring portion of the conductive film.
圖59係示意性地表示導電性薄膜的配線部的線配線的另一例之平面圖。 FIG. 59 is a plan view schematically showing another example of the wire wiring of the wiring portion of the conductive film.
圖60係圖57所示之配線圖案的二維頻率分佈的圖。 FIG. 60 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 57.
圖61係圖58所示之配線圖案的二維頻率分佈的圖。 FIG. 61 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 58.
圖62係圖59所示之配線圖案的二維頻率分佈的圖。 FIG. 62 is a diagram of a two-dimensional frequency distribution of the wiring pattern shown in FIG. 59.
圖63係表示在圖60～圖62所示之配線圖案的二維頻率分佈中既定的角度範圍中之頻率成分的強度的總和相對於所有頻率成分的強度的總和之比率之曲線圖。 FIG. 63 is a graph showing the ratio of the sum of the intensities of the frequency components to the sum of the intensities of all the frequency components in the two-dimensional frequency distribution of the wiring patterns shown in FIGS. 60 to 62.
圖64係示意性地表示適用本發明之導電性薄膜之顯示單元的像素排列的亮度圖案的另一例之平面圖。 64 is a plan view schematically showing another example of a brightness pattern of a pixel arrangement of a display unit to which the conductive film of the present invention is applied.
圖65係圖64所示之像素排列圖案的二維頻率分佈的圖。 FIG. 65 is a diagram of a two-dimensional frequency distribution of the pixel arrangement pattern shown in FIG. 64.
圖66係示意性地表示本發明的網格狀的配線圖案的1個開口部內的電極內虛設圖案部的一例之平面圖。 FIG. 66 is a plan view schematically showing an example of a dummy pattern portion in an electrode in one opening portion of the grid-shaped wiring pattern of the present invention.
Claims (33)
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| JP2018-059810 | 2018-03-27 | ||
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| JP (1) | JP7062609B2 (en) |
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| WO2019189187A1 (en) * | 2018-03-27 | 2019-10-03 | 富士フイルム株式会社 | Conductive member, conductive film, display device, and touch panel |
| WO2019189201A1 (en) * | 2018-03-27 | 2019-10-03 | 富士フイルム株式会社 | Conductive member, conductive film, display device, and touch panel |
| JP2022029727A (en) * | 2020-08-05 | 2022-02-18 | 三菱電機株式会社 | Antenna built-in touch screen and display apparatus |
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| US8599150B2 (en) * | 2009-10-29 | 2013-12-03 | Atmel Corporation | Touchscreen electrode configuration |
| EP2823638A1 (en) * | 2012-02-29 | 2015-01-14 | Sabanci Üniversitesi | Self-reset asynchronous pulse frequency modulated droic with extended counting and having reduced quantization noise |
| JP5795746B2 (en) * | 2012-03-30 | 2015-10-14 | 富士フイルム株式会社 | Conductive film, display device including the same, and method for determining pattern of conductive film |
| JP5779535B2 (en) | 2012-03-30 | 2015-09-16 | 富士フイルム株式会社 | Conductive film, display device including the same, and method for determining pattern of conductive film |
| JP6031980B2 (en) * | 2012-12-04 | 2016-11-24 | 三菱電機株式会社 | touch screen |
| JP6463133B2 (en) | 2013-02-05 | 2019-01-30 | 富士フイルム株式会社 | Display device provided with conductive film |
| JP5943023B2 (en) * | 2013-07-08 | 2016-06-29 | 凸版印刷株式会社 | Touch sensor electrode, touch panel, and display device |
| JP6068322B2 (en) * | 2013-12-03 | 2017-01-25 | 富士フイルム株式会社 | Conductive sheet, capacitive touch panel and display device |
| JP6265021B2 (en) * | 2014-04-18 | 2018-01-24 | 大日本印刷株式会社 | Touch panel sensor, touch panel device, and display device |
| JP2016014929A (en) * | 2014-06-30 | 2016-01-28 | 富士フイルム株式会社 | Conductive film, display device with the same, and evaluation method for conductive film |
| JP6275618B2 (en) | 2014-10-15 | 2018-02-07 | 富士フイルム株式会社 | Conductive film, display device including the same, and method for evaluating wiring pattern of conductive film |
| JP6294506B2 (en) * | 2014-11-21 | 2018-03-14 | 富士フイルム株式会社 | Conductive film, touch panel sensor including the same, and touch panel sensor |
| JP6506992B2 (en) | 2015-03-13 | 2019-04-24 | 株式会社ジャパンディスプレイ | Detection device and display device |
| CN107407999A (en) | 2015-03-26 | 2017-11-28 | 三菱制纸株式会社 | Transmitance conductive material |
| JP6307468B2 (en) * | 2015-03-31 | 2018-04-04 | 富士フイルム株式会社 | Conductive film, display device including the same, and method for evaluating conductive film |
| JPWO2017126212A1 (en) * | 2016-01-22 | 2018-11-01 | 富士フイルム株式会社 | Conductive film and touch panel |
| JP6977042B2 (en) * | 2017-07-27 | 2021-12-08 | 富士フイルム株式会社 | Conductive members for touch panels and touch panels |
| WO2019189187A1 (en) * | 2018-03-27 | 2019-10-03 | 富士フイルム株式会社 | Conductive member, conductive film, display device, and touch panel |
| WO2019189201A1 (en) * | 2018-03-27 | 2019-10-03 | 富士フイルム株式会社 | Conductive member, conductive film, display device, and touch panel |
| JP7015271B2 (en) * | 2018-05-21 | 2022-02-02 | 富士フイルム株式会社 | A method for producing a wiring pattern for a conductive member, a conductive film, a display device including the conductive member, a touch panel, and a conductive member, and a method for producing a wiring pattern for the conductive film. |
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2019
- 2019-03-26 WO PCT/JP2019/012864 patent/WO2019189187A1/en active Application Filing
- 2019-03-26 JP JP2019058538A patent/JP7062609B2/en active Active
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| KR102444527B1 (en) | 2022-09-20 |
| TWI793288B (en) | 2023-02-21 |
| CN111971644A (en) | 2020-11-20 |
| JP7062609B2 (en) | 2022-05-06 |
| KR20200124281A (en) | 2020-11-02 |
| CN111971644B (en) | 2024-09-17 |
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