TW201939356A - Code-scanning image recognition method, apparatus and device - Google Patents

Abstract

A code-scanning image recognition method, apparatus and device. The method comprises: when a code-scanning image is recognized, a GPU performing binarization processing on a current code-scanning image frame, then providing a binarization result to a CPU, and then continuously processing a next code-scanning image frame, meanwhile, the CPU is capable of recognizing the binarization result, and if the recognition fails, recognizing the next binarization result until the recognition succeeds.

Description

Scan code image recognition method, device and equipment

This specification relates to the technical field of computer software, and in particular, to a method, a device, and a device for recognizing a scan code image.

The popularization of the use of smart phones has brought convenience to people's lives. Through the use of various applications on smart phones, various businesses can be performed accordingly.
Smart phones often scan and identify the QR code to obtain the business information contained in the QR code, and then interact with another device based on the business information to achieve specific services, such as payment services and instant messaging services.
In the prior art, when scanning a two-dimensional code, a smart phone uses a camera to align the two-dimensional code, and continuously captures the scan code image frame. The central processing unit (CPU) of the smart phone scans each scan code image. The frame is binarized and recognized until the information contained in the QR code is successfully identified.
Based on the existing technology, a more efficient scan code image recognition scheme is needed.

The embodiments of the present specification provide a scan code image recognition method, device, and device to solve the following technical problems: a more efficient scan code image recognition scheme is needed.
To solve the above technical problems, the embodiments of the present specification are implemented as follows:
A scanning code image recognition method provided by an embodiment of this specification includes:
Get the current scan code image frame;
Using a Graphics Processing Unit (GPU) to perform binarization processing on the current scan code image frame to obtain a binarization result;
The binarization result is provided to a CPU, so that the binarization result is recognized by the CPU to obtain a scan code image recognition result.
A scanning code image recognition device provided by an embodiment of this specification includes:
Acquisition module to acquire the current scan code image frame;
A binarization module, using a GPU, to binarize the current scan code image frame to obtain a binarization result;
The recognition module provides the binarization result to the CPU, so as to use the CPU to identify the binarization result to obtain a scan code image recognition result.
A scanning code image recognition device provided by an embodiment of this specification includes:
At least one processor; and
A memory connected in communication with the at least one processor; wherein,
The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can:
Get the current scan code image frame;
Using a GPU to perform a binarization process on the current scan code image frame to obtain a binarization result;
The binarization result is provided to a CPU, so that the binarization result is recognized by the CPU to obtain a scan code image recognition result.
The at least one of the above technical solutions adopted in the embodiments of the present specification can achieve the following beneficial effects: when identifying a plurality of continuous scan code image frames, the GPU performs the binarization processing instead of the CPU, and the CPU only needs to further identify the binarization result. However, these two processes can be performed in parallel, which is beneficial to improving the scan code image recognition efficiency.

The embodiments of the present specification provide a scan code image recognition method, device and device.
In order to enable those skilled in the art to better understand the technical solutions in the present specification, the technical solutions in the embodiments of the present specification will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present specification. Obviously, the described The examples are only part of the examples of this application, but not all examples. Based on the embodiments of the present specification, all other embodiments obtained by a person of ordinary skill in the art without creative efforts should fall within the protection scope of the present application.
FIG. 1 is a schematic diagram of an overall architecture related to the solution of this specification in an actual application scenario. In this overall architecture, the camera, GPU, and CPU on the user terminal device are mainly concerned. User terminal equipment, for example, includes smart phones, tablet computers, merchant cash registers, and point of sale (POS) machines. The camera is used to continuously collect the scan code image frame when the user scans the code, the GPU is used to binarize the scan code image frame, and the CPU is used to identify the binarization result, thereby implementing scan code image recognition.
The following mainly describes the scheme of the present specification based on the exemplary architecture of FIG. 1.
FIG. 2 is a schematic flowchart of a scan code image recognition method provided by an embodiment of the present specification. The process can also be executed based on a simple operation trigger of a user (such as clicking a "scan" button, etc.), or, if required, also May be performed automatically in due course.
From a device perspective, the execution subject of this process can be a user terminal device. From a program perspective, the execution subject of the process can be a program installed in the above-mentioned device, and the form of the program can be a client, a web page, or a server.
The process in Figure 2 can include the following steps:
S202: Obtain the current scan code image frame.
In the embodiments of the present specification, for background scenes, the scanning code mainly refers to scanning a two-dimensional code. Of course, in addition to the two-dimensional code, other digital object unique identifiers (DOIs), such as barcodes, Uniform Resource Locators (URLs), which may be identified through scanning, may be used. Refers to scanning the corresponding DOI.
In the embodiment of the present specification, for example, a scan code image frame is continuously acquired by a camera on a smart phone, and a smart phone is generally operated by a user's hand. During the scan code process, the focus and alignment may be at any time. Therefore, each scan code image frame collected continuously is usually different. Some scan code image frames may be able to successfully identify the information contained in the code, while other scan code image frames may not be successfully identified. Information contained in the code. You can try to identify each scanned code image frame in turn, and after successfully identifying the information contained in the code, stop the subsequent recognition process.
S204: Use the GPU to perform a binarization process on the current scan code image frame to obtain a binarization result.
In the embodiment of the present specification, the GPU is used to share the work for the CPU, and the scan code image frame to be identified by the GPU is binarized. The CPU does not need to perform binarization. The CPU is responsible for identifying the binarization result, thereby reducing Burdened the CPU.
S206: The binarization result is provided to a CPU, so that the binarization result is recognized by the CPU to obtain a scan code image recognition result.
In the embodiment of the present specification, assuming that only one scan code image frame is used to successfully identify the information contained in the code, the entire scan code image recognition process is only a serial work process, and the GPU performs two scans on the scan code image frame. The binarization result is successfully identified by the CPU for the binarization result of the scan code image frame.
However, if multiple scan code image frames are used to successfully identify the information contained in the code, because the GPU and CPU can work in parallel, the entire scan code image recognition process is a process of serial work plus parallel work. The processing process of each scan code image frame is serial. Parallel means that the following two processes can be performed in parallel: the process of identifying the binarization result of a scan code image frame by the CPU, and the process of binarization using the GPU. The process of scanning the image frame behind the scan image frame.
In the embodiment of the present specification, the scan code image recognition result is generally a character string included in the code, and the character string represents, for example, information such as a payment account, a jump URL, and a business card.
Through the method in FIG. 2, when recognizing consecutive multiple scan code image frames, the GPU performs the binarization processing instead of the CPU. The CPU only needs to further identify the binarization result. These two processes can be executed in parallel, which is advantageous. It is used to improve the scanning code image recognition efficiency, and it is also beneficial to reduce the burden on the CPU.
Based on the method of FIG. 2, the embodiments of the present specification also provide some specific implementations of the method, as well as extended solutions, which are described below.
In the embodiment of the present specification, in order to realize the parallel operation of the GPU and the CPU during the scan code picture recognition process, the separate work of the GPU and the CPU may be performed based on different threads or different processes without affecting each other.
For example, for step S204, using the GPU to binarize the current scan code image frame may specifically include: a first thread using the GPU to binarize the current scan code image frame . For step S206, the using the CPU to identify the binarization result may specifically include: a second thread using the CPU to identify the binarization result. The first thread and the second thread are different threads.
In the embodiment of the present specification, according to the foregoing description, the current scan code image frame alone may not be able to identify successfully. Therefore, in step S206, after the binarization result is provided to the CPU, it can also be used. The GPU continues to binarize the next scan code image frame. Of course, the GPU's continuous processing process does not need to wait for the CPU to process the binarization result. The process of using the CPU to identify the binarization result and the process of using the GPU to binarize the scan code image frame can be executed in parallel.
In the embodiment of the present specification, for step S206, the specific implementation schemes of providing the binarization result to the CPU are various. For example, after using the CPU to obtain the binarization result, and sending a corresponding notification (for example, to a function module that uses the CPU to identify the binarization result, this function module is referred to as a CPU identification module here) so that the CPU can identify the module. The group obtains the binarization result in the result pool, or it can also actively send the binarization result to the CPU identification module, or it does not wait for the CPU identification module to obtain the binary by itself. Valued results. After the CPU identification module obtains the binarization result, it can be provided to the CPU for use.
In the embodiment of the present specification, the GPU may perform binarization processing on multiple scan code image frames, and accordingly, multiple binarization results will be obtained. In order to facilitate the use of the CPU, these binarized results can be stored uniformly. For example, a result pool can be established to store each binarized result for use by the CPU. The location of the result pool is not limited, and can be stored in, for example, memory or cache In other volatile memory, it can also be in non-volatile memory such as hard disk or flash memory.
For example, for step S206, the providing the binarization result to the CPU may specifically include: storing the binarization result in a result pool, and sending a corresponding notification so that the CPU obtains all the results in the result pool. The binarization results are described. Further, if the CPU fails to identify the binarization result, the CPU may use the CPU to obtain the next binarization result from the result pool for identification until the identification is successful.
According to the above description, a schematic diagram of the implementation principle of the foregoing scan code image recognition method provided in an embodiment of this specification in an actual application scenario is shown in FIG. 3.
In Figure 3, the GPU is used to continuously binarize each scan code image frame and save each binarization result in the result pool. When there are new binarization results in the binarization result pool , Notify the CPU identification module to take the binarization result, and then the CPU identification module uses the CPU to identify the binarization result. If the identification is successful, the result is returned. If the identification fails, the next binarization result is obtained from the result pool. Continue identification until identification is successful.
Based on the same thinking, the embodiments of the present specification also provide a device and a device corresponding to the foregoing method, as shown in FIG. 4 and FIG. 5.
FIG. 4 is a schematic structural diagram of a scan code image recognition device corresponding to FIG. 2 according to an embodiment of the present specification. The device includes:
The acquisition module 401 acquires the current scan code image frame;
A binarization module 402, using a GPU, to binarize the current scan code image frame to obtain a binarization result;
The recognition module 403 provides the binarization result to a CPU, so that the binarization result is recognized by the CPU to obtain a scan code image recognition result.
Optionally, the binarization module 402 uses a GPU to perform binarization processing on the current scan code image frame, which specifically includes:
The binarization module 402 performs a binarization process on the current scan code image frame by using a GPU through a first thread;
The identification module 403 uses the CPU to identify the binarization result, and specifically includes:
The identification module 403 uses the CPU to identify the binarization result through a second thread, wherein the first thread and the second thread are different threads.
Optionally, after the recognition module 403 provides the binarization result to the CPU, the binarization module 402 performs binarization processing on the next scan code image frame by using the GPU, where: The process of using the CPU to identify the binarization result and the process of using the GPU to binarize the scan code image frame can be executed in parallel.
Optionally, the identifying module 403 provides the binary result to the CPU, which specifically includes:
The identification module 403 stores the binarization result in a result pool, and sends a corresponding notification so that the CPU obtains the binarization result in the result pool.
Optionally, if the use of the CPU to identify the binary result fails, the identification module 403 uses the CPU to obtain the next binary result from the result pool for identification.
Optionally, the scanning code includes scanning a two-dimensional code.
FIG. 5 is a schematic structural diagram of a scan code image recognition device corresponding to FIG. 2 according to an embodiment of the present specification. The device includes:
At least one processor; and
A memory connected in communication with the at least one processor; wherein,
The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can:
Get the current scan code image frame;
Using a GPU to perform a binarization process on the current scan code image frame to obtain a binarization result;
The binarization result is provided to a CPU, so that the binarization result is recognized by the CPU to obtain a scan code image recognition result.
Based on the same thinking, the embodiment of the present specification also provides a non-volatile computer storage medium corresponding to FIG. 2, which stores computer-executable instructions, and the computer-executable instructions are set to:
Get the current scan code image frame;
Using a GPU to perform a binarization process on the current scan code image frame to obtain a binarization result;
The binarization result is provided to a CPU, so that the binarization result is recognized by the CPU to obtain a scan code image recognition result.
The specific embodiments of the present specification have been described above. Other embodiments are within the scope of the appended patent applications. In some cases, the actions or steps described in the scope of the patent application may be performed in a different order than in the embodiments and still achieve the desired result. In addition, the processes depicted in the figures do not necessarily require the particular order shown or sequential order to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments. In particular, the embodiments of the device, equipment, and non-volatile computer storage medium are basically similar to the method embodiment, so the description is relatively simple. For the related parts, refer to the description of the method embodiment.
The devices, devices, and non-volatile computer storage media provided in the embodiments of this specification correspond to the methods. Therefore, the devices, devices, and non-volatile computer storage media also have beneficial technical effects similar to the corresponding methods. The beneficial technical effects of the device are described in detail, and therefore, the beneficial technical effects of corresponding devices, equipment, and non-volatile computer storage media are not repeated here.
In the 1990s, for a technical improvement, it can be clearly distinguished whether it is an improvement in hardware (for example, circuit structure of diodes, transistors, switches, etc.) or an improvement in software (for method flow improvement of). However, with the development of technology, the improvement of many methods and processes can be regarded as a direct improvement of the hardware circuit structure. Designers almost always get the corresponding hardware circuit structure by programming the improved method flow into the hardware circuit. Therefore, it cannot be said that the improvement of a method flow cannot be realized by a hardware entity module. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logic function is determined by the user's programming of the device . Designers can program a digital system to "integrate" on a PLD by themselves, without having to ask a chip manufacturer to design and produce a dedicated integrated circuit chip. Moreover, today, instead of making integrated circuit chips manually, this programming is mostly implemented with "logic compiler" software, which is similar to the software compiler used in program development and writing. The original source code before compilation must also be written in a specific programming language. This is called the Hardware Description Language (HDL). There is not only one kind of HDL, but many types, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, RHDL (Ruby Hardware Description Language), etc. Currently, the most commonly used are Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) and Verilog. Those skilled in the art should also be clear that as long as the method flow is logically programmed and integrated into the integrated circuit using the above-mentioned several hardware description languages, the hardware circuit that implements the logic method flow can be easily obtained.
The controller may be implemented in any suitable manner, for example, the controller may take the form of a microprocessor or processor and a computer-readable storage of computer-readable program code (e.g., software or firmware) executable by the (micro) processor. Media, logic gates, switches, application specific integrated circuits (ASICs), programmable logic controllers and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20 and Silicone Labs C8051F320, the memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art also know that, in addition to implementing the controller in pure computer-readable program code, the controller can be controlled by logic gates, switches, dedicated integrated circuits, and programmable logic by programming the method steps logically. Controller and embedded microcontroller to achieve the same function. Therefore, the controller can be considered as a hardware component, and the device included in the controller for implementing various functions can also be considered as a structure in the hardware component. Or even, a device for implementing various functions can be regarded as a structure that can be both a software module implementing the method and a hardware component.
The system, device, module, or unit described in the foregoing embodiments may be specifically implemented by a computer chip or entity, or a product with a certain function. A typical implementation device is a computer. Specifically, the computer may be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable Device or any combination of these devices.
For the convenience of description, when describing the above device, the functions are divided into various units and described separately. Of course, when implementing this specification, the functions of each unit may be implemented in the same software or multiple software and / or hardware.
Those skilled in the art should understand that the embodiments of the present specification may be provided as a method, a system, or a computer program product. Therefore, the embodiments of the present specification may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present specification may adopt a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code. form.
This specification is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the specification. It should be understood that each flow and / or block in the flowchart and / or block diagram, and a combination of the flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special purpose computer, embedded processor, or other programmable data processing device to generate a machine for instructions to be executed by the processor of the computer or other programmable data processing device Generate means for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
These computer program instructions may also be stored in computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory produce a manufactured article including the instruction device , The instruction device realizes the functions specified in a flowchart or a plurality of processes and / or a block or a block of the block diagram.
These computer program instructions can also be loaded on a computer or other programmable data processing device, so that a series of operating steps can be performed on the computer or other programmable device to generate computer-implemented processing, so that the computer or other programmable device can The instructions executed on the steps provide steps for realizing the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.
Memory may include non-permanent memory, random access memory (RAM), and / or non-volatile memory in computer-readable media, such as read-only memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media includes permanent and non-permanent, removable and non-removable media. Information can be stored by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), Read-only memory (ROM), electrically erasable and programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, CD-ROM, digital versatile disc ( DVD) or other optical storage, magnetic tape cartridges, magnetic tape storage or other magnetic storage devices, or any other non-transmission media, can be used to store information that can be accessed by computing devices. According to the definition in this article, computer-readable media does not include temporary computer-readable media (transitory media), such as modulated data signals and carrier waves.
It should also be noted that the terms "including,""including," or any other variation thereof are intended to encompass non-exclusive inclusion, so that a process, method, product, or device that includes a range of elements includes not only those elements, but also Other elements not explicitly listed, or those that are inherent to such a process, method, product, or device. Without more restrictions, the elements defined by the sentence "including a ..." do not exclude the existence of other identical elements in the process, method, product or equipment including the elements.
Those skilled in the art should understand that the embodiments of the present specification may be provided as a method, a system, or a computer program product. Therefore, this specification may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, this specification may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code. .
This specification may be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. This specification can also be practiced in distributed computing environments in which tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media, including storage devices.
Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For the relevant part, refer to the description of the method embodiment.
The above descriptions are merely examples of the present specification and are not intended to limit the application. For those skilled in the art, this application may have various modifications and changes. Any modification, equivalent replacement, or improvement made within the spirit and principle of this application shall be included in the scope of the patent application for this application.

401‧‧‧Get Module

402‧‧‧ Binarization Module

403‧‧‧Identification Module

S204‧‧‧step

S206‧‧‧step

S208‧‧‧step

In order to more clearly explain the embodiments of the present specification or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only the present invention. For some ordinary people skilled in the art, some embodiments described in the description can also obtain other drawings according to the drawings without paying creative labor.

FIG. 1 is a schematic diagram of an overall architecture related to a solution of this specification in an actual application scenario;

2 is a schematic flowchart of a scan code image recognition method according to an embodiment of the present specification;

3 is a schematic diagram of an implementation principle of a scan code image recognition method provided in an embodiment of this specification in an actual application scenario;

4 is a schematic structural diagram of a scan code image recognition device corresponding to FIG. 2 according to an embodiment of the present specification;

FIG. 5 is a schematic structural diagram of a scan code image recognition device corresponding to FIG. 2 provided in an embodiment of the present specification.

Claims (13)

A scanning code image recognition method includes: Get the current scan code image frame; Using a GPU GPU to perform binarization processing on the current scan code image frame to obtain a binarization result; The binarization result is provided to a central processing unit CPU, so as to use the CPU to identify the binarization result and obtain a scan code image recognition result. If the method of applying for the first item of the patent scope, the GPU is used to binarize the current scan code image frame, which specifically includes: The first thread uses the GPU to binarize the current scan code image frame; The use of the CPU to identify the binarization result specifically includes: The second thread uses the CPU to identify the binarization result, wherein the first thread and the second thread are different threads. For example, if the method of claim 1 is applied, after the binarization result is provided to the CPU, the method further includes: The GPU is used to binarize the next scan code image frame. The process of identifying the binarization result by the CPU and the process of binarizing the scan code image frame by the GPU can be performed in parallel. If applying for the method in the first item of the patent scope, the binarization result should be provided to the CPU, including: The binarization result is stored in a result pool, and a corresponding notification is sent so that the CPU obtains the binarization result in the result pool. For example, if the method of applying for the fourth item of the patent scope, if the CPU fails to identify the binarization result, the method further includes: Using the CPU, the next binarization result is obtained from the result pool for identification. If the method of applying any one of items 1 to 5 of the patent scope, the scanning code includes scanning a two-dimensional code. A scanning code image recognition device includes: Acquisition module to acquire the current scan code image frame; The binarization module uses a graphics processor GPU to binarize the current scan code image frame to obtain a binarization result; The recognition module provides the binarization result to a central processing unit CPU, so as to use the CPU to identify the binarization result and obtain a scan code image recognition result. For the device in the seventh scope of the patent application, the binarization module uses the GPU to binarize the current scan code image frame, including: The binarization module uses the GPU to binarize the current scan code image frame through the first thread; The identification module uses the CPU to identify the binary result, and specifically includes: The identification module uses the CPU to identify the binarization result through a second thread, wherein the first thread and the second thread are different threads. For example, for the device in the seventh scope of the patent application, after the recognition module provides the binarization result to the CPU, the binarization module uses the GPU to binarize the next scan code image frame. Among them, The process of using the CPU to identify the binarization result and the process of using the GPU to binarize the scan code image frame can be executed in parallel. If the device in the seventh scope of the patent application is applied, the identification module provides the binarization result to the CPU, which specifically includes: The identification module saves the binarization result in a result pool, and sends a corresponding notification so that the CPU obtains the binarization result in the result pool. For example, if the device of the scope of patent application is applied for, if the CPU fails to identify the binarization result, the identification module uses the CPU to obtain the next binarization result from the result pool for identification. If the device of any one of claims 7 to 11 is applied for, the scanning code includes scanning a two-dimensional code. A scanning code image recognition device includes: At least one processor; and A memory connected in communication with the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can: Get the current scan code image frame; Using a GPU GPU to perform binarization processing on the current scan code image frame to obtain a binarization result; The binarization result is provided to a central processing unit CPU, so as to use the CPU to identify the binarization result and obtain a scan code image recognition result.