TW201933623A - Optically transparent adhesion layer to connect noble metals to oxides - Google Patents

Abstract

A reflective layer for use in lighting devices and methods of forming the reflective layer are provided. The reflective layer may include a dielectric layer including one or more insulating materials. An intermediate layer may be formed on the dielectric layer. The intermediate layer may include one or more materials having a higher enthalpy of reaction than the one or more insulating materials. Because of the higher enthalpy of reaction, atoms of the one or more materials in the intermediate layer may form bonds with atoms of the one or more insulating materials. A metal layer may be formed on the intermediate layer to reflect light emitted from an active region of a light emitting diode (LED).

Description

Optically transparent adhesive layer connecting precious metal to oxide

Semiconductor light-emitting devices (including light-emitting diodes (LEDs), resonant cavity light-emitting diodes (RCLEDs), vertical-cavity laser diodes (VCSELs), and edge-emitting lasers) are among the most efficient light sources currently available. . Current material systems of interest in the fabrication of high-intensity illumination devices capable of operating across the visible spectrum include III-V semiconductors, especially binary alloys of gallium, aluminum, indium and nitrogen, ternary alloys and quaternary alloys (also Known as the Group III nitride material).

In general, epitaxial growth on a sapphire, tantalum carbide, group III nitride or other suitable substrate by means of metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or other epitaxial techniques A group III nitride light-emitting device is fabricated by stacking one of semiconductor layers of different compositions and dopant concentrations. The stack generally includes one or more light-emitting layers formed on the substrate and doped with one or more n-type layers such as germanium, one of the active regions formed above the n-type layer, and formed in the function The top of the region is doped with one or a plurality of p-type layers such as magnesium. Electrical contacts are formed on the n-type region and the p-type region.

A reflective layer for use in an illumination device and a method of forming the reflective layer are provided. The reflective layer can comprise a dielectric layer comprising one or more insulating materials. An intermediate layer having a stable adhesive property to the dielectric layer and a subsequent metal layer may be formed on the dielectric layer. The intermediate layer can comprise one or more materials having a higher reactivity than the one or more insulating materials. Due to the higher reaction enthalpy, atoms of the one or more materials in the intermediate layer may form bonds with atoms of the one or more insulating materials. A metal layer can be formed on the intermediate layer to reflect light emitted from an active region of one of the light emitting diodes (LEDs).

Examples of different light emitting diode (LED) implementations are described more fully below with reference to the accompanying drawings. Such examples are not mutually exclusive, and features found in one example can be combined with features found in one or more other examples to achieve additional embodiments. Therefore, it is to be understood that the invention is not intended to be limited Throughout the text, the same numbers refer to the same elements.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, such elements are not limited to such terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element without departing from the scope of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element such as a layer, region or substrate is referred to as being "on" or "an" or "an" or "the" Intermediary elements may also be present on another component. In contrast, when an element is referred to as "directly on" another element or "directly" or "directly" or "directly", there is no intervening element. It will also be understood that when an element is referred to as "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or the intervening element can be present. In contrast, when an element is referred to as "directly connected" or "directly coupled" to another element, there is no intervening element. It will be understood that the terms are intended to encompass different orientations of the elements in addition to any orientation depicted in the figures.

The relative terms such as "lower" or "above" or "upper" or "lower" or "horizontal" or "vertical" may be used herein to describe one element, layer or region to another element as illustrated in the drawings. One of the layers, or a relationship between regions. It will be understood that such terms are intended to encompass different orientations of the device in addition to the orientation depicted in the drawings.

Semiconductor light-emitting diodes (LEDs) are one of the most efficient light sources currently available. Materials used in the fabrication of LEDs capable of operating across the visible spectrum comprise III-V semiconductors, especially binary alloys of gallium, aluminum, indium and nitrogen, ternary alloys and quaternary alloys (these may be referred to as III) Group nitride material). Generally speaking, a Group III nitride device is epitaxially grown on a sapphire, tantalum carbide or Group III nitride substrate by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or other epitaxial techniques. Some of these substrates are insulative or poorly conductive. Devices fabricated from semiconductor crystals grown on such substrates can have both positive and negative electrical contacts to the epitaxially grown semiconductor on the same side of the device. In contrast, a semiconductor device grown on a conductive substrate can be fabricated such that one electrical contact is formed on the epitaxially grown material and another electrical contact is formed on the substrate. However, the device fabricated on the conductive substrate can also be designed such that the two contacts are on the same side of the device, and the epitaxial material is grown on the side in a flip chip geometry to improve light extraction from the LED wafer. The current carrying capacity of the chip or the heat dissipation of the LED die. To produce an efficient LED device, the contacts can be electrically isolated from one another such that electrical carriers of appropriate polarity are injected into the p-type and n-type sides of the semiconductor junction, where they are recombined to produce light.

Referring now to Figure 1, a cross-sectional view of an exemplary III-nitride LED device 100 is shown. One or more semiconductor layers including, for example, an n-type layer 102, an active region 104, and a p-type layer 106 may be epitaxially grown on a substrate 108. A p-type contact 110 and an n-type contact 112 can be formed on the same side of the device as described above. Electrical isolation between the p-type contact 110 and the n-type contact 112 can be achieved by etching one of the mesa structures 114 extending from the topmost layer down to the lower n-type layer 102 into the device and forming a separate The p-type contact 110 and the n-type contact 112 are defined. The LEDs can be mounted to a submount assembly 116 that can include one of the submounts on which the LEDs are mounted using solder bumps. The solder bumps create a gap between the base and the LED. The connected LED and abutment assembly can then be encapsulated in a high refractive index gel or epoxy.

The high refractive index gel or epoxy can be selected to match the refractive index of one of the substrates 108 as closely as possible, since the light generated in the device can be extracted through the substrate 108. When light is incident on one of the interfaces between the two materials, the difference in refractive index determines how much light is reflected at the interface and how much light is transmitted through it. The greater the difference in refractive index, the more light is reflected. Thus, the small difference between the refractive index of the sapphire substrate and the high refractive index gel or epoxy of the encapsulating device ensures that most of the light generated in the device that reaches the emitting surface of the substrate 108 is extracted from the device.

Photons can be generated within the active area 104. Due in part to the high refractive index of the semiconductor layer, it is difficult to extract photons from the semiconductor active region 104 into and out of the LED package. The photons generated in the epitaxial semiconductor layer may be incident on the interface between the semiconductor layer and the substrate 108, the wall 122 of the mesa 114 and the high refractive index gel or epoxy interface or semiconductor layer in the base assembly 116. Interface with metal contacts. A photon incident on any of the three interfaces faces one of the refractive indices of the material. This step of the refractive index can cause one of the rays 118 incident on this interface to be split into a transmissive portion 118a and a reflective portion 118b. Light transmitted from the wall 122 of the deck 114 (i.e., portion 118a) may not be directed away from the device in a useful direction. Thus, transmission of transmitted light at the wall 122 of the mesa 114 can contribute to low light extraction efficiency of one of the III-nitride LED devices 100.

The high refractive index gel or epoxy of the encapsulating device can result in a small difference in refractive index between the semiconductor layers between the contacts at the interface of the walls 122 of the mesas 114 and the submount assembly 116. Therefore, much of the light incident on this area can be transmitted in the direction of the base assembly, which can cause significant optical loss. As described above, light extracted toward the base assembly 116 in this region may not be usefully extracted from the III-nitride LED device 100.

As the light propagates through the device, it can withstand attenuation. Attenuation can occur at all locations within the semiconductor, but may be greatest at the interface, for example, between the n-type layer 102 and the substrate 108; between the semiconductor layer and the contacts; in the active region 104; Any nucleation layer between the n-type layer 102 and the substrate 108. The farther the light travels, the more it decays. Light traveling through the semiconductor layer at a large angle β (relative to the propagation angle of the substrate 108) may require a longer path length to travel parallel to the substrate 108 in the semiconductor compared to light having a small angle β. A given distance. Whenever a ray is reflected, the sign of the angle of propagation can be reversed. For example, one of the rays propagating at an angle β can propagate at an angle −β after reflection. The large angle beta rays can pass through the active area 104 a greater number of times and can be reflected away from the various interfaces a greater number of times. Whenever the light is reflected, it becomes more attenuated. Thus, such rays can experience greater attenuation per unit propagation distance in the x direction than rays traveling at a shallower angle β. Therefore, most of the flux (optical power) incident on the wall 122 of the mesa 114 is incident at a shallow angle β. For a device having some absorption in the contact (e.g., a device having an aluminum p-type contact), 70% or more of the total flux incident on the wall 122 of the mesa 114 may be approximately -10 degrees. <An angle of one of the ranges of β < 30 degrees. For a device having a highly reflective p-type contact 110 (such as a pure silver p-type contact 110), the proportion of flux incident on the wall 122 of the mesa 114 in the same angular range can be reduced to about 60%. .

A reflective layer 120 can be used to reflect light emitted from the active area 104. The reflective layer 120 may be composed of one or more of a dielectric layer, a metal stack, a composite mirror, or a distributed Bragg reflector (DBR). Reflective layer 120 can be formed on wall 122 of mesa 114 to maximize reflection of light incident on wall 122 of mesa 114. The reflective layer 120 can include a transparent conductive layer, a dielectric layer, and a metal mirror. A composite mirror may require a metal mirror to be formed directly on the dielectric layer. The metal mirror may be composed of a noble metal such as, for example, silver (Ag) or gold (Au). The dielectric layer can be composed of any insulating material such as, for example, an oxide or nitride of cerium or magnesium fluoride.

It is known in the art that a precious metal such as Ag does not adhere well to a dielectric material such as yttrium oxide. Poor adhesion can introduce problems during the manufacturing process and can reduce the reflectivity of the reflective layer. The upper surface of one of the dielectric layers may be roughened prior to depositing the metal mirror to increase adhesion. The development of surface features and the increased surface area of the roughened surface promote adhesion between the precious metal and the dielectric material. However, this may not be sufficient to ensure proper and/or sufficient adhesion. An adhesive layer can be introduced between the dielectric layer and the metal mirror to increase the adhesion of the two. However, most adhesive layers are optically absorptive and can negatively affect the reflectivity of the reflective layer. Therefore, it may be desirable to improve the adhesion strength between the metal mirror and the dielectric layer while minimizing the optical effect on the total reflectance of the reflective layer 120.

Referring now to Figure 2, a cross-sectional view of one dielectric layer 204 formed on an emissive layer 202 is shown. As described above, the emissive layer 202 can include a first semiconductor layer 206, an active region 208, and a second semiconductor layer 210. The emissive layer 202 can be formed on a substrate 212. The substrate 212 may be composed of tantalum or a crystalline material such as alumina, and may be a commercial sapphire wafer.

The first semiconductor layer 206 may be composed of any III-V semiconductor, including gallium, aluminum, a binary alloy of indium and nitrogen, a ternary alloy, and a quaternary alloy (also referred to as a Group III nitride material). For example, the first semiconductor layer 206 may be composed of a group III-V semiconductor including, but not limited to, AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, InSb; II- Group VI semiconductors, including but not limited to, ZnS, ZnSe, CdSe, CdTe; Group IV semiconductors, including but not limited to Ge, Si, SiC; and mixtures or alloys thereof. Such semiconductors may have a refractive index in the range of from about 2.4 to about 4.1 at the typical emission wavelength of the LED in which they are present. For example, a Group III nitride semiconductor such as GaN may have a refractive index of about 2.4 at 500 nm, and a Group III phosphide semiconductor such as InGaP may have a refractive index of about 3.7 at 600 nm. In an example, the first semiconductor layer 206 can be composed of GaN.

The first semiconductor layer 206 can be formed using conventional deposition techniques such as MOCVD, MBE, or other epitaxial techniques. The first semiconductor layer 206 can be doped with an n-type dopant.

The second semiconductor layer 210 and the active region 208 may be composed of any III-V semiconductor, including gallium, aluminum, a binary alloy of indium and nitrogen, a ternary alloy, and a quaternary alloy (also referred to as a III-nitride material). For example, the second semiconductor layer 210 and the active region 208 may be composed of a III-V semiconductor including, but not limited to, AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, CdTe; Group IV semiconductors, including but not limited to Ge, Si, SiC; and mixtures or alloys thereof. Such semiconductors may have a refractive index in the range of from about 2.4 to about 4.1 at the typical emission wavelength of the LED in which they are present. For example, a Group III nitride semiconductor such as GaN may have a refractive index of about 2.4 at 500 nm, and a Group III phosphide semiconductor such as InGaP may have a refractive index of about 3.7 at 600 nm. In an example, the second semiconductor layer 210 and the active region 208 may be composed of GaN.

The second semiconductor layer 210 and the active region 208 can be formed using conventional deposition techniques such as MOCVD, MBE, or other epitaxial techniques. The active region 208 and the second semiconductor layer 210 may be formed together with the first semiconductor layer 206 or may be formed separately. The active region 208 and the second semiconductor layer 210 may be constitutable from a semiconductor material similar to one of the first semiconductor layers 206 or a composition thereof.

The second semiconductor layer 210 may be doped using a p-type dopant. Thus, the active region 208 can be a p-n diode junction associated with the interface of the first semiconductor layer 206 and the second semiconductor layer 210. Alternatively, active region 208 can comprise one or more semiconductor layers that are n-doped, p-doped, or undoped. The active region 208 can emit light after a suitable voltage is applied through the first semiconductor layer 206 and the second semiconductor layer 210. In an alternative embodiment, the conductivity types of the first semiconductor layer 206 and the second semiconductor layer 210 may be reversed. That is, the first semiconductor layer 206 can be a p-type layer and the second semiconductor layer 210 can be an n-type layer.

It should be noted that the emissive layer 202 can take any shape. For example, emissive layer 202 can be shaped like one of the mesas as described above with reference to FIG. In another example, the emissive layer 202 can be segmented from other semiconductor layers and can be separated from another emissive layer by a trench or an isolation region.

A dielectric layer 204 can be formed on one of the upper surfaces 214 of the emissive layer 202. Dielectric layer 204 may be comprised of one or more dielectric materials such as oxides, nitrides or oxynitrides. In one example, dielectric layer 204 can be comprised of yttrium oxide. In another example, dielectric layer 204 can be comprised of a metal fluoride such as magnesium fluoride. Dielectric layer 204 can be formed using a conventional deposition technique such as, for example, CVD, plasma assisted chemical vapor deposition (PECVD), MOCVD, atomic layer deposition (ALD), evaporation, reactive sputtering, chemical solution deposition. , spin-on deposition or other similar procedures. Dielectric layer 204 can have a thickness T _{204 in a} range from approximately 100 nm to approximately 1000 nm. Dielectric layer 204 can be patterned and etched using conventional techniques.

It should be noted that the dielectric layer 204 can be formed on any surface depending on the configuration of the emissive layer 202. For example, the dielectric layer 204 can be in contact with the first semiconductor layer 206, the active region 208, and the second semiconductor layer 210, as seen above with reference to FIG. In another example, dielectric layer 204 can be formed on one of the lower surfaces 216 of substrate 212. In another example, dielectric layer 204 can be formed on a phosphor region (not shown) that is formed on emissive layer 202 to wavelength convert the emitted light.

Referring now to FIG. 3, a cross-sectional view of one of the intermediate layers 302 formed on the dielectric layer 204 is shown. The intermediate layer 302 may be composed of one of the materials having a higher reactivity than the material of the dielectric layer 204. For example, if the dielectric layer 204 comprises one or more oxides, the intermediate layer 302 can be composed of one or more materials having one cerium oxide higher than the material of the dielectric layer 204. In another example, if the dielectric layer 204 comprises fluoride, the intermediate layer 302 can be comprised of one or more materials having a higher level of barium fluoride than the material of the dielectric layer 204.

The intermediate layer 302 may be composed of atoms of one or more metallic materials such as, for example, Mg, Al, Ge, Ti, Si, Ta, Mn, W, Co, Ni, Cu, Ru, Pd, Pt, and Ag. In one example, the intermediate layer can be composed of Al, and Al can have a negative heat formed by forming an oxide of approximately 550 kJ/mole to each formed bond of approximately 600 kJ/mole. This may be greater than the formation of a negative heat of the oxide of cerium oxide (which may be approximately 400 kJ/mole for each formed bond to approximately 500 kJ/mole for each formed bond). The intermediate layer 302 can adhere well to the dielectric layer 204.

The intermediate layer 302 can be formed using a conventional deposition technique such as, for example, CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, electroplating, spin-on deposition, or the like. The intermediate layer 302 can have a thickness T _{302 in a} range from approximately 1 angstrom to approximately 50 angstroms. In an example, the intermediate layer 302 can have a thickness T _{302 in a} range from approximately 5 angstroms to approximately 20 angstroms.

Referring now to FIG. 4, a cross-sectional view of one of the metal layers 402 formed on the intermediate layer 302 to form a reflective layer 404 is shown. The metal layer 402 may be composed of one or more metallic materials of reflected light. For example, the metal layer 402 may be composed of a noble metal such as Ru, Rh, Pd, Ag, Os, Ir, Pd, and Au. Metal layer 402 can be constructed from one or a stack of multiple metals as described above.

Metal layer 402 can be formed using a conventional deposition technique such as, for example, CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, electroplating, spin-on deposition, or the like. Metal layer 402 can have a thickness T _{402 in a} range from approximately 50 nm to approximately 1000 nm. The intermediate layer 302 can adhere well to the metal layer 402.

After deposition and/or in a subsequent annealing step, the atoms in the intermediate layer 302 may partially react with atoms from the underlying dielectric layer 204 and the intermediate layer 302 may become optically transparent. Since the intermediate layer 302 can have a higher reactivity than the lower dielectric layer 204, the atoms forming the adhesive layer can break the bonds between each other and form bonds with the atoms in the dielectric layer 204. For example, if Al is used to form the intermediate layer 302 and yttrium oxide is used to form the dielectric layer 204, the Al atoms can destroy existing Si-O bonds in the dielectric layer 204 and form a single Al-O bond. In the case where the dielectric layer 204 may already have a Si-O-Si bond, it may now contain a Si-O-Al bond, which has a dangling bond on Si that terminates with an Al atom.

The reaction enthalpy is used as a guide for predicting the bond between the intermediate layer 302 and the dielectric layer 204. In the above examples, the destruction of a Si-O bond and the formation of an Al-O bond are energetically advantageous due to the intermediate layer 302 having a higher cerium oxide, thereby achieving adhesion. The thickness T _{302 of the} intermediate layer 302 may be sufficient to improve the adhesion between the dielectric layer 204 and the metal layer 402, but not so thick that most of the material in the intermediate layer 302 does not react with the underlying dielectric layer 204. As the atoms on the intermediate layer 302 oxidize and react with the atoms in the dielectric layer 204, the resulting bond can produce an oxide having a large band gap. This may allow photons emitted from the active region 208 to pass through the dielectric layer 204 and the intermediate layer 302 and reflect away from the metal layer 402 with reduced resistance to no resistance. In other words, the dielectric layer 204 and the intermediate layer 302 may be substantially transparent to light emitted from the active region 208 due to the large band gap.

Referring now to Figures 5A-5B, a transmission electron microscope (TEM) photomicrograph showing a cross section of one of the exemplary reflective layers 404 is shown. FIG. 5A shows an emissive layer 202, a dielectric layer 204, an intermediate layer 302, and a metal layer 402. FIG. 5B is an enlarged view of one of the reflective layers 404 showing the dielectric layer 204, the intermediate layer 302, and the metal layer 402. As can be seen in Figure 5B, the atoms of the intermediate layer 302 can react with the atoms of the dielectric layer 204 to form an adhesive bond.

It should be noted that Figures 1 through 5B show a reflective layer 404 formed on epitaxially grown GaN that can be used in an all optically sensitive interface that requires good adhesion between a dielectric layer and a noble metal. For example, reflective layer 404 can be formed on any surface on which one of the one or more semiconductor layers is formed. In another example, reflective layer 404 can be formed on a phosphor region for wavelength conversion of light emitted from an active region.

Referring now to Figure 6, a flow chart illustrating one method of forming a reflective layer 404 is shown. In step 602, a vacuum can be formed. In step 604, the dielectric layer 204 can be formed using one or more of the methods described above without breaking the vacuum. In step 606, the intermediate layer 302 can be formed without destroying the vacuum using one or more of the methods described above. In step 608, the metal layer 402 can be formed using one or more of the methods described above without breaking the vacuum. In step 610, the vacuum can be broken.

Referring now to Figure 7, a flow chart showing another method of forming a reflective layer 404 is shown. In step 702, a vacuum can be formed. In step 704, dielectric layer 204 can be formed using one or more of the methods described above without breaking the vacuum. In step 706, the intermediate layer 302 can be formed without destroying the vacuum using one or more of the methods described above. In step 708, the vacuum can be destroyed. In step 710, metal layer 402 can be formed using one or more of the methods described above. In an alternate example, a second vacuum can be formed prior to performing step 710.

Referring now to Figure 8, a flow chart illustrating another method of forming reflective layer 404 is shown. In step 802, a vacuum can be formed. In step 804, dielectric layer 204 can be formed using one or more of the methods described above without breaking the vacuum. In step 806, the vacuum can be destroyed. In step 808, the intermediate layer 302 can be formed using one or more of the methods described above. In step 810, metal layer 402 can be formed using one or more of the methods described above. In an alternate example, a second vacuum may be formed prior to performing step 808 or step 810.

Referring now to Figure 9, a flow chart showing another method of forming a reflective layer 404 is shown. In step 902, a vacuum can be formed. In step 904, dielectric layer 204 can be formed using one or more of the methods described above without breaking the vacuum. In step 906, the intermediate layer 302 can be formed using one or more of the methods described above without breaking the vacuum. In step 908, the vacuum can be broken.

Once the vacuum is broken, a primary oxide can be formed on the upper surface of one of the intermediate layers 302. The native oxide can interfere with the adhesion between the intermediate layer 302 and the dielectric layer 204 and/or the metal layer 402. In step 910, the upper surface of the intermediate layer 302 can be cleaned and prepared to remove the native oxide layer. Cleaning and preparation can include any conventional cleaning, etching or planarization procedure.

In step 912, the metal layer 402 can be formed using one or more of the methods described above after the native oxide is removed. In an alternate example, a second vacuum may be formed prior to performing step 910 or step 912.

Although the features and elements are described above in a particular combination, it will be apparent to those skilled in the art that the various features or elements can be used alone or in any combination with other features and elements. Additionally, the methods described herein can be implemented in a computer program, software or firmware embodied in a computer readable medium for execution by a computer or processor. Examples of computer readable media include electronic signals (transmitted via a wired or wireless connection) and computer readable storage media. Examples of computer readable storage media include, but are not limited to, a read only memory (ROM), a random access memory (RAM), a scratchpad, a cache memory, a semiconductor memory device, and a magnetic medium ( Such as built-in hard drives and removable disks), magneto-optical media and optical media (such as CD-ROM discs and digital versatile discs (DVD)).

100‧‧‧III-type nitride semiconductor light-emitting diode (LED) device

102‧‧‧n-type layer

104‧‧‧Action area

106‧‧‧p-type layer

108‧‧‧Substrate

110‧‧‧p-type contacts

112‧‧‧n type contacts

114‧‧‧ countertop structure

116‧‧‧Abutment assembly

118‧‧‧Light

118a‧‧‧Transmission section

118b‧‧‧reflection

120‧‧‧reflective layer

122‧‧‧ wall

202‧‧‧Emission layer

204‧‧‧Dielectric layer

206‧‧‧First semiconductor layer

208‧‧‧Action area

210‧‧‧Second semiconductor layer

212‧‧‧Substrate

214‧‧‧ upper surface

216‧‧‧ lower surface

302‧‧‧Intermediate

402‧‧‧metal layer

404‧‧‧reflective layer

602‧‧ steps

604‧‧‧Steps

606‧‧‧Steps

608‧‧‧Steps

610‧‧‧Steps

702‧‧‧Steps

704‧‧‧Steps

706‧‧‧Steps

708‧‧ steps

710‧‧ steps

802‧‧ steps

804‧‧‧ steps

806‧‧‧Steps

808‧‧‧Steps

810‧‧‧Steps

902‧‧ steps

904‧‧‧Steps

906‧‧‧Steps

908‧‧‧Steps

910‧‧ steps

912‧‧ steps

T ₂₀₄ ‧‧‧thickness

T ₃₀₂ ‧‧‧thickness

T ₄₀₂ ‧‧‧thickness

A more detailed understanding can be obtained from the following description given by way of example with the accompanying drawings, in which:

1 is a cross-sectional view showing an exemplary group III nitride light emitting diode (LED) device;

2 is a cross-sectional view showing a dielectric layer formed on an emissive layer;

3 is a cross-sectional view showing an intermediate layer formed on a dielectric layer;

4 is a cross-sectional view showing a metal layer formed on the intermediate layer to form a reflective layer;

5A to 5B are transmission electron microscope (TEM) micrographs showing a cross section of one of the exemplary reflective layers;

Figure 6 is a flow chart showing one of the methods of forming a reflective layer;

Figure 7 is a flow chart showing another method of forming a reflective layer;

Figure 8 is a flow chart showing another method of forming a reflective layer;

Figure 9 is a flow chart showing another method of forming a reflective layer.

Claims (20)

A conductive reflective layer comprising: a dielectric layer on a lower layer, the dielectric layer having a first reaction enthalpy; An intermediate layer on the dielectric layer; and a metal layer on the intermediate layer, the metal layer and the intermediate layer being electrically coupled to the underlying layer. The conductive reflective layer of claim 1, wherein the underlying layer is electrically conductive. The conductive reflective layer of claim 1, wherein the intermediate layer has a second reaction enthalpy greater than one of the first reaction enthalpies. The reflective layer of claim 1, wherein the dielectric layer has a thickness in a range from 5 angstroms to 50 angstroms. The conductive reflective layer of claim 1, wherein the metal layer has a thickness in a range from 50 nm to 1000 nm. The conductive reflective layer of claim 1, wherein the dielectric layer comprises ruthenium oxide. The conductive reflective layer of claim 1, wherein the intermediate layer comprises aluminum. The conductive reflective layer of claim 1, wherein the metal layer comprises a precious metal. The conductive reflective layer of claim 1, wherein a majority of the atoms of the intermediate layer form a bond with atoms of the dielectric layer. The conductive reflective layer of claim 1, wherein the dielectric layer is on an emissive layer. A method of forming a conductive reflective layer, the method comprising: Forming a dielectric layer on a lower layer, the dielectric layer having a first reaction enthalpy; Forming an intermediate layer on the dielectric layer; and A metal layer is formed on the intermediate layer, the metal layer and the intermediate layer being electrically coupled to the underlying layer. The method of claim 11, wherein the underlying layer is electrically conductive. The method of claim 11, wherein the intermediate layer has a second reaction enthalpy greater than one of the first reaction enthalpies. The method of claim 11, wherein the dielectric layer has a thickness in a range from 5 angstroms to 1000 angstroms. The method of claim 11, wherein the dielectric layer comprises ruthenium oxide. The method of claim 11, wherein the intermediate layer comprises aluminum. The method of claim 11, wherein the metal layer comprises a precious metal. The method of claim 11, wherein a majority of the atoms of the intermediate layer form a bond with atoms of the dielectric layer. The method of claim 11, wherein the dielectric layer is disposed on an emissive layer. A light emitting diode (LED) device comprising: a luminescent layer; and a conductive reflective layer comprising: a dielectric layer on a lower layer, the dielectric layer having a first reaction enthalpy; An intermediate layer on the dielectric layer; and a metal layer on the intermediate layer, the metal layer and the intermediate layer being electrically coupled to the underlying layer.