TW201921332A - Display screen and display device - Google Patents

Abstract

The embodiment of the present invention discloses a display screen and a display device, wherein the display screen (10) includes: a display panel (11), compensation line components (12), a signal source circuit (13) and a compensation circuit (14). The display panel (11) includes a display region (111) and a non-display region (112), each compensation line component (12) is connected with a respective pixel unit. The signal source circuit (13) is configured to provide a preset drive voltage for each pixel unit. The compensation circuit (14) is configured to detect the real-time driving voltage of each pixel unit, determine the pixel units to be compensated according to the preset driving voltage and real-time driving voltage, and provide the compensating voltage to the pixel units to be compensated. Therefore, by providing the compensation voltage for the pixel units to be compensated, each pixel unit located in different display areas is driven by the same driving voltage, such that the brightness of different display areas can be uniform, thus improving the brightness consistency of each display area.

Description

Display screen and display device

Embodiments of the present invention relate to the field of display technologies, and in particular, to a display screen and a display device.

When the display is displayed, the signal source transmits the driving voltage through the metal interconnection to illuminate the display area. With the development of the semiconductor process and the narrow bezel design, the width of the metal interconnection line becomes narrower and narrower, and the resistance value of the metal interconnection line increases, thereby causing different driving voltages of the pixel units located in different display areas, and further This causes a difference in brightness of each display area.

Embodiments of the present invention provide a display screen and a display device, which can improve brightness uniformity of each display area.

The embodiments of the present invention provide the following technical solutions to solve the technical problems:
A display screen that includes:
a display panel comprising a display area and a non-display area, the display area comprising a plurality of pixel units;
a compensation line component disposed in the non-display area, wherein the compensation line component is respectively connected to each of the pixel units;
a signal source circuit disposed on a side of the display panel for providing a predetermined driving voltage for each of the pixel units; and a compensation circuit coupled to the compensation line component for detecting each of the pixel units And driving a voltage in real time, determining a pixel unit to be compensated according to the preset driving voltage and the real-time driving voltage, and providing a compensation voltage to the pixel unit to be compensated.

Optionally, the compensation line component includes:
a plurality of first compensation lines are disposed on a side of the non-display area, wherein one end of each of the first compensation lines is connected to a corresponding pixel unit, and the other end of each of the first compensation lines is connected to the compensation circuit .

Optionally, the display area includes a first display area and a second display area, and the first display area is symmetric with the second display area, wherein one end of each of the first compensation lines and the first Corresponding pixel unit connections in the display area;
The compensation line assembly further includes a plurality of second compensation lines, each of the second compensation lines being disposed on the other side of the non-display area, wherein one end of each of the second compensation lines and the second display area The corresponding pixel unit is connected, and the other end of each of the second compensation lines is connected to the compensation circuit, and the first compensation line and the second compensation line connected to the same row of pixel units are symmetric about the central axis of the display area.

Optionally, the display area is provided with a plurality of first power lines and a second power line, wherein each of the two adjacent first power lines is parallel, and each of the two adjacent second power lines is parallel, arbitrary One of the first power lines is perpendicular to any one of the second power lines, and one end of the first power line and one end of the second power line are connected to a corresponding one of the pixel units, the first power source The other end of the line and the other end of the second power line are connected to the signal source circuit.

Optionally, the display area is provided with a plurality of third power lines and data signal lines, each of the two adjacent third power lines is parallel, and each of the two adjacent data signal lines is parallel, and any one of the The third power line is parallel to any one of the data signal lines, and one end of each of the third power lines is connected to each of the corresponding pixel units, and the other end of each of the third power lines is connected to the signal source circuit. .

Optionally, the number of the first compensation lines and the number of the second compensation lines are each one;
One end of the first compensation line is connected to a power line corresponding to a pixel unit farthest from the signal source circuit, and one end of the second compensation line is connected to a power line corresponding to a pixel unit farthest from the signal source circuit. The other end of the first compensation line and the other end of the second compensation line are both connected to the signal source circuit.

Optionally, the first compensation line and the second compensation line are both transmitted for compensating an anode voltage of each of the corresponding pixel units.

Optionally, the first compensation line and the second compensation line are both transmitted for compensating a cathode voltage of each of the corresponding pixel units.

Optionally, the display area is provided with a fourth power line and a fifth power line, the fourth power line and the fifth power line are both used to transmit the cathode voltage, and the fourth power line is set to An area of the first display area closest to the non-display area, each pixel unit in the first display area is connected to the fourth power line, and one end of each of the first compensation lines is connected to the a fourth power line corresponding to the corresponding pixel unit in the first display area, the fifth power line is disposed in an area of the second display area that is closest to the non-display area, and each pixel unit in the second display area Each of the second compensation lines is connected to a fifth power line corresponding to the corresponding pixel unit in the second display area.

Optionally, each of the pixel units includes:
Organic light emitting diode, including a cathode;
a thin film transistor coupled to the cathode for driving the organic light emitting diode according to the predetermined driving voltage; and a compensation structure coupled to the thin film transistor for detecting through the thin film transistor Measuring a cathode voltage of the organic light emitting diode and transmitting the compensation voltage.

Optionally, the thin film transistor comprises:
a substrate, including a deposition surface;
a first metal layer laminated on the deposition surface and in contact with the cathode;
The compensation structure includes:
a second metal layer laminated on the deposition surface, and the second metal layer is connected to the first metal layer;
A first insulating layer is laminated on the deposition surface and located between the first metal layer and the second metal layer.

Optionally, the thin film transistor further includes a transparent glass layer laminated between the first metal layer and the cathode.

The embodiments of the present invention provide the following technical solutions to solve the technical problems:
A flexible display device comprising:
a housing; and the display screen can be received in the housing.

Compared with the prior art, in the display screen provided by the embodiment of the present invention, the display panel includes a display area and a non-display area, the display area includes a plurality of pixel units, the compensation line component is disposed in the non-display area, and the compensation line component is respectively associated with each pixel. a unit connection; the signal source circuit is disposed on a side of the display panel for providing a preset driving voltage for each pixel unit; the compensation circuit is connected to the compensation line component for detecting a real-time driving voltage of each of the pixel units, according to the pre- The driving voltage and the real-time driving voltage are set, the pixel unit to be compensated is determined, and a compensation voltage is supplied to the pixel unit to be compensated. Therefore, the compensation voltage is provided by the pixel unit to be compensated, so that the pixel units located in different display areas are driven by the same driving voltage, so that the brightness of different display areas can be uniform, thereby improving the brightness uniformity of each display area.

In order to facilitate the understanding of the present invention, the present invention will be described in more detail below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed" to another element, it can be directly on the other element, or one or more central elements can be present. When an element is referred to as "connected" to another element, it can be either directly connected to the other element or one or more of the elements. The terms "vertical", "horizontal", "left", "right", "inside", "outside" and the like as used in this specification are for illustrative purposes only and express only a substantial positional relationship. For example, for "vertical", if a positional relationship is not strictly vertical for the purpose of achieving a certain purpose, but is substantially vertical, or uses vertical characteristics, it belongs to the "vertical" category described in this specification.

Unless otherwise defined, all technical and scientific terms used in the specification are the same meaning The terms used in the description of the present invention are for the purpose of describing the specific embodiments and are not intended to limit the invention. The term "and/or" used in this specification includes any and all combinations of one or more of the associated listed items.

Further, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not constitute a conflict with each other.

Embodiments of the present invention provide a display screen. Referring to FIG. 1 , the display screen 10 includes a display panel 11 , a compensation line assembly 12 , a signal source circuit 13 , and a compensation circuit 14 .

Alternatively, the display panel 11 may use a flexible substrate such as a thin glass, a metal foil or a plastic substrate or the like, and a flexible substrate, for example, the plastic substrate has a coating on both sides of the base film. The flexible structure, the base film includes, for example, polyimine (PI), polycarbonate (PC), polyethylene glycol terephthalate (PET), polyether oxime (PES), polyethylene film (PEN), fiber Reinforced plastic (FRP) and other resins. The rigid substrate may be, but not limited to, a glass substrate, a metal substrate, or a ceramic substrate.

The display panel 11 includes a display area 111 and a non-display area 112. The display area 111 includes a plurality of pixel units, and the pixel unit is driven by a driving voltage to emit light. The pixel unit may be an OLED (Organic Light-Emitting Diode) light emitting unit, and the pixel unit 111 may sequentially include an anode and a hole injection. Layer, hole transport layer, organic light-emitting layer, electron transport layer, electron injection layer, cathode.

Each pixel unit is connected with a data signal line, a scan line, and a power line. Referring to FIG. 2, the pixel unit is driven by the driving circuit 21 to emit light. The driving circuit 21 includes a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor C1. The gate of the first thin film transistor T1 is used to connect the scan line 210, and the scan line 210 is used to transmit the scan signal. The drain of the first thin film transistor T1 is used to connect the data signal line 211, the data signal line 211 is used to transmit the data signal, the drain of the second thin film transistor T2 is used to connect the ELVDD power line 212, and the ELVDD power line 212 is used. To transmit the ELVDD voltage, the source of the second thin film transistor T2 is used to connect the ELVSS power line 213, and the ELVSS power line 213 is used to transfer the ELVSS voltage.

When the scan signal is high, the first thin film transistor T1 is turned on, the data signal is charged by the storage capacitor C1, and the voltage of the storage capacitor C1 controls the drain current of the second thin film transistor T2. When the scan signal is low, the first thin film transistor T1 is turned off, and the charge stored in the storage capacitor C1 maintains the conduction of the second thin film transistor T2, so that the drain current drives the OLED device to emit light.

In some embodiments, the ELVDD voltage can be used as the anode voltage of the OLED device, the ELVSS voltage can be used as the cathode voltage of the OLED device, and both the anode voltage and the cathode voltage are used to drive the OLED device to emit light, wherein the anode voltage and the cathode voltage are both pressed. The difference is the driving voltage.

The non-display area 112 is provided with leads for connecting the display area 111 with an external circuit. When the display panel 11 is a flexible display panel, the flexible display panel may be pre-formed with a folding axis at a preset position, and in order to prevent the lead from being broken when folded, the lead region may be folded around the folding axis to form a folded region. In some embodiments, the lead wire intersects the folding axis and straight across the bending area, and the lead area can be folded around the folding axis to the back side of the display area 111, thereby reducing the frame of the display panel 11, and improving the display area 111 relative to the display panel The proportion of 11 and, because the lead line linearly straddles the folded area, can reduce the lateral stress that the lead is subjected to when bending around the folding axis, and reduce the probability of the lead being defective in the folded state.

The compensation line component 12 is disposed on either side of the non-display area 112, and the compensation line component 12 is respectively connected to each pixel unit. For example, each pixel unit in the display area 111 is sequentially arranged to form a plurality of rows of pixel units, and the compensation line component 12 is sequentially Connect to each pixel unit in each row. The compensation line component 12 and the power line serve as two different voltage transmission carriers, and the compensation line component 12 can separately transmit a compensation voltage, which is different from the conventional technology in transmitting the compensation voltage through the power line. The structure for separately transmitting the compensation voltage of the compensation component is adopted, which uses the same power line to transmit the compensation voltage without time-division multiplexing. On the contrary, it can synchronously detect the pixel unit to be compensated, thereby rapidly providing the pixel unit to be compensated. Compensation voltage.

The signal source circuit 13 is disposed on the display panel 11 side. For example, in some embodiments, an FPC circuit board (Flexible Printed Circuit) is connected to the display panel 11 side, and the signal source circuit 13 passes through the COF structure (Chip On). Flex, flip chip) is bonded to the FPC board.

The signal source circuit 13 serves as a driving source capable of supplying a driving voltage to each pixel unit, and when a specific pixel unit is selected, the specific pixel unit is illuminated by driving voltage driving. For displaying pictures of different frames, the signal source circuit 13 may output the same driving voltage, or may output different driving voltages. However, each driving voltage is applied before the signal source circuit 13 is applied to the ELVDD power line 212 or the ELVSS power line 213. It is preset by the signal source circuit 13 in accordance with the preset display logic, and therefore, the signal source circuit 13 can supply a predetermined driving voltage for each pixel unit. Further, for displaying pictures of different frames, the preset driving voltages may be different and may be the same.

The compensation circuit 14 is coupled to the compensation line assembly 12, and the compensation circuit 14 detects the real-time drive voltage of each pixel unit through the compensation line assembly 12.

In general, since the OLED device is a current injection type light-emitting display device, the organic material and the luminescent material are caused to emit light by the injection and recombination of carriers under the driving voltage. Therefore, the voltage difference between the ELVDD voltage and the ELVSS voltage is The main factors affecting the luminous intensity of OLED devices.

Generally, the IR drop of the display panel 11 is mainly divided into an in-plane trace IR-Drop and an out-of-plane trace IR-Drop, and the IR drop is a voltage indicating the power supply and the ground network in the integrated circuit. The phenomenon of falling or rising, the IR drop greatly affects the driving ability of the display panel 11. As the brightness of the screen increases, the influence of the IR drop on the display panel 11 becomes more serious. In order to avoid such effects, a sufficient voltage margin is generally reserved to ensure that the driving voltage can drive the illumination at the far end of the flexible screen, so that the brightness of the far end of the screen is greater than the brightness of the near end.

Referring to FIG. 3, due to the influence of the IR voltage drop, the driving voltage in the driving circuit 21 is lowered, and the gate voltage Vgs or the source voltage Vds of the second thin film transistor T2 is decreased, thereby causing the source current Ids to decrease. When the source current Ids decreases, the luminance of the OLED device decreases.

In this embodiment, the real-time driving voltage is a voltage when the preset driving voltage is transmitted to the pixel unit through the power line, and the compensation circuit 14 determines the pixel unit to be compensated according to the preset driving voltage and the real-time driving voltage, and is to be compensated. The pixel unit provides a compensation voltage, for example, the ELVSS power line 213 is grounded, and the signal source circuit 13 applies a 5 volt ELVDD voltage to the ELVDD power line 212, that is, a 5 volt ELVDD voltage as a preset driving voltage. The ELVDD voltage is transmitted to each pixel unit through a metal interconnect. Under the influence of the IR voltage drop, when the ELVDD voltage is transmitted to a pixel unit farther from the signal source circuit 13, the driving voltage of the relatively far pixel unit, that is, the real-time driving voltage is 4.5 volts. At this time, the compensation circuit 14 detects that the real-time driving voltage of the relatively distant pixel unit is 4.5 volts through the compensation line component 12. Thus, the compensation circuit 14 determines that the real-time driving voltage of 4.5 volts is less than the preset driving voltage of 5 volts, that is, the relatively distant pixel unit serves as the pixel unit to be compensated.

Finally, the compensation circuit 14 calculates a voltage difference of 0.5 volts, that is, a voltage difference of 0.5 volts as a compensation voltage, based on the real-time driving voltage and the preset driving voltage, and the compensation circuit 14 provides compensation to the relatively distant pixel unit through the compensation line component 12. Voltage.

In some embodiments, considering the IR drop caused by the compensation line assembly 12 itself, the compensation voltage provided by the compensation circuit 14 will be greater than the actual calculated voltage difference. Therefore, the compensation circuit 14 will also calculate the actual calculation. The voltage difference is corrected. For example, the compensation circuit 14 calculates the IR voltage drop according to the length of the compensation line component between the pixel unit to be compensated and the signal source circuit 13, and adds IR to the actually calculated voltage difference. The voltage drop is used as the final compensation voltage, and the final compensation voltage is transmitted to the pixel unit to be compensated through the compensation line component 12.

In some embodiments, the signal source circuit 13 or the compensation circuit 14 may be a power chip, or the signal source circuit 13 and the compensation circuit 14 may be integrated on the same chip, and may also be integrated on the controller, and the controller may be a general-purpose processor. , digital signal processor (DSP), dedicated integrated circuit (ASIC), field programmable gate array (FPGA), microcontroller, ARM (Acorn RISC Machine) or other programmable logic device, discrete gate or transistor logic, discrete Hardware components or any combination of these components. Also, the controller can be any conventional processor, controller, microcontroller or state machine. The controller can also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

In this embodiment, the compensation voltage is provided by the pixel unit to be compensated, so that the pixel units located in different display areas are driven by the same driving voltage, so that the brightness of different display areas can be uniform, thereby improving the brightness of each display area. consistency.

In some embodiments, referring to FIG. 4a, the compensation line assembly 12 includes a number of first compensation lines 121. Each of the first compensation lines 121 is connected to the corresponding pixel unit, and the other end of each of the first compensation lines 121 is connected to the compensation circuit 14 . In some embodiments, the compensation circuit 14 is connected to one side of the binding area 40, and the other end of each of the first compensation lines 121 is connected to the compensation circuit 14 through the binding area 40. The signal source circuit 13 is also connected to the side of the binding area 40.

In operation, the signal source circuit 13 transmits a preset driving voltage to each pixel unit through the ELVSS power line 213 and/or the ELVDD power line 212 to illuminate each pixel unit, and the compensation circuit 14 passes the corresponding first compensation line 121 to compensate the voltage. Transfer to the corresponding pixel unit, so that the brightness of the display area is uniform.

In some embodiments, simply setting a plurality of first compensation lines 121 can achieve the purpose of uniformizing the brightness of the display area. In some embodiments, to improve compensation reliability, it may provide a compensation voltage in a two-sided compensation manner.

Referring to FIG. 4a, the display area 111 includes a first display area 1111 and a second display area 1112. The first display area 1111 is symmetric with the second display area 1112. For example, the first display area 1111 and the second display area 1112 are displayed. The center axis of zone 111 is OO" symmetrical.

The compensation line assembly 12 also includes a plurality of second compensation lines 122 disposed on the other side of the non-display area 112.

One end of each of the first compensation lines 121 is connected to a corresponding pixel unit in the first display area 1111, and the other end of each of the first compensation lines 121 is connected to the compensation circuit 14.

One end of each second compensation line 122 is connected to a corresponding pixel unit in the second display area 1112, and the other end of each second compensation line 122 is connected to the compensation circuit 14 and connected to the first compensation line 121 and the first row of pixel units. The second compensation line 122 is symmetrical about the central axis of the display area 111.

In operation, the signal source circuit 13 transmits a preset driving voltage to each pixel unit through the ELVSS power line 213 and/or the ELVDD power line 212 to illuminate each pixel unit, and the compensation circuit 14 passes the corresponding first compensation line 121 to compensate the voltage. The pixel is transmitted to the corresponding pixel unit in the first display area 1111, and the compensation voltage is transmitted to the corresponding pixel unit in the second display area 1112 through the corresponding second compensation line 122, so that the brightness of the display area is uniform.

Due to the symmetry, the first compensation line 121 and the second compensation line 122 connected to the same row of pixel units have the same length, and the IR voltage drop and the like of the first compensation line 121 and the second compensation line 122 connected to the same row of pixel units are electrically affected. Almost the same or the same, when driving the same row of pixel units, on the one hand, the compensation voltage is provided by the two-sided compensation method, which can improve the adjustment efficiency of the brightness uniformity. On the other hand, if the one-side compensation mode is adopted, it is required to sequentially route a plurality of first compensation lines 121 to each pixel unit, thereby increasing the difficulty of the routing, and the compensation circuit 14 also needs to calculate the different lengths of the traces. The IR voltage drop corresponding to the first compensation line 121 can accurately provide the compensation voltage. Obviously, this method increases the logic operation of the compensation circuit 14 and improves the design difficulty. In this embodiment, the first compensation line 121 only needs to be routed to each pixel unit in the first display area 1111, and the second compensation line 122 only needs to be routed to each pixel in the second display area 1112. The unit, therefore, its routing is relatively easy, and the amount of calculation is small, and the design difficulty is low.

In some embodiments, the first compensation line 121 and the second compensation line 122 are both transmitted for compensating the anode voltage of each corresponding pixel unit, that is, the compensation circuit 14 can pass the first compensation line 121 and the second compensation line. 122 compensates for the ELVDD voltage.

In other embodiments, the first compensation line 121 and the second compensation line 122 are both transmitted for compensating the cathode voltage of each corresponding pixel unit, that is, the compensation circuit 14 can pass the first compensation line 121 and the second compensation. Line 122 compensates for the ELVSS voltage.

In some embodiments, referring to FIG. 4a, the display area 111 is provided with a plurality of first power lines 41 and a second power line 42, wherein each of the two adjacent first power lines 41 is parallel, adjacent to each of the two The two power lines 42 are parallel, and any one of the first power lines 41 is perpendicular to any one of the second power lines 42. Therefore, the boundary line of each adjacent two first power lines 41 and each adjacent two second power lines 42 encloses a pixel area 43, and each of the pixel areas 43 may be provided with one or more pixel units.

One end of the first power line 41 and one end of the second power line 42 are connected to the corresponding pixel unit, and the other end of the first power line 41 and the other end of the second power line 42 are connected to the signal source circuit 13. For example, one end of the first power line 41 is connected to one end of the second power line 42 , and the other end of the first power line 41 is connected to the other end of the second power line 42 . The preset driving voltage can be transmitted to the second power source via the first power line 41 . The line 42 can also be transmitted to the first power line 41 via the second power line 42.

One end of each of the first compensation lines 121 may be connected to one or more pixel units in each of the pixel areas 43 of the first display area 1111, and the line channel of the first power line 41 or the second power line 42 may be multiplexed. One or more pixel units in each of the pixel regions 43 in the first display area 1111 are connected.

One end of each of the second compensation lines 122 may be connected to one or more pixel units in each of the pixel areas 43 of the second display area 1112, and the line channel of the first power line 41 or the second power line 42 may be multiplexed. One or more pixel units in each of the pixel regions 43 in the second display area 1112 are connected.

Referring to FIG. 4b, the display area 111 includes n+1 display brightness areas, which are A0 to An, respectively. Before uncompensated, the brightness is in order: A0>A1>A2...>An-1>An. After each display luminance region is compensated by the first compensation line 121 or the second compensation line 122, the brightness is sequentially: A0=A1=A2...=An-1=An.

Therefore, when the display screen layouts the first power line 41 and the second power line 42 in a horizontal and vertical crossover manner, and the compensation circuit 14 traverses a specific pixel unit in a specific pixel region as a pixel unit to be compensated, the compensation circuit 14 passes the first A compensation line 121 or a second compensation line 122 provides a compensation voltage. Therefore, in this manner, it is possible to realize a multi-region, dynamically providing compensation voltage to the pixel unit to be compensated at different positions, so that the brightness of the display area is uniform.

In some embodiments, the compensation line connection manner is also different in consideration of the manner in which different display screens are wired by different power lines. Therefore, the difference from the above embodiments is that, referring to FIG. 4c, the display area 111 is provided with a plurality of third power lines 44 and data signal lines 45, adjacent to each of the two third power lines 44, adjacent to each other. The strips of data signal lines 45 are parallel, and any one of the third power lines 44 is parallel to any one of the data signal lines 45. One end of each of the third power lines 44 is connected to a corresponding pixel unit, and the other end of each of the third power lines 44 is The signal source circuit 13 is connected.

Generally, in fabricating a thin film transistor substrate and routing, the third power line 44 and the data signal line 45 share the same layer of metal in consideration of the limitation of the number of reticle plates. Since the first compensation line or the second compensation line 122 cannot straddle the line channel where the data signal line 45 is located, in some embodiments, the first compensation line 121 multiplexes the line channel of the third power line 44 at one end. Transmit compensation voltage. The second compensation line 122 multiplexes the line channel transmission compensation voltage of the third power line 44 at one end.

When the display screen uses the power line and the data signal line to share the same layer of metal and is routed, that is, the third power line 44 is parallel to the data signal line 45. In operation, the signal source circuit 13 provides a preset through the third power line 44. The driving voltage and the compensation circuit transmit the compensation voltage through the first compensation line 121 or the second compensation line 122, thereby improving the brightness unevenness of the display screen and realizing dynamic compensation at the bottom of the display screen.

In some embodiments, please continue to refer to 4c, the number of first compensation lines 121 and the number of second compensation lines 122 are one. One end of the first compensation line 121 is connected to a power line corresponding to the pixel unit farthest from the signal source circuit 13 , and one end of the second compensation line 122 is connected to a power line corresponding to the pixel unit farthest from the signal source circuit, and the first compensation line 121 The other end and the other end of the second compensation line 122 are connected to the signal source circuit 13. The corresponding power line may be the ELVDD power line 212.

When the display screen uses the power line and the data signal line to share the same layer of metal and is routed, the first compensation line 121 and the second compensation line 122 are respectively connected to the power line corresponding to the pixel unit farthest from the signal source circuit, which can The effect of the IR drop is minimized to ensure that the brightness of the display area is effectively compensated, so that the brightness of the display area is uniform.

In some embodiments, in addition to compensating for the ELVDD voltage, the ELVSS voltage can also be compensated. Therefore, the difference from the above embodiments is that, referring to FIG. 5a, the display area 111 is provided with a fourth power line 46 and a fifth power line 47, and the fourth power line 46 and the fifth power line 47 are both used for transmitting the cathode voltage. That is, the fourth power line 46 and the fifth power line 47 are both ELVSS power lines 213.

The fourth power line 46 is disposed in an area of the first display area 1111 that is closest to the non-display area 112. Each pixel unit in the first display area 1111 is connected to the fourth power line 46, and one end of each of the first compensation lines 121 is connected to The fourth power supply line 46 corresponding to the corresponding pixel unit in the first display area 1111, the fifth power supply line 47 is disposed in the area of the second display area 1112 closest to the non-display area 112, and each pixel unit in the second display area 1112 is The fifth power line 47 is connected to each other, and one end of each of the second compensation lines 122 is connected to the fifth power line 47 corresponding to the corresponding pixel unit in the second display area 1112.

In operation, the first compensation line 121 transmits the compensation voltage of the ELVSS to the fourth power line 46 corresponding to the pixel unit to be compensated, or the second compensation line 122 transmits the ELVSS to the fifth power line 47 corresponding to the pixel unit to be compensated. The voltage is compensated, thereby improving the unevenness of the brightness of the display area 111.

In some embodiments, referring to FIG. 5b, each pixel unit 50 includes an organic light emitting diode 51, a thin film transistor 52, and a compensation structure 53.

The organic light-emitting diode 51 includes a cathode 511, and the thin film transistor 52 is connected to the cathode 511, and the compensation structure 53 is connected to the thin film transistor 52.

The thin film transistor 52 is configured to drive the organic light emitting diode 51 according to a preset driving voltage, and the compensation structure 53 is configured to detect the cathode voltage of the organic light emitting diode 51 and transmit the compensation voltage through the thin film transistor 52. For example, when the thin film transistor 52 is selected and turned on, the compensation structure 53 can detect the cathode voltage of the organic light emitting diode 51 and transmit the compensation voltage.

Referring to FIG. 5b, the thin film transistor 52 includes a substrate 521 and a first metal layer 522. The substrate 521 includes a deposition surface 50a. The first metal layer 522 is stacked on the deposition surface 50a and is in contact with the cathode 511.

In some embodiments, the substrate 521 is a flexible substrate or other material structure. Referring to FIG. 5b, in some embodiments, the deposition surface of the substrate 521 is laminated with a buffer layer 523 capable of protecting the substrate 521 and improving the electrical properties of the thin film transistor 52.

In some embodiments, the buffer layer 523 is composed of an inorganic material.

The compensation structure 53 includes a second metal layer 531 and a first insulating layer 532 stacked on the deposition surface 50a, and the second metal layer 531 is connected to the first metal layer 522 and the compensation line assembly 12, respectively. The first insulating layer 532 is stacked on the deposition surface 50a and located between the first metal layer 522 and the second metal layer 531.

In operation, the second metal layer 531 detects the real-time driving voltage of the first metal layer 522, and transmits the real-time driving voltage to the compensation circuit 14 through the compensation line assembly 12, and the compensation circuit 14 transmits to the second metal layer 531 through the compensation line assembly. The second metal layer 531 applies a compensation voltage to the first metal layer 522.

In some embodiments, the first metal layer 522 or the second metal layer 531 is a source metal or a drain metal, and the first metal layer 522 or the second metal layer 531 may be composed of Mo or AI or other metal oxide.

In some embodiments, the first insulating layer 532 is a single layer of hafnium oxide (SiO2) or a double layer ceria/yttria (SiO2/SiNx) structure.

In order to achieve bottom illumination, in some embodiments, referring to FIG. 5b, the thin film transistor 52 further includes a transparent glass layer 523 laminated between the first metal layer 522 and the cathode 511. Light can be emitted through the transparent glass layer 523.

The transparent glass layer 523 includes indium tin oxide (ISO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ISZO), or the like.

In some embodiments, referring to FIG. 5b, the thin film transistor 52 further includes a pixel defining unit 524, wherein the pixel defining unit 524 is laminated on the transparent glass layer 523 and away from the first metal layer 522.

In some embodiments, referring to FIG. 5b, the first insulating layer 532 surrounds the second metal layer 531, and the compensation structure 53 further includes an organic film layer 533 laminated on the first insulating layer 532 and away from The second metal layer 531, and the transparent glass layer 523 surrounds the organic film layer 533. The organic film layer 533 can insulate and improve the electrical properties of the thin film transistor 52.

It will be understood that the positional relationship between layers, such as the term "stacking" or "forming" or "applying" or "setting", is used in connection with one or more of the interlaminar materials as described herein. To carry out the expression, those skilled in the art can understand that any term such as "stacking" or "forming" or "applying" can cover all the ways, types and techniques of "stacking". For example, sputtering, electroplating, molding, Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), evaporation, Hybrid Physical-Chemical Vapor Deposition , HPCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), and the like.

As another aspect of the present invention, an embodiment of the present invention provides a display device. In the present embodiment, the display device can select the display screens set forth in the various embodiments described above.

Therefore, the compensation voltage is provided by the pixel unit to be compensated, so that the pixel units located in different display areas are driven by the same driving voltage, so that the brightness of different display areas can be uniform, thereby improving the brightness uniformity of each display area.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not limited thereto; in the idea of the present invention, the technical features in the above embodiments or different embodiments may also be combined. The steps may be carried out in any order, and there are many other variations of the various aspects of the invention as described above, which are not provided in the details for the sake of brevity; although the invention has been described in detail with reference to the foregoing embodiments, It should be understood by those skilled in the art that the technical solutions described in the foregoing embodiments may be modified or equivalently substituted for some of the technical features; and the modifications or substitutions do not deviate from the embodiments of the present invention. The scope of the technical solution.

10‧‧‧ display screen

11‧‧‧ display panel

111‧‧‧ display area

1111‧‧‧First display area

1112‧‧‧Second display area

112‧‧‧Non-display area

12‧‧‧Compensation line components

121‧‧‧First compensation line

122‧‧‧second compensation line

13‧‧‧Signal source circuit

14‧‧‧Compensation circuit

21‧‧‧Drive circuit

210‧‧‧ scan line

211‧‧‧Information signal line

212‧‧‧ELVDD power cord

213‧‧‧ELVSS power cord

40‧‧‧ combination zone

41‧‧‧First power cord

42‧‧‧second power cord

43‧‧‧ element area

44‧‧‧ third power cord

45‧‧‧Information signal line

46‧‧‧ fourth power cord

47‧‧‧ fifth power cord

50‧‧‧Element unit

50a‧‧‧ deposition surface

51‧‧‧Organic Luminescent Diodes

511‧‧‧ cathode

52‧‧‧film transistor

521‧‧‧Substrate

522‧‧‧First metal layer

523‧‧‧buffer layer

524‧‧‧ element definition unit

53‧‧‧Compensation structure

533‧‧‧ organic film

C1‧‧‧ storage capacitor

OO"‧‧‧ center axis

T1‧‧‧ first film transistor

T2‧‧‧second film transistor

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings to be used in the embodiments of the present invention will be briefly described below. Obviously, the drawings described below are only some embodiments of the present invention, and other drawings may be obtained from those skilled in the art without departing from the drawings.

1 is a schematic structural diagram of a display screen according to an embodiment of the present invention;

2 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention;

Figure 3 is a schematic view showing the output characteristics of a typical thin film transistor;

4a is a schematic structural diagram of a display screen according to another embodiment of the present invention;

FIG. 4b is a schematic diagram of brightness after a display area is compensated according to an embodiment of the present invention; FIG.

4c is a schematic structural diagram of a display screen according to still another embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a display screen according to still another embodiment of the present invention; FIG.

FIG. 5b is a schematic cross-sectional view of a pixel unit according to an embodiment of the invention.

Claims (13)

A display screen that includes: a display panel comprising a display area and a non-display area, the display area comprising a plurality of pixel units; a display panel comprising a display area and a non-display area, the display area comprising a plurality of pixel units; a compensation line component disposed in the non-display area, wherein the compensation line component is respectively connected to each of the pixel units; a signal source circuit disposed on a side of the display panel for providing a predetermined driving voltage for each of the pixel units; a compensation circuit is connected to the compensation line component for detecting a real-time driving voltage of each of the pixel units, determining a pixel unit to be compensated according to the preset driving voltage and the real-time driving voltage, and The pixel unit to be compensated provides a compensation voltage. The display screen of claim 1, wherein the compensation line component comprises: a plurality of first compensation lines are disposed on a side of the non-display area, wherein one end of each of the first compensation lines is connected to a corresponding pixel unit, and the other end of each of the first compensation lines is connected to the compensation circuit . The display screen as recited in claim 2, wherein The display area includes a first display area and a second display area, and the first display area is symmetric with the second display area, wherein one end of each of the first compensation lines corresponds to the first display area Pixel unit connection; The compensation line assembly further includes a plurality of second compensation lines, each of the second compensation lines being disposed on the other side of the non-display area, wherein one end of each of the second compensation lines and the second display area The corresponding pixel unit is connected, and the other end of each of the second compensation lines is connected to the compensation circuit, and the first compensation line and the second compensation line connected to the same row of pixel units are symmetric about the central axis of the display area. The display screen of claim 3, wherein the display area is provided with a plurality of first power lines and a second power line, wherein each of the two adjacent first power lines is parallel, adjacent to each of the two The second power line is parallel, and any one of the first power lines is perpendicular to any one of the second power lines, and one end of the first power line and one end of the second power line are connected to the same one. a pixel unit, the other end of the first power line and the other end of the second power line are connected to the signal source circuit. The display screen of claim 3, wherein the display area is provided with a plurality of third power lines and data signal lines, adjacent to each of the two of the third power lines, adjacent to each of the two data signals Parallel to the line, any one of the third power lines is parallel to any one of the data signal lines, and one end of each of the third power lines is connected to each of the corresponding pixel units, and each of the third power lines is further One end is connected to the signal source circuit. a display screen as recited in claim 5, wherein One end of the first compensation line is connected to a power line corresponding to a pixel unit farthest from the signal source circuit, and one end of the second compensation line is connected to a power line corresponding to a pixel unit farthest from the signal source circuit. The other end of the first compensation line and the other end of the second compensation line are both connected to the signal source circuit. The display screen according to any one of claims 3 to 6, wherein The first compensation line and the second compensation line are both transmitted for compensating an anode voltage of each of the corresponding pixel units. The display screen according to any one of claims 3 to 6, wherein The first compensation line and the second compensation line are both transmitted for compensating a cathode voltage of each of the corresponding pixel units. The display screen of claim 8, wherein the display area is provided with a fourth power line and a fifth power line, and the fourth power line and the fifth power line are both used to transmit the cathode voltage. The fourth power line is disposed in an area of the first display area that is closest to the non-display area, and each pixel unit in the first display area is connected to the fourth power line, and each of the One end of a compensation line is connected to a fourth power line corresponding to the corresponding pixel unit in the first display area, and the fifth power line is disposed in an area of the second display area that is closest to the non-display area, Each of the pixel units in the second display area is connected to the fifth power line, and one end of each of the second compensation lines is connected to a fifth power line corresponding to the corresponding pixel unit in the second display area. The display screen of claim 8, wherein each of the pixel units comprises: Organic light emitting diode, including a cathode; a thin film transistor coupled to the cathode for driving the organic light emitting diode according to the predetermined driving voltage; And a compensation structure connected to the thin film transistor for detecting a cathode voltage of the organic light emitting diode through the thin film transistor and transmitting the compensation voltage. The display screen of claim 10, wherein The thin film transistor includes: a substrate, including a deposition surface; a first metal layer laminated on the deposition surface and in contact with the cathode; The compensation structure includes: a second metal layer laminated on the deposition surface, and the second metal layer is respectively connected to the first metal layer and the compensation line assembly; A first insulating layer is laminated on the deposition surface and located between the first metal layer and the second metal layer. The display screen of claim 11, wherein the thin film transistor further comprises a transparent glass layer laminated between the first metal layer and the cathode. A display device comprising: A display screen as claimed in any one of claims 1 to 12.