TW201919322A - Synchronous rectification control system and method for multi-mode switch power supply - Google Patents

Abstract

The invention relates to a synchronous rectification control system and method for a multi-mode switch power supply, and provides a synchronous rectification (SR) controller used for a switch power supply. The controller comprises a detection module, a control module and an adjustment module. The detection module is configured to detect starting time of a primary side transistor. The control module is configured to execute the following operations of receiving the detected starting time of the transistor; and at least partially based on the starting time of the transistor, outputting a controlsignal, wherein if it is detected that a difference between a current starting cycle and a previous starting cycle of the transistor is smaller than a predetermined threshold, the control signal is alogic high level, or otherwise, the control signal is a logic low level. The adjustment module is configured to receive the control signal from the control module, adopt a first prediction ratio during demagnetization in the current cycle based on the received control signal of the logic high level, and adopt a second prediction ratio during demagnetization in the current cycle based on the received control signal of the logic low level, wherein the first prediction ratio is greater than the second prediction ratio.

Description

 Synchronous rectification control system and method for multi-mode switching power supply  

Certain embodiments of the invention relate to integrated circuits. More specifically, some embodiments of the present invention provide a synchronous rectification (SR,) control system and method for a switched-mode power supply (SMPS).

In today's switching power supply applications, each working mode (Discontinuous Conduction Mode, DCM, Quasi-Resonant, QR, Continuous Conduction Mode, CCM) in different power ranges and different applications Have their own advantages and characteristics. In high power and high current applications, CCM has a large advantage over DCM/QR in terms of efficiency, current and voltage stress, but in the low power range, DCM has the advantage of simple control, while QR mode can effectively reduce SMPS. Switching loss. Therefore, in order to balance the needs of high power, high efficiency and low standby, multiple modes of operation (DCM, CCM, QR, down-conversion) coexistence, that is, multi-mode systems have become an inevitable trend. However, the complexity of such a switching power supply brings a lot of inconvenience to the application of synchronous rectification technology, making the synchronous rectification control more complicated than the single mode power supply system.

Fig. 1 is a simplified diagram showing a conventional flyback synchronous rectification system. The synchronous rectification system 100 (eg, a power converter) includes a primary winding Np, a secondary winding Ns, a switch, a VD synchronous rectifier drain terminal voltage signal sensing, logic control, and driving. For example, the switch includes a bipolar junction transistor. In another example, the switch includes a field effect transistor (eg, a Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET). In yet another example, the switch includes an insulated gate bipolar transistor.

It is well known that in synchronous rectification system applications, the reliable opening and closing of the synchronous rectifier is extremely important. In the various operating modes of the switching power supply, there is little difference in the opening control, and the demagnetizing current can be turned on when flowing through the SR MOSFET body diode. However, the need to turn off control to balance efficiency and reliability is much more complicated, especially in the case of CCM.

Fig. 2 shows the waveform of the SR system of Fig. 1 operating under DCM. Figure 3 shows the waveform of the SR system operating in QR under Figure 1. When the power system is operating in DCM/QR mode, the transformer is demagnetized during each pulse width modulation (PWM) cycle. Therefore, at this time, the shutdown of the SR can be accurately and reliably realized by setting a transformer zero-side current zero-crossing sensing point.

Figure 4 shows the SR control block diagram in DCM/QR mode. Where Vth_on is the SR turn-on threshold, and when the VD synchronous rectifier drain voltage signal terminal voltage is lower than the threshold, SR is turned on. Vth_zero is the SR turn-off threshold, that is, the secondary current zero-crossing sense point. When the VD terminal voltage is higher than the threshold, SR is turned off. This enables SR control in DCM/QR mode.

But when the system works in CCM mode, SR control is much more complicated than DCM/QR. If the DCM/QR control mode is still used in the CCM working mode, the zero crossing designed for DCM/QR may not be triggered when the residual current on the secondary side of the transformer is turned on at the primary side so that the demagnetization is still forced to end. The sensing point can only be triggered to the zero-crossing point after the secondary side voltage of the transformer is forcibly pulled up after the primary side is turned on. This will prevent the SR from being shut down in time, which brings reliability problems.

Since the current zero-crossing point cannot be sensed in the CCM operating mode, the SR control chip cannot know in advance when the primary-side PWM will be turned on. Therefore, to ensure that the CCM synchronous rectification system operates safely and reliably, the SR's shutdown control cannot be like DCM/QR, and need a different path. When the switching power supply system works stably, the working states of the adjacent cycles are consistent. In this case, the information of the previous work cycle can be used to infer the working condition of the current cycle, and thus the opening time of the primary side power tube is predicted, so that the SR is turned off before the primary side power tube is turned on, so that the system is safely and reliably jobs. In short, when the system is working stably, the degenerative time of its adjacent front and rear cycles is the same, so that the demagnetization time of the previous cycle can be used to infer the demagnetization time of the current cycle. After knowing the demagnetization time of the cycle in advance, the cycle can be determined. SR shuts down the moment.

Figure 4 shows the CCM synchronous rectification control waveform when the system is stable and has no subharmonic oscillation. The primary side PWM is the primary side MOSFET control signal, VD is the synchronous rectifier leakage terminal voltage signal, and Demag is the transformer secondary side demagnetization signal, which is predicted to control the signal of the off SR gate generated by the prediction algorithm inside the chip. Gate is the output signal of the SR control chip. The control chip first calculates the demagnetization time of the previous cycle, that is, Don(n-1), according to the voltage signal at the VD terminal, and then uses the demagnetization time of the cycle (n-1) to predict the demagnetization time of the next cycle (n), that is, Don(n). ). Then, the predicted turn-off signal prediction can be generated after the start of demagnetization at the nth cycle to k*Don(n), and the SR can be turned off, where k is the set prediction ratio. As can be seen from the figure, due to the stable operation of the system, any front-end PWM frequency, the primary side turn-on time and the secondary side demagnetization time are consistent. In this case, the prediction algorithm can turn off the SR in advance before the primary side MOSFET is turned on accurately, thereby ensuring that the synchronous rectification system operates reliably. Figure 6 shows the generation circuit of the prediction ratio k, in which the ratio of I1 to I2 is adjusted to obtain different k: k = I1/I2‧‧‧ (Formula 1)

The above method can reliably realize CCM synchronous rectification shutdown control under the condition that the period demagnetization time is consistent or little change before and after the system is stable. However, in practical applications of power systems, especially in deep CCM, deep or shallow subharmonic oscillations are common. Subharmonic oscillation will make the primary side opening time and demagnetization time of the front and back cycles different. Under the extreme conditions, the working mode will be different (ie, DCM and CCM alternately appear), which brings inconvenience to the control and application of synchronous rectification. . When the subharmonic oscillation occurs, if the above processing method without subharmonic oscillation is still adopted, the secondary side feedthrough of the transformer source may occur, which reduces the efficiency and may bring the risk of the bomber.

Certain embodiments of the invention relate to integrated circuits. More specifically, some embodiments of the present invention provide a synchronous rectification SR control system and method. By way of example only, some embodiments of the invention are applied to the field of switching power supplies. However, it will be appreciated that the invention has a broader scope of applicability.

According to one embodiment, a synchronous rectification (SR) controller for a switching power supply is provided, comprising: a sensing module configured to sense an on time of a primary side transistor; and a control module configured to perform Operation: receiving an open time of the sensed transistor; and outputting a control signal based at least in part on a turn-on time of the transistor, wherein if a difference between a current turn-on period of the transistor and a previous turn-on period is sensed to be less than a predetermined threshold The control signal is logic high level, otherwise the control signal is logic low level; the adjustment module is configured to receive the control signal from the control module, and adopt the first prediction based on the control signal receiving the logic high level during the current period demagnetization The ratio, and based on receiving the logic low level control signal, adopts a second prediction ratio when the current period is demagnetized, wherein the first prediction ratio is greater than the second prediction ratio.

According to one embodiment, at the same time, the control module automatically adjusts the pulse width of the output control signal based on sensing the difference between the current period on time of the transistor and the on time of the previous period. In addition, the control module further sets a pulse width setting limit of the output control signal of the next cycle based on the pulse width of the output control signal of the previous cycle, so that the pulse width of the output control signal of the next cycle does not exceed the predetermined time. .

According to another embodiment, a synchronous rectification (SR) control method for a switching power supply is provided, the method comprising: sensing an on time of a primary side transistor; receiving an on time of the sensed transistor; based at least in part on the transistor Turning on time to output a control signal, wherein if the difference between the current on period of the transistor and the previous on period is less than a predetermined threshold, the control signal is at a logic high level, otherwise the control signal is at a logic low level; and the reception is from a control mode The control signal of the group adopts a first prediction ratio when the current period is demagnetized based on the control signal receiving the logic high level, and adopts a second prediction ratio when the current period is demagnetized based on the received logic low level control signal, wherein the first prediction ratio Greater than the second prediction ratio.

According to still another embodiment, a switching power supply system of an SR system as described in an embodiment of the present disclosure is provided.

According to an embodiment, one or more benefits may be obtained. These and other additional objects, features and advantages of the present invention will become apparent from the Detailed Description and appended claims.

100‧‧‧Synchronous rectification system

Np‧‧‧ primary winding

Ns‧‧‧ secondary winding

Vth_on‧‧‧SR open threshold

Vth_zero‧‧‧SR shutdown threshold

VD‧‧‧Synchronous rectifier leakage voltage signal

Demag‧‧‧ is the secondary demagnetization signal of the transformer

Don(n-1), Don(n)‧‧‧ demagnetization time

K‧‧‧predicted ratio

Iadj‧‧‧ Current

C1, C2‧‧‧ capacitor

AC‧‧‧AC current

Vin‧‧‧ voltage signal

SR‧‧‧Synchronous rectification

Gate‧‧‧ gate

Ton(n)‧‧‧ current cycle

Ton(n-1)‧‧‧ last cycle

Ton(n+1)‧‧‧n+1th cycle

V0‧‧‧Switching power supply system output voltage

C0‧‧‧Switching Power System Output Capacitor

Vp‧‧‧VD end platform voltage when source side is on

Syne1, Syne2‧‧‧ prediction sync signal

Fig. 1 is a simplified diagram showing a conventional flyback synchronous rectification SR system.

Fig. 2 shows the waveform of the SR system of Fig. 1 operating under DCM.

Figure 3 shows the waveform of the SR system operating in QR under Figure 1.

Figure 4 is a block diagram showing the SR control in the existing DCM/QR mode.

Fig. 5 shows the CCM synchronous rectification control waveform when the existing system operates stably without subharmonic oscillation.

Fig. 6 is a simplified diagram showing the generation circuit of the prediction ratio k according to the embodiment shown in Fig. 5.

Figure 7 shows the CCM synchronous rectification control waveform of the existing system operating in the presence of subharmonic oscillations.

Figure 8 illustrates a CCM synchronous rectification control waveform for a system operating in the presence of subharmonic oscillations in accordance with an embodiment of the present disclosure.

Figure 9 shows an illustration of the SR turn-off adjustment based on Δ Ton for a system in accordance with an embodiment of the present disclosure.

Figure 10 shows a simplified illustration of implementing SR turn-off adjustment by adjusting the predicted scale in accordance with the embodiment of Figure 9.

11 is a control timing chart when the current period (nth cycle) primary side turn-on time is longer than the previous cycle (n-1th cycle) primary side turn-on time, according to an embodiment of the present disclosure.

Figure 12 shows a waveform diagram of the primary side-secondary side feed-through with greater interference, in accordance with an embodiment of the present disclosure.

FIG. 13 shows an illustration of setting the SR ON time setting limit on a cycle-by-cycle basis, according to an embodiment of the present disclosure.

Figure 14 shows a simplified diagram of a system that sets a limit on the SR on time setting cycle by cycle, in accordance with an embodiment of the present disclosure.

Figure 15 illustrates the timing of a system that sets a limit on the SR on time setting cycle by cycle, in accordance with an embodiment of the present disclosure.

Features and exemplary embodiments of various aspects of the invention are described in detail below. In the following detailed description, numerous specific details are set forth However, it will be apparent to those skilled in the art that the present invention may be practiced without some of the details. The following description of the embodiments is merely provided to provide a better understanding of the invention. The present invention is in no way limited to any specific configurations and algorithms presented below, but without departing from the spirit and scope of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessary obscuring the invention.

Figure 7 shows the CCM synchronous rectification control waveform of the existing system operating in the presence of subharmonic oscillations. As shown in Fig. 7, due to the subharmonic oscillation, the primary side MOSFET turn-on time and the transformer secondary side demagnetization time show a large change between adjacent periods. It can be seen from the figure that the demagnetization time of the nth period is shorter than the demagnetization time of the n-1th period. If the prediction ratio of the n-1th period is still used, the predicted off point of the nth period may appear in the During the opening of the primary side MOSFET of the n+1th cycle, the SR of the nth cycle cannot be turned off in time, resulting in the feedthrough of the primary and secondary sides, reducing the efficiency and reliability of the power supply system.

The control chip determines the required prediction ratio before each predicted turn-off of the SR. This requires first sensing the turn-on time of the primary-side MOSFETs in the adjacent period and comparing the changes, and then based on the information, switching the prediction ratio to Prevent the occurrence of source secondary feedthrough. If it is sensed that the current period Ton(n) is shorter than the previous period Ton(n-1), the demagnetization time of the current period will be longer than the demagnetization time of the previous period. At this time, using a larger prediction ratio will not result in Feedthrough of the secondary side of the source. However, if it is sensed that the current period Ton(n) is longer than the previous period Ton(n-1), the demagnetization time of the current period is shorter than the demagnetization time of the previous period. In this case, a smaller prediction ratio is required, otherwise Feedthroughs can happen.

In short, before the demagnetization prediction turns off the SR, the control chip first calculates the change in the primary side turn-on time of the adjacent period. If Ton(n)-Ton(n-1) is less than the set threshold, the system is stable or only has a slight subharmonic oscillation, and a larger prediction ratio can be used in the current period demagnetization. However, if Ton(n)-Ton(n-1) is greater than the set threshold, it indicates that a more serious subharmonic oscillation has occurred. In the pre-period demagnetization, a smaller prediction ratio is needed to avoid the original secondary feedthrough. occur.

In the above method, the single threshold control for the difference of the opening time of the primary side of the adjacent period can ensure the reliable operation of the power system when the system is unstable or the subharmonic oscillation is severe. However, in order to further improve the self-adjustment of the synchronous rectification system and reduce the dependence on the single threshold (wafer difference/circuit precision), when the wafer senses the change of the primary side on-time of the adjacent period, it will also be based on the magnitude of the variation. The turn-off timing of the synchronous rectifier is fine-tuned to further improve the reliability of the power supply system while reducing the operational stability requirements of the primary-side system due to the presence of synchronous rectification.

When the change of the primary side turn-on time of the adjacent cycle is sensed = Ton(n) - Ton(n - 1), the SR control chip will cause the current cycle, that is, the SR turn-on time of the nth cycle, regardless of whether the amount of change is positive or negative. Shortened as shown in Figure 8.

Figure 8 illustrates a CCM synchronous rectification control waveform for a system operating in the presence of subharmonic oscillations in accordance with an embodiment of the present disclosure. In order to ensure reliable operation of the PWM system for each PWM period and avoid the feedthrough phenomenon shown in Figure 7, it is necessary to use a smaller prediction ratio in the nth cycle to turn the SR off in advance. However, the demagnetization time of the n+1th cycle is longer than the demagnetization time of the nth cycle. At this time, it is better to use a larger prediction ratio to minimize the demagnetization current of the n+1th cycle flowing through the SRMOSFET body diode. Time, lower system temperature. In this case, the prediction ratio needs to be switched under certain conditions. As mentioned above, when subharmonic oscillation occurs, not only the demagnetization time of the adjacent period changes, but also the on-time of the primary side MOSFET changes accordingly. In this way, the switching between the front and rear PWM period prediction ratios can be realized by sensing the difference in the primary side turn-on time of the PWM period before and after, as shown in FIG.

FIG. 9 shows an illustration of a system based shutdown adjustment for SR, in accordance with an embodiment of the present disclosure. As shown, an additional current Iadj is introduced on the basis of Fig. 6. In any PWM cycle, if the period is sensed to be different from the primary side turn-on time of the previous cycle, the current cycle Idj is turned on at the beginning of the current cycle demagnetization time, and the capacitor C1 (C2) is discharged Δ Ton , after which it can be The prediction of the shutdown signal is generated after the start of the n-cycle demagnetization to the following time:

Even if the SR turn-on time is shortened in the nth cycle *△ Ton , where the ratio of Iadj to I2 can be adjusted to obtain different shortening times. When Iadj=n*I2, the current period SR on time can be shortened by n*△ Ton.

Figure 10 shows a simplified illustration of implementing SR turn-off adjustment by adjusting the predicted scale in accordance with the embodiment of Figure 9. The control timing chart in which the primary side ON time of the current cycle (nth cycle) is longer than the previous cycle (n-1th cycle) primary side turn-on time.

As shown in the figure, when the difference between Ton(n-1) and Ton(n) does not reach the threshold of the direct adjustment prediction ratio, that is, k, if there is no such mechanism, the prediction off point at the nth cycle is the prediction signal (dashed line) The low level quasi-pulse occurs during the primary side turn-on of the n+1th cycle, resulting in a primary-second side feedthrough. However, under the action of the mechanism, the predicted off-break point at the nth cycle, that is, the predicted signal appears at the correct time, shortens the SR turn-on time, and avoids the source secondary feedthrough.

11 is a control timing chart when the current period (nth cycle) primary side turn-on time is longer than the previous cycle (n-1th cycle) primary side turn-on time, according to an embodiment of the present disclosure. The control timing chart in which the primary side turn-on time of the current cycle (nth cycle) is shorter than the previous cycle (n-1th cycle) of the primary side turn-on time. As shown in the figure, when the difference between Ton(n-1) and Ton(n) does not reach the threshold of the direct adjustment prediction ratio, that is, k, if there is no such mechanism, the prediction off point at the nth cycle is the prediction signal (dashed line) The low level quasi-pulse occurs during the primary side turn-on of the n+1th cycle, resulting in source secondary feedthrough. However, under the action of the mechanism, the predicted off-break point at the nth cycle, that is, the predicted signal appears at the correct time, shortens the SR turn-on time, and avoids the source secondary feedthrough.

In the normal working process of the system, or when it is subjected to slight interference or sub-harmonic oscillation, the above means is sufficient to ensure the reliability of the synchronous rectification switching power supply system, and the efficiency and temperature rise requirements are taken into consideration. However, when the system is subjected to more severe external interference, especially when the system loop fluctuates, the primary side PWM frequency and pulse width will change greatly, as shown in Figure 12.

During the n-1th cycle, the fluctuations in the system cause the PWM to change as shown in the figure. The adjacent period, that is, the primary side turn-on time and the nth cycle of the n-1th cycle change drastically. The demagnetization time of the n-1th period is too long, so that the predicted turn-off signal at the nth period occurs after the primary side of the n+1th period is turned on, so that the SR off edge of the nth period and the n+1th period The primary side open rising edges overlap, causing the source secondary sides to overlap. In this case, the mechanism of SR progressive expansion can effectively avoid such overlap or feedthrough introduced when the system fluctuates sharply.

The control chip senses and records the SR on time of each PWM cycle, and based on the SR on time of the cycle, sets a limiter for the SR on time of the next cycle (by setting a delay time or setting a ratio), so that the SR of the next cycle is performed. The opening time must not exceed the set time.

FIG. 13 shows an illustration of setting the SR ON time setting limit on a cycle-by-cycle basis, according to an embodiment of the present disclosure. The control chip first records the actual SR on time and the demagnetization time of each cycle cycle by cycle, and then calculates the Pre_SR on time of the current cycle according to the demagnetization time of the n-1th cycle, and simultaneously sets the actual ON time of the SR in the n-1th cycle. The current period is reproduced and used as a reference to set the SR on time limiter of the current period. If the pre_sr open time of the current period is longer than the SR open time limiter of the current period, the current period SR is forcibly terminated after the SR open time limiter, and only the limited time is turned on. This indicates that the system status has fluctuated drastically. The current SR open time is limited.

Figure 14 shows a simplified diagram of a system that sets a limit on the SR on time setting cycle by cycle, in accordance with an embodiment of the present disclosure. In the circuit implementation, the actual opening time of the current period SR is limited in the form of reappearing the actual opening time of the n-1th period sr and then adding delay.

Figure 15 illustrates the timing of a system that sets a limit on the SR on time setting cycle by cycle, in accordance with an embodiment of the present disclosure. The improved control mode is shown in the figure below. It can be seen that the feedthrough caused by the sharp change of the state can be effectively prevented.

Certain embodiments of the invention relate to integrated circuits. More specifically, some embodiments of the present invention provide a synchronous rectification SR control system and method. By way of example only, some embodiments of the invention are applied to the field of switching power supplies. However, it will be appreciated that the invention has a broader scope of applicability.

For example, using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components, some or all of the various embodiments of the present invention are each separately and/or It is implemented in a manner that is combined with at least another component. In another example, some or all of the elements of various embodiments of the invention are each implemented individually and/or in combination with at least another element, such as one or more analog circuits and/or one or more digits. In one or more circuits such as circuits. In another example, various embodiments and/or examples of the invention may be combined.

Although specific embodiments of the invention have been described, it will be understood by those skilled in the art Therefore, it is understood that the invention is not to be limited the

Claims (8)

 A synchronous rectification (SR) controller for a switching power supply, the SR controller includes: a sensing module configured to sense an opening time of a primary side transistor; a control module, The control module is configured to perform an operation of: receiving a sensed turn-on time of the transistor; and outputting a control signal based at least in part on an on time of the transistor, wherein if the The control signal is a logic high level, and the control signal is a logic low level; the adjustment module is configured to receive the source The control signal of the control module adopts a first prediction ratio when the current period is demagnetized based on the control signal receiving the logic high level, and adopts the second prediction when the current period is demagnetized based on the received logic low level control signal a ratio, wherein the first predicted ratio is greater than the second predicted ratio.    The SR controller of claim 1, wherein the adjustment module comprises a prediction ratio generation unit, the prediction ratio generation unit comprising an adjustment current source and an adjustment capacitor, wherein the current period demagnetization time begins The adjustment current source is turned on, and the adjustment capacitor discharges a duration of a difference between a current on period of the transistor and a previous on period.    The SR controller of claim 1, wherein the predetermined threshold is a fixed value or a variable value.    The SR controller of claim 1, wherein the first prediction ratio and the second prediction ratio are fixed values or variable values.    The SR controller of claim 1, wherein the control module is further configured to: record a difference between a current cycle open time of the transistor and an open time of the previous cycle, and automatically adjust the output based on the difference. The pulse width of the control signal.    The SR controller of claim 1, wherein the control module is further configured to: record an SR on time of a primary side pulse width modulation (PWM) period of the switching power supply; The SR on time of one cycle is used to set the SR on time setting limit of the next cycle so that the SR on time of the next cycle does not exceed the predetermined time.    6. The SR controller of claim 5, wherein the adjustment module further comprises a delay unit, wherein the adjustment module is configured to: add a predetermined delay to the SR on time of the previous period , thereby limiting the SR on time of the next cycle.    A synchronous rectification (SR) control method for a switching power supply, the method comprising: sensing an on time of a primary side transistor; receiving an sensed on time of the transistor; based at least in part on opening of the transistor Time outputting a control signal, wherein the control signal is a logic high level if the difference between the current on period and the last on period of the transistor is sensed to be less than a predetermined threshold, otherwise the control signal is a logic low level; Receiving a control signal from the control module, adopting a first prediction ratio when the current period is demagnetized based on a control signal receiving a logic high level, and adopting a logic low level control signal based on receiving the logic low level control signal during the current period demagnetization a second prediction ratio, wherein the first prediction ratio is greater than the second prediction ratio.    A switching power supply system comprising the SR system of any one of claims 1-6.