TW201909526A - Low phase surge protection device - Google Patents

Abstract

A low phase surge protection device is provided. The low phase surge protection device includes a voltage converter, a low phase delay detector, and an output control switch. The voltage converter receives an alternate current (AC) input voltage, and converts the AC input voltage to a direct current (DC) input voltage. The low phase delay detector receives the DC input voltage to be a power source, enables a phase detection scheme by detecting whether the AC input voltage is stabled or not, and generates an enable signal by detecting a phase of the AC input voltage after the phase detection scheme has been enabled. The output control switch receives the AC input voltage, and determines whether to transport the AC input voltage to be an output voltage according to the enable signal.

Description

Low phase surge protector

The present invention relates to a low phase surge protector, and more particularly to a delay activated low phase surge protector.

In the power supply system of the AC power supply, taking the automatic power supply system of the street lamp as an example, when the AC power supply to the street light is to be supplied, the switch current supply switch of the power supply generates a surge current. When such a surge current is applied to a circuit device, it may cause deterioration or damage of the circuit component. In particular, if the time point when the switch is turned on is exactly equal to the time when the AC voltage is at a high phase, the current value of the generated surge current will be very high, which seriously affects the proper rate of the circuit device.

In the prior art, a surge protector is often used to protect the surge current. However, conventional surge protectors only provide limited energy protection. For the above-mentioned type of surge current, the conventional surge protector does not effectively protect the circuit components.

The invention provides a low phase surge protector, which can reduce the phenomenon that an instantaneous large current can be generated when the switch is turned on.

The low phase surge protector of the present invention includes a voltage converter, a low phase delay detector, and an output control switch. The voltage converter receives the AC input voltage and converts the AC input voltage to produce a DC input voltage. The low phase delay detector is coupled to the voltage converter, receives the DC input voltage as a power supply voltage, detects whether the AC input voltage reaches a steady state to activate the phase detection mechanism, and detects the AC input voltage after the phase detection mechanism is activated. Phase to generate a start signal. The output control switch is coupled to the low phase delay detector, receives the AC input voltage, and determines whether to transmit the AC input voltage as the output voltage according to the start signal.

In an embodiment of the invention, the phase detector includes a stable voltage detector and a phase detector. The stable voltage detector receives the AC input voltage and determines whether to initiate the phase detection mechanism based on comparing the voltage peak of the AC input voltage with the first reference voltage. The phase detector is coupled to the stable voltage detector. When the phase detection mechanism is activated, the phase detector generates a start signal according to the voltage value of the AC input voltage and the second reference voltage.

In an embodiment of the invention, the stable voltage detector activates the phase detection mechanism when the voltage peak of the AC input voltage is greater than the first reference voltage.

In an embodiment of the invention, when the phase detection mechanism is activated, and when the voltage value of the AC input voltage is less than the second reference voltage, the phase detector enables the enable signal and causes the output control switch to be turned on.

In an embodiment of the invention, the stable voltage detector includes a voltage regulator and a comparator. The voltage regulator performs a low pass filtering action on the AC input voltage to obtain an adjusted input voltage representative of the voltage peak of the AC input voltage. The comparator is coupled to the voltage regulator, receives the adjusted input voltage and the first reference voltage, and generates a determination signal according to the adjusted input voltage and the first reference voltage.

In an embodiment of the invention, the comparator includes an operational amplifier and a feedback resistor. The positive input terminal of the operational amplifier receives the adjusted input voltage, the negative input terminal of the operational amplifier receives the first reference voltage, and the output terminal of the operational amplifier generates a determination signal. The feedback resistor is coupled between the positive input of the operational amplifier and the output of the operational amplifier. Among them, the operational amplifier receives the DC input voltage as the power supply voltage.

In an embodiment of the invention, the stable voltage detector further includes a voltage stabilizing circuit. The voltage stabilizing circuit is coupled to the negative input terminal of the operational amplifier and generates a first reference voltage according to the DC input voltage.

In an embodiment of the invention, the voltage stabilizing circuit includes a capacitor, a resistor, and a Zener diode. The capacitor is coupled between the negative input of the operational amplifier and the reference ground. One end of the resistor receives the DC input voltage and the other end is coupled to the negative input of the operational amplifier. The cathode end of the Zener diode is coupled to the negative input terminal of the operational amplifier, and the anode end thereof is coupled to the reference ground.

In an embodiment of the invention, the phase detector includes a first voltage dividing circuit, a second voltage dividing circuit, and an operational amplifier. The first voltage dividing circuit receives the determination signal and divides the voltage for the determination signal to generate a second reference voltage. The second voltage dividing circuit receives the AC input voltage and divides the AC input voltage to generate a divided input voltage. The positive input of the operational amplifier receives the second reference voltage, the negative input receives the divided input voltage, and the operational amplifier compares whether the second reference voltage is greater than the divided input voltage to generate a start signal at its output.

In an embodiment of the invention, the phase detector further includes a diode and a resistor. The anode of the diode is coupled to the output of the operational amplifier, and the cathode is coupled to the positive input of the operational amplifier. The resistor is coupled in series with the diode between the output of the operational amplifier and the positive input of the operational amplifier.

In an embodiment of the invention, the low phase surge protector further includes a switch drive circuit. The switch drive circuit is coupled between the low phase delay detector and the output control switch, generates a drive signal according to the start signal, and provides a drive signal to cause the output control switch to be turned on or off.

In an embodiment of the invention, the switch driving circuit includes a first resistor, a second resistor, a transistor, a capacitor, and a diode. One end of the first resistor receives an enable signal. The second resistor is coupled between the second end of the first resistor and the reference electrical terminal. The control end of the transistor is coupled to the second end of the first resistor, and the first end thereof is coupled to the reference ground. The capacitor is coupled between the control end of the transistor and the reference ground. The cathode of the diode receives a DC input voltage, and its anode is coupled to the second end of the transistor. Wherein, a driving signal is provided between the cathode and the anode of the diode.

In an embodiment of the invention, the low phase delay detector further receives a power supply command and activates a phase detection mechanism according to the power supply command.

In an embodiment of the invention, the low phase surge protector further includes a surge protection device. The surge protection device is coupled between the voltage converter and the path of the output control switch receiving the AC input voltage, and performs a surge protection action on the AC input voltage.

In an embodiment of the invention, the surge protection device is a varistor.

In an embodiment of the invention, the low phase surge protector further includes a voltage output indicating device. The voltage output indicating device is coupled to the output control switch to generate an output voltage end point for indicating whether the output voltage is generated.

In an embodiment of the invention, the voltage output indicating device is an indicator light.

In an embodiment of the invention, the output control switch is a solid state switch.

In an embodiment of the invention, after the phase detection mechanism is activated, the low phase delay detector generates a start signal according to whether the phase of the AC input voltage is less than 20 ⁰ , and the phase of the AC input voltage is less than 20 ^{At 0} o'clock, the output control switch is turned on by the start signal.

Based on the above, after the AC input power source, the invention passes through the phase of the AC input power source of the detection side, and turns on the output control switch at a time point when the AC input power source is low phase, and then supplies the AC input power source to the electronic device through the output control switch. in. In this way, the electronic device does not instantaneously generate a large current due to the instantaneous reception of a high-voltage AC input power source, thereby effectively preventing the electronic device from being damaged due to an instantaneous large current.

The above described features and advantages of the invention will be apparent from the following description.

Please refer to FIG. 1 , which illustrates a schematic diagram of a low phase surge protector according to an embodiment of the invention. The low phase surge protector 100 includes a voltage converter 110, a low phase delay detector 120, and an output control switch 130. Voltage converter 110 receives an AC input voltage VIAC. The voltage converter 110 converts the AC input voltage VIAC to produce a DC input voltage VIDC. The voltage converter 110 is an AC to DC voltage converter. For example, the voltage converter 110 can be a full-wave rectifier (such as a bridge rectifier) or a half-wave rectifier.

The low phase delay detector 120 is coupled to the voltage converter 110. The low phase delay detector 120 receives the AC input voltage VIAC and receives the DC input voltage VIDC generated by the voltage converter 110. The low phase delay detector 120 detects whether the AC input voltage VIAC reaches a steady state to initiate a phase detection mechanism. And, under the condition that the phase detection mechanism is activated, the low phase delay detector 120 generates a start signal EN according to the phase of detecting the AC input voltage VIAC.

Specifically, the low phase delay detector 120 can compare the voltage peak of the AC input voltage VIAC with the voltage value of a first reference voltage. When the voltage peak value of the AC input voltage VIAC is greater than the voltage value of the first reference voltage, it indicates that the AC input voltage VIAC has risen to a steady state and is sufficient to supply power to the connected electronic device as an operating power source. In contrast, if the voltage peak value of the AC input voltage VIAC is not greater than the voltage value of the first reference voltage, it indicates that the AC input voltage VIAC has not been stabilized, and is insufficient to supply power to the electronic device as its working power source.

Further, after the low phase delay detector 120 determines that the AC input voltage VIAC has reached a steady state, the low phase delay detector 120 can initiate a phase detection mechanism and generate a start signal EN through a phase detection mechanism. The low phase delay detector 120 can detect the phase of the input voltage VIAC and enable the enable signal EN when the phase angle of the input voltage VIAC is lower than a predetermined phase angle under the condition that the phase detection mechanism is activated. .

In this embodiment, the enable signal EN can be a logic signal, and the enable signal EN can be at the first logic level when the enable signal EN is not enabled. In contrast, when the enable signal EN is enabled, the enable signal EN can be a second logic level, wherein the first logic level is complementary to the second logic level.

On the other hand, the low phase delay detector 120 receives the DC input voltage VIDC generated by the voltage converter 110 as an operating power source. In this way, the low phase delay detector 120 can operate effectively without the need for an additional power supply (eg, installing a battery) to provide operating power.

The output control switch 130 receives the AC input voltage VIAC and is coupled to the low phase delay detector 120 to receive the enable signal EN. When the enable signal EN is enabled, the output control switch 130 is turned on, and the AC input voltage VIAC is passed, and the output voltage VOAC is supplied. In contrast, if the enable signal EN is not enabled, the output control switch 130 is turned off, and the path for transmitting the AC input voltage VIAC to become the output voltage VOAC is turned off. Therefore, the AC input voltage VIAC is not provided to the electronic device.

In addition, the voltage value of the first reference voltage is a preset voltage value. It can be set according to the specifications of the power supply grid of the AC input voltage VIAC. Briefly, if the maximum voltage peak of the AC input voltage VIAC supplied by the power supply grid is 220V, the voltage value of the first reference voltage can be set to a product of 220V and an appropriate ratio (for example, 60%). Of course, if the maximum voltage peak of the AC input voltage VIAC supplied by the power supply grid is 110V, the voltage value of the first reference voltage can be set to a product of 110V and an appropriate ratio (for example, 60%).

With regard to the above-mentioned preset phase angle setting, the designer can adjust the magnitude of the surge current generated when the output control switch 130 is turned on according to the actual operating state. Of course, the closer the preset phase angle is to zero, the lower the magnitude of the surge current can be.

In the present embodiment, the output control switch 130 may be a solid state switch (such as a solid state relay), and when the enable signal EN is enabled, generate a magnetic field according to the enabled enable signal EN, and attract the output control switch 130. The conductive structure between the two terminals is such that the two terminals of the output control switch 130 are electrically connected to each other, and the AC input voltage VIAC becomes the output voltage VOAC for supply to the electronic device of the subsequent stage.

Incidentally, in the embodiment of the present invention, the low phase delay detector 100 can receive a power supply command and activate the phase detection mechanism according to the power supply command. Moreover, after the voltage value of the AC input voltage VIAC is stabilized, the low phase delay detector 100 determines the time point at which the output control switch 130 is turned on by detecting the phase of the AC input voltage VIAC, thereby effectively reducing the instantaneous current generated at the moment of power supply.

Referring to FIG. 2, FIG. 2 is a schematic diagram of an embodiment of a low phase delay detector according to an embodiment of the invention. The low phase delay detector 120 receives the DC input voltage VIDC generated by the voltage converter 110 as an operational power source, and the low phase delay detector 120 includes a stable voltage detector 210 and a phase detector 220. The stable voltage detector 210 is coupled to the phase detector 220. The stable voltage detector 210 receives the AC input voltage VIAC and determines whether to activate the phase detection mechanism according to comparing the voltage peak of the AC input voltage VIAC with the first reference voltage VR1. Specifically, when the stable voltage detector 210 determines that the voltage peak of the AC input voltage VIAC is greater than the first reference voltage VR1, it can be determined that the AC input voltage VIAC has reached a steady state. The stable voltage detector 210 can generate a decision signal PDS indicating that the phase detection mechanism is activated. In contrast, when the stable voltage detector 210 determines that the voltage peak of the AC input voltage VIAC is not greater than the first reference voltage VR1, it can be determined that the AC input voltage VIAC has not reached a steady state. The stable voltage detector 210 can generate a decision signal PDS indicating that the phase detection mechanism is not activated.

The phase detector 220 receives the determination signal PDS, and under the condition that the determination signal PDS indicates that the phase detection mechanism is activated, the phase detector 220 compares the voltage value of the AC input VIAC voltage with the voltage value of the second reference voltage VR2 to generate the activation signal EN. Specifically, the phase detector 220 compares the voltage value of the AC input VIAC voltage with the voltage value of the second reference voltage VR2, and determines the AC input VIAC voltage when the voltage value of the AC input VIAC voltage is less than the second reference voltage VR2. A point in time at which a low phase occurs, and at this point in time, the enable signal EN is enabled. And through the enabled enable signal EN, the output control switch 130 is turned on, and the output voltage VOAC is smoothly supplied.

Regarding the stable voltage detector 210 and the phase detector 220, please refer to the schematic diagrams of the embodiments of the stable voltage detector and the phase detector, respectively, as shown in FIG. 3 and FIG. In FIG. 3, the stable voltage detector 210 includes a voltage regulator 310 and a comparator 320. The voltage regulator 310 includes a transformer T1, a rectifier 311, and a filter 312. The AC input voltage VIAC is sequentially subjected to voltage transformation, rectification, and filtering operations by the transformer T1, the rectifier 311, and the filter 312 to generate the adjusted input voltage VT. Among them, the transformer T1 can be used to lower the voltage value of the AC input voltage VIAC. The rectifier 311 can be a bridge rectifier, and the filter 312 can be a low pass filter composed of resistors R1, R2 and a capacitor C1. In the filter 312, one end of the resistor R1 receives the voltage VA generated by the rectifier 311, and the other end of the resistor R1 produces the adjusted input voltage VT. The resistor R2 and the capacitor C1 are coupled in parallel between the end point of the generated input voltage VT and the reference ground GND.

The adjusted input voltage VT is transmitted to the comparator 320. The comparator 320 includes an operational amplifier OP1 and a feedback resistor R4. The feedback resistor R4 is connected in series between the positive input terminal and the output terminal of the operational amplifier OP1. In addition, the positive input terminal of the operational amplifier OP1 receives the adjusted input voltage VT, the negative input terminal of the operational amplifier OP1 receives the first reference voltage VR1, and the output terminal of the operational amplifier OP1 generates the determination signal PDS. In the present embodiment, the operational amplifier OP1 receives the DC input voltage VIDC as a power supply voltage. In addition, the first reference voltage VR1 is generated by the voltage stabilizing circuit 330.

The voltage stabilizing circuit 330 includes a resistor R3, a capacitor C2, and a Zener diode ZD1. One end of the resistor R3 receives the DC input voltage VIDC, and the other end of the resistor R3 is coupled to the first end of the capacitor C2 and the cathode end of the Zener diode ZD1. The second end of the capacitor C2 and the anode end of the Zener diode ZD1 are commonly coupled to the reference ground GND. When the voltage value of the DC input voltage VIDC is greater than the breakdown voltage of the Zener diode ZD1, the voltage difference between the cathode terminal of the Zener diode ZD1 and its anode terminal (coupled to the reference ground GND) may be equal to its collapse. The voltage value of the voltage, and therefore, the Zener diode ZD1 can provide a stable first reference voltage VR1 at its cathode terminal.

As can be seen from the above description, in the embodiment of FIG. 3, when the voltage peak of the AC input voltage VIAC rises to a sufficiently high steady state voltage value, the adjusted input is generated according to the voltage peak of the AC input voltage VIAC. The voltage VT may be greater than the first reference voltage VR1 and cause the operational amplifier OP1 to generate a decision signal PDS having a relatively high voltage. In contrast, when the voltage peak of the AC input voltage VIAC does not rise to a sufficiently high steady state voltage value, the adjusted input voltage VT generated according to the voltage peak of the AC input voltage VIAC cannot be greater than the first reference voltage VR1, according to which The operational amplifier OP1 generates a decision signal PDS having a relatively low voltage.

In FIG. 4, the phase detector 220 includes voltage dividing circuits 410, 420, an operational amplifier OP2, a diode D1, and a resistor R11. The voltage dividing circuit 410 has resistors R5 and R6 coupled in series. The voltage dividing circuit 410 receives the determination signal PDS, and divides the determination signal PDS, and generates a second reference voltage VR2. The voltage dividing circuit 420 includes a plurality of resistors R7 to R10 and receives an AC input voltage VIAC and a DC input voltage VIDC. The voltage dividing circuit 420 is based on the DC input voltage VIDC and divides the voltage for the AC input voltage VIAC to generate a divided input voltage DVIN. The voltage value of the divided input voltage DVIN may be greater than the voltage value of the ground voltage on the reference ground GND.

The positive input terminal of the operational amplifier OP2 receives the second reference voltage VR2, and the negative input terminal of the operational amplifier OP2 receives the divided input voltage DVIN. The operational amplifier OP2 generates the enable signal EN according to the comparison of the second reference voltage VR2 and the divided input voltage DVIN. In addition, the resistor R11 and the diode D1 are coupled in series between the output terminal of the operational amplifier OP2 and the positive input terminal of the operational amplifier OP2. The diode D1 is forward biased between the output terminal of the operational amplifier OP2 and the positive input terminal of the operational amplifier OP2.

Further, when the determination signal PDS having a relatively high voltage is generated, the phase detection mechanism is activated. The voltage dividing circuit 410 divides the determination signal PDS and generates a second reference voltage VR2. At the same time, the divided voltage 420 divides the AC input voltage VIAC and generates a divided input voltage DVIN. The operational amplifier OP2 compares the voltage magnitude relationship between the divided input voltage DVIN and the second reference voltage VR2, and can learn that the AC input voltage VIAC is low phase when the divided input voltage DVIN is smaller than the second reference voltage VR2. status. In this way, the operational amplifier OP2 can correspondingly generate the enabled enable signal EN. In contrast, when the divided input voltage DVIN is not less than the second reference voltage VR2, the AC input voltage VIAC is in a high phase state. In this way, the operational amplifier OP2 can correspondingly generate the disabled enable signal EN. The enabled enable signal EN can cause the output control switch 130 to be turned on and generate the output voltage VOAC. The disable enable signal EN can turn off the output control switch 130 and block the generation of the output voltage VOAC.

It is worth mentioning that when a decision signal PDS having a relatively low voltage is generated, the phase detection mechanism is turned off. At this time, the voltage value generated by the voltage dividing circuit 410 for dividing the determination signal PDS to generate the second reference voltage VR2 will be low. Therefore, the voltage value of the divided input voltage DVIN will be greater than the voltage value of the second reference voltage VR2, and the operational amplifier OP2 generates the disable enable signal EN.

Incidentally, in the embodiment, the phase detector 220 further includes a voltage stabilizing circuit 430. The voltage stabilizing circuit 430 is coupled to the negative input terminal of the operational amplifier OP2 and includes a Zener diode ZD2 and a capacitor C3. The voltage stabilizing circuit 430 is used to stabilize the voltage value on the negative input terminal of the operational amplifier OP2, and the voltage value on the negative input terminal of the operational amplifier OP2 is not greater than the breakdown voltage of the synchronizing diode ZD2.

Please refer to FIG. 5 below. FIG. 5 is a schematic diagram of a switch driving circuit according to an embodiment of the present invention. The switch drive circuit 500 is connected in series between the low phase delay detector 120 and the output control switch 130. The switch driving circuit 500 receives the enable signal EN and generates a drive signal DRV according to the enable signal EN. The drive signal DRV is supplied to the output control switch 130, and causes the output control switch 130 to be turned on or off.

In the present embodiment, the switch driving circuit 500 includes an amplifier composed of resistors R51 and R52, a capacitor C51, a transistor TR1, and a diode D51. One end of the resistor R51 receives the enable signal EN. The resistor R52 is coupled between the second end of the resistor R51 and the reference electrical terminal GND. The control end of the transistor TR1 is coupled to the second end of the resistor R51, and the first end of the transistor TR1 is coupled to the reference ground GND. The capacitor C51 is coupled between the control end of the transistor TR1 and the reference ground GND. The cathode of the diode D51 receives the DC input voltage VIDC, and its anode is coupled to the second end of the transistor TR1. Wherein, the driving DRV signal is provided between the cathode and the anode of the diode D51. When the enable signal EN is enabled, the switch drive circuit 500 correspondingly generates the drive signal DRV to drive the output control switch 130 to be turned on, and causes the AC input voltage VIAC to be transmitted as the output voltage VOAC. In contrast, when the enable signal EN is disabled, the drive signal DRV corresponding to the switch drive circuit 500 can drive the output control switch 130 to be turned off, blocking the outgoing path of the AC input voltage VIAC.

Please refer to FIG. 6. FIG. 6 is a schematic diagram of a low phase surge protector according to another embodiment of the present invention. The low phase surge protector 600 includes a voltage converter 610, a low phase delay detector 620, an output control switch 630, a surge protection device 640, a voltage output indicating device 650, and a switch drive circuit 670. Unlike the foregoing embodiment, the present invention provides a surge protection device 640 at the front end of the low phase surge protector 600 and performs a protection action against the surge current generated by the AC input voltage VIAC. In this embodiment, the surge protection device 640 can be a varistor.

Further, in the present embodiment, the voltage output indicating means 650 is additionally provided at the end point where the output voltage VOAC is generated. The voltage output indicating means 650 is for receiving the output voltage VOAC, and when the output voltage VOAC is generated, the voltage output indicating means 650 can clearly indicate the output voltage VOAC to be smoothly produced. In an embodiment of the invention, the voltage output indicating device 650 can be an indicator light (eg, a light emitting diode). Through the voltage output indicating device 650, the engineer can know whether the system generates the output voltage VOAC to the electronic device and uses it as a piece of information for system maintenance.

In addition, the switch driving circuit 670 is coupled between the output control switch 630 and the low phase delay detector 620, generates a driving signal DRV according to the startup signal EN generated by the low phase delay detector 620, and provides a driving signal DRV for output control. Switch 630 is turned "on" or "off".

Please refer to FIG. 7. FIG. 7 is a diagram showing the operation waveforms of the low phase surge protector according to the embodiment of the present invention. Wherein, the output voltage VOAC is generated at the time point TA1, and at the time point TA1, the AC input voltage is in a low phase state (for example, less than 20 ^o ). Under this condition, the magnitude of the current value of the current IAC generated when the output control switch is turned on (at the time point TA1) can be effectively controlled without causing damage to the electronic components.

In summary, the present invention detects the phase of the AC input voltage after the AC input voltage is stabilized, and turns on the output control switch to generate an output voltage when the AC input voltage is at a relatively low relative time. In this way, the energy of the surge current that may be generated at the moment when the output voltage is supplied can be effectively reduced, and the probability of damage of the electronic component is reduced.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100, 600‧‧‧Low phase surge protector

110, 610‧‧‧ voltage converter

120, 620‧‧‧Low phase delay detector

130, 630‧‧‧ output control switch

640‧‧‧ Surge protection device

650‧‧‧Voltage output indicating device

670‧‧‧Switch drive circuit

VIAC‧‧‧AC input voltage

EN‧‧‧ start signal

VIDC‧‧‧DC input voltage

VOAC‧‧‧ output voltage

210‧‧‧Stable voltage detector

220‧‧‧ phase detector

VR1‧‧‧ first reference voltage

VR2‧‧‧second reference voltage

PDS‧‧‧judgment signal

310‧‧‧Voltage regulator

311‧‧‧Rectifier

320‧‧‧ comparator

330, 430‧‧‧ voltage regulator circuit

312‧‧‧ filter

T1‧‧‧ transformer

VA‧‧‧ voltage

R1~R11, R51~R52‧‧‧ resistance

C1~C3, C51‧‧‧ capacitor

VT‧‧‧adjusted input voltage

GND‧‧‧reference ground

OP1, OP2‧‧‧Operational Amplifier

ZD1, ZD2‧‧‧Jenner diode

D1, D51‧‧‧ diode

DVIN‧‧‧voltage input voltage

410, 420‧‧ ‧ voltage divider circuit

TR1‧‧‧O crystal

DRV‧‧‧ drive signal

500‧‧‧Switch drive circuit

TA1‧‧‧ time

IAC‧‧‧ Current

FIG. 1 is a schematic diagram of a low phase surge protector according to an embodiment of the invention. 2 is a schematic diagram of an embodiment of a low phase delay detector in accordance with an embodiment of the present invention. 3 and 4 are schematic diagrams showing embodiments of a stable voltage detector and a phase detector, respectively. FIG. 5 is a schematic diagram of a switch driving circuit according to an embodiment of the present invention. 6 is a schematic diagram of a low phase surge protector according to another embodiment of the present invention. FIG. 7 is a diagram showing the operation waveforms of the low phase surge protector according to the embodiment of the present invention.

Claims (19)

A low-phase surge protector comprising: a voltage converter that receives an AC input voltage and converts the AC input voltage to generate a DC input voltage; a low phase delay detector coupled to the voltage converter to receive the The DC input voltage is used as a power supply voltage to detect whether the AC input voltage reaches a steady state to activate a phase detection mechanism, and after the phase detection mechanism is activated, detecting a phase of the AC input voltage to generate a start signal; And an output control switch coupled to the low phase delay detector, receiving the AC input voltage, and determining whether to transmit the AC input voltage as an output voltage according to the activation signal. The low phase surge protector according to claim 1, wherein the phase detector comprises: a stable voltage detector, receiving the AC input voltage, and comparing the voltage peak of the AC input voltage with a first a reference voltage to determine whether to activate the phase detection mechanism; and a phase detector coupled to the stable voltage detector, the phase detector is configured to compare the voltage value of the AC input voltage and a phase when the phase detection mechanism is activated A second reference voltage is generated to generate the enable signal. The low phase surge protector of claim 2, wherein the stable voltage detector activates the phase detection mechanism when a voltage peak of the AC input voltage is greater than the first reference voltage. The low phase surge protector of claim 2, wherein the phase detector is enabled when the phase detection mechanism is activated and when the voltage value of the alternating input voltage is less than the second reference voltage The start signal causes the output control switch to be turned on. The low-phase surge protector of claim 2, wherein the stable voltage detector comprises: a voltage regulator that performs a voltage transformation, rectification, and filtering operation on the AC input voltage to obtain a representative of the AC input. An adjusted input voltage of a voltage peak of the voltage; and a comparator coupled to the voltage regulator, receiving the adjusted input voltage and the first reference voltage, and comparing the adjusted input voltage and the first reference voltage To generate a judgment signal. The low phase surge protector of claim 5, wherein the comparator comprises: an operational amplifier having a positive input receiving the adjusted input voltage, the negative input of the operational amplifier receiving the first reference a voltage, the output of the operational amplifier generates the determination signal; and a feedback resistor coupled between the positive input terminal of the operational amplifier and the output terminal of the operational amplifier, wherein the operational amplifier receives the DC input voltage to perform For the power supply voltage. The low-phase surge protector of claim 6, wherein the stable voltage detector further comprises: a voltage stabilizing circuit coupled to the negative input terminal of the operational amplifier, and according to the DC input voltage The first reference voltage is generated. The low-phase surge protector of claim 7, wherein the voltage stabilizing circuit comprises: a capacitor coupled between the negative input terminal of the operational amplifier and a reference ground; and a resistor receiving the The DC input voltage is coupled to the negative input terminal of the operational amplifier; and a Zener diode having a cathode terminal coupled to the negative input terminal of the operational amplifier and an anode terminal coupled to the reference ground terminal. The low phase surge protector of claim 5, wherein the phase detector comprises: a first voltage dividing circuit, receiving the determining signal and dividing the determining signal to generate the second reference a second voltage dividing circuit that receives the AC input voltage and divides the AC input voltage to generate a divided input voltage; and an operational amplifier whose positive input receives the second reference voltage, The negative input receives the divided input voltage, and the operational amplifier compares whether the second reference voltage is greater than the divided input voltage to generate the enable signal at its output. The low phase surge protector of claim 9, wherein the phase detector further comprises: a diode having an anode coupled to the output of the operational amplifier and a cathode coupled to the operational amplifier a positive input terminal; and a resistor coupled in series with the diode between the output of the operational amplifier and the positive input of the operational amplifier. The low-phase surge protector of claim 9, further comprising: a switch driving circuit coupled between the low phase delay detector and the output control switch, according to the start signal to generate a driving signal And providing the drive signal to cause the output control switch to be turned on or off. The low-phase surge protector of claim 11, wherein the switch drive circuit comprises: a first resistor, one end receiving the enable signal; and a second resistor coupled to the second resistor Between the end and a reference electrical connection; a transistor having a control end coupled to the second end of the first resistor, the first end of which is coupled to the reference ground; a capacitor coupled to the transistor a control terminal and the reference ground; and a diode having a cathode receiving the DC input voltage, the anode being coupled to the second end of the transistor, wherein the driving is provided between the cathode and the anode of the diode signal. The low phase surge protector of claim 1, wherein the low phase delay detector further receives a power supply command and activates the phase detection mechanism according to the power supply command. The low-phase surge protector of claim 1, further comprising: a surge protection device coupled between the voltage converter and the path of the output control switch receiving the AC input voltage for the communication The input voltage performs a surge protection action. The low phase surge protector of claim 14, wherein the surge protection device is a varistor. The low-phase surge protector of claim 1, further comprising: a voltage output indicating device coupled to the output control switch to generate an end of the output voltage for indicating whether the output voltage is generated . The low phase surge protector of claim 16, wherein the voltage output indicating device is an indicator light. The low phase surge protector of claim 1, wherein the output control switch is a solid state switch. The low phase surge protector of claim 1, wherein the low phase delay detector generates the start according to whether the phase of the AC input voltage is less than 20 ^o after the phase detection mechanism is activated. And outputting the output control switch through the enable signal when the phase of the AC input voltage is less than 20 ⁰ .