TW201907665A - Physically unclonable function circuit, and system and integrated circuit having the function - Google Patents

Abstract

A physical unclonable function (PUF) circuit with a low bit error rate, a PUF system including the same and an integrated circuit having a physical unclonable function are provided. The PUF circuit includes a plurality of PUF cells each configured to generate an output voltage by dividing a power voltage, a reference voltage generator configured to generate a first reference voltage by dividing the power voltage, and a comparing unit configured to sequentially compare the output voltages of the plurality of PUF cells with the first reference voltage to output data values of the plurality of PUF cells.

Description

Physical unclonable functional circuit, system and integrated circuit with the same

This invention relates to a security technique and, more particularly, to a physical unclonable function (PUF) circuit.

With the recent rapid advancement of wired communication and wireless communication technologies and smart device related technologies, there is an increasing demand for establishing a security system so that the technology can be safely used. Therefore, security technologies with physical unclonability have received attention. A physically unclonable functional circuit refers to a circuit implemented in a semiconductor wafer and utilizing process variations generated during the fabrication process to generate unpredictable random digital values. By generating a key using the physical unclonable function circuit, copying of important keys such as an authentication key stored in the secure device can be substantially prevented.

The inventive concept provides a physical unclonable function (PUF) circuit having a low bit error rate (BER) and a system and an integrated circuit including the physical unclonable function circuit.

According to an aspect of the inventive concept, a physical unclonable function (PUF) circuit is provided. The physical unclonable function (PUF) circuit includes: a plurality of physical unclonable functional units configured to respectively generate an output voltage by dividing a power supply voltage; a reference voltage generator configured to pass the power supply voltage Performing a partial voltage to generate a first reference voltage; and a comparing unit configured to sequentially compare the output voltage of the plurality of physical unclonable functional units with the first reference voltage to output the plurality of Physical data values of functional units that cannot be cloned.

According to another aspect of the inventive concept, a physical unclonable function (PUF) system is provided. The physical unclonable function (PUF) system includes a controller and a physical unclonable function circuit including a plurality of physical unclonable functional units. The physical unclonable function circuit is configured to compare an output voltage of the plurality of physical unclonable functional units with a reference voltage to generate physical unclonable functional data and validity data, the physical unclonable functional data comprising the A data value of a plurality of physical unclonable functional units, the validity data indicating validity of the data values of the plurality of physical unclonable functional units. The controller is configured to control the physical unclonable function circuit and generate a key based on the physical unclonable functional data and the validity data.

According to another aspect of the inventive concept, an integrated circuit is provided. The integrated circuit has a physical unclonable function (PUF) circuit including a plurality of physical unclonable functional units, the plurality of physical unclonable functional units being respectively configured to pass at least two resistors based on The device divides the supply voltage to generate an output voltage. The physical unclonable function circuit further includes a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third by dividing the power supply voltage based on the resistor string Reference voltage. The second reference voltage is higher than the first reference voltage, and the third reference voltage is lower than the second reference voltage. The physical unclonable function circuit further includes a comparison circuit configured to convert the output voltage of the plurality of physical unclonable functional units with the first reference voltage, the second reference voltage, and Each of the third reference voltages is compared and configured to output a comparison result. Additionally, the physical unclonable function circuit includes combinational logic configured to generate validity data indicative of validity of each of the plurality of physical unclonable functional units based on the comparison.

In the following, the inventive concept will now be more fully explained with reference to the drawings.

FIG. 1 is a block diagram of a physical unclonable function (PUF) system 1000, in accordance with an exemplary embodiment of the inventive concept.

The physical unclonable function system 1000 can be installed in various types of electronic devices in which data encoding or security authentication is performed. The physical unclonable function system 1000 may generate an authentication key KEY in response to an authentication key request signal REQ from an external device (eg, an external processor), and provide the authentication key KEY to the external device or another external device ( For example, an encoding module or an authentication module).

Referring to FIG. 1, the physical unclonable function system 1000 can include a physical unclonable function circuit 100, a controller 200, and a non-volatile memory 300. The physical unclonable functional system 1000 can be fabricated by a semiconductor process. In an exemplary embodiment, physical unclonable functional circuit 100, controller 200, and non-volatile memory 300 may be formed on a single semiconductor wafer or on different semiconductor wafers.

The controller 200 can generate the authentication key KEY based on the physical unclonable function data PDT and the validity data VDT provided by the physical unclonable function circuit 100. Controller 200 can include control logic 210 and key generator 220.

Control logic 210 may generate control signal CON for controlling the operation of physical unclonable function circuit 100. For example, the control signal CON may include a physical unclonable functional unit selection signal, a reference voltage setting signal, a mode signal, a clock signal, or the like.

The key generator 220 may generate an authentication key KEY based on the physical unclonable function material PDT. In an exemplary embodiment, the key generator 220 may generate the authentication key KEY based on the valid material value selected from the material values contained in the physical unclonable function material PDT based on the validity data VDT.

The physical unclonable function circuit 100 may generate the physical unclonable function data PDT based on a mismatch between the resistance elements (or an error referred to as a resistance value of the resistance element) caused during the semiconductor manufacturing process. The physical unclonable functional material PDT has unpredictable random values in the design phase of the physical unclonable functional circuit 100. In addition, the physical unclonable function data PDT has a unique value based on the intrinsic properties of the semiconductor wafer on which the physical unclonable function circuit 100 is formed. Therefore, even if the semiconductor wafer respectively including the physical unclonable function circuit 100 is manufactured by the same process, the physical unclonable function data PDT output from the physical unclonable function circuit 100 included in one semiconductor wafer can be different from the other The physical unclonable function data PDT output by the physical unclonable function circuit 100 included in the semiconductor wafer.

The physical unclonable function circuit 100 can include a physical unclonable functional unit array 110 and a reference voltage generator 120.

The physical unclonable functional unit array 110 may include a plurality of physical unclonable functional units, and the plurality of physical unclonable functional units may have the same structure. However, each of the plurality of physical unclonable functional units can produce an output voltage having a unique potential caused by a mismatch between internal resistive elements.

The reference voltage generator 120 may generate a first reference voltage for determining a data value of each of the plurality of physical unclonable functional units, and may generate a second reference voltage for determining validity of the data value and Third reference voltage. The second reference voltage is higher than the first reference voltage, and the third reference voltage is lower than the first reference voltage.

For example, when the output voltage of the physical unclonable functional unit is equal to or higher than the first reference voltage, the physical unclonable function circuit 100 may determine the data value of the physical unclonable functional unit as a logic high (the digital data value is '1 '). When the output voltage of the physical unclonable functional unit is less than the first reference voltage, the physical unclonable function circuit 100 may determine the data value of the physical unclonable functional unit to be logically low (the digital data value is '0'). In addition, when the output voltage of the physical unclonable functional unit is equal to or higher than the second reference voltage or less than the third reference voltage, the physical unclonable function circuit 100 may determine that the data value of the physical unclonable functional unit is valid. When the output voltage of the physical unclonable functional unit is less than the second reference voltage and equal to or higher than the third reference voltage, the physical unclonable function circuit 100 may determine that the data value of the physical unclonable functional unit is invalid. The physical unclonable function circuit 100 can generate a data value for a plurality of physical unclonable functional units and a validity signal indicating the validity of each of the data values. The physical unclonable function circuit 100 can provide the data value and the validity signal to the controller 200 as the physical unclonable function data PDT and the validity data VDT, respectively.

The valid data value of the physical unclonable functional unit indicates that the physical unclonable functional unit is stable, and the invalid data value of the physical unclonable functional unit indicates that the physical unclonable functional unit is unstable. The data value of an unstable physical unclonable functional unit (ie, the comparison between the output voltage of an unstable physical unclonable functional unit and a reference voltage (eg, a first reference voltage)) is likely due to, for example, a power supply voltage, The temperature, aging, or noise is changed, and thus the unstable physical unclonable functional unit is not used to generate the authentication key KEY. Therefore, the key generator 220 of the controller 200 can select a data value (ie, a valid data value) of the stable physical unclonable functional unit from the data values of the physical unclonable function data PDT based on the validity data VDT, and can be based on The valid data value generates the authentication key KEY.

Determining the validity of the data value (i.e., generating the validity data VDT) may be performed prior to generating the authentication key KEY in response to the authentication key request signal REQ. For example, determining the validity of the data value may be performed during the testing of the manufacturing process of the physical unclonable function circuit 100 or during the initialization process or reset process of the physical unclonable function circuit 100. The validity data VDT can be stored in the non-volatile memory 300. The non-volatile memory 300 can include one of the following: one-time programmable (OTP) memory, read only memory (ROM), programmable read-only memory (programmable) ROM, PROM), electrically programmable programmable ROM (EPROM), electrically erasable and programmable ROM (EEPROM), flash memory, random phase change Phase-change RAM (PRAM), magnetic random access memory (MRAM), resistive random access memory (RRAM), and ferroelectric random access memory (ferroelectric) RAM, FRAM). In an exemplary embodiment, non-volatile memory 300 may be included within controller 200 or physical unclonable function circuit 100.

The controller 200 can store the validity data VDT provided by the physical unclonable function circuit 100 in the non-volatile memory 300, and from the non-volatile memory when the authentication key KEY is generated later in response to the authentication key request signal REQ. The body 300 reads the validity data VDT and the validity data VDT.

In an exemplary embodiment, when the authentication key KEY is generated, the controller 200 may read the validity material VDT from the non-volatile memory 300 and receive the physical unclonable function material PDT from the physical unclonable function circuit 100. The controller 200 may select a valid data value from the physical unclonable function data PDT based on the validity data VDT, and generate an authentication key KEY based on the valid data value.

In another exemplary embodiment, when the authentication key KEY is generated, the controller 200 may select a valid physical unclonable functional unit based on the validity data VDT, and the physical unclonable functional circuit 100 may generate an effective physical only The physical unclonable functional data PDT of the data value of the cloning functional unit and the physical unclonable functional data PDT are provided to the controller 200. The controller 200 can generate an authentication key KEY based on the received physical unclonable function material PDT. In an exemplary embodiment, the controller 200 may output the physical unclonable function material PDT as the authentication key KEY.

2 is a circuit diagram of a physical unclonable function circuit 100a, in accordance with an exemplary embodiment of the inventive concept. Figure 3A shows the distribution of the output voltages of a plurality of physically unclonable functional units. FIG. 3B shows the distribution of the first reference voltage. FIG. 3C is a view for explaining a dead zone based on the second reference voltage and the third reference voltage.

Referring to FIG. 2, the physical unclonable function circuit 100a may include a physical unclonable functional unit array 110, a reference voltage generator 120, a comparison circuit 130, a combinational logic 140, and a unit selection circuit 150.

The physical unclonable functional unit array 110 may include a plurality of physical unclonable functional units CL1 to CLn, and each of the plurality of physical unclonable functional units CL1 to CLn may perform power supply voltage VDD using the resistance elements RE1 and RE2 Divided to produce an output voltage.

For example, taking the first physical unclonable functional unit CL1 as an example, the first physical unclonable functional unit CL1 may include a first resistive element RE1 and a second resistive element RE2. The first resistance element RE1 and the second resistance element RE2 may be homogeneous resistance elements. For example, the first resistive element RE1 and the second resistive element RE2 may be a resistor or a resistor string in which a plurality of resistors are connected in series, and the resistor may be a via, a metal wiring, a polysilicon or the like. Additionally, the resistor can be any type of resistor that can be implemented in a manufacturing process. However, the resistor is not limited thereto, and the first resistance element RE1 and the second resistance element RE2 may also be various resistance elements such as a switched capacitor or a magnetoresistive element.

The first resistance element RE1 and the second resistance element RE2 may be connected in series, and a power supply voltage VDD may be applied to one end of the first resistance element RE1. The output voltage of the first physical unclonable functional unit CL1 can be output from the connection node CN1 between the first resistive element RE1 and the second resistive element RE2. Therefore, the first resistive element RE1 and the second resistive element RE2 can operate as a voltage divider.

According to an exemplary embodiment, the first resistance element RE1 and the second resistance element RE2 may have the same resistance value. In detail, the target resistance value of the first resistance element RE1 and the target resistance value of the second resistance element RE2 may be the same. Therefore, the output voltage of the first physical unclonable functional unit CL1 can be half of the power supply voltage VDD. However, a difference between the resistance value of the first resistance element RE1 and the resistance value of the second resistance element RE2 may be caused by a mismatch occurring during the semiconductor manufacturing process, and the resistance difference may be expressed as a first physical unclonable function The error of the output voltage of cell CL1.

The data value of the first physical unclonable functional unit CL1 may be determined based on the output voltage of the first physical unclonable functional unit CL1 (ie, the error of the output voltage of the first physical unclonable functional unit CL1). The larger the error of the output voltage, the more stable the data value of the first physical unclonable functional unit CL1. Therefore, in order to increase the mismatch between the first resistive element RE1 and the second resistive element RE2, the first resistive element RE1 and the second resistive element RE2 may be designed to have a very small length and width.

Since the first resistive element RE1 and the second resistive element RE2 are homogenous resistive elements, the resistance value of each of the first resistive element RE1 and the second resistive element RE2 varies with, for example, temperature, voltage, test conditions, or environment. Changes that occur with changes (eg, aging) can show the same trend. For example, the resistance value of the first resistance element RE1 increases as the temperature increases, which may be similar to the increase in the resistance value of the second resistance element RE2. Therefore, even when the environment changes, the output voltage of the first physical unclonable functional unit CL1 can be maintained relatively uniform.

The configuration and structure of the other physical unclonable functional units CL2 to CLn are the same as those of the first physical unclonable functional unit CL1. Therefore, the repeated description will be omitted. The output voltage may be output from the connection nodes CN2 to CNn of the first resistance element RE1 and the second resistance element RE2 included in each of the other physical unclonable functional units CL2 to CLn. However, the degree of mismatch between the first resistive element RE1 and the second resistive element RE2 of each of the plurality of physical unclonable functional units CL1 to CLn is random, and thus, the plurality of physical unclonable functions The output voltages of the cells CL1 to CLn may be different from each other. The distribution of the output voltages of the plurality of physical unclonable functional units CL1 to CLn may be as shown in FIG. 3A.

Referring to FIG. 3A, the horizontal axis represents the output voltage Vcell of the physical unclonable functional unit, and the vertical axis represents the number of physical unclonable functional units corresponding to each of the output voltages Vcell. As shown in FIG. 3A, most of the physical unclonable functional units may have an output voltage Vcell corresponding to or adjacent to a half of the power supply voltage VDD (VDD/2), and the plurality of physical unclonable functional units CL1 to CLn The output voltage can have a normal distribution.

Referring again to FIG. 2, the cell selection circuit 150 can select and output one of the output voltages of the plurality of physical unclonable functional units CL1 to CLn, and can sequentially select and output the plurality of physical unclonable functional units. The output voltage of CL1 to CLn.

The cell selection circuit 150 may include a plurality of cell selection switches SSW1 to SSWn and a cell selector 151 that are respectively connected to the plurality of physical unclonable functional cells CL1 to CLn.

The unit selector 151 can control the turning on and off of the plurality of unit selection switches SSW1 to SSWn. For example, the cell selector 151 may generate an on-off control signal respectively corresponding to the plurality of cell selection switches SSW1 to SSWn, and provide the on-off control signal to the plurality of cell selection switches SSW1 to SSWn Each of them. The unit selector 151 may turn on one of the plurality of unit selection switches SSW1 to SSWn and disconnect the other unit selection switches.

In an exemplary embodiment, the unit selector 151 may sequentially turn on the plurality of unit selection switches SSW1 to SSWn in synchronization with a clock signal. Therefore, the output voltages of the physical unclonable functional units CL1 to CLn can be sequentially output.

In another exemplary embodiment, the unit selector 151 may sequentially turn on from among the plurality of unit selection switches SSW1 to SSWn based on a control signal CON supplied from the outside (for example, from the controller 200 shown in FIG. 1). Some of the unit selection switches selected. The output voltages of the physical unclonable functional units selected from the plurality of physical unclonable functional units CL1 to CLn may be sequentially output to the comparison circuit 130.

The reference voltage generator 120 may divide the power supply voltage VDD using the third resistive element RE3 and the fourth resistive element RE4 to generate a reference voltage, that is, a first reference voltage Vref, a second reference voltage Vref_H, and a third reference voltage Vref_L. As explained above with reference to FIG. 1, the first reference voltage Vref is used to determine the data value of each of the plurality of physical unclonable functional units CL1 to CLn, and the second reference voltage Vref_H and the third reference voltage Vref_L are used. Determining the validity of the data values of the plurality of physical unclonable functional units CL1 to CLn.

The reference voltage generator 120 may include a third resistance element RE3 and a fourth resistance element RE4. The third resistive element RE3 and the fourth resistive element RE4 may be homogenous resistive elements and may be homogenous or heterogeneous with the first resistive element RE1 and the second resistive element RE2. For example, the third resistive element RE3 and the fourth resistive element RE4 may be resistor strings.

The third resistance element RE3 and the fourth resistance element RE4 may be connected in series, and a power supply voltage VDD may be applied to one end of the third resistance element RE3. The third resistive element RE3 and the fourth resistive element RE4 can operate as a voltage divider. The first reference voltage Vref may be output from a connection node CNR between the third resistance element RE3 and the fourth resistance element RE4.

In an exemplary embodiment, the resistance value of the third resistance element RE3 may be the same as the resistance value of the fourth resistance element RE4. In detail, the target resistance value of the third resistance element RE3 and the target resistance value of the fourth resistance element RE4 may be the same. Therefore, the first reference voltage Vref can be half of the power supply voltage VDD. However, a difference between the resistance value of the third resistance element RE3 and the resistance value of the fourth resistance element RE4 may be caused by a mismatch occurring in the semiconductor manufacturing process, and the resistance difference may be expressed as the first reference voltage Vref error.

The first reference voltage Vref is a reference voltage for determining the data values of the plurality of physical unclonable functional units CL1 to CLn, and thus should have a very small error. Therefore, in order to reduce the mismatch between the third resistive element RE3 and the fourth resistive element RE4, the third resistive element RE3 and the fourth resistive element RE4 may be designed to have a long length and a wide width. For example, the third resistive element RE3 and the fourth resistive element RE4 may be designed to have a larger length and a wider width than the first resistive element RE1 and the second resistive element RE2.

The distribution of the first reference voltage Vref can be as shown in FIG. 3B. In FIG. 3B, the distribution D2 of the first reference voltage Vref shows the distribution of the first reference voltage output from the physical unclonable function circuits implemented on different semiconductor wafers, respectively, and may follow a normal distribution.

Referring to FIG. 3B, the distribution D2 of the first reference voltage Vref may have a significantly small change compared to the distribution D1 of the output voltages of the plurality of physical unclonable functional units CL1 to CLn. The data values of the plurality of physical unclonable functional units CL1 to CLn may be determined by comparing the output voltages of the plurality of physical unclonable functional units CL1 to CLn with the first reference voltage Vref. For example, a data value of a physical unclonable functional unit having an output voltage equal to or higher than the first reference voltage Vref may be determined to be logic high (digital data value is '1') and has The data value of the physical unclonable functional unit of the output voltage smaller than the first reference voltage Vref can be determined to be logic low (the digital data value is '0').

Referring again to FIG. 2, the reference voltage generator 120 may also output a second reference voltage Vref_H and a third reference voltage Vref_L. As described above, the third resistive element RE3 and the fourth resistive element RE4 may be formed of a resistor string including a plurality of resistors, and the second reference voltage Vref_H may be output from one of a plurality of nodes of the third resistive element RE3, And the third reference voltage Vref_L may be output from one of a plurality of nodes of the fourth resistance element RE4. Therefore, the second reference voltage Vref_H is higher than the first reference voltage Vref, and the third reference voltage Vref_L is lower than the first reference voltage Vref.

Referring to FIG. 3C, a voltage range between the second reference voltage Vref_H and the third reference voltage Vref_L may be set as a dead zone. A physical unclonable functional unit having an output voltage in a dead zone among the plurality of physical unclonable functional units CL1 to CLn may be determined to be unstable, and a material value of the physical unclonable functional unit may be determined Invalid. The second reference voltage Vref_H and the third reference voltage Vref_L can be obtained by considering the distribution D2 of the first reference voltage Vref, the offset of the comparators (for example, the first to third comparators 131, 132, and 133), and the noise. Effect to set.

Comparison circuit 130 and combinational logic 140 can be used to determine if the output voltage of the physical unclonable functional unit is in a dead zone (ie, the validity of the data value of the physical unclonable functional unit).

The comparison circuit 130 may compare the output voltages of the plurality of physical unclonable functional units CL1 to CLn with the first to third reference voltages Vref, Vref_H, and Vref_L, and output a comparison result. The comparison circuit 130 can sequentially output the plurality of physical non-uniforms by comparing the output voltage Vcell of the physical unclonable functional unit outputted from the unit selection circuit 150 with the first reference voltage to the third reference voltages Vref, Vref_H, and Vref_L. The comparison result of the cloning functional units CL1 to CLn.

The comparison circuit 130 may include first to third comparators 131, 132, and 133. The first comparator 131 may compare the output voltage Vcell of the physical unclonable functional unit with the first reference voltage Vref, and output a comparison result (hereinafter referred to as a first comparison result). For example, if the output voltage Vcell of the physical unclonable functional unit is equal to or higher than the first reference voltage Vref, then '1' may be output, and if the output voltage Vcell of the physical unclonable functional unit is less than the first reference voltage Vref, then It can output '0'. However, the comparison result is not limited to this, and the opposite result can also be output. The comparison result can be output as a data value of a physical unclonable functional unit.

The second comparator 132 may compare the output voltage Vcell of the physical unclonable functional unit with the second reference voltage Vref_H, and output a comparison result (hereinafter referred to as a second comparison result). For example, if the output voltage Vcell of the physical unclonable functional unit is equal to or higher than the second reference voltage Vref_H, "1" may be output, and if the output voltage Vcell of the physical unclonable functional unit is smaller than the second reference voltage Vref_H, then It can output '0'. Alternatively, the opposite result can be output.

The third comparator 133 may compare the output voltage Vcell of the physical unclonable functional unit with the third reference voltage Vref_L, and output a comparison result (hereinafter referred to as a third comparison result). For example, if the output voltage Vcell of the physical unclonable functional unit is equal to or higher than the third reference voltage Vref_L, "1" may be output, and if the output voltage Vcell of the physical unclonable functional unit is smaller than the third reference voltage Vref_L, then It can output '0'. Alternatively, the opposite result can be output.

The comparison circuit 130 may provide the first comparison result to the third comparison result regarding each of the plurality of physical unclonable functional units CL1 to CLn to the combinational logic 140.

Meanwhile, although the comparison circuit 130 is illustrated as including three comparators (for example, the first to third comparators 131, 132, and 133) in FIG. 2, the comparison circuit 130 is not limited thereto. The comparison circuit 130 may include one or two comparators, and the one or two comparators may time the output voltage Vcell of the physical unclonable functional unit and the first reference voltage to the third reference voltage Vref in a time sharing manner. , Vref_H and Vref_L are compared.

The combinational logic 140 may be formed by a plurality of logic gates and may generate a physical unclonable functional material PDT based on a first comparison result for each of the plurality of physical unclonable functional units CL1 to CLn (ie, the plurality of The physical value of the functional elements CL1 to CLn cannot be cloned). Additionally, combinational logic 140 may generate validity of the data value indicating the physical unclonable functional unit based on at least two of the first comparison result to the third comparison result (ie, the stability of the physical unclonable functional unit (or Validity)) The validity signal. The combinational logic 140 may output a validity signal of the plurality of physical unclonable functional units CL1 to CLn as the validity data VDT. Combinational logic 140 may be referred to as validity determination logic.

The combinational logic 140 may determine whether the output voltage of the physical unclonable functional unit is in a dead zone based on at least two of the first comparison result to the third comparison result, and may have a physical non-existing output voltage in the dead zone The validity signal of the clone functional unit is generated as '0', and the validity signal of the physical unclonable functional unit having the output voltage outside the dead zone is generated as '1'. The validity determination method of the combinational logic 140 will be explained below with reference to FIGS. 4A to 4C.

As described above, the physical unclonable function circuit 100a according to an exemplary embodiment of the inventive concept can generate a physical unclonable by comparing the output voltages of the plurality of physical unclonable functional units CL1 to CLn with the first reference voltage Vref. The function data PDT, the output voltage of the plurality of physical unclonable functional units CL1 to CLn is generated by dividing the power supply voltage VDD using a resistance element. The plurality of physical unclonable functional units are the same for a resistive element used when the power supply voltage VDD is divided, for example, a change in temperature, voltage, test conditions, or environmental change (eg, aging) The output voltages of CL1 to CLn and the first reference voltage Vref can be maintained relatively uniform regardless of the environment. Therefore, the number of unstable physical unclonable functional units can be small.

In addition, in order to eliminate the unstable physical unclonable functional unit and select a stable physical unclonable functional unit (or a valid data value), the physical unclonable function circuit 100a may generate the second reference voltage Vref_H and the third reference voltage Vref_L, and based on The second reference voltage Vref_H and the third reference voltage Vref_L set a dead zone. The physical unclonable function circuit 100a can be reduced by culling potentially unstable physical unclonable functional units that may produce unstable data values and by using data values of strong physical unclonable functional units with sufficient margin Bit error rate (BER). For example, if the difference (ie, margin) between the first reference voltage Vref, the second reference voltage Vref_H, and the third reference voltage Vref_L is set to be wide, the physical unclonable function circuit 100a can reach a zero bit error. Code rate.

When the physical unclonable function circuit has a high bit error rate, it is necessary to use complex error checking and correction (ECC) logic to perform error checking and correction, and requires bits that are actually required than the authentication key. The number of physical unclonable functional units. Therefore, the physical unclonable function circuit (or the system in which the physical unclonable function circuit is installed) has a large area and a higher power consumption.

However, according to an exemplary embodiment of the inventive concept, by setting a dead zone based on the second reference voltage Vref_H and the third reference voltage Vref_L and by culling an unstable physical unclonable functional unit having an output voltage in a dead zone, The bit error rate can be reduced to omit error checking and correction logic or simple error checking and correction logic can be used. Therefore, the area of the physical unclonable function system including the physical unclonable function circuit 100a (for example, the physical unclonable function system 1000 shown in FIG. 1) can be reduced and power consumption can be reduced. In addition, it is not necessary to test the physical unclonable functional unit by modifying various conditions such as the voltage potential or temperature of the power supply voltage VDD to determine an unstable physical unclonable functional unit, and thus, the test flow can be simplified. Therefore, the test period can be shortened and the test cost can be reduced.

4A through 4C illustrate a method of determining validity according to an exemplary embodiment. The combinational logic 140 shown in FIG. 2 may determine the validity of a plurality of physical unclonable functional units or the validity of data values of the plurality of physical unclonable functional units, and generate a validity signal based on the validity determination method.

Referring to FIG. 4A, the distribution of the output voltages of the plurality of physical unclonable functional units may be divided into first to fourth regions AR1 to AR4. The first region AR1 is a voltage range smaller than the third reference voltage Vref_L. The second region AR2 is a voltage range equal to or higher than the third reference voltage Vref_L and smaller than the first reference voltage Vref. The third region AR3 is a voltage range equal to or higher than the first reference voltage Vref and smaller than the second reference voltage Vref_H. The fourth area AR4 is a voltage range equal to or higher than the second reference voltage Vref_H.

The combinational logic 140 may perform a logical operation on the first comparison result RST1, the second comparison result RST2, and the third comparison result RST3 to generate a validity signal VS regarding the physical unclonable functional unit. Here, the first comparison result RST1, the second comparison result RST2, and the third comparison result RST3 are the output voltages of the physical unclonable functional unit and the first reference voltage Vref, the second reference voltage Vref_H, and the third reference voltage Vref_L. The result of each comparison. The first comparison result RST1 may indicate the data value of the physical unclonable functional unit.

The first comparison result RST1, the second comparison result RST2, and the third comparison result RST3 of the physical unclonable functional unit having the output voltage in the first area AR1 may all be '0'. The first comparison result RST1 and the second comparison result RST2 of the physical unclonable functional unit having the output voltage in the second area AR2 may be '0', and the third comparison result RST3 of the physical unclonable functional unit may be '1'. The first comparison result RST1 and the third comparison result RST3 of the physical unclonable functional unit having the output voltage in the third area AR3 may be '1', and the second comparison result RST2 of the physical unclonable functional unit may be '0'. The first comparison result RST1, the second comparison result RST2, and the third comparison result RST3 of the physical unclonable functional unit having the output voltage in the fourth region AR4 may all be '1'.

A validity signal VS of a physical unclonable functional unit having an output voltage in the first region AR1 or the fourth region AR4 according to a logical operation performed on the first comparison result RST1, the second comparison result RST2, and the third comparison result RST3 The validity signal VS of the physical unclonable functional unit that can be generated as '1' and has an output voltage in the second region AR2 or the third region AR3 can be generated as '0'. Therefore, the physical unclonable functional unit having the output voltage in the first area AR1 or the fourth area AR4 can be determined to be valid (or stable). The physical unclonable functional unit having the output voltage in the first area AR1 may have a material value of '0' (strong '0'), and the physical unclonable functional unit having the output voltage in the fourth area AR4 may have The data value is strong '1'.

For example, when the physical unclonable functional data PDT and the validity data VDT for the first physical unclonable functional unit to the fourth physical unclonable functional unit are generated, and the first physical unclonable functional unit to the fourth physical unclonable function When the cells are in the first region AR1 to the fourth region AR4, respectively, the validity data VDT can be generated as '1001', and the physical unclonable function data PDT can be generated as '0011'. Since the first physical unclonable functional unit to the fourth physical unclonable functional unit can be determined to be valid based on the validity data VDT, the first physical unclonable in the physical unclonable functional data PDT can be used when generating the authentication key The physical unclonable function data value '01' of the functional unit and the fourth physical unclonable functional unit.

Referring to FIG. 4B, the combinational logic 140 may perform a logical operation on the second comparison result RST2 and the third comparison result RST3 of the physical unclonable functional unit to generate a validity signal VS regarding the physical unclonable functional unit. Therefore, the validity signal VS of the physical unclonable functional unit having the output voltage in the first area AR1 or the fourth area AR4 can be generated as '1' and having the second area AR2 or the third area AR3 The validity signal VS of the physical unclonable functional unit of the output voltage can be generated as '0'.

Referring to FIG. 4C, the combinational logic 140 may perform a logical operation on one of the first comparison result RST1 and the second comparison result RST2 and the third comparison result RST3 of the physical unclonable functional unit to generate validity regarding the physical unclonable functional unit. Signal VS. For example, when the first comparison result RST1 is '0', the combination logic 140 may perform an exclusive NOR operation on the first comparison result RST1 and the third comparison result RST3 to generate the validity signal VS. When the first comparison result RST1 is '1', the combinational logic 140 may perform a mutually exclusive or non-operation on the first comparison result RST1 and the second comparison result RST2 to generate the validity signal VS. Therefore, the validity signal VS of the physical unclonable functional unit having the output voltage in the first area AR1 or the fourth area AR4 can be generated as '1' and having the second area AR2 or the third area AR3 The validity signal VS of the physical unclonable functional unit of the output voltage can be generated as '0'.

Combinational logic 140 may determine the validity of a plurality of physical unclonable functional units in accordance with the exemplary embodiments set forth above with respect to Figures 4A-4C. However, these are merely exemplary embodiments, and the method of determining the validity may be modified.

FIG. 5 illustrates an example of a comparison circuit 130a according to an exemplary embodiment of the inventive concept. The comparison circuit 130a can be applied to the physical unclonable function circuit 100a shown in FIG. 2 as a comparison circuit.

Referring to FIG. 5, the comparison circuit 130a may include a comparator 131a and a switch circuit 132a. The switch circuit 132a may include first to third reference switches RSW1, RSW2, and RSW3. A first end of each of the first to third reference switches RSW1, RSW2, and RSW3 may be coupled to the first end of the comparator 131a. The second ends of the first to third reference switches RSW1, RSW2, and RSW3 may be connected to the first to third reference voltages Vref, Vref_H, and Vref_L, respectively.

One of the first to third reference switches RSW1, RSW2, and RSW3 may be turned on in response to the reference selection signal RSEL, and one of the first to third reference voltages Vref, Vref_H, and Vref_L may be A first end is provided to the comparator 131a. The reference selection signal RSEL can be provided, for example, from the control logic 210 of the controller 200 shown in FIG.

The comparator 131a can receive the output voltage Vcell of the physical unclonable functional unit and the output of the switch circuit 132a, and compare the output voltage Vcell of the physical unclonable functional unit with the output of the switch circuit 132a to output a comparison result. The comparator 131a may provide the first comparison result and the second comparison result to the combination logic 140 according to the comparison between the output voltage Vcell of the physical unclonable functional unit and the first reference voltage Vref, the second reference voltage Vref_H, and the third reference voltage Vref_L. And the third comparison result.

In an exemplary embodiment, when the validity data is generated, the first to third reference switches RSW1, RSW2, and RSW3 may be sequentially turned on in response to the reference selection signal RSEL, and thus, the first reference voltage to the third The reference voltages Vref, Vref_H, and Vref_L may be sequentially supplied to the comparator 131a. The comparator 131a may sequentially provide the first comparison result to the third comparison result to the combinational logic 140. When the authentication key KEY is generated (ie, when the physical unclonable function data is generated), the first reference switch RSW1 may be turned on in response to the reference selection signal REL to provide the first reference voltage Vref to the comparator 131a, and compared The 131a may provide the first comparison result to the combinational logic 140.

In another exemplary embodiment, when the validity data is generated, the second reference switch RSW2 and the third reference switch RSW3 may be alternately turned on in response to the reference selection signal, and thus, the second reference voltage Vref_H and the third The reference voltage Vref_L may be alternately supplied to the comparator 131a. The comparator 131a may alternately provide the first comparison result to the third comparison result to the combinational logic 140. When the key KEY is generated (ie, when the physical unclonable function data is generated), the first reference switch RSW1 may be turned on in response to the reference selection signal REL to provide the first reference voltage Vref to the comparator 131a, and the comparator 131a may provide the first comparison result to combinational logic 140.

FIG. 6 illustrates an example of a comparison circuit 130b according to an exemplary embodiment of the inventive concept. The comparison circuit 130b can be applied to the physical unclonable function circuit 100a shown in FIG. 2 as a comparison circuit.

The configuration and operation of the comparison circuit 130b shown in FIG. 6 are similar to the configuration and operation of the comparison circuit 130a shown in FIG. However, the comparison circuit 130b shown in FIG. 6 may further include a reference selector 133b.

The reference selector 133b may generate a reference selection signal RSEL for controlling the on and off of the first to third reference switches RSW1, RSW2, and RSW3. The switch circuit 132b may include first to third reference switches RSW1, RSW2, and RSW3. In an exemplary embodiment, the reference selector 133b may generate a reference selection signal RSEL in response to the mode signal MD. For example, the mode signal MD may indicate a validity data generation mode or a physical unclonable function data generation mode, and may be provided by the control logic 210 of the controller 200 shown in FIG.

When the mode signal MD indicates the validity data generation mode, the reference selector 133b may generate for sequentially turning on the first to third reference switches RSW1, RSW2, and RSW3 or for alternately turning on the second reference switch RSW2. A reference selection signal RSEL with the third reference switch RSW3. In addition, when the mode signal MD indicates the physical unclonable function data generation mode, the reference selector 133b may generate the reference selection signal RSEL for turning on the first reference switch RSW1.

In an exemplary embodiment, when the mode signal MD indicates the validity data generation mode, the reference selector 133b may generate the reference selection signal RSEL based on the output of the comparator 131b. The reference selector 133b may generate a reference selection signal RSEL for turning on the first reference switch RSW1, and then generate for turning on the second reference switch RSW2 and the third based on the output of the comparator 131b (eg, the first comparison result) The reference selection signal RSEL of one of the switches RSW3 is referenced. For example, when the first comparison result is '1', the third reference switch RSW3 can be turned on, and when the first comparison result is '0', the second reference switch RSW2 can be turned on. Therefore, when the first comparison result is '1', the comparator 131b can provide the first comparison result and the third comparison result to the combination logic 140, and when the first comparison result is '0', the comparator 131b can be combined Logic 140 provides a first comparison result and a second comparison result.

The combination logic 140 may determine the physical unclonable functional unit based on the received first comparison result and the second comparison result or based on the received first comparison result and the third comparison result, using the validity determination method described with reference to FIG. 4C Effectiveness.

FIG. 7 is an example of a reference voltage generator 120a according to an exemplary embodiment of the inventive concept. The reference voltage generator 120a is an example of the reference voltage generator 120 explained with reference to FIG. Accordingly, the description of the reference voltage generator 120 shown in FIG. 2 can be applied to the reference voltage generator 120a of the exemplary embodiment.

Referring to FIG. 7, the reference voltage generator 120a may include a third resistance element RE3a, a fourth resistance element RE4a, a first selector 121, and a second selector 122.

The third resistance element RE3a and the fourth resistance element RE4a may be formed of a resistor string including a plurality of resistors, respectively. The third resistance element RE3a and the fourth resistance element RE4a may divide the power supply voltage VDD and output a divided voltage.

The voltage of the connection node CNR between the third resistance element RE3a and the fourth resistance element RE4a can be output as the first reference voltage Vref. The resistance value of the third resistance element RE3a may be the same as the resistance value (eg, the target resistance value) of the fourth resistance element RE4a, and the first reference voltage Vref may be similar to half of the power supply voltage VDD.

Meanwhile, a plurality of divided voltages may be output from the third resistive element RE3a (ie, the plurality of nodes N1_1 to N1_m of the resistor string), and the first selector 121 may select the plurality of vias based on the first set signal SET1 One of the divided voltages is used as the second reference voltage Vref_H.

A plurality of divided voltages may be output from the fourth resistive element RE4a (ie, a plurality of nodes N2_1 to N2_m of the resistor string), and the second selector 122 may select the plurality of divided voltages based on the second set signal SET2 One of the voltages is used as the third reference voltage Vref_L.

The first setting signal SET1 and the second setting signal SET2 may be provided from the controller 200 shown in FIG. 1, and may vary. The first setting signal SET1 and the second setting signal SET2 may pass through one or more comparators considering the distribution of the first reference voltage Vref (for example, the first to third comparators 131, 132, and 133 shown in FIG. 2) The offset of the comparator 131a shown in FIG. 5 and each of the comparators 131b shown in FIG. 6 and the noise are set. For example, when the distribution of the first reference voltage Vref becomes large, the first setting signal SET1 may be set such that a divided voltage having a relatively high potential is selected, and the second setting signal SET2 may be set such that selection A divided voltage having a relatively low potential.

FIG. 8 is an example of a reference voltage generator 120b according to an exemplary embodiment of the inventive concept. The reference voltage generator 120b is an example of the reference voltage generator 120 explained with reference to FIG. Accordingly, the description of the reference voltage generator 120 shown in FIG. 2 can be applied to the reference voltage generator 120b of the exemplary embodiment.

Referring to FIG. 8, the reference voltage generator 120b may include a bandgap reference circuit BGR, a third resistive element RE3b, and a fourth resistive element RE4b.

The bandgap reference circuit BGR can output a reference current Iref having a constant potential regardless of changes in temperature, voltage, and the like. The reference current Iref may flow through the third resistive element RE3b and the fourth resistive element RE4b, and the amount of the reference current Iref may be set such that the first end ND1 of the third resistive element RE3b is at the potential of the power supply voltage VDD. The generation of the third resistance element RE3b and the fourth resistance element RE4b, and the first to third reference voltages Vref, Vref_H, and Vref_L are the same as explained with reference to FIGS. 2 and 7, and thus the repeated description will be omitted.

FIG. 9 is a circuit diagram of a physical unclonable function circuit 100b according to an exemplary embodiment of the inventive concept.

The physical unclonable function circuit 100b shown in FIG. 9 may include a physical unclonable functional unit array 110, a reference voltage generator 120, and a regulator 160. Although not shown in the drawings, the physical unclonable function circuit 100b may further include other configurations of the physical unclonable function circuit 100a explained with reference to FIG. 2.

The configuration and operation of the physical unclonable function circuit 100b are the same as those of the physical unclonable function circuit 100a shown in FIG. 2. However, the physical unclonable function circuit 100b may further include a regulator 160 and receive the power supply voltage VDD through the regulator 160.

The regulator 160 may generate a power supply voltage VDD to be supplied to the physical unclonable functional unit array 110 and the reference voltage generator 120 based on the external power supply voltage VDDE received from the outside. The regulator 160 can generate the power supply voltage VDD having a constant potential regardless of the potential of the external power supply voltage VDDE. The plurality of physical unclonable functional units CL1 to CLn of the physical unclonable functional unit array 110 and the reference voltage generator 120 may respectively generate an output voltage having a constant potential and first to third reference voltages Vref, Vref_H, and Vref_L, and No matter how the external power supply voltage VDDE changes. Therefore, the data values of the plurality of physical unclonable functional units CL1 to CLn can be maintained to be uniform.

FIG. 10 is a circuit diagram of a physical unclonable function circuit 100c according to an exemplary embodiment of the inventive concept.

The physical unclonable function circuit 100c shown in FIG. 10 may include a physical unclonable functional unit array 110, a reference voltage generator 120, a protection circuit 170, and a block switch 180. Although not shown in the drawings, the physical unclonable function circuit 100b may further include other configurations of the physical unclonable function circuit 100a explained with reference to FIG. 2.

The protection circuit 170 prevents physical unclonable function data from being generated when the power supply voltage VDD is outside the rated voltage range. For example, if the power supply voltage VDD is equal to or less than the first threshold voltage, or if the power supply voltage VDD is equal to or higher than the second threshold voltage, the protection circuit 170 may generate the disable signal ENB. The first threshold voltage and the second threshold voltage may be preset.

The block switch 180 can be turned off in response to the disable signal ENB to prevent the power supply voltage VDD from being supplied to the physical unclonable functional unit array 110 and the reference voltage generator 120.

However, the block switch 180 is not limited thereto and may be connected to the physical unclonable functional unit array 110 or the reference voltage generator 120 to prevent the power supply voltage VDD from being supplied to the physical unclonable functional unit array 110 or the reference voltage generator 120.

FIG. 11 is a block diagram of a physical unclonable function system 1000a according to an exemplary embodiment of the inventive concept.

Referring to FIG. 11, the physical unclonable function system 1000a may include a physical unclonable function circuit 100, a controller 200a, and a non-volatile memory 300. The physical unclonable function circuit 100 can include a physical unclonable functional unit array 110 and a reference voltage generator 120, and the controller 200a can include control logic 210, a key generator 220, and an error checking and correction circuit 230.

The physical unclonable functional system 1000a may also include an error checking and correction circuit 230 as compared to the physical unclonable functional system 1000 shown in FIG. When the initial authentication key KEY is generated (ie, when the authentication key is registered), the error checking and correction circuit 230 may encode the physical unclonable function data PDT to generate an error check and correction code for error correction, and may The error check and correction code is stored in the non-volatile memory 300. Key generator 220 may generate an authentication key KEY based on the encoded physical unclonable functional material PDT.

Thereafter, when the authentication key KEY is generated, the error checking and correction circuit 230 can read the error check and correction code from the non-volatile memory 300, and based on the read error check and correction code pair by the physical unclonable function circuit 100. The provided physical unclonable function data PDT is decoded. The key generator 220 may generate the authentication key KEY based on the decoded physical unclonable function material PDT.

As explained above with reference to FIG. 2, the bit error rate of the physical unclonable function circuit 100 according to an exemplary embodiment of the inventive concept may be relatively low. Thus, error checking and correction circuit 230 can include simple error checking and correction logic.

FIG. 12 is a flowchart of a method of operating a physical unclonable function system, according to an exemplary embodiment of the inventive concept. The operation method shown in Fig. 12 can be performed on the physical unclonable function system 1000 shown in Fig. 1 or the physical unclonable function system 1000a shown in Fig. 11. Therefore, the description of the physical unclonable function system 1000 shown in FIG. 1 or the physical unclonable function system 1000a shown in FIG. 11 can be applied to the operation method of the physical unclonable function system according to an exemplary embodiment of the inventive concept.

Referring to FIG. 12, the physical unclonable functional system may determine a stable physical unclonable functional unit from a plurality of physical unclonable functional units during a test operation or initialization process of a manufacturing process, or in a re-operation of a physical unclonable functional circuit ( S100). The physical unclonable functional system may test the plurality of physical unclonable functional units to determine whether an output voltage of the plurality of physical unclonable functional units is in a dead zone. The physical unclonable functional system can determine a physical unclonable functional unit having an output voltage in a dead zone as an unstable physical unclonable functional unit (ie, an invalid physical unclonable functional unit) and will have a dead zone not located The physical unclonable functional unit of the output voltage in the medium is determined to be a stable physical unclonable functional unit (ie, a valid physical unclonable functional unit). The physical unclonable functional system can generate a validity signal for each of the plurality of physical unclonable functional units and store the validity data including the validity signal in the non-volatile memory.

Thereafter, the physical unclonable function system can generate an authentication key in response to the authentication key request signal, and the physical unclonable function system can generate the authentication key based on the output voltage of the stable physical unclonable functional unit based on the physical unclonable functional data. (S200). The physical unclonable functional system can distinguish valid physical unclonable functional units from invalid physical unclonable functional units based on validity data stored in non-volatile memory, and generate data based on valid physical unclonable functional units. Authentication key.

FIG. 13 is a flowchart of operation S100 shown in FIG. 12, according to an exemplary embodiment.

Referring to FIG. 13, the reference voltage generator may generate a first reference voltage to a third reference voltage by dividing a power supply voltage using a resistance element (S110). The first reference voltage may be a reference voltage for determining a data value of the physical unclonable functional unit, and the second reference voltage and the third reference voltage may be reference voltages for setting a dead zone. The first reference voltage can be set to half of the supply voltage. The second reference voltage is higher than the first reference voltage, and the third reference voltage is lower than the first reference voltage.

Each of the plurality of physical unclonable functional units may generate an output voltage by dividing a power supply voltage (S120). Operation S120 can be performed simultaneously with operation S110. Each of the plurality of physical unclonable functional units may include a resistive element connected in series. When the resistive elements operate as voltage dividers, they can produce an output voltage by dividing the supply voltage. The resistive elements can be designed to have the same resistance value, and the resistance values of the resistive elements can have errors due to mismatches in manufacturing processes. The output voltages of the plurality of physical unclonable functional units may be set to be the same. For example, the output voltage of each of the plurality of physical unclonable functional units can be set to half of the supply voltage. However, the output voltages of the plurality of physical unclonable functional units may have a distribution due to an error in the resistance value of the resistive element.

The comparison circuit may compare an output voltage of the physical unclonable functional unit selected from the plurality of physical unclonable functional units with at least two of the first reference voltage to the third reference voltage (S130), and combine The logic may generate a validity signal indicating the validity of the selected physical unclonable functional unit based on the comparison result (S140). For example, the comparison circuit can compare the output voltage of the selected physical unclonable functional unit with the first reference voltage to the third reference voltage to generate a first comparison result to a third comparison result. The combinational logic may generate a validity signal for the selected physical unclonable functional unit based on the first comparison result to the third comparison result.

Thereafter, another physical unclonable functional unit may be selected from the plurality of physical unclonable functional units (S150). Operations S130 and S140 may be performed on another selected physical unclonable functional unit, and the combining logic may generate a validity signal regarding the selected other physical unclonable functional unit.

Repeating operations S130, S140, and S150 may generate a validity signal for each of the plurality of physical unclonable functional units.

The validity data including the validity signals for the plurality of physical unclonable functional units, respectively, may be stored in the non-volatile memory as a validity map (S160).

FIG. 14 is a flowchart of operation S200 shown in FIG. 12, according to an exemplary embodiment.

Referring to FIG. 14, the reference voltage generator may generate a first reference voltage by dividing a power supply voltage using a resistance element (S210).

A plurality of physical unclonable functional units may respectively generate an output voltage by dividing a power supply voltage (S220). Operation S220 can be performed simultaneously with operation S210.

The comparison circuit and the combinational logic may generate the physical unclonable function data by comparing the output voltage of each of the plurality of physical unclonable functional units with the first reference voltage (S230). The comparison circuit and combinational logic can compare the output voltage of the physical unclonable functional unit with the first reference voltage to generate a data value for the physically unclonable functional unit, and the physical unclonable functional data can include the plurality of physical unclonable functions The data value of the unit. Each bit of the physical unclonable functional material may correspond to a data value of the plurality of physical unclonable functional units.

The controller may generate an authentication key using a bit corresponding to the stable physical unclonable functional unit among the respective bits of the physical unclonable function material (S240). The controller can read the validity data stored in the non-volatile memory, and select a bit corresponding to the stable physical unclonable functional unit from the physical unclonable functional data based on the validity data (ie, select a valid data value) ). The controller can generate an authentication key based on the valid data value.

FIG. 15 is a flowchart of operation S200 shown in FIG. 12, according to an exemplary embodiment.

Referring to FIG. 15, the reference voltage generator may generate a first reference voltage by dividing a power supply voltage using a resistance element (S210a).

Each of the plurality of physical unclonable functional units may generate an output voltage by dividing a power supply voltage (S220a). Operation S220a may be performed simultaneously with operation S210a.

The comparison circuit and the combinational logic may generate the physical unclonable function data by comparing the output voltages of the stable physical unclonable functional units of the plurality of physical unclonable functional units (S230a). The controller can read the validity data stored in the non-volatile memory and provide a control signal for selecting a stable physical unclonable functional unit (ie, a valid physical unclonable functional unit) based on the validity data to Physical unclonable functional circuits. Therefore, the output voltage of the stable physical unclonable functional unit can be sequentially supplied to the comparison circuit. The comparison circuit can compare each of the output voltages of the stable physical unclonable functional units with the first reference voltage to output a comparison result, and the combinational logic can be based on the comparison result (ie, based on the stable physical unclonable functional unit The data value) produces physical unclonable functional data.

The controller may generate an authentication key using a bit of the physical unclonable function material provided by the physical unclonable function circuit (S240a). In an exemplary embodiment, the controller may output a physical unclonable functional material as an authentication key.

FIG. 16 is a block diagram showing an electronic device 2000 according to an exemplary embodiment of the inventive concept.

The electronic device 2000 can be, for example, one of the following various types of electronic devices that perform data encoding or secure authentication thereon: an application processor, an integrated integrated circuit (IC), a mobile device, a data storage medium (eg, , solid state drive (SSD), memory stick or universal flash storage (UFS) device, memory card (for example, security digital (SD) card, multimedia card ( Multimedia card, MMC) or embedded multimedia card (embedded MMC (eMMC)) or security device.

Referring to FIG. 16 , the electronic device 2000 can include at least one processor 2100 , a physical unclonable function system 2200 , an encoding module 2300 , a non-volatile memory controller 2400 , a non-volatile memory 2410 , a random access memory 2500 , and Interface 2600. The electronic device 2000 may also include other components such as a communication module or an input/output device. In an exemplary embodiment, if the electronic device 2000 is an application processor, the non-volatile memory 2410 may be included external to the electronic device 2000.

The processor 2100 can control the overall operation of the electronic device 2000. The processor 2100 can be implemented as a central processing unit (CPU), a microprocessor, etc., and can include a single core processor or a multi-core processor.

The random access memory 2500 can operate as a working memory of an internal system of the electronic device 2000. The random access memory 2500 can include at least one of a volatile memory and a non-volatile memory. Code and/or applications may be loaded on the random access memory 2500 to manage or operate the electronic device 2000, and the processor 2100 may execute code and/or applications loaded on the random access memory 2500. The code and/or application can be stored in non-volatile memory 2410 or another storage device.

The interface 2600 can be connected to an input/output device (not shown) by: RGB interface, central processing unit interface, serial interface, mobile display digital interface (MDDI), integrated circuit (inter integrated) Circuit, I2C) interface, serial peripheral interface (SPI), micro controller unit (MCU), mobile industry processor interface (MIPI), embedded display 埠 ( Embedded display port, eDP) interface, D-subminiature (D-sub), optical interface, high definition multimedia interface (HDMI), mobile high-definition link , MHL) interface, secure digital card / multimedia card (MMC) interface, infrared data association (IrDA) standard interface.

The non-volatile memory controller 2400 can provide an interface between the non-volatile memory 2410 and other components of the electronic device 2000 (eg, the processor 2100, the physical unclonable function system 2200, the encoding module 2300, etc.). The data stored in the non-volatile memory 2410 or the data read from the non-volatile memory 2410 can be received by the non-volatile memory 2410 or non-volatile under the control of the non-volatile memory controller 2400. The memory 2410 is read.

The non-volatile memory 2410 can include one of the following: a single programmable memory, a read-only memory, a programmable read-only memory, an electrically programmable read-only memory, and an electrically erasable programmable design. Read-only memory, flash memory, phase change random access memory, magnetic random access memory, resistive random access memory, and ferroelectric random access memory.

Codes and/or applications for managing or operating the electronic device 2000, as well as user data, may be stored in the non-volatile memory 2410. Additionally, the validity data generated in the physical unclonable functional system 2200 can be stored in the non-volatile memory 2410.

The encoding module 2300 can perform encoding and decoding operations on the input/output data using the authentication key provided by the physical unclonable function system 2200.

The physical unclonable function system 2200 can generate an authentication key required for security reasons. In response to the authentication key request signal provided by the processor 2100 or the encoding module 2300, the physical unclonable function system 2200 can generate an authentication key and provide the authentication key to the encoding module 2300.

The physical unclonable function system 2200 illustrated with reference to FIGS. 1 and 11 or the physical unclonable function circuit 100 illustrated with reference to FIG. 2 can be applied to the physical unclonable function system 2200. The physical unclonable functional system 2200 can be implemented as a combination of hardware, hardware and software, or a combination of hardware and firmware.

The physical unclonable function system 2200 can be generated by comparing an output voltage of a physical unclonable functional unit generated by dividing a power supply voltage by using a resistive element with a reference voltage generated by dividing a power supply voltage by using a resistive element. Physical data values of functional units that cannot be cloned. Therefore, the data values of the plurality of physical unclonable functional units can be maintained uniform regardless of the environment.

In addition, the physical unclonable function system 2200 can set a dead zone with sufficient margin relative to a reference voltage (eg, a first reference voltage) used in determining a data value of a physical unclonable functional unit, and prevent having a dead zone The output voltages of those physical unclonable functional units, thereby reducing the bit error rate of the physical unclonable functional system 2200. Therefore, no complicated error checking and correction logic is required.

Since the physical unclonable function system 2200 generates the validity data in a simple manner by comparing the reference voltage (for example, the second reference voltage) generated by the divided voltage with the output voltages of the plurality of physical unclonable functional units, the saving is Determine the time and cost of testing performed by unstable physical unclonable functional units.

Although the present invention has been particularly shown and described with reference to the exemplary embodiments of the present invention, those skilled in the art should understand, without departing from the spirit and scope of the inventive concept Various changes in form and detail can be made herein.

100, 100a, 100b, 100c‧‧‧ physical unclonable functional circuits

110‧‧‧Physical unclonable functional unit array

120, 120a, 120b‧‧‧ reference voltage generator

121‧‧‧First selector

122‧‧‧Second selector

130, 130a, 130b‧‧‧ comparison circuit

131‧‧‧First comparator

131a, 131b‧‧‧ comparator

132‧‧‧Second comparator

132a‧‧‧Switch circuit

133‧‧‧ third comparator

133b‧‧‧Reference selector

140‧‧‧ combinatorial logic

150‧‧‧Unit selection circuit

151‧‧‧Unit selector

160‧‧‧Regulator

170‧‧‧Protection circuit

180‧‧‧block switch

200, 200a‧‧‧ controller

210‧‧‧Control logic

220‧‧‧Key Generator

230‧‧‧Error checking and correction circuit

300, 2410‧‧‧ Non-volatile memory

1000, 1000a, 2200‧‧‧ physical unclonable functional system

2000‧‧‧Electronic devices

2100‧‧‧ processor

2300‧‧‧Code Module

2400‧‧‧Non-volatile memory controller

2500‧‧‧ Random access memory

2600‧‧‧ interface

AR1‧‧‧ first area

AR2‧‧‧ second area

AR3‧‧‧ third area

AR4‧‧‧ fourth area

BGR‧‧‧ bandgap reference circuit

CL1‧‧‧Physical unclonable functional unit/first physical unclonable functional unit

CL2~CLn‧‧‧Physical unclonable functional unit

CN1, CN2~CNn, CNR‧‧‧ connection nodes

CON‧‧‧ control signal

D1‧‧‧ Distribution of output voltages of multiple physical unclonable functional units

D2‧‧‧Distribution of the first reference voltage

ENB‧‧‧ disable signal

Iref‧‧‧reference current

KEY‧‧‧Key/Authentication Key/Initial Authentication Key

PDT‧‧‧Physical unclonable functional data

MD‧‧‧ mode signal

N1_1, N1_2~N1_m, N2_1, N2_2~N2_m‧‧‧ nodes

ND1‧‧‧ first end

R‧‧‧Resistors

RE1‧‧‧resistive element / first resistive element

RE2‧‧‧resistive element / second resistive element

RE3, RE3a, RE3b‧‧‧ third resistance element

RE4, RE4a, RE4b‧‧‧ fourth resistance element

REQ‧‧‧Authorization key request signal

RSEL‧‧‧ reference selection signal

RST1‧‧‧ first comparison result

RST2‧‧‧ second comparison result

RST3‧‧‧ third comparison result

RSW1‧‧‧ first reference switch

RSW2‧‧‧Second reference switch

RSW3‧‧‧ third reference switch

S100, S110, S120, S130, S140, S150, S160, S200, S210, S220, S230, S240, S200a, S210a, S220a, S230a, S240a‧‧

SET1‧‧‧ first setting signal

SET2‧‧‧Second setting signal

SSW1, SSW2~SSWn‧‧‧ unit selection switch

Vcell‧‧‧ output voltage

VDD, VSS‧‧‧ power supply voltage

VDDE‧‧‧ external power supply voltage

VDT‧‧‧ Validity Information

Vref‧‧‧ first reference voltage

Vref_H‧‧‧second reference voltage

Vref_L‧‧‧ third reference voltage

VS‧‧‧effective signal

Embodiments of the inventive concept will be more clearly understood from the following detailed description of the embodiments of the invention. FIG. 1 is a block diagram of a physical unclonable function (PUF) system according to an exemplary embodiment of the inventive concept. . 2 is a circuit diagram of a physical unclonable function circuit in accordance with an exemplary embodiment of the inventive concept. Figure 3A shows the distribution of multiple physical unclonable functional units. FIG. 3B shows the distribution of the first reference voltage. FIG. 3C is a schematic diagram for explaining a dead zone according to a second reference voltage and a third reference voltage. 4A through 4C illustrate a method of determining validity according to an exemplary embodiment. FIG. 5 illustrates an example of a comparison circuit in accordance with an exemplary embodiment of the inventive concept. FIG. 6 illustrates an example of a comparison circuit in accordance with an exemplary embodiment of the inventive concept. FIG. 7 is a schematic diagram of an example of a reference voltage generator according to an exemplary embodiment of the inventive concept. FIG. 8 is a schematic diagram of an example of a reference voltage generator according to an exemplary embodiment of the inventive concept. 9 is a circuit diagram of a physical unclonable function circuit in accordance with an exemplary embodiment of the inventive concept. FIG. 10 is a circuit diagram of a physical unclonable function circuit according to an exemplary embodiment of the inventive concept. 11 is a block diagram of a physical unclonable function system in accordance with an exemplary embodiment of the inventive concept. FIG. 12 is a flowchart of a method of operating a physical unclonable function system, according to an exemplary embodiment of the inventive concept. FIG. 13 is a flowchart of operation S100 shown in FIG. 12, according to an exemplary embodiment. FIG. 14 is a flowchart of operation S200 shown in FIG. 12, according to an exemplary embodiment. FIG. 15 is a flowchart of operation S200 shown in FIG. 12, according to an exemplary embodiment. FIG. 16 is a block diagram showing an electronic device according to an exemplary embodiment of the inventive concept.

Claims (20)

A physical unclonable functional circuit comprising: a plurality of physical unclonable functional units configured to generate an output voltage by dividing a supply voltage; a reference voltage generator configured to divide the supply voltage by Generating a first reference voltage; and comparing circuitry configured to sequentially compare the output voltage of the plurality of physical unclonable functional units with the first reference voltage and output the plurality of physical unclonable functions The data value of the unit. The physical unclonable function circuit of claim 1, wherein each of the plurality of physical unclonable functional units includes at least two resistive elements, and the plurality of physical unclonable functional units are based on A mismatch between the at least two resistive elements is described to produce the output voltage at different potentials. The physical unclonable function circuit of claim 1, wherein each of the plurality of physical unclonable functional units comprises a first resistor and a second resistor connected in series, the power voltage application A first end of the first resistor, and a voltage of the second end of the first resistor is output as one of the output voltages. The physical unclonable function circuit of claim 3, wherein the reference voltage generator comprises a third resistor and a fourth resistor connected in series, the power voltage being applied to the third resistor a first end, a voltage of the second end of the third resistor is output as the first reference voltage, and a mismatch between the first resistor and the second resistor is greater than the third resistor A mismatch between the device and the fourth resistor. The physical unclonable function circuit of claim 4, wherein a resistance value of the first resistor is the same as a resistance value of the second resistor, and a resistance value of the third resistor is The fourth resistor has the same resistance value, and the third resistor has a width greater than a width of the first resistor. The physical unclonable function circuit of claim 1, wherein the reference voltage generator generates a second reference voltage higher than the first reference voltage and a third reference lower than the first reference voltage a voltage, and the comparison circuit compares each of the output voltages of the plurality of physical unclonable functional units with at least one of the second reference voltage and the third reference voltage. The physical unclonable function circuit of claim 6, further comprising validity determination logic configured to generate, based on the comparison result, each of the plurality of physical unclonable functional units Information on the effectiveness of one's effectiveness. The physical unclonable function circuit of claim 7, wherein the validity determination logic determines one of the plurality of physical unclonable functional units as a valid physical unclonable function Unit: The output voltage of the one physical unclonable functional unit is at a potential equal to or higher than the second reference voltage or at a lower potential than the third reference voltage. The physical unclonable function circuit of claim 6, wherein the reference voltage generator comprises a first resistor string to which the power supply voltage is applied and a second series connected to the first resistor string in series a resistor string, a voltage of one of a plurality of nodes of the first resistor string selected based on the first set signal being output as the second reference voltage, and the selected based on the second set signal A voltage of one of a plurality of nodes of the second resistor string is output as the third reference voltage. The physical unclonable function circuit of claim 1, wherein the reference voltage generator comprises: a bandgap reference circuit configured to generate a reference current based on the power supply voltage; and a resistor string configured to The first reference voltage is generated based on the reference current. The physical unclonable function circuit of claim 1, wherein the power supply voltage is provided by a regulator circuit. The physical unclonable function circuit of claim 1, further comprising a protection circuit configured to sense a potential of the power supply voltage, wherein a potential of the power supply voltage is within a rated voltage range Additionally, the protection circuit blocks operation of at least one of the reference voltage generator and the comparison circuit. A physical unclonable functional system, comprising: a physical unclonable functional circuit comprising a plurality of physical unclonable functional units, the physical unclonable functional circuit configured to output an output voltage and a reference voltage of the plurality of physical unclonable functional units Comparing and generating physical unclonable functional data including data values of the plurality of physical unclonable functional units, the validity data indicating the plurality of physical unclonable functional units The validity of the data value; and a controller configured to control the physical unclonable function circuit and generate a key based on the physical unclonable function data and the validity data. The physical unclonable functional system of claim 13, wherein each of the plurality of physical unclonable functional units comprises a first resistive element and a second resistive element, the first resistive element being connected to a power supply voltage, the second resistive element is connected in series to the first resistive element, and the first resistive element and the second resistive element have the same target resistance value. The physical unclonable function system of claim 13, wherein the reference voltage comprises a first reference voltage, a second reference voltage, and a third reference voltage, wherein the second reference voltage is higher than the first reference a voltage, the third reference voltage is lower than the first reference voltage, and the physical unclonable function circuit compares the output voltage of the plurality of physical unclonable functional units with the first reference voltage to Generating a data value of the plurality of physical unclonable functional units, and the physical unclonable function circuit determines that the plurality of physical unclonable functional units have the second reference voltage and the third reference voltage The data value of the physical unclonable functional unit between the output voltages is valid. The physical unclonable function system of claim 13, wherein the controller selects a valid data value in the data value of the plurality of physical unclonable functional units based on the validity data, and The controller outputs the selected valid material value as the key. The physical unclonable function system of claim 13, wherein the controller selects a valid data value in the data value of the plurality of physical unclonable functional units based on the validity data, and The controller performs error checking and correction based on the selected valid data value, and generates the key based on the material on which the error checking and correction is performed. An integrated circuit having a physical unclonable function, the integrated circuit comprising: a plurality of physical unclonable functional units configured to generate an output voltage, each of the output voltages being based on at least two resistors And dividing a power supply voltage to generate; a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage by dividing the power supply voltage based on the resistor string, The second reference voltage is higher than the first reference voltage, the third reference voltage is lower than the second reference voltage; the comparison circuit is configured to connect the output voltage of the plurality of physical unclonable functional units Comparing each of the first reference voltage, the second reference voltage, and the third reference voltage, and outputting a comparison result; and combining logic configured to generate the indication based on the comparison result Validity data for the validity of each of the physical unclonable functional units. The integrated circuit of claim 18, further comprising a non-volatile memory configured to store the validity data. The integrated circuit of claim 18, wherein the comparison circuit is responsive to an authentication key request signal to perform the output voltage of the plurality of physical unclonable functional units with the first reference voltage Comparing and outputting the comparison result as the data value of the plurality of physical unclonable functional units.