TW201830261A - Data storage device and operating method therefor - Google Patents

Abstract

A data storage device with high efficiency, using a storage transport protocol core and a trigger machine. The storage transport protocol core is provided for communication between the data storage device and a host. The schedule for operating the storage transport protocol core is stored in the trigger machine in advance by firmware of the data storage device. According to the schedule stored in the trigger machine in advance, the trigger machine that takes the place of the firmware triggers the storage transport protocol core to operate in accordance with the schedule.

Description

 Data storage device and method of operation thereof  

The present invention relates to a data storage device.

The non-volatile memory used in the data storage device may be a flash memory, a magnetoresistive random access memory (Magnetoresistive RAM), a ferroelectric random access memory (Ferroelectric RAM), and a resistive memory. Resistive RAM (RRAM), Spin Transfer Torque-RAM (STT-RAM), etc., for long-term data storage. How to improve the operational efficiency of data storage devices is an important issue in the technical field.

A data storage device implemented in accordance with an embodiment of the present invention includes a storage device transfer protocol core and a trigger. The storage device transport protocol core enables communication of the data storage device with a host. The firmware of the data storage device pre-stores the schedule of the storage device transfer protocol core to the trigger machine. According to the pre-stored schedule, the trigger device triggers the storage device transmission protocol core action instead of the firmware.

A method for operating a data storage device according to an embodiment of the present invention includes: providing a storage device transmission protocol core to enable communication between the data storage device and a host; and pre-storing the storage device transmission protocol via the firmware of the data storage device The core schedules to a trigger, so that the trigger triggers the storage device to transfer the core action according to the pre-stored schedule instead of the firmware.

The invention is described in detail below with reference to the accompanying drawings.

100‧‧‧Electronic devices

102‧‧‧ memory

104‧‧‧ memory controller

106‧‧‧Host

108‧‧‧Processing unit

110‧‧‧Instructed Tightly Coupled Memory (ICCM)

112‧‧‧Data Tightly Coupled Memory (DCCM)

114‧‧‧ Storage Device Transfer Protocol Core

116‧‧‧ trigger machine

118, 120‧‧‧ register

S402...S406‧‧‧Steps

1 is a block diagram illustrating an electronic device 100 in which a data storage device includes a memory 102 and a memory controller 104. FIG. 2 is a timing diagram illustrating the host 106 and the memory controller 104. The interaction is in response to a read request from the host 106; the third diagram is a timing diagram illustrating the interaction between the host 106 and the memory controller 104 in response to a write request from the host 106; 4 is a flow diagram depicting how the memory controller 104 responds to read/write requests issued by the host 106 in accordance with an embodiment of the present invention.

The following description sets forth various embodiments of the invention. The following description sets forth the basic concepts of the invention and is not intended to limit the invention. The scope of the actual invention shall be defined in accordance with the scope of the patent application.

1 is a block diagram illustrating an electronic device 100 in which a data storage device is provided including a memory 102 and a memory controller 104. Memory 102 is accessed by a host 106 under the operation of the memory controller 104.

The memory controller 104 includes a processing unit 108, a dynamic random access memory (DRAM, including an instruction tight coupled memory (ICCM) 110 and a data tight coupled memory (DCCM) 112), and a hardware or software and hardware combination. The storage device transmits a protocol core 114 and a trigger 116.

The processing unit 108 executes the instructions in the instruction tightly coupled memory (ICCM) 110 to cause the firmware of the data storage device to operate, echoing the instructions issued by the host 106. The data tightly coupled memory (DCCM) 112 is used for temporary storage of read/write data of the memory 102 and for temporary storage of communication data of the data storage device with the host 106. The storage device transfer protocol core 114 is responsible for data transfer between the memory controller 104 and the host 106. The packet transmitted by the host 106 will be decapsulated by the storage device transport core 114 and temporarily stored in the data tightly coupled memory (DCCM) 112. The storage device transport protocol core 114 further packages the contents of the data tightly coupled memory (DCCM) 112 as packets for delivery to the host 106. The storage device transfer protocol core 114 is triggered by the trigger machine 116 to execute the transaction. After the firmware of the data storage device schedules the to-do list of the storage device core 114, the trigger 116 is fully responsible for waiting for the storage device to transfer the protocol core 114 to operate in accordance with the schedule in a long time course. As such, the firmware of the data storage device is otherwise resiliently utilized during the storage device transfer core 114 in accordance with the schedule execution.

As shown in FIG. 1, the storage device transfer protocol core 114 includes a scratchpad 118, and the trigger machine 116 includes a scratchpad 120. The storage device transfer protocol core 114 is actuated based on the contents of the scratchpad 118. However, in this embodiment, the register 118 is not directly filled in by the firmware of the data storage device, but is filled in by the trigger 116. In one embodiment, the scratchpad 120 space can store the status of the N-scratch register 118. The firmware of the data storage device is to queue the scheduler for the storage device transfer protocol core 114 to the scratchpad 120 of the trigger machine 116, and then to escape from the operation of the storage device transfer protocol core 114. The trigger 116 is responsible for sequentially changing the contents of the register 118 of the storage device core 114 according to the schedule of the register 120, so that the storage device transmits the protocol core 114 according to the scheduling action. The register 118 and the register 120 can be other forms of storage space.

In one embodiment, the memory 102 can be a flash memory. The storage device transport protocol core 114 may be set up for a universal flash storage (UFS) technology, called a UFS transport protocol (UTP). The memory 102 and the memory controller 104 can be implemented as a general purpose flash memory (UFS), which can be an embedded or external data storage device using flash memory for the electronic device 100. The electronic device 100 can be a smart phone, a wearable device, a tablet computer, a virtual reality device, or the like. The host 106 can be a central processing unit (CPU) of the electronic device 100.

How the memory controller 104 implements the read and write of the memory 102 is discussed below.

2 is a timing diagram illustrating the interaction between the host 106 and the memory controller 104 in response to a read request from the host 106. As shown in the figure, the firmware works only in the early stage, and other operations can be practiced in the later stage.

In the early stage, the firmware accesses the memory 102 and temporarily stores the read data taken from the memory 102 to the data tight coupled memory (DCCM) 112. In addition, the firmware will be more ready to indicate a communication data at the end of the data transmission on the data tight coupled memory (DCCM) 112. In addition, the firmware schedules the to-be-handled items of the storage device transfer core 114 and lists the scheduled results in the register 120 of the trigger 116.

Later, the firmware is idle, and the trigger 116 is connected to the bar, and the value of the register 118 of the storage device core 114 is changed according to the contents of the 120 columns of the register. The storage device transfer protocol core 114 triggers a corresponding action as the contents of the register 118 changes, and completes the scheduled to-do items one by one. According to the embodiment of FIG. 2, under the operation of the triggering machine 116, the storage device transmission protocol core 114 ends the packet RSP with a transmission after transmitting the data packet (Data_in packet, such as Data IN UPIU packet) three times. The RSP package, such as the Response UPIU packet, informs the host 106 that its read request has been completed. Regarding reading data packet Data_In, the storage device transfer protocol core 114 includes obtaining a piece of read data from the data tightly coupled memory (DCCM) 112, wrapping the segment read data as a read data packet Data_In and transmitting it to the host 106. Regarding the end of transmission packet RSP, the storage device transport protocol core 114 includes obtaining the packet content from the data tightly coupled memory (DCCM) 112, packaged as a transport end packet RSP, and transmitted to the host 106. The storage device transmission protocol core 114 is thus subjected to a series of "read data packet Data_In transmission → read data packet Data_In transmission → read data packet Data_In transmission → transmission end packet RSP transmission" without the firmware participation, but by the trigger machine 116 The firmware is implemented in the schedule content change register 118 of the scratchpad 120. The idle firmware can perform other operations and greatly improve the performance of the data storage device.

Figure 3 is a timing diagram illustrating the interaction between the host 106 and the memory controller 104 in response to a write request from the host 106. As shown in the figure, the firmware works only in the early stage, and other operations can be practiced in the later stage.

In the early stage, the firmware prepares communication data on the data tightly coupled memory (DCCM) 112 for predicting that it is ready to receive data and indicating the end of data transmission. In addition, the firmware schedules the to-do items of the storage device transfer protocol core 114 and lists the scheduling results in the register 120 of the trigger 116.

Later, the firmware is idle, and the trigger 116 is connected to the bar, and the value of the register 118 of the storage device core 114 is changed according to the contents of the 120 columns of the register. The storage device transfer protocol core 114 triggers a corresponding action as the contents of the register 118 changes, and the scheduled to-do list is completed. According to the embodiment of FIG. 3, under the operation of the triggering machine 116, the storage device transmission protocol 114 sends a pre-report packet RTT (such as a Ready To Transfer UPIU packet) and a write data packet Data_Out (such as a Data IN UPIU packet). Thereafter, the RSP (RSP package, such as a Response UPIU packet) is sent to inform the host 106 that its write request has been completed. Regarding the trailer packet RTT, the storage device transport protocol core 114 obtains the packet content from the data tightly coupled memory (DCCM) 112, packages it as a trailer packet RTT, and transmits it to the host 106. Regarding the write data packet Data_Out, the storage device transport protocol core 114 decapsulates it and temporarily stores it in the data tightly coupled memory (DCCM) 112, which is to be collected later to the memory 102. Regarding the end information transmission, the storage device transport protocol core 114 includes obtaining the packet content from the data tightly coupled memory (DCCM) 112, packaged as a transport end packet RSP (RSP package, such as a Response UPIU packet), and transmitted to the host 106. The storage device transport protocol core 114 is thus in a series of "pre-announce packet RTT transmission→write data packet Data_Out reception→pre-packet packet RTT transmission→write data packet Data_Out reception→pre-packet packet RTT transmission→write data packet Data_Out reception→end packet RSP transmission "There is no need for the firmware to participate, but is implemented by the trigger 116 according to the schedule content change register 118 that the firmware previously stored in the register 120. The idle firmware can perform other operations and greatly improve the performance of the data storage device.

4 is a flow diagram depicting how the memory controller 104 responds to read/write requests issued by the host 106 in accordance with an embodiment of the present invention. Step S402 receives the read/write request sent by the host 106. In step S404, the firmware of the data storage device runs, prepares data on the data tightly coupled memory (DCCM) 112, and arranges the to-do items of the storage device transmission protocol core 114, and lists the scheduling items on the trigger machine. The register 120 of 116. In step S406, the triggering machine 116 changes the value of the register 118 of the storage device transmission core 114 according to the contents of the register 120, so that the storage device transmits the protocol core 114 according to the scheduling action. The read/write request is then fully responded.

Other techniques for improving the performance of data storage devices using the above concepts are within the scope of the present invention. Based on the above technical content, the present invention further relates to a method of operating a data storage device.

While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

Claims (20)

 A data storage device includes: a storage device transmission protocol core that enables the data storage device to communicate with a host; and a trigger device that pre-stores the storage device transmission protocol core schedule via the firmware of the data storage device, and according to The pre-stored schedule, in place of the firmware, triggers the storage device transfer protocol core action.    The data storage device of claim 1, wherein: the trigger device replaces the firmware to trigger the storage device transmission protocol core according to the scheduling action, and the firmware is idle to be used to implement the data storage device. Features.    The data storage device of claim 1, wherein: the storage device transport protocol core has a first storage space built therein, and the storage device transfer protocol core operates according to the content of the first storage space; The trigger changes the content of the first storage space according to the pre-stored schedule, so that the storage device transmits the protocol core according to the scheduling action.    The data storage device of claim 3, wherein: the triggering machine has a second storage space column for the above scheduling; and the triggering machine sequentially queries the second storage space to change the storage device transmission. The content of the first storage space of the core of the agreement causes the storage device to transfer the protocol core according to the scheduling action described above.    The data storage device of claim 4, wherein the second storage space is filled in by the firmware.    The data storage device of claim 5, wherein: the triggering machine sequentially queries the second storage space to change the content of the first storage space of the storage device transfer protocol core, and the firmware is idle and ready to use. To achieve other functions of the data storage device.    The data storage device of claim 1, further comprising: a memory; and a dynamic random access memory; wherein, when the host sends a read request to the data storage device, the firmware is based on The storage device transmits the to-do list of the protocol core to generate the scheduling, and pre-stores the scheduling to the triggering machine, and further accesses the memory to obtain the read data temporarily stored in the dynamic random access memory, and The DRAM is ready to indicate a communication data at the end of the data transmission.    The data storage device of claim 7, wherein: the storage device transfer protocol core reads the dynamic random access memory to trigger and read the read data for reading. Data packet, and sending the read data packet to the host; and the storage device transfer protocol triggers the dynamic random access memory to acquire and package the communication data as a transmission end packet, triggered by the trigger. And sending the above-mentioned transmission end packet to the host to inform the host that the above read request has been completed.    The data storage device of claim 1, further comprising: a memory; and a dynamic random access memory; wherein, when the host sends a write request to the data storage device, the firmware is based on the The storage device transmits the scheduled to-do list to generate the foregoing schedule, and pre-stores the schedule to the trigger machine, and prepares the communication data for the dynamic random access memory, and is used for predicting the ready to receive data and marking The data transfer ends.    The data storage device of claim 9, wherein: the storage device transfer protocol core reads, by the trigger, the dynamic random access memory to obtain and package the corresponding one of the communication data as Pre-packing the packet and sending the foregoing notification packet to the host; after transmitting the foregoing notification packet to the host, the storage device transfer protocol core temporarily stores the write data obtained from the host to the dynamic random The access memory is to be collected to the memory; and the storage device transfer core is further triggered by the trigger to read the dynamic random access memory to obtain and package the corresponding one of the communication data as the end of transmission packet, and Sending the above-mentioned transmission end packet to the host to inform the host that the above write request has been completed.    A data storage device operating method includes: providing a storage device transmission protocol core to enable the data storage device to communicate with a host; and pre-storing the storage device transmission protocol core schedule to a trigger via the firmware of the data storage device And causing the trigger to trigger the storage device to transfer the core action according to the pre-stored schedule instead of the firmware.    The data storage device operating method according to claim 11, wherein: the triggering machine replaces the firmware to trigger the storage device transmission protocol core according to the scheduling action, and the firmware is idle to be used for realizing the data storage. Other features of the device.    The method for operating the data storage device of claim 11, further comprising: constructing a first storage space in the core of the storage device transfer protocol; wherein: the storage device transfer protocol core is based on the first storage space The content action; and the trigger changes the content of the first storage space according to the pre-stored schedule, so that the storage device transmits the protocol core according to the scheduling action.    The method of operating the data storage device of claim 13 further includes: constructing a second storage space in the triggering machine, wherein the scheduling bar is listed in the second storage space; wherein the triggering device is The second storage space is sequentially queried to change the content of the first storage space of the storage device transfer protocol core, so that the storage device transmits the protocol core according to the scheduling action.    The method of operating a data storage device according to claim 14, wherein the second storage space is filled in by the firmware.    The method of operating the data storage device of claim 15, wherein: the trigger idlely idles when the triggering device sequentially queries the second storage space to change the content of the first storage space of the storage device transfer protocol core To be used to implement other functions of the data storage device.    The method for operating a data storage device according to claim 11, wherein: when the host sends a reading request to the data storage device, the firmware generates the row according to the to-do item of the storage protocol core according to the storage device. And storing the schedule to the trigger device, and accessing a memory of the data storage device to obtain the read data temporarily stored in a dynamic random access memory of the data storage device, and storing the dynamic random access memory The memory is ready to indicate a communication data at the end of the data transmission.    The data storage device operating method of claim 17, wherein: the storage device transfer protocol core reads the dynamic random access memory to obtain and package the read data under the trigger of the trigger. Reading the data packet, and sending the read data packet to the host; and the storage device transfer protocol core is further triggered by the trigger to read the dynamic random access memory to obtain and package the communication data for the end of the transmission. The packet is sent and the above-mentioned transmission end packet is sent to the host to inform the host that the above read request has been completed.    The method of operating a data storage device according to claim 11, wherein: when the host sends a write request to the data storage device, the firmware generates the above-mentioned to-be-issue according to the storage protocol core of the storage device. The schedule is pre-stored to the trigger machine, and a dynamic random access memory of the data storage device is used to prepare communication data for predicting the ready to receive data and marking the end of the data transmission.    The method for operating a data storage device according to claim 19, wherein: the storage device transfer protocol core reads the dynamic random access memory to trigger and buffer the corresponding data in the communication data. The packet is a preview packet, and the foregoing notification packet is sent to the host; after the foregoing notification packet is sent to the host, the storage device transfer protocol core temporarily stores the write data obtained from the host to the trigger. The DRAM is to be collected to a memory of the data storage device; and the storage device transfer protocol core is further triggered by the trigger to read the DRAM to obtain and package the corresponding data in the communication data. The packet is terminated for transmission, and the above-mentioned transmission end packet is sent to the host to inform the host that the above write request has been completed.