TW201802557A - Pixel unit and display panel - Google Patents

Abstract

A pixel unit includes a first scan line, a second scan line, a data line, a first switching element, a second switching element, a first pixel electrode, a second pixel electrode and a connecting line. The first switching element is electrically connected to the first scan line, the data line and the first pixel electrode. The second switching element is electrically connected to the second scan line, the data line and the second pixel electrode. Each of the source of the first switching element and the source of the second switching element has a first terminal and a second terminal respectively, and the second terminal of the source of the second switching element is not connected to the data line directly. The connecting line electrically connected between the second terminal of the source of the first switching element and the first terminal of the source of the second switching element.

Description

Pixel unit and display panel

The invention relates to a pixel unit, in particular to a pixel unit having a high aperture ratio, and a display panel including the pixel unit.

The display panel mainly includes an array substrate, a counter substrate, and a display medium layer disposed between the two substrates. The array substrate is provided with scanning lines, data lines, switching elements, pixel electrodes and other elements to form a plurality of sub-pictures. Vegetarian. Since some elements on the substrate are generally formed of opaque materials such as metal materials, the arrangement between these elements and the transparent pixel electrodes will affect the arrangement distribution of the black matrix (BM), and then affect The pixel aperture ratio of the display panel, therefore, how to improve the pixel aperture ratio of the display panel by changing the configuration design of each element in the pixel unit without affecting the display function is one of the current display panel industry. Big topic.

It is an object of the present invention to provide a pixel unit that improves the pixel aperture ratio by designing the arrangement of opaque elements, and to apply the pixel unit to a display panel.

An embodiment of the present invention provides a pixel unit including a first scanning line, a second scanning line, a first data line, a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, First connection line. The first switching element is electrically connected to the first scanning line and the first data line. The source of the first switching element has a first terminal and a second terminal. The second switching element is electrically connected to the second scanning line and the first data line, wherein the source of the second switching element has a first end and a second end, and the second end of the source of the second switching element is not connected to the first A data line is directly connected. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The first connecting line is electrically connected between the second end of the source of the first switching element and the first end of the source of the second switching element, and the first connecting line is substantially located between the first pixel electrode and the second Pixel electrodes.

Another embodiment of the present invention provides a display panel including an active array substrate and a light shielding layer. The active array substrate includes a plurality of pixel units as described above. The light shielding layer is disposed corresponding to the first scanning line and the second scanning line.

Under the condition that the pixel unit of the present invention is electrically connected to the source electrode of the first switching element and the corresponding data line, the source electrode of the second switching element can be connected to the corresponding pixel electrode by a connecting line between the two pixel electrodes. The data line is electrically connected to the source of the first switching element, so that the source of the second switching element can be electrically connected to its corresponding data line without the need to additionally provide a connection line that affects the pixel aperture ratio. As a result, the area of the required light-shielding layer is relatively reduced, thereby increasing the pixel aperture ratio.

In order to make a person skilled in the art who is familiar with the technical field of the present invention further understand the present invention, the preferred embodiments of the present invention are enumerated below, and in conjunction with the accompanying drawings, the constitutional content of the present invention and the desired effects are described in detail. .

Please refer to FIG. 1. FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention. As shown in FIG. 1, the display panel PN of this embodiment includes an active array substrate AS, a display medium layer DM, a light-shielding layer BM, and an opposite substrate OS. The active array substrate AS includes a plurality of pixel units for display. The basic units of the picture form a pixel array. In this embodiment, the display panel PN may be a liquid crystal display panel, wherein the liquid crystal display panel may be a flat electric field drive type liquid crystal display panel such as a fringe field switching (FFS) liquid crystal display panel or a flat electric field switching type (in -plane switching (IPS) liquid crystal display panel, but not limited to this. In a modified embodiment, the display panel PN may also be a blue phase liquid crystal display panel or other suitable display panels. In addition, the active array substrate AS and the opposite substrate OS may be transparent substrates, which may be rigid substrates or flexible substrates such as glass substrates, plastic substrates, or sapphire substrates, but are not limited thereto.

Please refer to FIG. 2. FIG. 2 is a schematic top view of a part of an active array substrate of a display panel according to a first embodiment of the present invention. FIG. 2 only shows a pixel unit PU having two sub-pixels, that is, That is, the pixel unit PU of this embodiment is composed of two sub-pixels. As shown in FIG. 2, the pixel unit PU of this embodiment includes a first switching element SW1, a first pixel electrode SPE1, a second switching element SW2, a second pixel electrode SPE2, a first scanning line SL1, and a second The scan line SL2, the first data line DL1, the second data line DL2, and the first connection line CL1. The first switching element SW1 and the first pixel electrode SPE1 are located in the first pixel region SP1, the second switching element SW2 and the second pixel electrode SPE2 are located in the second pixel region SP2, and the first pixel region SP1 And the second pixel area SP2 is adjacent in the first direction D1. In this embodiment, the shapes of the first pixel region SP1 and the second pixel region SP2 may be bent, but not limited to this. The first pixel region SP1 and the second pixel region SP1 The shape of SP2 can also be rectangular, parallelogram or other suitable shapes. The first scanning line SL1 and the second scanning line SL2 extend along the first direction D1 and are parallel to each other in the second direction D2. The first data line DL1 and the second data line DL2 extend substantially along the second direction D2 and substantially The first direction D1 is arranged side by side in parallel, and the first data line DL1 and the second data line DL2 intersect the first scan line SL1 and the second scan line SL2 at the same time, but do not contact each other. In this embodiment, the first data line DL1 and the second data line DL2 are bent, but not limited thereto. The shapes of the first data line DL1 and the second data line DL2 of the display panel PN of the present invention are Corresponding to the shape of the first pixel area SP1 and the second pixel area SP2. It should be noted that the first pixel area SP1 and the second pixel area SP2 are substantially located between the first scan line SL1 and the second scan line SL2 and between the first data line DL1 and the second data line DL2. The first pixel area SP1 and the second pixel area SP2 can provide the same or different color display respectively. The first switching element SW1 is electrically connected to the first scanning line SL1, the first data line DL1, and the first pixel electrode SPE1. The second switching element SW2 is connected to the second scanning line SL2, the first data line DL1, and the second pixel. The electrode SPE2 is electrically connected. The first switching element SW1 has a gate SW1g, a source SW1s, and a drain SW1d. The gate SW1g of the first switching element SW1 is electrically connected to the first scanning line SL1, and the source of the first switching element SW1. The electrode SW1s is electrically connected to the first data line DL1. The drain SW1d of the first switching element SW1 is electrically connected to the first pixel electrode SPE1. The second switching element SW2 has a gate SW2g, a source SW2s, and a drain SW2d. The gate SW2g of the second switching element SW2 is electrically connected to the second scan line SL2, the source SW2s of the second switching element SW2 is electrically connected to the first data line DL1, and the drain SW2d of the second switching element SW2 is electrically connected to the second The pixel electrode SPE2 is electrically connected. In addition, in this embodiment, the first pixel electrode SPE1 and the second pixel electrode SPE2 are electrodes without slits, but not limited thereto. In a modified embodiment, the first pixel electrode SPE1 and the first pixel electrode SPE1 and the second pixel electrode SPE2 are not limited thereto. Both of the two pixel electrodes SPE2 can be electrodes with slits. In addition, the materials of the first scan line SL1, the second scan line SL2, the first data line DL1, and the second data line DL2 may include metal or other opaque conductive materials with low resistance to reduce the display information during transmission. Attrition, the material of the first pixel electrode SPE1 and the second pixel electrode SPE2 may include indium tin oxide (ITO), indium zinc oxide (IZO), or other suitable transparent conductive materials. The first switching element SW1 and the first The two switching elements SW2 can be thin film transistors (TFTs) or other suitable switching elements.

In addition, the source SW1s of the first switching element SW1 has a first terminal SW1s1 and a second terminal SW1s2, the source SW2s of the second switching element SW2 has a first terminal SW2s1 and a second terminal SW2s2, and the first connection line CL1 is electrically Connected between the second terminal SW1s2 of the source SW1s of the first switching element SW1 and the first terminal SW2s1 of the source SW2s of the second switching element SW2, and the second terminal SW2s2 of the source SW2s of the second switching element SW2 is not connected to The first data line DL1 is directly connected. In this embodiment, the first terminal SW1s1 and the second terminal SW1s2 of the source SW1s of the first switching element SW1 may be opposite ends of the source SW1s in the second direction D2, and the source SW2s of the second switching element SW2. The first end SW2s1 and the second end SW2s2 may be opposite ends of the source SW2s in the second direction D2. The first end SW2s1 of the source SW2s is a side closer to the first switching element SW1 than the second end SW2s2. But it is not limited to this. Since the source SW1s of the first switching element SW1 is electrically connected to the first data line DL1, and the second terminal SW2s2 of the source SW2s of the second switching element SW2 is not directly connected to the first data line DL1, The source SW2s of the second switching element SW2 is electrically connected to the first data line DL1. Therefore, the source SW1s of the first switching element SW1 and the source SW2s of the second switching element SW2 are electrically connected to each other through the first connection line CL1. The source SW1s of the first switching element SW1 and the source SW2s of the second switching element SW2 are electrically connected to the first data line DL1. That is, the source SW2s of the second switching element SW2 must pass through the first A connection line CL1 is electrically connected to the first data line DL1. In this embodiment, the second terminal SW1s2 of the source SW1s of the first switching element SW1 and the first terminal SW2s1 of the source SW2s of the second switching element SW2 are located at the first terminal SW1s1 of the source SW1s of the first switching element SW1. And the second terminal SW2s2 of the source SW2s of the second switching element SW2, but not limited thereto. On the other hand, since the second terminal SW2s2 of the source SW2s of the second switching element SW2 is not directly connected to the first data line DL1, in this embodiment, the second terminal of the source SW2s of the second switching element SW2 SW2s2 can not be directly connected to any wire, but it is not limited to this. In addition, since the first connection line CL1 is electrically connected between the second terminal SW1s2 of the source SW1s of the first switching element SW1 and the first terminal SW2s1 of the source SW2s of the second switching element SW2, the first The connection line CL1 may be substantially located between the first pixel electrode SPE1 and the second pixel electrode SPE2. In addition, the material of the first connection line CL1 may include metal or other opaque conductive materials with low resistance. In this embodiment, the first connection line CL1 and the first data line DL1 may be the same conductive layer, but not This is the limit.

In this embodiment, the pixel unit PU may further include a second connection line CL2 and is electrically connected between the first terminal SW1s1 of the source SW1s of the first switching element SW1 and the first data line DL1. The first switching element The source SW1s of SW1 is electrically connected to the first data line DL1 through the second connection line CL2, and the source SW2s of the second switching element SW2 sequentially passes through the first connection line CL1, the source SW1s of the first switching element SW1, and the first The two connecting lines CL2 are electrically connected to the first data line DL1. In addition, the first terminal SW1s1 of the source SW1s of the first switching element SW1 can be directly connected to the second connection line CL2. Therefore, the source SW1s of the first switching element SW1 is directly connected to the first terminal SW1s1 through the second connection line. CL2 is electrically connected to the first data line DL1. In addition, in this embodiment, the first scan line SL1 is substantially located between the second connection line CL2 and the second scan line SL2, but is not limited thereto. In a modified embodiment, the second connection line CL2 may be located between the first scan line SL1 and the second scan line SL2. In addition, the material of the second connection line CL2 may include metal or other opaque conductive materials with low resistance. In this embodiment, the second connection line CL2 and the first data line DL1 may be the same conductive layer, but not This is the limit.

Please refer to FIG. 1 and also refer to FIG. 2. The light-shielding layer BM of the display panel PN of this embodiment is disposed on the opposite substrate OS and is located between the display medium layer DM and the opposite substrate OS for shielding. The adjacent area of the opaque element and the pixel electrode on the active array substrate AS is used to prevent the display panel PN from leaking light at the edge of the pixel electrode and the area where the pixel electrode is not provided to affect the display effect. The adjacent sub-pixel regions are separated, so the light-shielding layer BM shields the first scanning line SL1, the second scanning line SL2, the first data line DL1, the second data line DL2, the first switching element SW1, and the second switch correspondingly. The element SW2, the first connection line CL1, the second connection line CL2, and a region between the first pixel electrode SPE1 and the second pixel electrode SPE2. In a variant embodiment, the light-shielding layer BM may be disposed between the active array substrate AS and the display medium layer DM or in the active array substrate AS.

It can be known from the foregoing that, since the source SW1s of the first switching element SW1 and the source SW2s of the second switching element SW2 are electrically connected to the first data line DL1 at the same time, the first pixel area SP1 and the second pixel There may be no data lines between the areas SP2, thereby reducing the number of data lines required for the electrical connection of the chip providing the signal, and reducing the cost. On the other hand, since the source SW1s of the first switching element SW1 is electrically connected to the first data line DL1 through the second connection line CL2, the source SW2s of the second switching element SW2 sequentially passes through the first connection line CL1, the first The source SW1s and the second connection line CL2 of the switching element SW1 are electrically connected to the first data line DL1. Therefore, the source SW1s of the first switching element SW1 and the source SW2s of the second switching element SW2 share the second connection line CL2. The conductive path, so there is no need to add another connection line that will affect the pixel aperture ratio directly connected between the source SW2s of the second switching element SW2 and the first data line DL1, and there is no need to correspondingly increase the area of the light shielding layer BM In the part of the first connection line CL1, since the first connection line CL1 is disposed between the first pixel electrode SPE1 and the second pixel electrode SPE2, and the first pixel electrode SPE1 and the second pixel electrode SPE2 are originally A light-shielding layer BM must be provided between them to shield light leakage. Therefore, the light-shielding layer BM can simultaneously cover the area between the first connection line CL1 and the first pixel electrode SPE1 and the second pixel electrode SPE2, so no additional correspondence is required. Increase the surface of the light-shielding layer BM In other words, under the above configuration and the source SW1s of the first switching element SW1 is electrically connected to the first data line DL1, the source SW2s of the second switching element SW2 can be located on the first pixel electrode SPE1. And the first connection line CL1 between the second pixel electrode SPE2 and the source SW1s of the first switching element SW1 are connected, so that the source SW2s of the second switching element SW2 is electrically connected to the first data line DL1, thereby enabling the Correspondingly, the area of the light-shielding layer BM is reduced, thereby increasing the pixel aperture ratio.

Please refer to FIG. 3. FIG. 3 is a schematic top view of another part of the active array substrate of the display panel according to the first embodiment of the present invention. The pixel units PU are arranged along the first direction D1 and the second direction D2 to form pixels. Array, and FIG. 3 shows a partial structure of a pixel unit PU with four sub-pixels and adjacent pixel units PU in the second direction D2, that is, the pixel unit PU of this embodiment is Consists of four sub pixels. As shown in FIG. 3, the pixel unit PU of this embodiment may further include a third switching element SW3, a third pixel electrode SPE3, a fourth switching element SW4, a fourth pixel electrode SPE4, a third scanning line SL3, The fourth scan line SL4 and the third connection line CL3. The third switching element SW3 and the third pixel electrode SPE3 are located in the third pixel area SP3, the fourth switching element SW4 and the fourth pixel electrode SPE4 are located in the fourth pixel area SP4, the third pixel area SP3, and The fourth pixel area SP4 is adjacent in the first direction D1, the first pixel area SP1 and the third pixel area SP3 are adjacent in the second direction D2, the second pixel area SP2 and the fourth The sub-pixel region SP4 is adjacent in the second direction D2. The third scan line SL3 and the fourth scan line SL4 extend in the first direction D1 and are arranged side by side in parallel. The second scan line SL2 is located between the first scan line SL1 and the third scan line SL3, and the third scan line SL3 is located in the fourth scan. Between the line SL4 and the second scan line SL2, the first data line DL1 and the second data line DL2 respectively intersect with the third scan line SL3 and the fourth scan line SL4 at the same time without contact. It should be noted that the third pixel region SP3 and the fourth pixel region SP4 are located between the third scanning line SL3 and the fourth scanning line SL4 and between the first data line DL1 and the second data line DL2. The first pixel area SP1, the second pixel area SP2, the third pixel area SP3, and the fourth pixel area SP4 can provide the same or different color displays, respectively. The third switching element SW3 is electrically connected to the third scanning line SL3, the second data line DL2, and the third pixel electrode SPE3. The fourth switching element SW4 is connected to the fourth scanning line SL4, the second data line DL2, and the fourth pixel. The electrode SPE4 is electrically connected. The third switching element SW3 has a gate SW3g, a source SW3s, and a drain SW3d. The gate SW3g of the third switching element SW3 is electrically connected to the third scanning line SL3, and the source of the third switching element SW3. The electrode SW3s is electrically connected to the second data line DL2. The drain SW3d of the third switching element SW3 is electrically connected to the third pixel electrode SPE3. The fourth switching element SW4 has a gate SW4g, a source SW4s, and a drain SW4d. The gate SW4g of the fourth switching element SW4 is electrically connected to the fourth scanning line SL4, the source SW4s of the fourth switching element SW4 is electrically connected to the second data line DL2, and the drain SW4d of the fourth switching element SW4 is electrically connected to the fourth The pixel electrode SPE4 is electrically connected. In this embodiment, the second scanning line SL2 and the third scanning line SL3 are adjacent to each other and are located substantially between the source SW2s of the second switching element SW2 and the source SW3s of the third switching element SW3, that is, In other words, the source SW2s of the second switching element SW2 and the source SW3s of the third switching element SW3 are not substantially located between the second scanning line SL2 and the third scanning line SL3. Furthermore, the pixel unit PU One scanning line SL1 is adjacent to the fourth scanning line SL4 of the pixel unit PU adjacent in the second direction D2, and the fourth scanning line SL4 of the pixel unit PU is adjacent to the pixel unit adjacent to the second direction D2. The first scan line SL1 of the PU. In addition, in this embodiment, the third pixel electrode SPE3 and the fourth pixel electrode SPE4 are electrodes without slits, but are not limited thereto. In a modified embodiment, the third pixel electrode SPE3 and the first pixel electrode The four-pixel electrode SPE4 can be an electrode with a slit. In addition, the materials of the third scanning line SL3 and the fourth scanning line SL4 may include metal or other opaque conductive materials with low resistance to reduce the loss of display information during transmission. The third pixel electrode SPE3 and the fourth image The material of the element electrode SPE4 may include indium tin oxide (ITO), indium zinc oxide (IZO), or other suitable transparent conductive materials. The third switching element SW3 and the fourth switching element SW4 may be thin film transistors (TFT). Or other suitable switching elements.

Similarly, the source SW3s of the third switching element SW3 has a first terminal SW3s1 and a second terminal SW3s2, the source SW4s of the fourth switching element SW4 has a first terminal SW4s1 and a second terminal SW4s2, and the third connection line CL3 is electrically It is connected between the first terminal SW3s1 of the source SW3s of the third switching element SW3 and the second terminal SW4s2 of the source SW4s of the fourth switching element SW4, and the second terminal SW3s2 of the source SW3s of the third switching element SW3. It is not directly connected to the second data line DL2. Because the source SW4s of the fourth switching element SW4 is electrically connected to the second data line DL2, and the second terminal SW3s2 of the source SW3s of the third switching element SW3 is not directly connected to the second data line DL2, The source SW3s of the third switching element SW3 is electrically connected to the second data line DL2. Therefore, the source SW4s of the fourth switching element SW4 and the source SW3s of the third switching element SW3 are electrically connected to each other through the third connection line CL3. The source SW4s of the fourth switching element SW4 and the source SW3s of the third switching element SW3 are electrically connected to the second data line DL2. That is, the source SW3s of the third switching element SW3 must pass through the first The three connection lines CL3 are electrically connected to the second data line DL2. In this embodiment, the first terminal SW3s1 of the source SW3s of the third switching element SW3 and the second terminal SW4s2 of the source SW4s of the fourth switching element SW4 are located at the second terminal SW3s2 of the source SW3s of the third switching element SW3. And the first terminal SW4s1 of the source SW4s of the fourth switching element SW4, but not limited thereto. On the other hand, since the second terminal SW3s2 of the source SW3s of the third switching element SW3 is not directly connected to the second data line DL2, in this embodiment, the second terminal of the source SW3s of the third switching element SW3 SW3s2 can not be directly connected to any wire, but it is not limited to this. In addition, since the third connection line CL3 is electrically connected between the second terminal SW4s2 of the source SW4s of the fourth switching element SW4 and the first terminal SW3s1 of the source SW3s of the third switching element SW3, the third The connection line CL3 is substantially located between the third pixel electrode SPE3 and the fourth pixel electrode SPE4, that is, the second scan line SL2 and the third scan line SL3 are substantially located between the first connection line CL1 and the third connection line. CL3. In addition, the material of the third connection line CL3 may include metal or other opaque conductive materials with low resistance. In this embodiment, the third connection line CL3 and the second data line DL2 may be the same conductive layer, but not This is the limit.

In this embodiment, the pixel unit PU may further include a fourth connection line CL4, and the fourth connection line CL4 is electrically connected between the first terminal SW4s1 of the source SW4s of the fourth switching element SW4 and the second data line DL2. The source SW4s of the fourth switching element SW4 is electrically connected to the second data line DL2 through the fourth connection line CL4, and the source SW3s of the third switching element SW3 is sequentially connected through the third connection line CL3 and the source of the fourth switching element SW4. The electrode SW4s and the fourth connection line CL4 are electrically connected to the second data line DL2. In addition, the first terminal SW4s1 of the source SW4s of the fourth switching element SW4 can be directly connected to the fourth connection line CL4. Therefore, the source SW4s of the fourth switching element SW4 is directly connected to the first terminal SW4s1 through the fourth connection line. CL4 is electrically connected to the second data line DL2. In addition, in this embodiment, the fourth scan line SL4 is substantially located between the fourth connection line CL4 and the third scan line SL3. In other words, the second connection line CL2 of the pixel unit PU The fourth connection line CL4 of the pixel unit PU adjacent to the two directions D2 is disposed adjacent to the first direction D1, and the fourth connection line CL4 of the pixel unit PU is adjacent to the pixel unit adjacent to the second direction D2. The second connection line CL2 of the PU is disposed adjacent to the first direction D1, but is not limited thereto. In a modified embodiment, the fourth connection line CL4 may be located between the third scan line SL3 and the fourth scan line SL4. . In addition, the material of the fourth connection line CL4 may include metal or other opaque conductive materials with low resistance. In this embodiment, the fourth connection line CL4 and the second data line DL2 may be the same conductive layer, but not This is the limit.

Please refer to FIG. 4, which is a schematic top view of another portion of the active array substrate and the light-shielding layer of the display panel according to the first embodiment of the present invention. The area shown in FIG. 4 is the same as that in FIG. As shown in FIG. 4, the light-shielding layer BM of the display panel PN in this embodiment will correspondingly shield the first scanning line SL1, the second scanning line SL2, the third scanning line SL3, the fourth scanning line SL4, and the first data line DL1. , Second data line DL2, first switching element SW1, second switching element SW2, third switching element SW3, fourth switching element SW4, first connecting line CL1, second connecting line CL2, third connecting line CL3, first Four connecting lines CL4, a region between each pixel electrode, and a region between each sub-pixel region. The light-shielding layer BM may include a first light-shielding portion BM1, a second light-shielding portion BM2, a third light-shielding portion BM3, and a fourth light-shielding portion BM4. The first light-shielding portion BM1 shields the second scan line SL2 and the third scan line SL3, and the second The light shielding portion BM2 correspondingly shields the first scanning line SL1, the second connecting line CL2, the fourth scanning line SL4 of the pixel unit PU adjacent in the second direction D2, and the pixel unit PU adjacent to the second direction D2. The fourth connection line CL4, or the fourth scan line SL4, the fourth connection line CL4, the first scan line SL1 of the pixel unit PU adjacent in the second direction D2, and the phase corresponding to the second scan line D2. The second connection line CL2 and the third light-shielding portion BM3 of the adjacent pixel unit PU correspond to the first data line DL1 or the second data line DL2, and the fourth light-shielding portion BM4 corresponds to the first connection line CL1 and the third connection line. CL3, first switching element SW1, second switching element SW2, third switching element SW3, fourth switching element SW4, a region between the first pixel electrode SPE1 and the second pixel electrode SPE2, and a third pixel electrode SPE3 The area between the first pixel electrode SPE4 and the fourth pixel electrode SPE4 is shown in FIG. 1. The second light-shielding portion BM2, the third light-shielding portion BM3, and the fourth light-shielding portion BM4 are shown on different mesh bottoms, but the first light-shielding portion BM1, the second light-shielding portion BM2, the third light-shielding portion BM3, and the fourth light-shielding portion. The part BM4 may be comprised by the same film layer. Since each scanning line, each data line, and each connecting line are disposed at a boundary region of adjacent sub-pixels, each light shielding portion correspondingly shields a boundary region of adjacent sub-pixel regions. For example, in order to make the scan lines parallel to each other and the scan lines and the connection lines are not connected to each other, gaps will be formed between the scan lines and between the scan lines and the connection lines. Therefore, in this implementation, In the example, the first light-shielding portion BM1 correspondingly covers the gap between the second scanning line SL2 and the third scanning line SL3, and the second light-shielding portion BM2 correspondingly covers the first scanning line SL1, the second connection line CL2, and the second The gap between the fourth connection line CL4 of the pixel unit PU adjacent in the direction D2 and the fourth scan line SL4 of the pixel unit PU adjacent in the second direction D2, or correspondingly shield the fourth scan at the same time. The line SL4, the fourth connection line CL4, the second connection line CL2 of the pixel unit PU adjacent in the second direction D2, and the first scan line SL1 of the pixel unit PU adjacent to the second direction D2. To prevent the light from this part from affecting the contrast of the display. In addition, since the first light-shielding portion BM1 only covers two scanning lines and the second light-shielding portion BM2 corresponds to two scanning lines and at least one connecting line, the width of the first light-shielding portion BM1 in the second direction D2 is smaller than the second The width of the light shielding portion BM2 in the second direction D2.

Because the size of the light-shielding layer BM is not only limited by its own process limits, but also limited by the ability to align with opaque components, it must retain a certain degree of alignment tolerance. Therefore, each light-shielding portion of the light-shielding layer BM The width is greater than the width of the corresponding masking structure. For example, if the width of the second scan line SL2 and the third scan line SL3 is 6 micrometers, and the gap between the second scan line SL2 and the third scan line SL3 If it is 6 micrometers, the width of the first light-shielding portion BM1 along the second direction D2 must be greater than 18 micrometers, but not limited thereto. In this embodiment, the width of the first light-shielding portion BM1 in the second direction D2 is about 19 μm to about 34 μm. In a preferred embodiment, the width of the first light-shielding portion BM1 in the second direction D2. It is about 23 microns to about 25 microns, but is not limited thereto.

It can be known from the foregoing that, since the source SW1s of the first switching element SW1 is electrically connected to the first data line DL1 through the second connection line CL2, the source SW2s of the second switching element SW2 sequentially passes through the first connection line CL1, the first The source SW1s of the switching element SW1 and the second connection line CL2 are electrically connected to the first data line DL1. The source SW3s of the third switching element SW3 sequentially passes through the third connection line CL3 and the source SW4s of the fourth switching element SW4. The fourth connection line CL4 is electrically connected to the second data line DL2. The source SW4s of the fourth switching element SW4 is electrically connected to the second data line DL2 through the fourth connection line CL4. Therefore, the source of the first switching element SW1 is The electrode SW1s and the source SW2s of the second switching element SW2 share the conductive path of the second connection line CL2. The source SW3s of the third switching element SW3 and the source SW4s of the fourth switching element SW4 share the conductive path of the fourth connection line CL4. Therefore, it is not necessary to additionally provide a connection line that affects the pixel aperture ratio to be directly connected between the source SW2s of the second switching element SW2 and the first data line DL1 or directly connected to the source SW3s of the third switching element SW3 and Between the second data line DL2 Also to be a corresponding increase in the area of the first light shielding portion BM1. In the part of the first connection line CL1 and the third connection line CL3, since the first connection line CL1 is disposed between the first pixel electrode SPE1 and the second pixel electrode SPE2, the third connection line CL3 is disposed in the third picture. The pixel electrode SPE3 and the fourth pixel electrode SPE4 must be provided between the first pixel electrode SPE1 and the second pixel electrode SPE2 and between the third pixel electrode SPE3 and the fourth pixel electrode SPE4. The four light-shielding portions BM4 shield light leakage. Therefore, the fourth light-shielding portion BM4 of the light-shielding layer BM can correspondingly shield the first connection line CL1, the third connection line CL3, the first pixel electrode SPE1 and the second pixel electrode SPE2 at the same time. And the area between the third pixel electrode SPE3 and the fourth pixel electrode SPE4, so there is no need to correspondingly increase the area of the light shielding layer BM. In other words, in the above configuration and the source SW1s of the first switching element SW1 In a state where the first data line DL1 is electrically connected and the source SW4s of the fourth switching element SW4 is electrically connected to the second data line DL2, the source SW2s of the second switching element SW2 can be located on the first pixel electrode. First connection between SPE1 and second pixel electrode SPE2 The line CL1 is connected to the source SW1s of the first switching element SW1, so that the source SW2s of the second switching element SW2 is electrically connected to the first data line DL1, and the source SW3s of the third switching element SW3 can be located in the third drawing. The third connection line CL3 between the pixel electrode SPE3 and the fourth pixel electrode SPE4 is connected to the source SW4s of the fourth switching element SW4, so that the source SW3s of the third switching element SW3 is electrically connected to the second data line DL2. This can correspondingly reduce the area of the light-shielding layer BM, thereby improving the pixel aperture ratio.

Please refer to FIG. 5. FIG. 5 shows a simulation result of the improvement of the aperture ratio between the display panel of the first embodiment of the present invention and the display panel of the comparative embodiment. The pixel unit of the display panel of the comparative embodiment Each of the switching elements is connected to the data line through different connection lines, so the scanning lines in two adjacent side-by-side lines each have a connection line. As shown in FIG. 5, under the condition that the pixel unit of the comparative embodiment and the pixel unit PU of the first embodiment have the same area and have four sub-pixel regions, when the pixel density of the display panel PN is 141, At an inch per pixel (PPI), the simulation results show that the aperture ratio of the pixel unit of the display panel of the comparative example is about 57.57%, while the aperture ratio of the pixel unit PU of the display panel PN of the first embodiment is about 57.57%. 60.61%. Therefore, the aperture ratio of the pixel unit PU of the first embodiment is about 4.95% compared to the aperture ratio of the pixel unit of the comparative embodiment. It should be noted that the PPI of the present invention can be defined as "the resolution of the diagonal of the display panel divided by the length (inches) of the diagonal of the display panel". If the pixel density of the display panel of the comparative embodiment and the display panel PN of the first embodiment is increased at the same time, the aperture ratio of the pixel unit PU of the first embodiment is compared with the aperture ratio of the pixel unit of the comparative embodiment. The improvement rate can be further improved. For example, when the pixel density of the display panel is 283 PPI, the aperture ratio of the pixel unit PU of the first embodiment can be improved compared to the aperture ratio of the pixel unit of the comparative embodiment. Reached about 23%.

The pixel unit and the display panel of the present invention are not limited to the above embodiments. In the following, the pixel units of other preferred embodiments of the present invention will be introduced in order. In order to facilitate the comparison of the differences between the embodiments and simplify the description, the same symbols are used to mark the same elements in the following embodiments, and The differences between the embodiments are mainly described, and the repeated parts are not described again.

Please refer to FIG. 6, which is a schematic top view of a portion of an active array substrate of a display panel according to a second embodiment of the present invention, in which the pixel unit PU 'forms a pixel array along a first direction D1 and a second direction D2. FIG. 6 illustrates a partial structure of a pixel unit PU ′ having four sub-pixels and a pixel unit PU ′ adjacent to each other in the second direction D2, that is, the pixel unit PU ′ of this embodiment. The system consists of four sub-pixels. As shown in FIG. 6, the first embodiment is different from the first embodiment in that the first terminal SW4s1 of the source SW4s of the fourth switching element SW4 of the pixel unit PU 'of the display panel of the display panel is not connected to the second data line DL2. It is directly connected, and the second terminal SW3s2 of the source SW3s of the third switching element SW3 is not limited. Since the source SW3s of the third switching element SW3 is electrically connected to the second data line DL2, and the first end SW4s1 of the source SW4s of the fourth switching element SW4 is not directly connected to the second data line DL2, The source SW4s of the fourth switching element SW4 is electrically connected to the second data line DL2. Therefore, the source SW3s of the third switching element SW3 and the source SW4s of the fourth switching element SW4 are electrically connected to each other through the third connection line CL3. The source SW3s of the third switching element SW3 and the source SW4s of the fourth switching element SW4 are electrically connected to the second data line DL2. That is, the source SW4s of the fourth switching element SW4 must pass through the first The three connection lines CL3 are electrically connected to the second data line DL2. On the other hand, since the first terminal SW4s1 of the source SW4s of the fourth switching element SW4 is not directly connected to the second data line DL2, in this embodiment, the first terminal of the source SW4s of the fourth switching element SW4 SW4s1 can not be directly connected to any wire, but it is not limited to this.

Similarly, in this embodiment, the pixel unit PU ′ may further include a fourth connection line CL4, and is electrically connected between the second terminal SW3s2 of the source SW3s of the third switching element SW3 and the second data line DL2. The source SW3s of the third switching element SW3 is electrically connected to the second data line DL2 through the fourth connection line CL4, and the source SW4s of the fourth switching element SW4 is sequentially connected through the third connection line CL3 and the source of the third switching element SW3. The pole SW3s and the fourth connection line CL4 are electrically connected to the second data line DL2. In addition, the second terminal SW3s2 of the source SW3s of the third switching element SW3 can be directly connected to the fourth connection line CL4. Therefore, the source SW3s of the third switching element SW3 can be directly connected to the second terminal SW3s2 through the fourth connection line. CL4 is electrically connected to the second data line DL2. In addition, in this embodiment, the fourth connection line CL4 is substantially located between the second scan line SL2 and the third scan line SL3. Therefore, the second connection line CL2 of the pixel unit PU 'is connected to the fourth The line CL4 is misaligned in the first direction D1 and the second direction D2, but is not limited thereto. In a modified embodiment, the fourth connection line CL4 may be located between the third scan line SL3 and the fourth scan line SL4.

Please refer to FIG. 7, which is a schematic top view of an active array substrate and a light-shielding layer of a display panel according to a second embodiment of the present invention. The area shown in FIG. 7 is the same as that in FIG. 6. As shown in FIG. 7, the difference between the light-shielding layer BM in this embodiment and the first embodiment is that the first light-shielding portion BM1 shields the second scan line SL2, the third scan line SL3, and the fourth connection line CL4, and the second light-shield The part BM2 corresponds to the fourth scan line SL1 that shields the first scan line SL1, the second connection line CL2, and the pixel unit PU 'adjacent in the second direction D2, or correspondingly shields the fourth scan line SL4. The second connection line CL2 of the pixel unit PU 'adjacent to the direction D2 and the first scan line SL1 of the pixel unit PU' adjacent to the second direction D2. It should be noted that in FIG. 7, Although the first light-shielding portion BM1, the second light-shielding portion BM2, the third light-shielding portion BM3, and the fourth light-shielding portion BM4 are shown on different mesh bottoms, the first light-shielding portion BM1, the second light-shielding portion BM2, and the third light-shielding portion The BM3 and the fourth light-shielding portion BM4 may be formed of the same film layer. In addition, in this embodiment, the first light-shielding portion BM1 correspondingly shields the gap between the second scanning line SL2, the third scanning line SL3, and the fourth connecting line CL4, and the second light-shielding portion BM2 corresponds to shielding. The gap between the first scan line SL1, the second connection line CL2, and the fourth scan line SL4 of the pixel unit PU ′ adjacent in the second direction D2, or correspondingly shield the fourth scan line SL4 at the same time. A gap between the second connection line CL2 of the adjacent pixel unit PU 'in the second direction D2 and the first scan line SL1 of the adjacent pixel unit PU' in the second direction D2 to avoid this part The light affects the contrast of the display.

In addition, it is further explained that the first light-shielding portion BM1 has a first narrow portion BM1a and a first wide portion BM1b, and the second light-shielding portion BM2 has a second narrow portion BM2a and a second wide portion BM2b. A narrow portion BM1a correspondingly shields the second scanning line SL2 and the third scanning line SL3, and a first wide portion BM1b of the first light shielding portion BM1 corresponds to shielding the second scanning line SL2, the third scanning line SL3, and the fourth connecting line CL4. The second narrow portion BM2a of the two light-shielding portions BM2 corresponds to the first scanning line SL1 and the fourth scanning line SL4 of the pixel unit PU ′ adjacent in the second direction D2, or the fourth scanning line SL4 and the fourth scanning line SL4. The first scanning line SL1 of the adjacent pixel unit PU 'in the second direction D2, and the second wide portion BM2b of the second light-shielding portion BM2 respectively shield the first scanning line SL1, the second connection line CL2, and the second direction D2. The fourth scan line SL4 of the adjacent pixel unit PU 'on the top, or the first scan line SL1 corresponding to the fourth scan line SL4, the adjacent pixel unit PU' in the second direction D2, and the second scan line SL1. The second connection line CL2 of the adjacent pixel unit PU 'in the direction D2, therefore, the first narrow portion BM1 a The width in the second direction D2 is smaller than the width of the first wide portion BM1b in the second direction D2, and the width of the second narrow portion BM2a in the second direction D2 is smaller than the width of the second wide portion BM2b in the second direction D2. In this embodiment, the width of the first narrow portion BM1a in the second direction D2 is approximately equal to the width of the second narrow portion BM2a in the second direction D2, and the width of the first wide portion BM1b in the second direction D2 The width is approximately equal to the width of the second wide portion BM2b in the second direction D2, but is not limited thereto. In addition, in this embodiment, a width range of the first narrow portion BM1a of the first light-shielding portion BM1 in the second direction D2 and a width range of the second narrow portion BM2a of the second light-shielding portion BM2 in the second direction D2 are About 19 micrometers to about 34 micrometers. In a preferred embodiment, a width range of the first narrow portion BM1a of the first light shielding portion BM1 along the second direction D2 and a second narrow portion BM2a of the second light shielding portion BM2 along the second The width in the direction D2 ranges from about 23 microns to about 25 microns, but is not limited thereto.

It is worth mentioning that, in this embodiment, since the second connection line CL2 and the fourth connection line CL4 of the pixel unit PU ′ are misaligned in the second direction D2, the first light shielding in the second direction D2 The first narrow portion BM1a of the portion BM1 and the second wide portion BM2b of the second light-shielding portion BM2 are alternately arranged with each other, and the first wide portion BM1b of the first light-shielding portion BM1 and the second narrow portion BM2a of the second light-shielding portion BM2 are alternately arranged This setting makes it easier for the user to perceive the change in the width of the light-shielding layer BM when viewing the display panel of this embodiment compared to the first embodiment, thereby providing a better display effect, especially at high pixel density. In the display panel, for example, a display panel having a pixel density higher than 200 PPI is not limited thereto. Therefore, the display panel of this embodiment can not only reduce the effect of the area of the light-shielding layer BM, but also improve the pixel aperture ratio, and also improve the display effect of the display screen.

In summary, under the condition that the pixel unit of the present invention is electrically connected to the source of one switching element and the corresponding data line, the source of the other switching element can be connected by two pixel electrodes. The wire is connected to the source of a switching element that is electrically connected to its corresponding data line, so that the source of this switching element can be electrically connected to its corresponding data line without the need to additionally provide a connection line that will affect the pixel aperture ratio. The connection can reduce the required area of the light-shielding layer, thereby improving the pixel aperture ratio. The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the scope of patent application of the present invention shall fall within the scope of the present invention.

AS‧‧‧ Active Array Substrate
BM‧‧‧Light-shielding layer
BM1‧‧‧First shade
BM1a‧‧‧First narrow part
BM1b‧‧‧First wide section
BM2‧‧‧Second shade section
BM2a‧‧‧Second Narrow Part
BM2b‧‧‧Second Wide Section
BM3‧‧‧The third shade
BM4‧‧‧Fourth Shading Unit
CL1‧‧‧The first connection line
CL2‧‧‧Second connection cable
CL3‧‧‧Third connection cable
CL4‧‧‧Fourth connecting cable
D1‧‧‧ first direction
D2‧‧‧ Second direction
DL1‧‧‧The first data line
DL2‧‧‧Second Data Line
DM‧‧‧Display Media Layer
OS‧‧‧ Opposite substrate
PN‧‧‧Display Panel
PU, PU'‧‧‧ pixel units
SL1‧‧‧first scan line
SL2‧‧‧Second scan line
SL3‧‧‧third scan line
SL4‧‧‧ Fourth scan line
SP1‧‧‧The first pixel area
SP2‧‧‧Second Pixel Area
SP3 ‧‧‧ the third pixel area
SP4‧‧‧The fourth pixel area
SPE1‧‧‧The first pixel electrode
SPE2‧‧‧Second Pixel Electrode
SPE3‧‧‧third pixel electrode
SPE4‧‧‧Fourth pixel electrode
SW1‧‧‧The first switching element
SW2‧‧‧Second switching element
SW3‧‧‧The third switching element
SW4‧‧‧Fourth switching element
SW1s, SW2s, SW3s, SW4s‧‧‧Source
SW1g, SW2g, SW3g, SW4g‧‧‧ Gate
SW1d, SW2d, SW3d, SW4d‧‧‧ Drain
SW1s1, SW2s1, SW3s1, SW4s1‧‧‧ the first end
SW1s2, SW2s2, SW3s2, SW4s2‧‧‧Second end

FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention. FIG. 2 is a schematic top view of a portion of an active array substrate of a display panel according to a first embodiment of the present invention. FIG. 3 is a schematic top view of another part of the active array substrate of the display panel according to the first embodiment of the present invention. FIG. 4 is a schematic top view of the active array substrate and another part of the light shielding layer of the display panel according to the first embodiment of the present invention. FIG. 5 shows the simulation results of the improvement of the aperture ratio of the display panel of the first embodiment of the present invention and the display panel of the comparative embodiment. FIG. 6 is a schematic top view of a portion of an active array substrate of a display panel according to a second embodiment of the present invention. FIG. 7 is a schematic top view of an active array substrate and a light shielding layer of a display panel according to a second embodiment of the present invention.

AS‧‧‧ Active Array Substrate

CL1‧‧‧The first connection line

CL2‧‧‧Second connection cable

CL3‧‧‧Third connection cable

CL4‧‧‧Fourth connecting cable

D1‧‧‧ first direction

D2‧‧‧ Second direction

DL1‧‧‧The first data line

DL2‧‧‧Second Data Line

PU‧‧‧ Pixel Unit

SL1‧‧‧first scan line

SL2‧‧‧Second scan line

SL3‧‧‧third scan line

SL4‧‧‧ Fourth scan line

SP1‧‧‧The first pixel area

SP2‧‧‧Second Pixel Area

SP3 ‧‧‧ the third pixel area

SP4‧‧‧The fourth pixel area

SPE1‧‧‧The first pixel electrode

SPE2‧‧‧Second Pixel Electrode

SPE3‧‧‧third pixel electrode

SPE4‧‧‧Fourth pixel electrode

SW1‧‧‧The first switching element

SW2‧‧‧Second switching element

SW3‧‧‧The third switching element

SW4‧‧‧Fourth switching element

SW1s, SW2s, SW3s, SW4s‧‧‧Source

SW1g, SW2g, SW3g, SW4g‧‧‧Gate

SW1d, SW2d, SW3d, SW4d‧‧‧ Drain

SW1s1, SW2s1, SW3s1, SW4s1‧‧‧ the first end

SW1s2, SW2s2, SW3s2, SW4s2‧‧‧Second end

Claims (18)

A pixel unit includes: a first scanning line and a second scanning line; a first data line; a first switching element electrically connected to the first scanning line and the first data line, wherein the A source of a first switching element has a first end and a second end; a second switching element is electrically connected to the second scanning line and the first data line, and a source of the second switching element The electrode has a first end and a second end, and the second end of the source of the second switching element is not directly connected to the first data line; a first pixel electrode is connected to the first switching element An electrical connection; a second pixel electrode electrically connected to the second switching element; and a first connection line electrically connected to the second end of the source of the first switching element and the second Between the first end of the source of the switching element, and the first connection line is substantially between the first pixel electrode and the second pixel electrode. The pixel unit according to claim 1, wherein the second end of the source of the second switching element is not directly connected to any wire. The pixel unit according to claim 1, further comprising a second connection line electrically connected between the first end of the source of the first switching element and the first data line. The pixel unit according to claim 3, wherein the first end of the source of the first switching element is directly connected to the second connection line. The pixel unit according to claim 1, further comprising: a third scan line and a fourth scan line, the second scan line is located between the first scan line and the third scan line, and the first Three scanning lines are located between the fourth scanning line and the second scanning line; a second data line, the first pixel electrode and the second pixel electrode are substantially located between the first data line and the second data A third switching element electrically connected to the third scanning line and the second data line, wherein a source of the third switching element has a first end and a second end, and the first The second end of the source of the three switching elements is not directly connected to the second data line; a fourth switching element is electrically connected to the fourth scanning line and the second data line, wherein the fourth switching element A source electrode has a first end and a second end; a third pixel electrode is electrically connected to the third switching element; a fourth pixel electrode is electrically connected to the fourth switching element; and A third connecting wire electrically connected to the source of the third switching element And the source end of the fourth switching element between the extreme end of the second, and the third connecting line is substantially located between the third pixel electrode and the fourth pixel electrode. The pixel unit according to claim 5, wherein the second end of the source of the third switching element is not directly connected to any wire. The pixel unit according to claim 5, further comprising: a second connection line electrically connected between the first end of the source of the first switching element and the first data line; and a first Four connecting lines are electrically connected between the first end of the source of the fourth switching element and the second data line. The pixel unit according to claim 7, wherein the first scan line is substantially located between the second connection line and the second scan line, and the fourth scan line is substantially located between the fourth connection line and the Between the third scan lines. The pixel unit according to claim 5, wherein the second scan line and the third scan line are adjacent to each other and are substantially located between the first connection line and the third connection line. The pixel unit according to claim 5, wherein the second scanning line and the third scanning line are adjacent to each other and are substantially located at the source of the second switching element and the source of the third switching element Between poles. The pixel unit according to claim 5, wherein the source of the second switching element and the source of the third switching element are substantially not located between the second scan line and the third scan line. The pixel unit according to claim 1, further comprising: a third scan line and a fourth scan line, the second scan line is located between the first scan line and the third scan line, and the first Three scanning lines are located between the fourth scanning line and the second scanning line; a second data line, the first pixel electrode and the second pixel electrode are substantially located between the first data line and the second data Between the lines; a third switching element electrically connected to the third scanning line and the second data line, wherein a source of the third switching element has a first end and a second end; a fourth The switching element is electrically connected to the fourth scanning line and the second data line, wherein a source of the fourth switching element has a first end and a second end, and the source of the fourth switching element The first end is not directly connected to the second data line; a third pixel electrode is electrically connected to the third switching element; a fourth pixel electrode is electrically connected to the fourth switching element; and A third connecting wire electrically connected to the source of the third switching element And the source end of the fourth switching element between the extreme end of the second, and the third connecting line is substantially located between the third pixel electrode and the fourth pixel electrode. The pixel unit according to claim 12, wherein the first end of the source of the fourth switching element is not directly connected to any wire. The pixel unit according to claim 12, further comprising: a second connecting line electrically connected between the first end of the source of the first switching element and the first data line; and a first Four connecting lines are electrically connected between the second end of the source of the third switching element and the second data line. The pixel unit according to claim 14, wherein the fourth connecting line is located between the second scanning line and the third scanning line. The pixel unit according to claim 14, wherein the second scanning line is located between the second connecting line and the third scanning line. A display panel includes: an active array substrate including a plurality of pixel units as described in claim 1; and a light shielding layer corresponding to the first scan lines and the second scan lines. The display panel according to claim 17, wherein each of the pixel units further includes: a third scanning line and a fourth scanning line, and the second scanning line is located between the first scanning line and the third scanning line. And the third scan line is located between the fourth scan line and the second scan line; a second data line, the first pixel electrode and the second pixel electrode are substantially located on the first data line And the second data line; a third switching element electrically connected to the third scanning line and the second data line, wherein a source of one of the third switching elements has a first end and a second And the second end of the source of the third switching element is not directly connected to the second data line; a fourth switching element is electrically connected to the fourth scanning line and the second data line, wherein A source of the fourth switching element has a first end and a second end; a third pixel electrode is electrically connected to the third switching element; a fourth pixel electrode is connected to the fourth switching element Electrical connection; and a third connection line, electrically connected to the third switch Between the first end of the source and the second end of the source of the fourth switching element, and the third connection line is substantially located between the third pixel electrode and the fourth pixel electrode One of the gaps is formed between the second scanning line and the third scanning line. The light-shielding layer is further disposed corresponding to the third scanning lines and the fourth scanning lines. The light-shielding layer has a light-shielding portion. The second scan line, the third scan line, and the gap substantially shield one of the pixel units, and the width of the light shielding portion ranges from about 19 micrometers to about 34 micrometers.