TW201727702A - Semiconductor light emitting device and method of fabricating the same - Google Patents

Abstract

A method of fabricating a semiconductor light emitting device is disclosed. The method includes providing a first substrate, providing a semiconductor epitaxial stack, providing an adhesive layer adhering the semiconductor epitaxial stack to the first substrate, patterning the semiconductor epitaxial stack to be a plurality of epitaxial units and separating the epitaxial units from the first substrate. Wherein the epitaxial units include a plurality of first epitaxial units, and each of the first epitaxial units includes a first geometric shape and a first area. Wherein the epitaxial units include a plurality of second epitaxial units, and each of the second epitaxial units includes a second geometric shape and a second area. Providing a second substrate with a surface, transferring the second epitaxial units to the surface of the second substrate, dividing the first substrate to form a plurality of first semiconductor optoelectronic devices wherein each of the first semiconductor optoelectronic devices includes one first epitaxial unit, and dividing the second substrate to form a plurality of second semiconductor optoelectronic devices wherein each of the second semiconductor optoelectronic devices includes one second epitaxial unit, wherein the first geometric shape is different from the second geometric shape or the first area is different from the second area.

Description

Semiconductor light emitting element and manufacturing method thereof

The present invention relates to a method of fabricating a semiconductor light emitting device, and more particularly to a method of fabricating a semiconductor light emitting device in which two different semiconductor epitaxial stacks are formed on a single substrate.

With the rapid development of technology, semiconductor light-emitting components have greatly contributed to the transmission of information and the conversion of energy. Taking the use of the system as an example, such as optical fiber communication, optical storage, and military systems, semiconductor light-emitting elements can be used. Differentiated by the way energy is converted, semiconductor light-emitting elements can be generally classified into three types: radiation that converts electrical energy into light, such as light-emitting diodes and laser diodes; and signals that convert light into electrical signals, such as light. Detector; converts the radiant energy of light into electrical energy, such as a solar cell.

Among semiconductor light-emitting elements, the growth substrate plays a very important role. The semiconductor epitaxial structure necessary for forming the semiconductor light-emitting device is grown on the substrate and supported by the substrate. Therefore, selecting a suitable growth substrate is often an important factor in determining the quality of component growth in a semiconductor light-emitting device.

However, sometimes a good component growth substrate is not necessarily a good component carrier substrate. Taking a light-emitting diode as an example, in a conventional red light device process, in order to improve the growth quality of the device, a gallium arsenide (GaAs) substrate having a lattice constant close to the semiconductor epitaxial structure but opaque is selected as a growth substrate. . However, for a light-emitting diode element that operates for illumination, an opaque growth substrate causes a decrease in luminous efficiency of the element during operation.

In order to meet the requirements of different requirements of the semiconductor light-emitting device for the growth substrate and the carrier substrate, the transfer technology of the substrate is thus generated. That is, the semiconductor epitaxial structure is grown on the growth substrate, and the grown semiconductor epitaxial structure is transferred to the carrier substrate to facilitate subsequent component operations. After the semiconductor epitaxial structure is combined with the carrier substrate, the removal of the original growth substrate becomes one of the keys to the transfer technology.

The removal method of the growth substrate mainly includes etching and dissolving the original growth substrate by etching, physically cutting and grinding, or forming a sacrificial layer between the growth substrate and the semiconductor epitaxial structure in advance, and removing the sacrificial layer by etching. The method is to separate the growth substrate from the semiconductor. However, whether the substrate is dissolved by the etching solution or the substrate is physically removed, it is a kind of damage to the original grown substrate. The growth of the substrate can not be reused, and the modernization of environmental protection and energy conservation is undoubtedly a waste of materials. However, if the separation is performed using a sacrificial layer structure, how to efficiently and selectively transfer semiconductor light-emitting elements is one of the current research directions.

The invention provides a method for fabricating a semiconductor light emitting device, comprising providing a first substrate, providing a semiconductor epitaxial layer, providing a first adhesive layer to connect the first substrate and the semiconductor epitaxial layer, and patterning the semiconductor epitaxial layer. And a plurality of epitaxial cells comprising a plurality of first epitaxial cells, wherein each of the first epitaxial cells has a first geometric shape and a first area, a plurality a second epitaxial unit, wherein each second epitaxial unit has a second geometry and a second area, and provides a second substrate having a surface for transferring the plurality of second epitaxial units to the surface of the second substrate And etching the first substrate to form a plurality of first semiconductor light emitting elements, wherein each of the first semiconductor light emitting elements comprises at least one first epitaxial unit, and the second substrate is cut to form a plurality of second semiconductor light emitting elements, wherein each The second semiconductor light emitting element includes at least one second epitaxial unit, wherein the first geometric shape is different from the second geometric shape or the first area is Two areas are not the same.

The present invention further provides a semiconductor light emitting device comprising a substrate, a semiconductor epitaxial layer on the substrate, and a portion of the substrate not covered by the semiconductor epitaxial layer, substantially separated by a semiconductor epitaxial layer. A plurality of regions and a first electrode are electrically connected to the semiconductor epitaxial stack.

Embodiments of the invention are described below in conjunction with the drawings. First, FIGS. 1A to 1H show a method of fabricating a semiconductor light emitting element according to an embodiment of the present invention.

First, referring to FIG. 1A, a semiconductor epitaxial layer 110 such as an n-type semiconductor layer 112, an active layer 114, and a p-type semiconductor layer 116 is sequentially formed on a growth substrate 10 by a conventional epitaxial growth process. In the present embodiment, the material of the growth substrate 10 is gallium arsenide (GaAs). Of course, in addition to the gallium arsenide (GaAs) substrate, the material of the growth substrate 10 may include, but is not limited to, germanium (Ge), indium phosphide (InP), sapphire (Al ₂ O ₃ ). , silicon carbide (SiC), silicon (silicon), lithium aluminum oxide (LiAlO ₂ ), zinc oxide (ZnO), gallium nitride (GaN), nitriding Aluminum nitride (AlN). In the present embodiment, the material of the n-type semiconductor layer 112 is, for example, aluminum gallium indium phosphide (AlGaInP), and the material of the n-type semiconductor layer 112 may be not limited thereto except for aluminum gallium indium phosphide; the p-type semiconductor layer 116 The material is, for example, gallium phosphide (GaP). The material of the p-type semiconductor layer 116 is not limited thereto except for gallium phosphide; the material commonly used for the active layer 114 is aluminum gallium indium phosphide (AlGaInP) series. Aluminium gallium indium nitride (AlGaInN) series, zinc oxide (ZnO), the structure of which can be single heterostructure (SH), double heterostructure (DH), double Double-side double heterostructure (DDH), multi-quantum well (MWQ). In particular, the active layer 114 can be a neutral, p-type or n-type semiconductor. When a current is applied through the semiconductor epitaxial stack 110, the active layer 114 will illuminate. When the active layer 114 is made of an aluminum indium gallium phosphide (AlGaInP)-based material, red, orange, and yellow amber light is emitted; when an aluminum gallium indium nitride (AlGaInN) based material is used, Blue or green light. In addition, the semiconductor epitaxial stack 110 may further comprise other semiconductor layers according to different functions.

Next, referring to FIG. 1B, the patterned p-type electrode 120a is formed on the p-type semiconductor layer 116 by sputtering, thermal deposition, or electroplating by a yellow light lithography process. 120b. The material of the p-type electrodes 120a and 120b is preferably, for example, a metal such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), or nickel ( Ni), titanium (Ti), tin (Sn), etc., alloys thereof or a combination thereof. After the p-type electrodes 120a and 120b are formed, a first carrier substrate 20 is prepared, and a first adhesive layer 135 is formed on the first carrier substrate 20 by spin coating or deposition, and the first adhesive layer is transmitted through the first adhesive layer. 135 adheres the semiconductor epitaxial stack 110 to the first carrier substrate 20. Then, the growth substrate 10 is removed by wet etching or laser lift-off. The first carrier substrate 20 is not limited to a single material, and may be a composite substrate in which different materials are combined. For example, the first carrier substrate 20 may include two first substrates and a second substrate (not shown) that are bonded to each other. In this embodiment, the material of the first carrier substrate 20 is sapphire (Al ₂ O ₃ ). However, the material of the first carrier substrate 20 may also include, but is not limited to, lithium aluminum oxide (LiAlO ₂ ), zinc oxide (ZnO), gallium nitride (GaP), glass (Glass). , organic polymer sheet, aluminum nitride (AlN). After the semiconductor epitaxial layer stack 110 is transferred to the first carrier substrate 20, a transfer structure as shown in FIG. 1C is formed. Wherein, as shown in FIG. 1C, in order to increase the light-emitting efficiency of the semiconductor light-emitting device formed through the semiconductor epitaxial layer 110, the surface of the p-type semiconductor layer 116 may be, for example, dry etched or wet etched as needed. Perform coarsening.

After the semiconductor epitaxial layer 110 is transferred to the first carrier substrate 20, similarly, the surface of the exposed n-type semiconductor layer 112 may be subjected to a yellow lithography process such as sputtering, thermal deposition, or plating. The patterned n-type electrodes 130a and 130b are formed by electroplating or the like as shown in FIG. 1D. The material of the n-type electrodes 130a and 130b is preferably, for example, a metal such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), or nickel ( Ni), titanium (Ti), tin (Sn), etc., alloys thereof or a combination thereof.

As shown in FIG. 1E, the subsequent processing steps of the surfaces of the n-type electrodes 130a and 130b may be the same or different for the subsequent fabrication of different semiconductor light-emitting elements. In the present embodiment, the metal oxide transparent conductive layer 140 is deposited by a technique such as chemical vapor deposition (CVD) or physical vapor deposition (PVD) at a position on the surface of the semiconductor epitaxial layer 110. Next, a reflective layer 150 is formed on a portion of the surface of the metal oxide transparent conductive layer 140. The material of the metal oxide transparent conductive layer 140 is, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), tin oxide fluoride (FTO), antimony tin oxide. (ATO), cadmium tin oxide (CTO), zinc aluminum oxide (AZO), cadmium-doped zinc oxide (GZO) or the like or a combination thereof; the material of the reflective layer 150 is, for example, a metal, including gold (Au), silver (Ag) ), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), bismuth (Be), etc., alloys or laminate combinations thereof Or a distributed Bragg Reflector comprising a stack of compounds selected from the group consisting of alumina (Al ₂ O ₃ ), cerium oxide (SiO ₂ ), titanium dioxide (TiO ₂ ), and aluminum nitride (AlN) Layer combination. Next, the excess metal oxide transparent conductive layer 140 is removed, and the metal oxide transparent conductive layer 140 is coated with the n-type electrode 130a.

In order to achieve the effect of the complete electrical separation of the semiconductor stack, in the embodiment, the first epitaxial unit 201 and the second epitaxial unit 202 are self-contained by the dry etching method before transferring the semiconductor epitaxial stack. The substrates 20 are completely separated from each other, and their side views are as shown in Fig. 1F.

Specifically, the patterned photoresist layer is transparently etched by, for example, reactive ion etching (RIE), inductively coupled plasma (ICP), or plasma etching (PE). (not shown) The semiconductor epitaxial stack 110 is separated from the n-type semiconductor layer 112 into two different first epitaxial cells and a second epitaxial cell in a direction perpendicular to the surface direction of the first carrier substrate 20. In this embodiment, the first carrier substrate 20 includes two first epitaxial cells 201 and a second epitaxial cell 202 of different surface areas and geometries, wherein the first epitaxial cell 201 has a p-type as shown in FIG. 1G. The electrode 120a and the n-type electrode 130a, and the second epitaxial unit 202 have a p-type electrode 120b and an n-type electrode 130b as shown in FIG. 1H.

Further, from the top view shown in FIG. 7, the second epitaxial unit 202 substantially surrounds the first epitaxial unit 201. Further, as shown in FIG. 1F, in order to increase the light-emitting efficiency of the semiconductor light-emitting device, the surface of the portion of the n-type semiconductor layer 112 of the first epitaxial unit 201 and/or the second epitaxial unit 202 may be utilized, for example, as needed. Roughening is performed by etching or wet etching; subsequently, through the mask pattern (for example, patterned photoresist, not shown), the second transfer portion corresponding to the future is required on the first carrier substrate 20, that is, the phase The surface of the n-type semiconductor layer 112 corresponding to the position of the second epitaxial unit 202 is patterned to form a patterned second adhesive layer 230 in a spin coating or deposition manner.

The second carrier substrate 30 is prepared. The second epitaxial unit 202 is adhered to the second carrier substrate 30 by patterning the second adhesive layer 230 in a heated and/or pressurized manner. Then, after the laser light is irradiated from the first carrier substrate 20 to dissolve and dissolve the first adhesive layer 135 existing between the first carrier substrate 20 and the p-type semiconductor layer 116, the portion of the second epitaxial unit 202 is transferred to The second carrier substrate 30 is on. After the second epitaxial unit 202 is adhered to the second carrier substrate 30, the first adhesive layer 135 remaining on the surface of the second epitaxial unit 202 on the second carrier substrate 30 is removed by dry etching or wet etching. 1G and 1H are shown to form the first carrier substrate 20 and the first epitaxial unit 201 and the second carrier substrate 30 and the second epitaxial unit 202 (the upper views thereof are as shown in FIGS. 3A and 4A, respectively) Show). In the present embodiment, as shown in the upper view of FIG. 4A, the second epitaxial cells 202 are arranged in a U-shape. The first carrier substrate 20 and the first epitaxial unit 201 will be further formed with the semiconductor light emitting device 200, and the second carrier substrate 30 and the second epitaxial unit 202 will be further formed with the semiconductor light emitting device 300 (the upper view thereof) These are shown in Figures 3C and 4C, respectively.

In the present embodiment, as described above, the manner in which the second epitaxial unit 202 and the first carrier substrate 20 are separated is, for example, a manner in which the first adhesive layer 135 is dissolved by laser irradiation. In addition to this, a material having a lower adhesion to the first carrier substrate 20 may be selectively used as the first adhesive layer 135 (for example, cerium oxide (SiO ₂ )). Subsequently, the patterned second adhesive layer 230 is disposed through the surface portion of the second epitaxial unit 202 to be subjected to the second transfer, and the second epitaxial unit 202 is selectively adhered to the surface of the second carrier substrate 30. The second epitaxial unit 202 can be separated from the first carrier substrate 20 by physical mechanical force.

Next, FIGS. 2A to 2H are views showing a method of fabricating a semiconductor light emitting element according to another embodiment of the present invention.

First, referring to FIG. 2A, a semiconductor epitaxial laminate 2110 such as an n-type semiconductor layer 2112, an active layer 2114, and a p-type semiconductor layer 2116 is sequentially formed on a growth substrate 210 by a conventional epitaxial growth process. In the present embodiment, the material of the growth substrate 210 is gallium arsenide (GaAs). In addition to the gallium arsenide (GaAs) substrate, the material of the growth substrate 210 may include, but is not limited to, germanium (Ge), indium phosphide (InP), sapphire (Al2O3), silicon carbide (silicon). Carbide, SiC), silicon (Si), lithium aluminum oxide (LiAlO2), zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN) ). In this embodiment, the material of the n-type semiconductor layer 2112 is, for example, aluminum gallium indium phosphide (AlGaInP), and the material of the n-type semiconductor layer 2112 may be not limited thereto except for aluminum gallium indium phosphide; the p-type semiconductor layer 2116 The material is, for example, gallium phosphide (GaP). The material of the p-type semiconductor layer 2116 is not limited thereto except for gallium phosphide; the material commonly used for the active layer 2114 is aluminum gallium indium phosphide (AlGaInP). Series, aluminum gallium indium nitride (AlGaInN) series, zinc oxide (ZnO), the structure can be single heterostructure (SH), double heterostructure (DH) , double-side double heterostructure (DDH), multi-quantum well (MWQ). In particular, the active layer 2114 can be a neutral, p-type or n-type semiconductor. When an electric current is applied through the semiconductor epitaxial laminate 2110, the active layer 2114 emits light. When the active layer 2114 is made of an aluminum indium gallium phosphide (AlGaInP)-based material, red, orange, and yellow amber light is emitted; when an aluminum gallium indium nitride (AlGaInN) based material is used, Blue or green light. . In addition, the semiconductor epitaxial laminate 2110 may further comprise other semiconductor layers according to different functions.

Next, referring to FIG. 2B, the patterned p-type electrode 2120a is formed on the p-type semiconductor layer 2116 by sputtering, thermal deposition, or electroplating by a yellow lithography process technique. 2120b. The material of the p-type electrodes 2120a and 2120b is preferably, for example, a metal such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), or nickel ( Ni), titanium (Ti), tin (Sn), etc., alloys thereof or a combination thereof.

After the p-type electrodes 2120a and 2120b are formed, as shown in FIG. 2C, a first carrier substrate 220 is prepared, and a patterned sacrificial layer 2123 is formed on the surface of the first carrier substrate 220 by a yellow lithography process. The position at which the patterned sacrificial layer 2123 is disposed corresponds to the position of the second epitaxial unit to be further transferred in the future. Next, a first adhesive layer 2135 is formed by spin coating or deposition. The semiconductor epitaxial laminate 2110 is adhered to the first carrier substrate 220 through the first adhesive layer 2135. The process step may be that the first adhesive layer 2135 is coated on the surface of the first carrier substrate 220 and covers the upper surface of the patterned sacrificial layer 2123, or the first adhesive layer 2135 may be coated on the p-type semiconductor. The surface of layer 2116 covers the upper surface of p-type electrodes 2120a and 2120b. The semiconductor epitaxial laminate 2110 and the first carrier substrate 220 are bonded to each other by heating and/or pressurization. Finally, the growth substrate 210 is removed by wet etching or laser lift-off to form a semi-finished structure as shown in FIG. 2C.

The first carrier substrate 220 is not limited to a single material, and may be a composite substrate composed of different materials. For example, the first carrier substrate 220 may include two first substrates and a second substrate (not shown) that are bonded to each other. In this embodiment, the material of the first carrier substrate 220 is sapphire (Al ₂ O ₃ ). However, the material of the first carrier substrate 220 may also include, but is not limited to, lithium aluminum oxide (LiAlO ₂ ), zinc oxide (ZnO), gallium nitride (GaP), glass (Glass). , organic polymer sheet, aluminum nitride (AlN). As shown in FIG. 2C, in order to increase the light-emitting efficiency of the semiconductor light-emitting element subsequently formed through the semiconductor epitaxial layer 2110, the surface of the p-type semiconductor layer 2116 may be roughened by, for example, dry etching or wet etching. Chemical.

After the semiconductor epitaxial layer 2110 is transferred to the first carrier substrate 220, similarly, the surface of the exposed n-type semiconductor layer 2112 may be subjected to a yellow lithography process such as sputtering, thermal deposition, or plating. The patterned n-type electrodes 2130a and 2130b are formed by electroplating or the like as shown in FIG. 2D. The material of the n-type electrodes 2130a and 2130b is preferably, for example, a metal such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), or nickel ( Ni), titanium (Ti), tin (Sn), etc., alloys thereof or a combination thereof.

As shown in FIG. 2E, the subsequent processing steps of the surfaces of the n-type electrodes 2130a and 2130b may be the same or different for the subsequent fabrication of different semiconductor light-emitting elements. In this embodiment, at the position of the surface of the semiconductor epitaxial layer 2110, metal oxide is redeposited on the surface of the n-type semiconductor layer 2112 by chemical vapor deposition (CVD), physical vapor deposition (PVD) or the like. The transparent conductive layer 2140 or/and the reflective layer 2150. The material of the metal oxide transparent conductive layer 2140 is, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), tin oxide fluoride (FTO), antimony tin oxide. (ATO), cadmium tin oxide (CTO), zinc aluminum oxide (AZO), cadmium-doped zinc oxide (GZO) or other materials or combinations thereof; the material of the reflective layer 2150 includes, for example, gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), bismuth (Be), etc., alloys thereof or a combination thereof.

In order to perform selective separation of the subsequent semiconductor layers, in the present embodiment, the first epitaxial unit 2201 and the second epitaxial unit 2202 are separated from each other by dry etching before transferring the semiconductor epitaxial layer. A carrier substrate 220 is completely separated from each other, including a first adhesive layer 2135 and a patterned sacrificial layer 2123, the side view of which is shown in FIG. 2F.

Specifically, the patterned photoresist layer can be transmitted through a dry etching method such as reactive ion etching (RIE), inductively coupled plasma (ICP), or plasma etching (PE). The semiconductor epitaxial layer 2110 is separated from the n-type semiconductor layer 2112 into two different first epitaxial cells 2201 and second epitaxial cells 2202 in a direction perpendicular to the surface direction of the first carrier substrate 220. In this embodiment, the first carrier substrate 220 includes two first epitaxial cells 2201 and a second epitaxial cell 2202 having different surface areas and geometries, wherein the first epitaxial cell 2201 has a p-type electrode 2120a and an n-type electrode. 2130a, the second epitaxial unit 2202 has a p-type electrode 2120b and an n-type electrode 2130b.

As shown in FIG. 2F, in order to increase the light-emitting efficiency of the semiconductor light-emitting device, the surface of the portion of the n-type semiconductor layer 2112 of the first epitaxial unit 2201 and/or the second epitaxial unit 2202 may be dry-etched or Wet etching is performed in a wet etching manner; subsequently, through a mask pattern (for example, patterned photoresist, not shown), a semiconductor epitaxial layer is laminated on the first carrier substrate 220 in a portion to be transferred in the future. That is, the second adhesive layer 2230 is disposed at a surface position corresponding to the surface of the n-type semiconductor layer 2112 of the second epitaxial unit 2202 having the patterned sacrificial layer 2123; of course, the patterned second adhesive layer 2230 may be coated. A spin coating or a deposition is patterned on a portion of the surface of the second carrier substrate 230 to be subsequently carried by the second epitaxial unit 2202.

In this embodiment, the material of the patterned second adhesive layer 2230 may be an organic material such as Acrylic acid, Unsaturated polyester, Epoxy, and oxirane. Oxetane, Vinyl ether, Nylon, Polypropylene (PP), Polybutylene Terephthalate (PBT), Polyphenylene Ether (PPO), Polycarbonate (PC), Acrylonitrile-butadiene-styrene (ABS), polyvinyl chloride (PVC), etc.; may be metals such as titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al) , germanium (Ge), copper (Cu), or the like, or a combination thereof; may be a metal oxide such as indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, Zinc tin oxide, zinc oxide (ZnO), yttrium oxide (SiO _x ), etc.; may also be a nitride such as tantalum nitride (SiN _x ).

Next, the second carrier substrate 230 is prepared, and the second epitaxial unit 2202 is disposed on the second carrier substrate 230 by patterning the second adhesive layer 2230 in a heating and/or pressure manner in a manner similar to the above. . Then, after removing the patterned sacrificial layer 2123 or reducing the adhesion of the patterned sacrificial layer 2123 by dry etching, wet etching, mechanical force separation, UV light irradiation, heating, or the like, the second epitaxial unit 2202 is transferred to the first The second carrier substrate 230 is over.

Finally, after removing the first adhesive layer 2135 and/or the patterned sacrificial layer 2123 remaining on the surface of the second epitaxial unit 2202 on the second carrier substrate 230 by dry etching or wet etching, as shown in FIG. 2G and FIG. As shown, the first carrier substrate 220 and the first epitaxial unit 2201 and the second carrier substrate 230 and the second epitaxial unit 2202 are formed (the upper views thereof are shown in FIGS. 3A and 4A, respectively). The first carrier substrate 220 and the first epitaxial unit 2201 will be further formed with the semiconductor light emitting device 200, and the second carrier substrate 230 and the second epitaxial unit 2202 will be further formed with the semiconductor light emitting device 300 (the upper view thereof is respectively As shown in Figures 3C and 4C).

In this embodiment, the material of the patterned sacrificial layer 2123 may be a metal such as titanium (Ti), gold (Au), silver (Ag), tungsten (W), aluminum (Al), chromium (Cr), copper ( Cu), platinum (Pt) and the like, or combinations thereof; dissociation may be UV glue; may also be a dielectric material such as silicon oxide (SiO _x), silicon nitride (SiN _x) and the like. As described above, the patterned sacrificial layer 2123 may be removed by dry etching, wet etching, UV light irradiation, or the like, or the adhesion between the patterned sacrificial layer 2123 and the first carrier substrate 220 may be reduced by heating, and the mechanical mechanism may be reused. The second epitaxial unit 2202 is separated from the first carrier substrate 220 by force separation.

In the above-described embodiment, the semiconductor light emitting element 200 is, for example, a flip chip type light emitting diode element, and its side view and top view are as shown in FIGS. 3B and 3C. As shown in FIG. 3B, in order to form the two extension electrodes 130a' and 130a" of the flip-chip light-emitting diode element 200, reactive ion etching (RIE), inductively coupled plasma (Inductively Coupled) Dry etching method such as plasma, ICP), plasma etching (PE), etc., through a mask pattern (for example, patterned photoresist, not shown), from the surface of the first carrier substrate 20 from the n-type semiconductor layer 112 (2112) etching the semiconductor epitaxial layer 110 (2110) through a conductive via 134 to the p-type electrode 120a (2120a), and chemical vapor deposition (CVD), physical gas on the sidewall of the conductive via 134 After the deposition of the insulating layer 132 to form an insulating layer 132 to form a dielectric insulating structure, a metal conductive structure is formed in the conductive via 134 to form a p-type extending electrode 130a extending to the surface of the n-type semiconductor layer 112. The n-type extension electrode 130a" formed in the same step as above the n-type electrode 130a (2130a) is combined to constitute the two extension electrodes of the flip-chip light-emitting diode element 200. When the flip-chip LED device 200 is electrically connected to an external electronic component (for example, a printed circuit board) by flip chip, it is preferable to have better reliability and stability in connection between the entire structures. In this case, the outer surface a of the n-type extension electrode 130a" on the same side of the first epitaxial unit 201 and the outer surface b of the p-type extension electrode 130a' can be located at the same level by the structural design.

In the above embodiment, the semiconductor light emitting element 300 formed on the second carrier substrate 30 is, for example, a high voltage single-wafer light-emitting diode element, and its side view and top view are as shown in FIGS. 4B and 4C. Shown. In order to clearly express the manufacturing process of the high voltage single-chip light-emitting diode element 300, the sequential processes are described in the following sections 4A, 5A, 5B, 4B, and 4C, respectively. Steps and structure.

First, referring to FIG. 4A, after the second epitaxial unit 202 (2202) is transferred to the second carrier substrate 30 (230), the p-type electrode 120b (2120b) is formed in the semiconductor epitaxial layer 110 (2110). Immediately after the growth of the substrate 10 (210), the p-type semiconductor layer 116 (2116) is formed; and the n-type electrode 130b (2130b) is directly formed on the n-type semiconductor layer 112 (2112) after the first substrate transfer. Therefore, when the second epitaxial unit 202 (2202) is transferred to the second carrier substrate 30 (230), the n-type electrode 130b (2130b) is buried under the n-type semiconductor layer 112 (2112) (herein indicated by a broken line). At this time, the surface of the second epitaxial unit 202 (2202) has a p-type electrode 120b (2120b), and the patterned second adhesive layer 230 (2230) covers the second epitaxial unit 202 (2202) and the p-type electrode 120b ( 2120b) surface.

Next, as shown in FIG. 5A, the second epitaxial unit 202 (2202) and the patterned second adhesive layer 230 (2230) on the surface of the p-type electrode are removed, and then reactive ion etching (Reactive Ion Etching, RIE) is performed. The second epitaxial unit 202 (2202) is divided into a plurality of third epitaxial cells 202' by dry etching such as Inductively Coupled Plasma (ICP) or Plasma Etching (PE). At this time, the n-type electrode 130b' (shown by oblique lines here) under part of the third epitaxial unit 202' is exposed. Then, the sidewall between the surface of the third epitaxial unit 202' and the adjacent third epitaxial unit 202' is deposited by a chemical vapor deposition (CVD) or physical vapor deposition (PVD) process in a patterning process. The insulating layer 232 is electrically insulated from other electrical semiconductor layers in the third epitaxial unit 202'. In the process step, the side view structure between two adjacent third epitaxial cells 202' is as shown in FIG. 5B. In this embodiment, the material of the insulating layer 232 is cerium oxide (SiO ₂ ). In addition to the cerium oxide, the material of the insulating layer 232 may include tantalum nitride (SiN _x ), aluminum oxide (Al ₂ O ₃ ). Aluminum nitride (AlN _x ) or a combination thereof.

Next, a metal conductive connection structure 125 is formed between the adjacent third epitaxial cells 202 ′ by a yellow light micro-etching technique, and the n-type electrode 130 b ′ of the third epitaxial cell 202 ′ and the adjacent third epitaxial cell 202 are connected. The p-type electrode 120b is configured to form an electrically connected series to form a high-voltage single-crystal light-emitting diode element 300 as shown in FIGS. 4B and 4C. In this element structure, the p-type electrode 120b (2120b) and the n-type electrode 130b' are respectively located on opposite sides of the third epitaxial unit 202', and the p-type electrode 120b of the two third epitaxial units 202' at the end of the element (2120b) and the n-type electrode 130b' are externally connected to form a p-type p-type electrode pad 102b' and an n-type electrode pad 120b", wherein the p-type electrode 120b (2120b), the n-type electrode 130b', and the p-type electrode The pad 120b' and the n-type electrode pad 120b" may be formed in the same step as the conductive connection structure 125. As shown in FIG. 4C, in order to increase the light-emitting efficiency of the light-emitting diode element 300, in the present embodiment, the p-type electrode pad 120b' and the n-type electrode pad 120b" are respectively formed in the third epitaxial unit 202'. The surface of the outer second carrier substrate 30 (230) does not overlap the surface of the third epitaxial unit 202'.

Those of ordinary skill in the art will appreciate that in addition to the electrically connected structures, adjacent third epitaxial cells 202' may also form electrically parallel structures. The manner of electrically connecting the epitaxial cells can be patterned to form conductive on the surface of the second carrier substrate 30 (230) in addition to the conductive connection structure 125 formed on the third epitaxial cell 202'. And connecting the third epitaxial cells 202 ′ to the second carrier substrate 30 ( 230 ) in a flip-chip manner, and electrically connecting to the patterned conductive connection structure on the surface of the second carrier substrate, or forming A light-emitting diode light-emitting element composed of a plurality of third epitaxial cells 202' electrically connected in series or in parallel.

In another embodiment, the semiconductor light emitting device 200 can form another semiconductor light emitting device 400 including a package form by a subsequent rework, and the completed side view and top view are as shown in FIGS. 6C and 6D. In order to clearly express the semiconductor light emitting element 400 in a package form, the sequential process steps and structure will be described below in the sixth to sixth embodiments, respectively.

In the present embodiment, taking the semiconductor light emitting element 200 as an example, first, as shown in FIG. 6A, the first transparent structure 40 is covered and surrounded by the second semiconductor light by spin coating or deposition. The element 200 includes a sidewall surrounding the epitaxial unit constituting the semiconductor light emitting element 200. The first transparent structure 40 is transparent with respect to the light emitted by the second semiconductor light emitting element 200 for encapsulating and increasing the mechanical strength of the second semiconductor light emitting element 200, and the material thereof may be, for example, an epoxy resin ( Epoxy), Polyimide, Benzocyclobutene, Perfluorocyclobutane, SU8 photoresist, Acrylic Resin, Polymethylmethacrylate Poly(ethylene terephthalate), polycarbonate (Polycarbonate), polyetherimide, fluorocarbon polymer, glass, alumina Al ₂ O ₃ ), SINR, spin-on glass (SOG), Teflon or a combination thereof.

Next, a portion of the first transparent structure 40 is removed, and a portion of the p-type extension electrode 130a' and the n-type extension electrode 130a" is exposed as shown in Fig. 6B. Next, on the surface of the first transparent structure 40 and the p-type A portion of the surface and the side surface of the extension electrode 130a' and the n-type extension electrode 130a" are covered with an insulating scattering layer 410 by spin coating, deposition, steel plate printing or screen printing, and the insulating scattering layer 410 is simultaneously Provides scattering and reflected light and electrical insulation to reduce the use of scattering materials, reflective materials and insulating materials, as well as loss due to material properties, such as differences in thermal expansion coefficient or mechanical strength. The rate and cost are reduced, and in addition, moisture is prevented from entering the second semiconductor light emitting element 200, increasing reliability. The material of the insulating scattering layer 410 may be epoxy resin (Epoxy), cerium oxide (SiO _x ), aluminum oxide (Al ₂ O ₃ ), titanium dioxide (TiO ₂ ), silicone (Silicone), resin (Resin) or the above. The combination of materials is shown in Figure 6C.

Then, the insulating scattering layer 410 corresponding to the position of the p-type extension electrode 130a' and the n-type extension electrode 130a" is partially removed by a yellow lithography process to form a p-type extension electrode 130a' and an n-type extension electrode. Openings 411 and 412 of 130a". Here, it is worth mentioning that, in order to increase the effect of insulating the semiconductor light emitting element 200, the preferred embodiment of the scattering insulating layer 410 should include sidewalls and partial surfaces covering the p-type extension electrode 130a' and the n-type extension electrode 130a". As shown in Figure 6D.

Finally, an external p-type electrode pad 1310 and an n-type electrode pad 1320 are formed on the transparent structure 40 and the insulating scattering layer 410 at the openings 411 and 412, respectively, by electroless plating, electroplating or partial sputtering of the mask. Then, the semiconductor light emitting element 400 having the package form as shown in Fig. 6E is completed. Since the periphery of the semiconductor epitaxial layer has a package structure, the element as a whole has better heat resistance, moisture resistance, and oxidation resistance. It can be directly electrically connected to the circuit carrier of the light-emitting device through wire bonding or flip chip to form a subsequent light-emitting device, such as a light bulb, a backlight module, or a lamp device.

As shown in Fig. 8, it is a top view of the semiconductor light emitting element 400. The semiconductor light emitting element 200 composed of the first epitaxial unit 201 is surrounded by the transparent structure 40, and the transparent structure 40 is covered by the direction perpendicular to the direction of the first carrier substrate 20 (the direction of the arrow D in FIG. 6E). An insulating scattering layer (not shown) removes the partially insulating scattering layer 410, and the formed openings 411 and 412 are respectively located above the first epitaxial unit 201. The p-type electrode pad 1310 and the n-type electrode pad 1320 electrically connected to the first epitaxial unit 201 are respectively superposed on the upper sides of the openings 411 and 412. From the figure, we can find that the range of the p-type electrode pad 1310 and the n-type electrode pad 1320 is beyond the area of the first epitaxial unit 201. That is, from the direction perpendicular to the first carrier substrate 20, portions of the p-type electrode pad 1310 and the n-type electrode pad 1320 do not overlap with the first epitaxial unit 201.

The above design can increase the area of the metal electrode pad. When the LED component 400 is electrically connected to an external electronic component substrate (for example, a printed circuit board), the connection between the entire structures can be improved in reliability and stability. Preferably, the outer surface of the n-type electrode pad 1320 on the same side of the first semiconductor epitaxial layer 201 is at the same level as the outer surface of the p-type electrode pad 1310 through the structural design.

In addition, the n-type electrode pad 1320 and the p-type electrode pad 1310 are for receiving an external voltage, and the material thereof may be a metal material, including but not limited to copper (Cu), tin (Sn), gold (Au), and nickel (Ni). ), titanium (Ti), lead (Pb), copper-tin (Cu-Sn), copper-zinc (Cu-Zn), copper-cadmium (Cu-Cd), tin-lead-bismuth (Sn-Pb-Sb) ), tin-lead-zinc (Sn-Pb-Zn), nickel-tin (Ni-Sn), nickel-cobalt (Ni-Co), gold alloy (Au alloy), gold-copper-nickel-gold (Au-) Cu-Ni-Au) or a combination of the above materials, and the like. The n-type electrode pad 1320 and the p-type electrode pad 1310 may also include a plurality of sub-layers (not shown), and the metal pad structure having a larger area has a reflection of 70% or more for the light from the LED body 400. The rate can effectively improve the light extraction efficiency of the LED component 400.

According to different component requirements, the epitaxial cells can have different geometries from the direction of the vertical substrate. In this embodiment, as shown in FIG. 9, the semiconductor can be further diced to form a semiconductor such as a square or a cross. Light-emitting element. The semiconductor epitaxial layer stack 5110 on the growth substrate 510 is divided into a first epitaxial unit 501 and a second epitaxial unit 502 according to the shape, and then transferred to the first carrier substrate 520 and the second carrier substrate through the substrate transfer manner. Above 530, as shown in Figures 10A and 10B.

It is to be noted that the material of the first carrier substrate 520 and the second carrier substrate 530 may be an insulating material such as sapphire (Al ₂ O ₃ ), etc., in order to make the subsequent epitaxial unit contact the semiconductor layer on the carrier substrate side. The semiconductor layer exposed on the upper side of the epitaxial cell is electrically connected, and a conductive layer may be partially or partially formed on the surface of the carrier substrate (between the epitaxial cells), for example, a semiconductor epitaxial layer The laminated light-emitting wavelength is a transparent metal oxide conductive layer (not shown). The transparent metal oxide conductive layer may be formed by a technique such as chemical vapor deposition (CVD) or physical vapor deposition (PVD), and the transparent metal oxide conductive layer is made of, for example, indium tin oxide (ITO). ), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), tin oxide fluoride (FTO), antimony tin oxide (ATO), cadmium tin oxide (CTO), zinc aluminum oxide (AZO) , cadmium zinc oxide (GZO) and other materials or a combination thereof. Referring to the foregoing embodiments of the present invention, the transparent metal oxide conductive layer can also be used as a material for the adhesive layer, which is produced at the time of the substrate transfer process.

Hereinafter, a method of fabricating a semiconductor light-emitting device according to another embodiment of the present invention using a transparent metal oxide conductive layer as a material for the underlayer is shown in accordance with FIGS. 11A to 11E. First, as shown in FIG. 11A, the semiconductor epitaxial laminate is transferred from the growth substrate 510 to the first carrier substrate 520 having the first adhesive layer 5130 in the foregoing embodiment or a conventional manner, and the semiconductor is patterned. The epitaxial stack is a first epitaxial unit 501 and a second epitaxial unit 502. The material of the first adhesive layer 5130 may be an organic material such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Ethylene. Vinyl ether, nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene - styrene (ABS), polyvinyl chloride (PVC), etc.; may be a metal such as titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al), germanium (Ge), Copper (Cu) or the like or a combination thereof; may be a metal oxide such as indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, zinc tin oxide, oxidation Zinc (ZnO), yttrium oxide (SiO _x ), etc.; may also be a nitride such as tantalum nitride (SiN _x ).

As shown in FIGS. 11A and 11B, the semiconductor epitaxial laminate is composed of an n-type semiconductor layer 5112, an active layer 5114, and a p-type semiconductor layer 5116. In the fabrication manner as described above, the patterned interleaved semiconductor epitaxial stack is a first epitaxial unit 501 and a plurality of second epitaxial units 502. Next, a transparent metal oxide conductive layer is applied on the surface of the second epitaxial unit 502 and the surface of the second carrier substrate 530 as the patterned second adhesive layer 5230, and is connected to each other by heating or pressurization. The patterned second adhesive layer 5230 may be partially or patterned partially formed on the surface of the second carrier substrate 530. Then, as shown in FIG. 11C and FIG. 11D, the laser light is irradiated from the first carrier substrate 520 in the direction of the first carrier substrate 520, and is dissolved and dissolved in the first between the first carrier substrate 520 and the epitaxial unit 502. The adhesive layer 5130 then transfers a portion of the second epitaxial unit 502 onto the second carrier substrate 530. After the second epitaxial unit 502 is subsequently applied to the second carrier substrate 530, the first adhesive layer 5130 remaining on the surface of the second epitaxial unit 502 on the second carrier substrate 530 is removed by dry etching or wet etching, such as 10A and 10B are formed to form the first carrier substrate 520 and the first epitaxial unit 501 and the second carrier substrate 530 and the second epitaxial unit 502.

In this embodiment, as described above, the manner of separating the second epitaxial unit 502 and the first carrier substrate 520 is, for example, a manner in which the first adhesive layer 5130 is dissolved by laser irradiation. In addition to this, a material having a lower adhesion to the first carrier substrate 520 may be selectively used as the first adhesive layer 5130 (for example, cerium oxide (SiO ₂ )). Subsequently, the patterned second adhesive layer 5230 is disposed through the surface portion of the second epitaxial unit 502 to be subjected to the second transfer, and the second epitaxial unit 502 is selectively adhered to the surface of the second carrier substrate 530. The second epitaxial unit 502 can be separated from the first carrier substrate 520 by physical mechanical force.

After the second epitaxial unit 502 is separated from the first carrier substrate 520, the second carrier substrate 530 includes a plurality of second epitaxial cells 502. Then, the second carrier substrate 530 can be patterned into a plurality of second carrier substrate units (not shown) according to the requirements for subsequent fabrication of the semiconductor light emitting device. Each of the carrier substrate units may carry a second epitaxial unit 502 or a plurality of second epitaxial units 502.

Taking FIG. 11E as an example, a single second epitaxial substrate unit 530' is carried on the diced single second carrier substrate unit 530'. Since the transparent metal oxide conductive layer is used as the patterned second adhesive layer 5230, the patterned second adhesive layer 5230 can be directly electrically connected to the n-type semiconductor layer 5112 and extended to the second second substrate unit 502. Above the surface of the 530'. Next, on the surface of the patterned second adhesive layer 5230 extending outside the second epitaxial unit 502 and on the surface of the p-type semiconductor layer 5116, a yellow lithography process such as sputtering, thermal deposition, Patterned n-type electrode 5120a and p-type electrode 5120b are formed by electroplating or the like, respectively. The n-type electrode 5120a fabricated in this manner is not located on the surface of the second epitaxial unit 502, and the effect of opaque metal shading is reduced, so that the component can achieve a better light extraction amount.

When the second epitaxial unit 502 in FIG. 10B is removed by patterning to form different semiconductor light emitting elements, the first epitaxial unit 501 remaining on the first carrier substrate 520 can be further The manner in which the first carrier substrate 520 is diced and separated is formed into different semiconductor light-emitting elements in subsequent different processes.

Referring to Fig. 13, the remaining first epitaxial cells 501 can be cut into a plurality of semiconductor light-emitting elements having a cross-shaped epitaxial unit 501' in the manner of, for example, the present embodiment, as indicated by a broken line in the drawing. As shown in subsequent Figures 14A through 14D, this process can effectively utilize all of the semiconductor epitaxial stacks on the substrate.

Hereinafter, the top view and the oblique side view structure of the different embodiments of the above embodiment will be described by way of illustration. As shown in Figs. 14A and 14B, the semiconductor light emitting element 500 composed of the cross-shaped epitaxial unit 501' is shown from the top view, and Fig. 14B shows an oblique side view thereof. As shown in the above embodiment, referring to FIG. 14A, in the present embodiment, the transparent metal oxide conductive layer 5280 is formed integrally on the surface of the second carrier substrate unit 530' and extends over the second epitaxial unit. The surface of the transparent metal oxide conductive layer 5280 outside the 502 and the surface of the p-type semiconductor layer 5116 are electrically connected to the n-type semiconductor layer 5112 and the p-type semiconductor layer 5116, respectively. .

Next, referring to FIGS. 14C and 14D, a second embodiment of the semiconductor light-emitting device 600 composed of the cross-shaped epitaxial unit 501' is shown in a top view and an oblique side view according to an embodiment of the present invention. . In the present embodiment, the surface of the second carrier substrate unit 530' is provided with a partially patterned transparent metal oxide conductive layer 5280 as an adhesion layer. The second carrier substrate 530 is an insulating substrate such as sapphire (Al ₂ O ₃ ). Therefore, after the p-type electrode 5120b is disposed on the surface of the second carrier substrate unit 530' not provided with the transparent metal oxide conductive layer 5280, the p-type extension electrode 5120b' extending from the p-type electrode 5120b and the p-type semiconductor layer are further provided. 5116 electrical connection. The n-type electrode 5120a is disposed on the surface of the patterned second adhesive layer 5230 extending outside the second epitaxial unit 502. The second adhesive layer 5230 is electrically connected to the n-type semiconductor layer 5112 through the patterning. The n-type electrode 5120a and the p-type electrode 5120b fabricated in this manner are not located on the surface of the second epitaxial unit 502, so that the effect of opaque metal shading can be further reduced, and a better component light extraction amount can be achieved.

From the top view of the above two implementations (Fig. 14A and Fig. 14C). In the semiconductor light-emitting elements 500 and 600, since the second epitaxial unit is a cross-shaped epitaxial unit 501 ′ (in a symmetrical shape, having two different symmetry planes A′ and B′ perpendicular to the substrate surface), and The end of the cross-shaped epitaxial unit 501' is similar to the position of the side of the second carrier substrate unit 530'. Therefore, the portion of the second carrier substrate unit 530' not covered by the cross-shaped epitaxial unit 501' can be substantially divided into four regions by the cross-shaped epitaxial unit 501'. Of course, those having ordinary knowledge in the art should understand that the shape of the cross-shaped epitaxial unit 501' may be different, for example, an L-shape, an irregular polygon, etc., and the second carrier substrate unit 530' may also be different in shape. It is roughly divided into different numbers of areas.

In the embodiment, the second carrier substrate 530 is an insulating substrate such as sapphire (Al ₂ O ₃ ). However, depending on the component requirements. The material of the second carrier substrate 530 may also include, but is not limited to, lithium aluminum oxide (LiAlO ₂ ), zinc oxide (ZnO), gallium nitride (GaP), glass (Glass), organic Polymer sheet, aluminum nitride (AlN). It may be an insulating substrate or a conductive substrate; it may be a transparent substrate or a reflective substrate. In addition, in order to increase the heat dissipation efficiency of the component, the substrate may also be a heat dissipation substrate having high heat dissipation, and the material has a thermal conductivity of at least 24 W/m·K, such as copper (Cu), tungsten (Wu), and nitride. Aluminum (AlN), Metal Matrix Composite (MMC), Ceramic Matrix Composite (CMC), tantalum carbide (SiC), aluminum (Al), bismuth (Si), diamond (Diamond) or A combination of these materials.

Further, taking the semiconductor light-emitting elements 200 and 300 formed as described above as an example, the lower transparent carrier substrate (20, 30) has a relatively large surface area corresponding to the surface area of the active layer 114 in the semiconductor epitaxial layer 110. When the light enters the transparent carrier substrate (20, 30) with a lower refractive index, since the surface area of the transparent carrier substrate (20, 30) is larger, a higher proportion of light can be transmitted from the transparent carrier substrate (20, 30). ) was extracted. Taking a conventional flip-chip light-emitting diode element as an example, as shown in FIGS. 12A and 12B, the conventional flip-chip light-emitting diode element has an active layer 114 as large as the surface area of the substrate 50, and the embodiment of the present invention The first carrier substrate 20 has a surface area that is more than twice as large as the active layer 114 compared to the flip-chip LED device 200 (shown in FIG. 3C). When the light-emitting diode elements are adhered to the corresponding circuit structures of the sub-carriers 50', 20' by the solders 560, 260, the light-emitting devices 5000 and 2000 are formed, respectively. At this time, a large amount of light L can be extracted from the large transparent carrier substrate 20 after being emitted from the active layer without being lost by being reabsorbed by the active layer 114. That is, the light-emitting device 2000 has better light-emitting efficiency than the light-emitting device 5000. Similarly, the structure of the large transparent carrier substrate 20 is applied to the high-voltage single-crystal light-emitting diode element 300, the packaged semiconductor light-emitting element 400, and the single-crystal light-emitting diode element 500 composed of a single epitaxial unit 502 and 600 should have a similar effect.

In various embodiments, the semiconductor epitaxial stack on a single carrier substrate is not limited to one. In order to simplify the process steps, a semiconductor epitaxial stack is formed on a larger first carrier substrate 20 (for example, a wafer), and a plurality of yellow photolithography etching techniques and substrate transfer techniques are used to form a plurality of The same and repeated first epitaxial unit 201 and second epitaxial unit 202 are shown. Next, the plurality of second epitaxial cells 202 formed on the first carrier substrate 20 are transferred to the other second second carrier substrate 30 (eg, another wafer) at a time, and on the first carrier substrate 20 A plurality of first epitaxial units 201 are left on. Then, after performing the component process described above on the first carrier substrate 20 and the second carrier substrate 30, for example, the substrate surface area as shown in FIG. 3C is one element size, and the first carrier substrate 20 is cut. The plurality of first semiconductor light emitting elements 200 including the first epitaxial unit 201; similarly, the second carrier substrate 30 is cut by the surface area of the substrate as shown in FIG. 4C, and the plurality of inclusions can be correspondingly obtained. The second semiconductor light emitting element 300 of the triple epitaxial unit 202'.

Since the semiconductor light emitting elements 200 and 300 formed after dicing are respectively composed of a single semiconductor epitaxial layer 110 originally formed on a single substrate, the formed semiconductor light emitting elements 200 and 300 should have substantially the same element size. That is, substantially the same surface area of the element substrate, as shown in FIGS. 3C and 4C.

The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.

50‧‧‧Substrate
10, 210, 510‧‧‧ growth substrate
112, 2112, 5112‧‧‧n type semiconductor layer
114, 2114, 5114‧‧‧Active layer
116, 2116, 5116‧‧‧p-type semiconductor layer
110, 2110, 5110‧‧‧Semiconductor epitaxial stack
120a, 120b, 2120a, 2120b, 5120b‧‧‧p-type electrode
20, 220, 520, 60‧‧‧ first carrier substrate
135, 2135, 5130‧‧‧ first adhesive layer
130a, 130b, 2130a, 2130b, 130b', 5120a‧‧‧n type electrode
140, 2140‧‧‧Metal oxide transparent conductive layer
150, 2150‧‧‧reflective layer
201, 2201, 501‧‧‧ first epitaxial unit
202, 2202, 502, 501'‧‧‧Second epitaxial unit
230, 2230, 5230‧‧‧second adhesive layer
5280‧‧‧Transparent metal oxide conductive layer
30, 530‧‧‧second carrier substrate
200, 300, 400, 500, 600‧‧‧ semiconductor light-emitting elements
2123‧‧‧ patterned sacrificial layer
130a', 5120b'‧‧‧p type extension electrode
130a”‧‧·n type extension electrode
134‧‧‧ conductive through holes
132, 232‧‧‧Insulation
202'‧‧‧ third epitaxial unit
125‧‧‧Metal conductive joint structure
120b', 1310‧‧‧p type electrode pad
120b”, 1320‧‧‧n type electrode pad
40‧‧‧First transparent structure
410‧‧‧Insulation scattering layer
411, 412‧‧‧ openings
530'‧‧‧Second carrier substrate unit
501'‧‧‧Cross-shaped epitaxial unit
260, 560‧‧‧ solder
50', 20'‧‧‧ vectors
5000, 2000‧‧‧Lighting device
A', B'‧‧ symmetry plane
D‧‧‧ Direction

1A is a side view structural view showing a side view of a first fabrication step of a semiconductor light emitting element according to a first embodiment of the present invention;

1B is a side view structural view showing a side view of a second fabrication step of the semiconductor light emitting device according to the first embodiment of the present invention;

1C is a side view structural view showing a side view of a third manufacturing step of the semiconductor light emitting device according to the first embodiment of the present invention;

1D is a side view structural view showing a side view of a fourth fabrication step of the semiconductor light emitting device according to the first embodiment of the present invention;

1E is a side view structural view showing a side view of a fifth fabrication step of the semiconductor light emitting element according to the first embodiment of the present invention;

1F is a side view structural view showing a side view of a sixth fabrication step of the semiconductor light emitting element according to the first embodiment of the present invention;

1G is a side view structural view showing a side view of the seventh fabrication step of the semiconductor light emitting device according to the first embodiment of the present invention;

1H is a side view structural view showing a side view of the seventh fabrication step of the semiconductor light emitting device according to the first embodiment of the present invention;

2A is a side view structural view showing a side view of a first fabrication step of a semiconductor light emitting element according to a second embodiment of the present invention;

2B is a side view structural view showing a side view of a second fabrication step of the semiconductor light emitting device according to the second embodiment of the present invention;

2C is a side view structural view showing a side view of a third manufacturing step of the semiconductor light emitting device according to the second embodiment of the present invention;

2D is a side view structural view showing a side view of a fourth fabrication step of the semiconductor light emitting element according to the second embodiment of the present invention;

2E is a side view structural view showing a side view of a fifth fabrication step of the semiconductor light emitting element according to the second embodiment of the present invention;

2F is a side view structural view showing a side view of a sixth fabrication step of the semiconductor light emitting element according to the second embodiment of the present invention;

2G is a side view structural view showing a side view of the seventh fabrication step of the semiconductor light emitting device according to the second embodiment of the present invention;

2H is a side view structural view showing a side view of the seventh fabrication step of the semiconductor light emitting device according to the second embodiment of the present invention;

3A is a top view, showing a top view of the seventh fabrication step of the semiconductor light-emitting device according to the first embodiment of the present invention;

3B is a side view structural view showing a side view of the first semiconductor light emitting element in the eighth fabrication step of the first embodiment of the present invention;

3C is a top view structural view showing a top view of the first semiconductor light emitting element in the eighth fabrication step of the first embodiment of the present invention;

4A is a top view structural view showing a second top view of the seventh fabrication step of the semiconductor light emitting device according to the first embodiment of the present invention;

4B is a side view structural view showing a side view of a second semiconductor light emitting element corresponding to the eighth fabrication step of the first embodiment of the present invention;

4C is a top view structural view showing a top view of the second semiconductor light emitting element in the eighth fabrication step of the first embodiment of the present invention;

5A is a top view structural view showing a top view of a second manufacturing step of the high voltage single-chip light-emitting diode element according to the first embodiment of the present invention;

5B is a side view structural view showing a side view of a second manufacturing step of the high voltage single-crystal light-emitting diode element according to the first embodiment of the present invention;

6A is a side view structural view showing a side view of a first fabrication step of a packaged semiconductor light emitting device according to a third embodiment of the present invention;

6B is a side view structural view showing a side view of a second fabrication step of a packaged semiconductor light emitting device according to a third embodiment of the present invention;

6C is a side view structural view showing a side view of a third manufacturing step of the packaged semiconductor light emitting device according to the third embodiment of the present invention;

6D is a side view structural view showing a side view of a fourth fabrication step of a packaged-type semiconductor light-emitting device according to a third embodiment of the present invention;

6E is a side view structural view showing a side view of a fifth fabrication step of a packaged semiconductor light emitting device according to a third embodiment of the present invention;

Figure 7 is a top view structural view showing a top view of a sixth fabrication step of the semiconductor light-emitting device according to the first embodiment of the present invention;

Figure 8 is a top plan view showing a top view of a fifth fabrication step of a packaged semiconductor light-emitting device according to a third embodiment of the present invention;

Figure 9 is a top view, showing a top view of a first fabrication step of a semiconductor light-emitting device in accordance with a fourth embodiment of the present invention;

10A is an oblique side view structural view showing a diagonal side view corresponding to a second fabrication step of the semiconductor light emitting element in the fourth embodiment of the present invention;

10B is an oblique side view structural view showing an oblique side view of a second fabrication step of the semiconductor light emitting element according to the fourth embodiment of the present invention;

11A is a side view structural view showing a side view of a first fabrication step of a semiconductor light emitting element according to a fifth embodiment of the present invention;

11B is a side view structural view showing a side view of a second fabrication step of the semiconductor light emitting element according to the fifth embodiment of the present invention;

11C is a side view structural view showing a side view of a third manufacturing step of the semiconductor light emitting element according to the fifth embodiment of the present invention;

11D is a side view structural view showing a side view of a fourth manufacturing step of the semiconductor light emitting element according to the fifth embodiment of the present invention;

11E is a side view structural view showing a side view of a fifth manufacturing step of the semiconductor light emitting element according to the fifth embodiment of the present invention;

Figure 12A is a side elevational view showing a side view of a conventional flip-chip light emitting diode element;

12B is a side view structural view showing a side view of a flip-chip light emitting diode element according to a first embodiment of the present invention;

Figure 13 is a perspective side elevational view showing the oblique side view of the first fabrication step of the semiconductor light-emitting device in accordance with the fourth embodiment of the present invention;

FIG. 14A is a top view structural view showing a top view of a semiconductor light emitting element according to a fourth embodiment of the present invention; FIG.

Figure 14B is an oblique side view structural view showing an oblique side view of a semiconductor light emitting element fabricated in accordance with a fourth embodiment of the present invention;

Figure 14C is a top view structural view showing a top view of another semiconductor light-emitting device fabricated in accordance with a fourth embodiment of the present invention;

Fig. 14D is a perspective side view showing the oblique side view of another semiconductor light-emitting element produced in accordance with the fourth embodiment of the present invention.

20‧‧‧First carrier substrate

110‧‧‧Semiconductor epitaxial stack

112‧‧‧n type semiconductor layer

114‧‧‧Active layer

116‧‧‧p-type semiconductor layer

120a, 120b‧‧‧p-type electrode

130a, 130b‧‧‧n type electrode

140‧‧‧Metal oxide transparent conductive layer

150‧‧‧reflective layer

230‧‧‧ patterned adhesive layer

201‧‧‧First epitaxial unit

202‧‧‧Second epitaxy unit

Claims (10)

A semiconductor light emitting device comprising: a substrate; a first adhesive layer on the substrate; a plurality of epitaxial cells on the first adhesive layer; a second adhesive layer on the plurality of epitaxial cells; An electrode is located between the plurality of epitaxial cells and the first adhesive layer, and the plurality of epitaxial cells and the first adhesive layer are in contact; the plurality of second electrodes are located in the plurality of epitaxial cells and the second Adhesive layers are in contact with the plurality of epitaxial cells and the second adhesive layer; wherein the plurality of epitaxial cells are separated from each other. The semiconductor light-emitting device of claim 1, wherein the plurality of epitaxial cells are electrically insulated from each other. The semiconductor light-emitting device of claim 1, wherein the first adhesive layer comprises a plurality of secondary adhesive layers respectively corresponding to the plurality of epitaxial cells, and the plurality of first adhesive layers are completely separated from each other. The semiconductor light emitting device of claim 1, wherein the first adhesive layer comprises an insulating material. The semiconductor light-emitting device of claim 1, further comprising a metal layer on the second adhesive layer. The semiconductor light-emitting device of claim 5, wherein the metal layer covers a portion of the second adhesive layer. The semiconductor light-emitting device of claim 6, wherein the second adhesive layer comprises a first portion and a second portion, the first portion being different from the material of the second portion. The semiconductor light-emitting device of claim 7, wherein the first portion is located between the metal layer and the plurality of epitaxial cells. The semiconductor light-emitting device of claim 8, wherein the first portion comprises an oxide conductive material. The semiconductor light-emitting device of claim 6, wherein the metal layer comprises gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), nickel ( Ni), titanium (Ti), tin (Sn), bismuth (Be), etc., alloys thereof or a combination thereof.