TW201725616A - Wafer processing method capable of reducing cost while the convex/concave of a bulge won't be transferred to a polished face - Google Patents
Wafer processing method capable of reducing cost while the convex/concave of a bulge won't be transferred to a polished face Download PDFInfo
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- TW201725616A TW201725616A TW105131076A TW105131076A TW201725616A TW 201725616 A TW201725616 A TW 201725616A TW 105131076 A TW105131076 A TW 105131076A TW 105131076 A TW105131076 A TW 105131076A TW 201725616 A TW201725616 A TW 201725616A
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- wafer
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- 238000003672 processing method Methods 0.000 title abstract description 7
- 239000011347 resin Substances 0.000 claims abstract description 75
- 229920005989 resin Polymers 0.000 claims abstract description 75
- 239000007788 liquid Substances 0.000 claims abstract description 24
- 239000011248 coating agent Substances 0.000 claims abstract description 17
- 238000000576 coating method Methods 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 13
- 235000012431 wafers Nutrition 0.000 claims description 104
- 230000001681 protective effect Effects 0.000 claims description 29
- 238000005520 cutting process Methods 0.000 abstract description 18
- 238000005498 polishing Methods 0.000 abstract 2
- 238000007517 polishing process Methods 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 description 11
- 238000003825 pressing Methods 0.000 description 8
- 239000013078 crystal Substances 0.000 description 3
- 239000002390 adhesive tape Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 230000000638 stimulation Effects 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 229910052902 vermiculite Inorganic materials 0.000 description 1
- 235000019354 vermiculite Nutrition 0.000 description 1
- 239000010455 vermiculite Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
- B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
- B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
- B28D5/0011—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing with preliminary treatment, e.g. weakening by scoring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Ceramic Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Dicing (AREA)
Abstract
Description
本發明，是有關於晶圓的加工方法，該晶圓，是在藉由交叉形成的複數分割線被區劃的表面的各領域形成有元件，該各元件具有朝表面突出的複數隆起。 The present invention relates to a method of processing a wafer in which elements are formed in respective fields of a surface partitioned by a plurality of division lines formed by intersections, the elements having a plurality of protrusions protruding toward the surface.
在半導體元件晶片的製造程序中，被稱為格線的複數分割預定線是呈格子狀形成在由矽和化合物半導體所構成的晶圓表面，在藉由分割預定線被區劃的各領域形成有LSI等的元件。這些的晶圓是背面是被磨削且被薄化成規定的厚度之後，藉由沿著格線藉由切削裝置等被分割而使各半導體元件晶片被製造。 In the manufacturing process of the semiconductor element wafer, a plurality of predetermined dividing lines, which are called grid lines, are formed in a lattice shape on the surface of the wafer composed of germanium and compound semiconductor, and are formed in various fields which are partitioned by dividing the predetermined line. Components such as LSI. These wafers are manufactured such that the back surface is ground and thinned to a predetermined thickness, and then divided by a cutting device or the like along the ruled line.
近年來，實現半導體元件模組的輕薄短小化用的技術，在元件表面將被稱為隆起的金屬突起物複數形成，將這些的隆起與形成於配線基板的電極相對地直接接合的被稱為倒裝晶片接合的貼裝技術已被實用化(例如日本特開2001-237278號公報參照)。 In recent years, a technique for realizing thinness and thinning of a semiconductor element module has been formed by a plurality of metal protrusions called bumps on the surface of the element, and the bumps are directly bonded to the electrodes formed on the wiring board. A mounting technique of flip chip bonding has been put into practical use (for example, Japanese Patent Laid-Open Publication No. 2001-237278).
且將晶圓分割成更薄的元件晶片的技術，如先方塊切割法(Dicing Before Grinding)的分割技術已被開 發且被實用化(例如日本特開平11-40520號公報參照)。 And the technology of dividing the wafer into thinner component wafers, such as the Dicing Before Grinding segmentation technology has been opened It has been put into practical use (for example, Japanese Patent Laid-Open Publication No. Hei 11-40520).
此先方塊切割法，是從半導體晶圓或是光元件晶圓的表面沿著分割預定線形成規定深度(相當於元件晶片的精整厚度的深度以上的深度)的分割溝，其後，在表面將形成有分割溝的晶圓的背面磨削使分割溝露出該背面地將晶圓分割成各元件晶片的技術，可將元件晶片的厚度加工至50μm以下。 The first block cutting method is a dividing groove in which a predetermined depth (a depth corresponding to a depth of a finishing thickness of the element wafer) is formed from a surface of a semiconductor wafer or an optical element wafer along a predetermined dividing line, and thereafter, On the surface, the back surface of the wafer in which the division groove is formed is ground, and the division groove is exposed to the back surface to divide the wafer into individual element wafers, and the thickness of the element wafer can be processed to 50 μm or less.
近年來，在隆起形成於表面的晶圓中也有被貼裝被稱為高隆起的高度較高的隆起者。將這種晶圓背面磨削時，將具有相當厚度的保護膠帶貼合在晶圓表面地將背面磨削。但是，隆起的高度因為較高，即使欲由保護膠帶將隆起的凹凸吸收使平坦化，但完全地平坦化仍是困難的。 In recent years, in a wafer formed on a surface of a bump, a bump having a high height called a high bump is also attached. When the back surface of the wafer is ground, a protective tape having a considerable thickness is attached to the surface of the wafer to grind the back surface. However, since the height of the ridge is high, even if it is intended to flatten the ridges by the protective tape, it is difficult to completely flatten.
其結果，將保護膠帶貼合在具有隆起的晶圓的表面將晶圓的背面磨削的話，隆起的凹凸會被轉移至磨削面，而具有磨削後的晶圓的厚度參差不一變大的問題。且，透過保護膠帶由挾盤載置台吸引晶圓保持時，也具有保護膠帶無法完全追從而使負壓洩漏使晶圓的吸引保持成為不完全的問題。 As a result, if the protective tape is attached to the surface of the wafer having the bump to grind the back surface of the wafer, the bumps of the bumps are transferred to the grinding surface, and the thickness of the wafer after grinding is not changed. Big problem. Further, when the wafer is held by the tray mounting table through the protective tape, the protective tape cannot be completely caught, and the negative pressure leaks to keep the suction of the wafer incomplete.
[專利文獻1]日本特開2001-237278號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 2001-237278
[專利文獻2]日本特開平11-40520號公報 [Patent Document 2] Japanese Patent Laid-Open No. 11-40520
[專利文獻3]日本特開2012-160515號公報 [Patent Document 3] Japanese Patent Laid-Open Publication No. 2012-160515
[專利文獻4]日本特開2012-119594號公報 [Patent Document 4] Japanese Laid-Open Patent Publication No. 2012-119594
但是吸收隆起的凹凸的具有厚度的保護膠帶是除了費用較高的問題此外，保護膠帶的黏接層因為比較軟，所以在磨削中晶片會在保護膠帶上動作，晶片彼此會衝突使晶片的外周發生缺口或發生晶圓破裂的問題。 However, the thickness of the protective tape that absorbs the raised and convex bumps is a problem of higher cost. In addition, since the adhesive layer of the protective tape is relatively soft, the wafer will act on the protective tape during the grinding, and the wafers will collide with each other to make the wafer A problem occurs in the periphery or a wafer breakage occurs.
本發明是有鑑於此點者，其目的是提供一種晶圓的加工方法，可抑制費用，且隆起的高度即使較高該隆起的凹凸也不會被轉移至磨削面，磨削後的晶圓的厚度參差不一也被縮小，在磨削中防止晶片彼此衝突，在挾盤載置台將晶圓保持時負壓的洩漏不會發生。 The present invention has been made in view of the above, and an object thereof is to provide a method for processing a wafer, which can suppress the cost, and the height of the ridge is not transferred to the grinding surface even if the height of the ridge is high, and the crystal after grinding The thickness of the circle is also narrowed, and the wafers are prevented from colliding with each other during the grinding, and the leakage of the negative pressure does not occur when the wafer holding table holds the wafer.
依據本發明的話，可提供一種晶圓的加工方法，該晶圓，是在藉由交叉形成的複數分割預定線而被區劃的表面的各領域形成有元件，該各元件具有朝表面突出的複數隆起，將該晶圓沿著該分割預定線分割而形成規定厚度的複數元件晶片的加工方法，其特徵為，具備：從晶圓的表面沿著該分割預定線形成比該規定厚度更深且不將晶圓完全切斷的深度的溝的溝形成步驟；及將形成有該溝 的晶圓的該表面由具有該隆起的高度的1.5~5倍的厚度的液狀樹脂覆蓋的樹脂被覆步驟；及實施該樹脂被覆步驟之後，使該液狀樹脂硬化的樹脂硬化步驟；及實施該樹脂硬化步驟之後，藉由將晶圓的背面磨削朝該規定厚度將晶圓薄化並且使該溝朝該背面露出，將晶圓沿著該分割預定線分割並形成規定厚度的複數元件晶片的磨削步驟。 According to the present invention, there is provided a method of processing a wafer in which elements are formed in respective fields of a surface which is divided by a plurality of division lines formed by intersections, the elements having a plurality of surfaces protruding toward the surface a method of processing a plurality of element wafers having a predetermined thickness by dividing the wafer along the dividing line, and characterized in that the surface of the wafer is formed deeper than the predetermined thickness along the planned dividing line and does not a trench forming step of a deep trench that completely cuts the wafer; and the trench will be formed a resin coating step of the surface of the wafer covered with a liquid resin having a thickness of 1.5 to 5 times the height of the ridge; and a resin hardening step of curing the liquid resin after the resin coating step; and After the resin hardening step, the wafer is thinned toward the predetermined thickness by the back grinding of the wafer, and the groove is exposed toward the back surface, and the wafer is divided along the dividing line to form a plurality of elements having a predetermined thickness. The grinding step of the wafer.
較佳是，晶圓的加工方法，是進一步具備：與樹脂被覆步驟同時或是將樹脂被覆步驟實施之後，在被被覆的樹脂上配設保護薄片的保護薄片配設步驟。 Preferably, the method of processing the wafer further includes a protective sheet disposing step of disposing a protective sheet on the coated resin after the resin coating step or the resin coating step.
在本發明的加工方法中，因為將樹脂被覆步驟實施之後，將藉由紫外線的照射或是加熱等的外面的刺激使液狀樹脂硬化而使具有隆起的高度的1.5~5倍的厚度的樹脂貼合在晶圓的表面地進行晶圓的背面磨削，所以在磨削中可防止晶片動作，藉由硬化的樹脂使隆起的凹凸被消解，就可以防止隆起朝磨削面的轉移和晶圓的厚度參差不一，進一步可以防止吸引保持時的負壓的洩漏。 In the processing method of the present invention, after the resin coating step is carried out, the liquid resin is cured by irradiation of ultraviolet rays or external stimulation such as heating to obtain a resin having a thickness of 1.5 to 5 times the height of the ridge. Since the back surface of the wafer is bonded to the surface of the wafer, the operation of the wafer can be prevented during the grinding, and the bumps of the ridge can be prevented by the hardened resin, thereby preventing the transfer of the ridges toward the grinding surface and the crystal. The thickness of the circle varies, and it is further possible to prevent leakage of the negative pressure at the time of suction and holding.
11‧‧‧半導體晶圓 11‧‧‧Semiconductor wafer
11a‧‧‧表面 11a‧‧‧ surface
11b‧‧‧背面 11b‧‧‧Back
12‧‧‧切削單元 12‧‧‧Cutting unit
13‧‧‧分割預定線 13‧‧‧Division line
14‧‧‧主軸 14‧‧‧ Spindle
15‧‧‧元件 15‧‧‧ components
16‧‧‧切削刀片 16‧‧‧Cutting inserts
17‧‧‧隆起 17‧‧ ‧ uplift
18‧‧‧支撐載置台 18‧‧‧Supporting platform
19‧‧‧元件領域 19‧‧‧Component field
20‧‧‧保護薄片 20‧‧‧Protective sheet
22‧‧‧供給噴嘴 22‧‧‧Supply nozzle
23‧‧‧溝 23‧‧‧ditch
24‧‧‧樹脂供給源 24‧‧‧Resin supply
25‧‧‧元件晶片 25‧‧‧Component chip
26‧‧‧液狀樹脂 26‧‧‧Liquid resin
28‧‧‧保持載置台 28‧‧‧Maintaining the mounting table
30‧‧‧框體 30‧‧‧ frame
30a‧‧‧圓形凹部 30a‧‧‧Circular recess
32‧‧‧吸引保持部 32‧‧‧Attraction and Maintenance Department
34‧‧‧吸引路 34‧‧‧Attracting the way
36‧‧‧吸引源 36‧‧‧Attraction
37‧‧‧推壓機構 37‧‧‧Pushing mechanism
38‧‧‧支撐構件 38‧‧‧Support members
40‧‧‧紫外線燈泡 40‧‧‧UV bulb
42‧‧‧挾盤載置台 42‧‧‧挟盘台
44‧‧‧磨削單元 44‧‧‧ grinding unit
48‧‧‧滾輪支架 48‧‧‧Roller bracket
50‧‧‧磨削滾輪 50‧‧‧ grinding wheel
52‧‧‧滾輪基台 52‧‧‧Roller abutment
54‧‧‧磨削砥石 54‧‧‧ grinding meteorite
[第1圖]各元件是具有複數隆起的半導體晶圓的立體圖。 [Fig. 1] Each element is a perspective view of a semiconductor wafer having a plurality of ridges.
[第2圖]第2圖(A)是顯示溝形成步驟的剖面圖，第2 圖(B)是溝形成步驟終了後的晶圓的剖面圖。 [Fig. 2] Fig. 2(A) is a cross-sectional view showing the step of forming the groove, the second Figure (B) is a cross-sectional view of the wafer after the trench forming step is completed.
[第3圖]說明樹脂被覆步驟的剖面圖。 [Fig. 3] A cross-sectional view illustrating a resin coating step.
[第4圖]說明樹脂被覆步驟的剖面圖。 [Fig. 4] A cross-sectional view illustrating a resin coating step.
[第5圖]顯示樹脂硬化步驟的剖面圖。 [Fig. 5] A cross-sectional view showing a resin hardening step.
[第6圖]第6圖(A)是顯示磨削步驟的一部分剖面側面圖，第6圖(B)是磨削步驟終了後的剖面圖。 [Fig. 6] Fig. 6(A) is a partial cross-sectional side view showing the grinding step, and Fig. 6(B) is a cross-sectional view after the grinding step is finished.
[第7圖]顯示轉移步驟的剖面圖。 [Fig. 7] A cross-sectional view showing the transfer step.
[第8圖]剝離步驟實施後的剖面圖。 [Fig. 8] A cross-sectional view after the peeling step is carried out.
[第9圖]顯示拾取步驟的剖面圖。 [Fig. 9] A cross-sectional view showing the pickup step.
以下，參照圖面詳細說明本發明的實施例。參照第1圖的話，顯示形成於表面的各元件是具有複數隆起的半導體晶圓(以下，也有只略稱為晶圓)11的立體圖。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to Fig. 1, each element formed on the surface is a perspective view of a semiconductor wafer (hereinafter, simply referred to as a wafer) 11 having a plurality of ridges.
半導體晶圓11是由矽和化合物半導體所形成，具有表面11a及背面11b，在表面11a中複數分割預定線(格線)13是垂直交叉地形成，在藉由分割預定線13而被區劃的各領域中各別形成有LSI等的元件15。 The semiconductor wafer 11 is formed of germanium and a compound semiconductor, and has a surface 11a and a back surface 11b. The plurality of predetermined lines (lattice lines) 13 are vertically intersected in the surface 11a, and are divided by dividing the predetermined line 13. An element 15 such as an LSI is formed in each field.
如第1圖的放大圖所示，在各元件15的4邊形成有複數突起狀的隆起17。因為在各元件15的4邊形成有隆起17，所以半導體晶圓11是具有：形成有隆起17的元件領域(隆起形成領域)19、及將元件領域19圍繞的外周多餘領域(隆起未形成領域)21。 As shown in the enlarged view of Fig. 1, a plurality of protrusions 17 are formed on the four sides of each element 15. Since the bumps 17 are formed on the four sides of the respective elements 15, the semiconductor wafer 11 has the element field (the field of formation of the ridges) 19 in which the ridges 17 are formed, and the outer peripheral area in which the element field 19 is surrounded (the bulge is not formed in the field). )twenty one.
本發明的晶圓的加工方法，因為是依據先方 塊切割法(Dicing Before Grinding)的加工方法，首先實施在晶圓11的表面11a沿著分割預定線13形成規定深度(晶片的精整厚度以上的深度)的溝的溝形成步驟。 The processing method of the wafer of the present invention is based on the first In the processing method of the Dicing Before Grinding method, first, a groove forming step of forming a groove having a predetermined depth (depth greater than the thickness of the wafer) along the dividing line 13 on the surface 11a of the wafer 11 is performed.
此溝形成步驟，是在本發明實施例中如第2圖(A)所示，藉由切削裝置的切削單元12實施。切削單元12，是包含：由高速被旋轉驅動的主軸14、及被固定於主軸14的先端的切削刀片16。 This groove forming step is carried out by the cutting unit 12 of the cutting device as shown in Fig. 2(A) in the embodiment of the present invention. The cutting unit 12 includes a main shaft 14 that is rotationally driven by a high speed, and a cutting insert 16 that is fixed to a tip end of the main shaft 14.
在溝形成步驟中，將高速旋轉的切削刀片16從晶圓11的表面11a沿著分割預定線13切入規定深度(晶片精整厚度以上的深度)，藉由將晶圓11加工給進，形成規定深度的溝23。此規定深度有必要是不將晶圓11完全切斷的深度。 In the groove forming step, the cutting insert 16 that rotates at a high speed is cut from the surface 11a of the wafer 11 along the dividing line 13 to a predetermined depth (depth greater than the thickness of the wafer finishing), and is formed by processing the wafer 11 A groove 23 of a prescribed depth. This prescribed depth is necessary to be a depth that does not completely cut the wafer 11.
藉由將切削刀片16分割地給進，沿著朝第1方向伸長的分割預定線13形成規定深度的溝23。接著，將保持了晶圓11的挾盤載置台旋轉90°之後，沿著朝與第1方向垂直交叉的第2方向伸長的分割預定線23形成規定深度的溝23。第2圖(B)是顯示溝形成步驟終了後的晶圓11的剖面圖。 By feeding the cutting insert 16 in a divided manner, the groove 23 having a predetermined depth is formed along the dividing line 13 which is elongated in the first direction. Then, after the disk mounting table holding the wafer 11 is rotated by 90°, the groove 23 having a predetermined depth is formed along the dividing line 23 which is elongated in the second direction perpendicularly intersecting the first direction. Fig. 2(B) is a cross-sectional view showing the wafer 11 after the completion of the groove forming step.
在本實施例中，將溝形成步驟藉由切削裝置實施，但是將對於晶圓11具有吸收性的波長(例如355nm)的雷射光沿著分割預定線13照射在晶圓11的表面11a，藉由雷射光的切斷加工形成規定深度的溝23也可以。 In the present embodiment, the groove forming step is performed by the cutting device, but the laser light having an absorptive wavelength (for example, 355 nm) for the wafer 11 is irradiated on the surface 11a of the wafer 11 along the dividing line 13 to be borrowed. The groove 23 having a predetermined depth may be formed by cutting the laser light.
溝形成步驟終了後，實施將形成有溝23的晶 圓11的表面11a由具有隆起17的高度的1.5~5倍的厚度的樹脂覆蓋的樹脂被覆步驟。對於此樹脂被覆步驟，參照第3圖(A)~第4圖(B)進行說明。 After the trench forming step is finished, the crystal which will form the groove 23 is implemented. The surface 11a of the circle 11 is covered with a resin covering resin having a thickness of 1.5 to 5 times the height of the ridge 17. This resin coating step will be described with reference to Figs. 3(A) to 4(B).
首先，如第3圖(A)所示，在支撐載置台18上配設保護薄片20，從與樹脂供給源24連接的供給噴嘴22將液狀樹脂26供給至保護薄片20上。樹脂26可以採用藉由加上外面的刺激而硬化的樹脂，例如，藉由紫外線的照射而硬化的紫外線硬化樹脂，或是藉由加熱而硬化的熱硬化樹脂。在本實施例中，液狀樹脂26是採用了紫外線硬化樹脂。 First, as shown in FIG. 3(A), the protective sheet 20 is placed on the support stage 18, and the liquid resin 26 is supplied from the supply nozzle 22 connected to the resin supply source 24 to the protective sheet 20. The resin 26 may be a resin which is hardened by the addition of external stimuli, for example, an ultraviolet curable resin which is cured by irradiation of ultraviolet rays, or a thermosetting resin which is hardened by heating. In the present embodiment, the liquid resin 26 is an ultraviolet curable resin.
將液狀樹脂26供給至被支撐於支撐載置台18上的保護薄片20上之後，如第3圖(B)所示，將晶圓11的背面11b側吸引保持在保持載置台28，實施將晶圓11的表面11a側朝液狀樹脂26推壓的推壓步驟。 After the liquid resin 26 is supplied onto the protective sheet 20 supported on the support stage 18, as shown in FIG. 3(B), the back surface 11b side of the wafer 11 is sucked and held by the holding stage 28, and the operation is performed. The pressing step of pressing the surface of the surface 11a of the wafer 11 toward the liquid resin 26 is performed.
在第3圖(B)中，保持載置台28是由：形成有圓形凹部30a的框體30、及由被嵌合於框體30的圓形凹部30a中的多孔性陶瓷等所形成的吸引保持部32所構成。 In the third drawing (B), the holding stage 28 is formed of a frame body 30 in which the circular recessed portion 30a is formed, and a porous ceramic or the like which is fitted into the circular recessed portion 30a of the frame body 30. The suction holding unit 32 is configured.
吸引保持部32，是透過吸引路34與吸引源36選擇地連接。保持載置台28是與推壓機構37的支撐構件38連結，藉由推壓機構37朝上下方向可移動地構成。 The suction holding unit 32 is selectively connected to the suction source 36 through the suction path 34. The holding stage 28 is coupled to the support member 38 of the pressing mechanism 37, and is configured to be movable in the vertical direction by the pressing mechanism 37.
在推壓步驟中，將晶圓11吸引保持的保持載置台28藉由推壓機構37，如第3圖(B)及第4圖(A)所 示，朝箭頭A方向移動將晶圓11的表面11a朝被供給至保護薄片20上的液狀樹脂26推壓。 In the pressing step, the holding stage 28 that sucks and holds the wafer 11 is pressed by the pressing mechanism 37 as shown in FIGS. 3(B) and 4(A). The surface 11a of the wafer 11 is pressed toward the liquid resin 26 supplied to the protective sheet 20 in the direction of the arrow A.
藉由此推壓，液狀樹脂26是在保護薄片20及晶圓11之間被壓擴，如第4圖(B)所示，晶圓11的表面11a是在埋設隆起17的狀態下被液狀樹脂26覆蓋。液狀樹脂26，是具有隆起17的高度的1.5~5倍的厚度較佳。 By this pressing, the liquid resin 26 is pressure-expanded between the protective sheet 20 and the wafer 11, and as shown in FIG. 4(B), the surface 11a of the wafer 11 is in a state where the ridge 17 is buried. The liquid resin 26 is covered. The liquid resin 26 is preferably 1.5 to 5 times thicker than the height of the ridges 17.
藉由由具有這種厚度的液狀樹脂將晶圓11的表面11a覆蓋，在保護薄片20上使隆起17的凹凸完全地被消解。且，上述的推壓步驟是構成樹脂被覆步驟的一部分。 By covering the surface 11a of the wafer 11 with a liquid resin having such a thickness, the unevenness of the ridge 17 is completely eliminated on the protective sheet 20. Further, the above pressing step is a part of the resin coating step.
且在上述的實施例中，在支撐載置台18上配設保護薄片20，在此保護薄片20上將液狀樹脂26滴下將晶圓11的表面11a由樹脂26被覆，但是保護薄片26不是必須，省略保護薄片20在支撐載置台18上直接供給液狀樹脂26，將晶圓11的表面11a由樹脂26被覆也可以。在此情況下，支撐載置台18的上面有必要是充分平坦，被硬化的樹脂26是具有可以從支撐載置台18的上面簡單地剝離的性質。 Further, in the above-described embodiment, the protective sheet 20 is disposed on the support stage 18, and the liquid resin 26 is dropped on the protective sheet 20 to cover the surface 11a of the wafer 11 with the resin 26, but the protective sheet 26 is not necessary. The protective sheet 20 is omitted, and the liquid resin 26 is directly supplied onto the support stage 18, and the surface 11a of the wafer 11 may be covered with the resin 26. In this case, it is necessary that the upper surface of the support stage 18 is sufficiently flat, and the resin 26 to be hardened has a property of being easily peeled off from the upper surface of the support stage 18.
實施樹脂被覆步驟之後，實施將液狀樹脂26硬化的樹脂硬化步驟。在本實施例中樹脂26因為採用了紫外線硬化樹脂，所以如第5圖所示，從被配置於支撐載置台18的下方的紫外線燈泡40朝液狀樹脂26將紫外線照射，將樹脂26硬化。 After the resin coating step is performed, a resin curing step of curing the liquid resin 26 is carried out. In the present embodiment, since the resin 26 is made of the ultraviolet curable resin, as shown in FIG. 5, the ultraviolet ray is irradiated from the ultraviolet ray bulb 40 disposed below the support stage 18 toward the liquid resin 26 to cure the resin 26.
且支撐載置台18及保護薄片20有必要具有可透過從紫外線燈泡40被照射的紫外線的性質。液狀樹脂26，是採用熱硬化性樹脂的情況時，藉由將液狀樹脂26加熱使硬化。 Further, it is necessary for the support stage 18 and the protective sheet 20 to have a property of being able to transmit ultraviolet rays irradiated from the ultraviolet bulb 40. When the liquid resin 26 is a thermosetting resin, the liquid resin 26 is heated and hardened.
實施樹脂硬化步驟之後，實施：將晶圓11的背面11b磨削將晶圓11朝規定厚度薄化，並且藉由將溝23朝背面11b露出將晶圓11沿著分割預定線13分割而形成規定厚度的複數元件晶片25的磨削步驟。 After the resin hardening step is performed, the back surface 11b of the wafer 11 is ground to thin the wafer 11 to a predetermined thickness, and the wafer 11 is formed by being divided along the dividing line 13 by exposing the groove 23 toward the back surface 11b. A grinding step of a plurality of component wafers 25 of a prescribed thickness.
在磨削步驟中，將第5圖所示的樹脂硬化步驟實施之後，將從支撐載置台18上剝遠的保護薄片20，如第6圖(A)所示，載置在磨削裝置的挾盤載置台42上由挾盤載置台42透過保護薄片20將晶圓11吸引保持，使晶圓11的背面11b露出。 In the grinding step, after the resin hardening step shown in Fig. 5 is carried out, the protective sheet 20 peeled off from the support stage 18 is placed on the grinding device as shown in Fig. 6(A). The disk mounting table 42 sucks and holds the wafer 11 through the protective sheet 20 on the disk mounting table 42, and exposes the back surface 11b of the wafer 11.
在第6圖(A)中，磨削單元44，是包含：主軸45、及被固定於主軸45的先端的滾輪支架48、及藉由無圖示的螺栓可裝卸地被安裝於滾輪支架48的磨削滾輪50。磨削滾輪50，是由：環狀的滾輪基台52、及被固定(附著)在滾輪基台52的下端部外周的複數磨削砥石54所構成。 In Fig. 6(A), the grinding unit 44 includes a main shaft 45, a roller bracket 48 fixed to the tip end of the main shaft 45, and a roller bracket 48 detachably attached to the roller bracket 48 by a bolt (not shown). Grinding roller 50. The grinding roller 50 is composed of an annular roller base 52 and a plurality of grinding vermiculite 54 fixed (attached) to the outer periphery of the lower end portion of the roller base 52.
在磨削步驟中，將挾盤載置台42朝箭頭a方向例如300rpm地旋轉，且將磨削滾輪50朝箭頭b方向例如6000rpm地旋轉，並且將無圖示的磨削給進機構驅動將磨削砥石54朝晶圓11的背面11b推壓將晶圓11的背面11b磨削。 In the grinding step, the tray mounting table 42 is rotated in the direction of the arrow a, for example, 300 rpm, and the grinding roller 50 is rotated in the direction of the arrow b, for example, 6000 rpm, and the grinding mechanism is driven by a grinding mechanism (not shown). The dicing stone 54 is pressed against the back surface 11b of the wafer 11 to grind the back surface 11b of the wafer 11.
將晶圓11的背面11b磨削將晶圓11朝規定厚度薄化的話，如第6圖(B)所示，溝23是朝晶圓11的背面11b露出使晶圓11被分割成複數元件晶片25。磨削步驟實施後的晶圓11的剖面圖是如第6圖(B)所示。 When the back surface 11b of the wafer 11 is ground and the wafer 11 is thinned toward a predetermined thickness, as shown in FIG. 6(B), the groove 23 is exposed toward the back surface 11b of the wafer 11 so that the wafer 11 is divided into a plurality of elements. Wafer 25. A cross-sectional view of the wafer 11 after the grinding step is performed is shown in Fig. 6(B).
在本實施例的磨削步驟中，形成於晶圓11的表面11a的複數隆起17因為是被埋設在樹脂26中藉由樹脂26使隆起17的凹凸完全地被吸收，所以可以將晶圓11的背面11b磨削將晶圓11一樣厚度地精加工。 In the grinding step of the present embodiment, since the plurality of ridges 17 formed on the surface 11a of the wafer 11 are buried in the resin 26, the irregularities of the ridges 17 are completely absorbed by the resin 26, so that the wafer 11 can be used. The back side 11b is ground to the same thickness as the wafer 11.
將磨削步驟實施之後，如第7圖所示，實施：將晶圓11的背面11b貼合在外周部被裝設於環狀框架F的黏膠帶T的轉移步驟。接著，如第8圖所示，實施：將樹脂26及保護薄片20從晶圓11的表面11a剝離的剝離步驟。因為樹脂26是藉由紫外線的照射被硬化，所以可以簡單地將樹脂26及保護薄片20從晶圓11的表面11a剝離。 After the grinding step is carried out, as shown in Fig. 7, the step of transferring the back surface 11b of the wafer 11 to the adhesive tape T of the outer peripheral portion of the annular frame F is carried out. Next, as shown in FIG. 8, a peeling step of peeling off the resin 26 and the protective sheet 20 from the surface 11a of the wafer 11 is performed. Since the resin 26 is cured by irradiation of ultraviolet rays, the resin 26 and the protective sheet 20 can be easily peeled off from the surface 11a of the wafer 11.
剝離步驟實施後，如第9圖所示，實施藉由無圖示的拾取裝置將元件晶片25從黏膠帶T拾取的拾取步驟，將被拾取的元件晶片25收容於托盤等。 After the peeling step is carried out, as shown in FIG. 9, the pick-up step of picking up the component wafer 25 from the adhesive tape T by a pick-up device (not shown) is performed, and the picked-up component wafer 25 is housed in a tray or the like.
11‧‧‧半導體晶圓 11‧‧‧Semiconductor wafer
11b‧‧‧背面 11b‧‧‧Back
16‧‧‧切削刀片 16‧‧‧Cutting inserts
17‧‧‧隆起 17‧‧ ‧ uplift
20‧‧‧保護薄片 20‧‧‧Protective sheet
23‧‧‧溝 23‧‧‧ditch
25‧‧‧元件晶片 25‧‧‧Component chip
26‧‧‧液狀樹脂 26‧‧‧Liquid resin
42‧‧‧挾盤載置台 42‧‧‧挟盘台
44‧‧‧磨削單元 44‧‧‧ grinding unit
48‧‧‧滾輪支架 48‧‧‧Roller bracket
50‧‧‧磨削滾輪 50‧‧‧ grinding wheel
52‧‧‧滾輪基台 52‧‧‧Roller abutment
54‧‧‧磨削砥石 54‧‧‧ grinding meteorite
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| TW201725616A true TW201725616A (en) | 2017-07-16 |
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Cited By (2)
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| TWI670779B (en) * | 2018-11-16 | 2019-09-01 | 典琦科技股份有限公司 | Method for manufacturing chip package |
| TWI788342B (en) * | 2017-05-11 | 2023-01-01 | 日商迪思科股份有限公司 | Wafer processing method |
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| JP7399565B2 (en) | 2019-12-23 | 2023-12-18 | 株式会社ディスコ | Processing method of workpiece |
| JP7431052B2 (en) | 2020-02-13 | 2024-02-14 | 株式会社ディスコ | Wafer processing method |
| CN115870875B (en) * | 2022-12-08 | 2024-04-12 | 西安奕斯伟材料科技股份有限公司 | Grinding disc and grinding equipment for grinding silicon wafers |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002203828A (en) * | 2000-12-28 | 2002-07-19 | Lintec Corp | Method for grinding back side of wafer |
| JP5832060B2 (en) * | 2008-02-18 | 2015-12-16 | デンカ株式会社 | Method for grinding electronic component assembly and method for dividing electronic component assembly using the same |
-
2015
- 2015-10-21 JP JP2015207469A patent/JP2017079291A/en active Pending
-
2016
- 2016-09-26 TW TW105131076A patent/TW201725616A/en unknown
- 2016-10-13 CN CN201610893990.5A patent/CN106992150A/en active Pending
- 2016-10-17 KR KR1020160134301A patent/KR20170046584A/en unknown
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI788342B (en) * | 2017-05-11 | 2023-01-01 | 日商迪思科股份有限公司 | Wafer processing method |
| TWI670779B (en) * | 2018-11-16 | 2019-09-01 | 典琦科技股份有限公司 | Method for manufacturing chip package |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2017079291A (en) | 2017-04-27 |
| KR20170046584A (en) | 2017-05-02 |
| CN106992150A (en) | 2017-07-28 |
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