TW201723849A - Method for allocating memory resource - Google Patents

Abstract

A method for allocating memory resource is used for a computer system including a BIOS, a memory unit, and a plurality of slots. The slots is able to be inserted by a plurality of expanding devices. The method is implemented by the BIOS and includes: (a) determining whether one of the slots is inserted by an expanding device inserts or not; (b) acquiring a represented memory demand data and a represented format data from the expanding device inserting the slot; (c) determining the memory size of the memory unit for allocating to the expanding device inserting the slot based on the represented memory demand data and the represented format data; so as to achieve the optimization of allocating memory resource.

Description

Memory resource configuration method

The present invention relates to a configuration method, and more particularly to a method for configuring a memory resource.

The conventional computer system includes a basic input/output system, a plurality of slots for inserting an Add-On Card, and a plurality of memories. These extended interface cards support the agreement of the Peripheral Component Interconnect (PCI, PCI Express). After the computer system is turned on, the basic input/output system allocates memory resources to the extended interface cards according to a pre-stored setting table. Since the extended interface cards can support both 32-bit or 64-bit formats, the conventional computer system encounters the following two problems.

First, since it is impossible to know in advance which slot the extended interface card supporting 64-bit will be inserted, if the pre-stored setting table assumes that all the extended interface cards support the 32-bit format to allocate memory resources. It may cause the memory capacity of all expansion interface cards to exceed the upper limit supported by the 32-bit format, that is, 4 billion bytes (4Giga Byte; 4GB), and some expansion interface cards are not allocated enough memory. body The size of the capacity.

Second, by modifying the setting table of the basic input/output system, the user manually changes the expansion interface card inserted in the partial slot supporting the 32-bit format to 64 in the BIOS Setup Menu. Bit format. However, for example, if the extended interface card supports the 32-bit format, but the user is set to support the 64-bit format, the computer system will be unstable.

Accordingly, it is an object of the present invention to provide a configuration method for optimizing memory resource allocation.

Therefore, the method for configuring the memory resource of the present invention is applicable to a computer system including a basic input/output system, a memory unit, and a plurality of slots. These slots provide multiple expansion device insertions. The method for configuring the memory resource includes steps (a) to (c).

In step (a), the basic input/output system determines whether one of the slots is provided with an expansion device.

In step (b), the basic input/output system obtains a corresponding memory requirement data and a corresponding specification data from the expansion device disposed in the one of the slots.

In step (c), the basic input/output system determines the memory allocated to the expansion device of the one of the slots according to the corresponding memory requirement data and the corresponding specification data. The memory capacity of the unit.

In some implementations, the slots and the expansion devices Agreement to support external connection standards (PCI, PCI Express). Wherein, in the step (b), the memory demand data indicates a memory capacity required by the expansion device, and the specification data indicates that the expansion device supports one of a 32-bit format and a 64-bit format. .

In some implementations, each expansion device includes a Configuration Space Register (CSR), and each configuration space register includes a plurality of Base Address Registers (BARs). . Wherein, in step (b), the basic input/output system transmits a first instruction to each of the base address registers of the expansion device, and respectively receives one of each of the base address registers of the expansion device The second instruction obtains the memory requirement data of the expansion device and the specification data.

In some implementations, the method of configuring the memory resource further includes steps (d) and (e) between steps (b) and (c).

In step (d), the basic input/output system determines whether the other of the slots is provided with another expansion device.

In step (e), when the basic input/output system determines in step (d) that the other of the slots has another expansion device, steps (b) and (d) are re-executed until In step (d), the basic input/output system determines that the other of the slots does not have another expansion device.

Wherein, in step (c), the sum of the memory capacities required by all of the expansion devices is calculated by the basic input/output system. When the sum is not greater than an upper limit value, the basic input/output system respectively corresponds to the memory demand data of the expansion devices, and corresponds to the upper limit value. The memory capacity of the following memory addresses is allocated to the expansion devices. When the sum is greater than the upper limit value, the basic input/output system respectively corresponds to the specification data of the 32-bit extended expansion devices and the memory demand data, and corresponds to the memory level below the upper limit value. The memory capacity of the address is allocated to the expansion devices, and the memory addresses corresponding to the upper limit value are corresponding to the specification data of the expansion devices supporting the 64-bit device and the memory demand data. The memory capacity is allocated to the expansion devices.

In some implementations, wherein, in the step (b), the first instruction is 0xFFFFFFFF, each second instruction includes 32 bits, and the MSB to the LSB are sequentially the thirty-first bit to the first The zero bit, the zeroth bit of the second instruction is a memory space indication, and the second bit of the second instruction and the logical value of the first bit are the specification data.

When the second bit of the second instruction and the first bit are logical values 00, the expansion device supports a 32-bit format. When the second bit of the second instruction and the first bit are logical values of 10, the expansion device supports a format of 64 bits.

The basic input/output system adds the zeroth bit to a value corresponding to the logical value of the third eleventh to the fourth bit of each second instruction of the logical value 0, and obtains the memory. Physical requirements data.

In step (c), the upper limit is four billion bytes (4 Giga Byte; 4 GB).

Or in some implementations, wherein in step (c), the basic input/output system supports the 32-bit expansion according to the indication The specification data of the device and the memory requirement data, the memory capacity corresponding to a memory address below the upper limit value is allocated to the expansion devices, and the expansion devices supporting the 64-bit device respectively according to the instructions The specification data and the memory requirement data are allocated to the expansion devices for the memory capacity of the memory address above the upper limit.

Or in some implementations, the method of configuring the memory resource further includes steps (d) and (e) subsequent to step (c).

In step (d), the basic input/output system determines whether the other of the slots is provided with another expansion device.

In the step (e), when the basic input/output system determines in step (d) that the other of the slots has another expansion device, the steps (b) to (d) are re-executed until In step (d), the basic input/output system determines that the other of the slots does not have another expansion device.

The function of the present invention is to determine whether the slots are inserted with the expansion devices by the basic input/output system, and obtain the corresponding memory demand data and the specification data by the expansion devices, so that the basic input and output The system can determine the size of the memory unit allocated to the expansion devices to optimize memory resource allocation.

1‧‧‧Central Processing Unit

2‧‧‧chipset

3‧‧‧Basic input and output system

4‧‧‧ memory unit

51‧‧‧First slot

52‧‧‧second slot

53‧‧‧ third slot

54‧‧‧fourth slot

61‧‧‧First expansion unit

62‧‧‧Second expansion unit

S1~S7‧‧‧ steps

S41~S42‧‧‧Steps

S61~S62‧‧‧Steps

Other features and effects of the present invention will be apparent from the embodiments of the present invention. FIG. 1 is a block diagram illustrating a computer system to which the memory resource configuration method of the present invention is applied. FIG. A flowchart illustrating a method of configuring a memory resource of the present invention A first embodiment; and FIG. 3 is a flow chart illustrating a second embodiment of a method of configuring a memory resource of the present invention.

Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.

Referring to FIG. 1, a method for configuring a memory resource according to the present invention is applicable to a computer system including a central processing unit (CPU) 1, a chip set (Chipset) 2, and a basic input/output system (Basic Input/Output). System; BIOS) 3, a memory unit 4, and a plurality of slots (Slots), which can provide multiple expansion device insertions. In this embodiment, the slots and the expansion devices support the external connection standard, that is, the Peripheral Component Interconnect (PCI) or the Peripheral Component Interconnect Express (PCIE) protocol. Therefore, each expansion device includes one configuration space. The Configuration Space Register (CSR), each configuration space register includes multiple, for example, six, Base Address Register (BAR). For convenience of description, the slots are electrically connected to a first slot 51 and a second slot 52 of the central processing unit 1, and a third slot 53 and a first portion electrically connected to the chip set 2. The four slots 54 are for illustrative purposes, but are not limited to this. Similarly, the expansion device is illustrated by a first expansion device 61 inserted in the first slot 51 and a second expansion device 62 inserted in the second slot 52, but not limited thereto. .

Referring to FIG. 1 and FIG. 2, the configuration side of the memory resource of the present invention The first embodiment of the method is implemented by the computer system and steps S1 to S7 are performed.

In step S1, the computer system is powered on by starting the power.

In step S2, the basic input/output system 3 determines whether one of the slots is provided with an expansion device. In more detail, after the power is turned on, the central processing unit 1 and the chipset 2 respectively define the bus numbers of the expansion slots to which the respective expansion slots are electrically connected, and store related information in the center. Inside processor 1. The basic input/output system 3 transmits a third command to each slot one by one via the central processing unit 1, and then according to whether each slot has a fourth command to determine whether the slot has an extension. Device. When the basic input/output system 3 determines that one of the slots is provided with an expansion device, if the first slot 51 is provided with the first expansion device 61, the computer system performs step S3. When the basic input/output system 3 judges that no expansion device is set, the computer system executes step S7.

In step S3, the basic input/output system 3 obtains a corresponding memory demand data from the expansion device disposed in the one of the slots. The memory demand data indicates the amount of memory capacity required by the expansion device.

In more detail, the basic input/output system 3 transmits a first instruction to each of the base address registers of the expansion device, and respectively receives a second instruction of each of the base address registers of the expansion device. And obtaining the memory demand data of the expansion device. The first instruction and each A second instruction includes 32 bits, the first instruction is 0xFFFFFFFF (the 32 bits are represented by hexadecimal), and the second instruction is sequentially from the MSB to the LSB to the third eleventh to the zeroth. The bit, the zeroth bit of the second instruction is a Memory Space Indicator.

The basic input/output system 3 adds the zeroth bit to a value corresponding to the logical value of the third eleventh to the fourth bit of each second instruction of the logical value 0, and obtains the Memory requirements data. For example, if one of the six base address registers of the expansion device replies to the second instruction is 0xF8000000, and the binary representation is the third eleventh to the twenty-seventh bit Logic 1, the twenty-sixth bit to the zeroth bit is a logic 0, and the corresponding value is 2 ²⁷ = 128 (MByte). Similarly, if the other of the six base address registers replies that the second instruction is 0xF0000000, and the binary representation is the third octet to the second octet is logic 1, the The twenty-seventh bit to the zeroth bit is a logical zero, and the corresponding value is 2 ²⁸ = 256 (MByte). Therefore, the basic input/output system 3 adds the two values, 128 Mbyte and 256 Mbyte, to obtain the memory demand data, that is, 384 Mbyte.

In step S4, the basic input/output system 3 obtains a corresponding specification data from the expansion device disposed in the one of the slots. The specification data indicates which of the 32-bit and 64-bit formats the expansion device supports.

In more detail, the basic input/output system 3 accepts the second instruction of each of the base register and also obtains the specification data. The second The second bit of the instruction and the logical value of the first bit are the specification data. When the second bit of the second instruction and the first bit are logic value 00b, the expansion device supports a 32-bit format. When the second bit of the second instruction and the first bit are logical values 10b, the expansion device supports a 64-bit format. It is specifically added that "b" means that the logical value is represented by binary. It should be particularly noted that steps S3 and S4 are judged based on the received second commands. Therefore, the order of steps S3 and S4 can be performed not only in the same but also in the same step.

In step S5, the basic input/output system 3 determines whether the other of the slots is provided with another expansion device. For detailed implementation, refer to step S2. When the basic input/output system 3 determines that the other of the slots is provided with an expansion device, such as the first slot 51 is provided with the second expansion device 62, the computer system performs step S3. When the basic input/output system 3 judges that no expansion device is set, the computer system executes step S6.

In step S6, the basic input/output system 3 calculates the sum of the memory capacities required by all of the expansion devices. When the sum is greater than an upper limit, such as four billion bytes (4 GB), the computer system performs step S61. When the sum is not greater than the upper limit value, the computer system performs step S62.

In step S61, the basic input/output system 3 respectively stores the memory capacity corresponding to the memory address below the upper limit value according to the specification data of the expansion devices supporting the 32-bit device and the memory demand data. Assigned to these expansion devices and support 64-bit units as directed The specification data of the expansion devices and the memory requirement data allocate memory capacity corresponding to the memory address above the upper limit value to the expansion devices.

For example, it is assumed that the capacity of the memory unit 4 is 6 GB, and it is assumed that the specification data corresponding to the first expansion device 61 and the memory requirement data respectively support 32 bits and 3 GB, corresponding to the second expansion device 62. The specification data and the memory requirement data respectively support 64 bits and 2 GB, and the basic input/output system 3 passes the memory controller 4 of the memory unit 4 via a memory controller of the central processing unit 1. The 3GB memory capacity corresponding to the 3GB memory address is allocated to the first expansion device 61, and the 2GB memory capacity corresponding to the 4~6 GB memory address of the memory unit 4 is allocated to the second Expansion device 62.

In step S62, the basic input/output system 3 allocates the memory capacity corresponding to the memory address below the upper limit value to the expansion devices in accordance with the memory demand data of the expansion devices.

In particular, in the present embodiment, the upper limit value of the memory allocated to the expansion device supporting the 32-bit format is 4 GB, and is allocated to the memory of the expansion device supporting the format of 64-bit. The upper limit is the 64th power of 2, that is, 16 EB (1 EB = 1024 TB, 1 TB = 1024 GB), and in this embodiment of the present invention, by distinguishing an expansion device, such as a format supported by the PCI device, such as 32 or A 64-bit memory is allocated to each PCI device in a different area (for example, an expansion device that supports a 32-bit format from 0 to 4 GB, and an expansion device that supports a 64-bit format from 4 GB to 16 EB).

In step S7, the computer system continues to boot the relevant program and executes into the operating system (OS).

Referring to FIG. 1 and FIG. 3, the second embodiment of the method for configuring the memory resource of the present invention is substantially similar to the first embodiment, and the different places are as follows.

In step S4, the basic input/output system 3 obtains a corresponding specification data from the expansion device disposed in the one of the slots, and determines whether the expansion device supports the 64-bit format. When the basic input/output system 3 determines that the expansion device has a format supporting 64 bits, the computer system executes step S41. When the basic input/output system 3 determines that the expansion device does not support the 64-bit format, the computer system executes step S42.

In step S41, the basic input/output system 3 allocates a memory capacity corresponding to the memory address of the upper limit value or more to the expansion device according to the memory demand data of the one of the expansion devices.

In step S42, the basic input/output system 3 allocates a memory capacity corresponding to the memory address below the upper limit value to the expansion device according to the memory demand data of the one of the expansion devices.

In particular, the first embodiment of the method for configuring a memory resource according to the present invention is to first calculate the sum of the memory resources of the expansion devices, and redistribute the memory resources, and the method for configuring the memory resources of the present invention. This second embodiment directly allocates memory resources for each expansion device, one by one. In general, the configuration method is based on the basic input/output system 3 according to the record corresponding to the expansion device. The memory requirement data and the corresponding specification data determine the memory capacity of the memory unit 4 allocated to the expansion device.

In summary, the basic input/output system 3 determines whether the expansion devices are inserted into the slots, and the corresponding expansion device obtains the corresponding memory requirement data and the specification data, so that the basic input The output system 3 can determine the size of the memory unit 4 allocated to the expansion devices, and the memory resource allocation can be optimized. Therefore, the object of the present invention can be achieved.

The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, and the simple equivalent changes and modifications made by the scope of the patent application and the patent specification of the present invention are It is still within the scope of the invention patent.

S1~S7‧‧‧ steps

S61~S62‧‧‧Steps

Claims (8)

A method for configuring a memory resource, which is applicable to a computer system including a basic input/output system, a memory unit, and a plurality of slots, the slots providing a plurality of expansion device insertions, the memory The method for configuring a physical resource includes the following steps: (a) determining, by the basic input/output system, whether one of the slots is provided with an expansion device; (b) setting the system by the basic input/output system The expansion device of the slot obtains a corresponding memory requirement data and a corresponding specification data; and (c) the basic input/output system according to the corresponding memory requirement data and the corresponding specification The data determines the amount of memory capacity of the memory unit allocated to the expansion device of the one of the slots. The method for configuring a memory resource according to claim 1, wherein the slots and the expansion devices support an agreement of an external connection standard (PCI, PCI Express), wherein in step (b), the memory requirement data Indicates the amount of memory capacity required by the expansion device, the specification data indicating that the expansion device supports one of a 32-bit format and a 64-bit format. For the configuration method of the memory resource described in claim 2, each expansion device includes a configuration space register (CSR), and each configuration space register includes a plurality of base address registers. (Base Address Register; BAR), where, in step (b) The basic input/output system transmits a first instruction to each of the base address registers of the expansion device, and respectively receives a second instruction of each of the base address registers of the expansion device, and obtains the The memory requirement data of the expansion device and the specification data. The method for configuring a memory resource according to claim 3, further comprising the following steps between steps (b) and (c): (d) determining, by the basic input/output system, one of the other slots Whether it is provided with another expansion device; and (e) when in step (d), the basic input/output system determines that the other of the slots has another expansion device, and then performs step (b) again. And (d), until in step (d), the basic input/output system determines that the other of the slots does not have another expansion device; wherein, in step (c), the basic input/output system Calculating the sum of the memory capacities required by all of the expansion devices. When the sum is not greater than an upper limit value, the basic input/output system respectively corresponds to the memory demand data of the expansion devices. The memory capacity of the memory address below the limit value is allocated to the expansion devices, and when the sum is greater than the upper limit value, the basic input/output system respectively according to the specification data of the expansion devices supporting the 32-bit support And the memory Requesting information, the memory capacity of the memory address below the upper limit value is allocated to the expansion devices, and the specification data of the expansion devices supporting the 64-bit device and the memory demand data are respectively instructed according to the instructions. , will correspond to the above upper limit The memory capacity of the memory address is assigned to the expansion devices. The method for configuring a memory resource according to claim 4, wherein, in the step (b), the first instruction is 0xFFFFFFFF, each second instruction includes 32 bits, and the MSB to the LSB are sequentially The thirty-oneth to the zeroth bit, the zeroth bit of the second instruction is a memory space indication, and the second bit of the second instruction and the logical value of the first bit are the specification Data, when the second bit of the second instruction and the first bit are logic value 00, the expansion device supports a 32-bit format, when the second bit of the second instruction and the first When the bit is a logical value of 10, the expansion device supports a 64-bit format, and the basic input/output system sets the zeroth bit to the third eleventh bit of each second instruction of the logical value 0 to the first The value corresponding to the logical value of the four bits is added to obtain the memory requirement data. In the step (c), the upper limit is four billion bytes (4 Giga Byte; 4 GB). The method for configuring a memory resource according to claim 3, wherein, in the step (c), the basic input/output system respectively supports the specification data and the memory of the expansion device supporting 32 bits. The demand data, the memory capacity corresponding to a memory address below the upper limit value is allocated to the expansion devices, and the specification data and the memory requirement data of the expansion devices supporting the 64-bit device are respectively instructed according to the instructions. Will remember the memory address of the memory address above the upper limit The amount is allocated to the expansion devices. The method for configuring a memory resource according to claim 6, further comprising the following steps after the step (c): (d) determining, by the basic input/output system, whether the other one of the slots is set to another An expansion device; and (e) when in step (d), the basic input/output system determines that the other of the slots has another expansion device, and then performs steps (b) to (d) again, Until in step (d), the basic input output system determines that the other of the slots does not have another expansion device. The method for configuring a memory resource according to claim 7, wherein in the step (b), the first instruction is 0xFFFFFFFF, each second instruction includes 32 bits, and the MSB to the LSB are sequentially The thirty-oneth to the zeroth bit, the zeroth bit of the second instruction is a memory space indication, and the second bit of the second instruction and the logical value of the first bit are the specification data. When the second bit of the second instruction and the first bit are logic value 00, the expansion device supports a 32-bit format, when the second bit of the second instruction and the first bit When the element is a logical value of 10, the expansion device supports a 64-bit format, and the basic input/output system sets the zeroth bit to the third eleventh of each second instruction of the logical value 0 to the fourth The value corresponding to the logical value of the bit is added to obtain the memory requirement data. In the step (c), the upper limit is 4 billion bytes (4Giga) Byte; 4GB).