TW201717527A - Boost power factor correction apparatus with low power dissipation - Google Patents
Boost power factor correction apparatus with low power dissipation Download PDFInfo
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- TW201717527A TW201717527A TW104136553A TW104136553A TW201717527A TW 201717527 A TW201717527 A TW 201717527A TW 104136553 A TW104136553 A TW 104136553A TW 104136553 A TW104136553 A TW 104136553A TW 201717527 A TW201717527 A TW 201717527A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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本發明係有關於一種升壓型功率因數校正裝置,特別是一種低功率損耗之升壓型功率因數校正裝置。The present invention relates to a boost type power factor correction device, and more particularly to a low power loss boost type power factor correction device.
一相關技術之升壓型功率因數校正裝置具有包含兩電阻之分壓電阻電路,分壓電阻電路連接至輸出端,將輸出高電壓進行分壓以得到一電壓回授信號,分壓電阻電路將電壓回授信號傳送至功率因數校正控制器以調整脈波寬度調變信號以進行功率因數校正。A related art boost type power factor correction device has a voltage dividing resistor circuit including two resistors, a voltage dividing resistor circuit is connected to the output terminal, and the output high voltage is divided to obtain a voltage feedback signal, and the voltage dividing resistor circuit The voltage feedback signal is passed to a power factor correction controller to adjust the pulse width modulation signal for power factor correction.
上述之分壓電阻電路結構雖然簡單,但在空載時分壓電阻電路仍會損耗功率(因為分壓電阻電路連接至輸出端,而輸出端隨時都有高電壓)。換句話說,上述之分壓電阻電路隨時都在損耗功率以產生電壓回授信號;但實際上,功率因數校正控制器卻不是隨時都需要電壓回授信號。Although the above-mentioned voltage dividing resistor circuit structure is simple, the voltage dividing resistor circuit still loses power when it is idling (because the voltage dividing resistor circuit is connected to the output terminal, and the output terminal has a high voltage at any time). In other words, the above-mentioned voltage dividing resistor circuit is consuming power to generate a voltage feedback signal at any time; but in reality, the power factor correction controller does not need a voltage feedback signal at any time.
為改善上述習知技術之缺點,本發明之目的在於提供一種低功率損耗之升壓型功率因數校正裝置。In order to improve the above disadvantages of the prior art, it is an object of the present invention to provide a boost power factor correction device with low power loss.
為達成本發明之上述目的,本發明之低功率損耗之升壓型功率因數校正裝置包含:一電晶體開關;一二極體,該二極體的陽極電性連接至該電晶體開關;一第一分壓電阻,該第一分壓電阻的一端電性連接至該電晶體開關及該二極體的陽極;一第二分壓電阻,該第二分壓電阻的一端電性連接至該第一分壓電阻的另一端;及一功率因數校正控制單元,該功率因數校正控制單元電性連接至該電晶體開關,以及該第一分壓電阻及該第二分壓電阻之間。其中該功率因數校正控制單元包含:一脈波寬度調變信號產生器,該脈波寬度調變信號產生器電性連接至該電晶體開關;一信號反向子單元,該信號反向子單元電性連接至該電晶體開關及該脈波寬度調變信號產生器之間;及一開關子單元,該開關子單元電性連接至該第一分壓電阻及該第二分壓電阻之間,以及該信號反向子單元。其中該脈波寬度調變信號產生器傳送一脈波寬度調變信號至該電晶體開關以控制該電晶體開關的開關狀態;該脈波寬度調變信號產生器傳送該脈波寬度調變信號至該信號反向子單元;依據該脈波寬度調變信號,該信號反向子單元產生一反向脈波寬度調變信號以控制該開關子單元的開關狀態;當該電晶體開關導通時,該開關子單元不導通,使該第一分壓電阻無功率消耗;當該電晶體開關不導通時,該開關子單元導通,使得該功率因數校正控制單元接收到從該第一分壓電阻及該第二分壓電阻之間所產生之一電壓回授信號。In order to achieve the above object of the present invention, the low power loss boost type power factor correction device of the present invention comprises: a transistor switch; a diode, the anode of the diode is electrically connected to the transistor switch; a first voltage dividing resistor, one end of the first voltage dividing resistor is electrically connected to the transistor switch and the anode of the diode; a second voltage dividing resistor, one end of the second voltage dividing resistor is electrically connected to the The other end of the first voltage dividing resistor; and a power factor correction control unit electrically connected to the transistor switch and between the first voltage dividing resistor and the second voltage dividing resistor. Wherein the power factor correction control unit comprises: a pulse width modulation signal generator, the pulse width modulation signal generator is electrically connected to the transistor switch; a signal reversal subunit, the signal reversal subunit Electrically connected between the transistor switch and the pulse width modulation signal generator; and a switch subunit electrically connected between the first voltage dividing resistor and the second voltage dividing resistor And the signal reverse subunit. The pulse width modulation signal generator transmits a pulse width modulation signal to the transistor switch to control a switching state of the transistor switch; the pulse width modulation signal generator transmits the pulse width modulation signal Up to the signal reversal subunit; the signal reversal subunit generates a reverse pulse width modulation signal to control the switching state of the switch subunit according to the pulse width modulation signal; when the transistor switch is turned on The switch subunit is not turned on, so that the first voltage dividing resistor has no power consumption; when the transistor switch is not turned on, the switch subunit is turned on, so that the power factor correction control unit receives the first voltage dividing resistor And a voltage feedback signal generated between the second voltage dividing resistor.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,其中該功率因數校正控制單元更包含:一取樣保持電路,該取樣保持電路電性連接至該開關子單元。Furthermore, the low power loss boost type power factor correction device as described above, wherein the power factor correction control unit further comprises: a sample hold circuit electrically connected to the switch subunit.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,其中該功率因數校正控制單元更包含:一回授補償器,該回授補償器電性連接至該取樣保持電路及該脈波寬度調變信號產生器。Furthermore, the boosting power factor correction device of the low power loss as described above, wherein the power factor correction control unit further comprises: a feedback compensator, the feedback compensator being electrically connected to the sample and hold circuit and the Pulse width modulation signal generator.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,更包含:一電感,該電感電性連接至該電晶體開關、該二極體的陽極及該第一分壓電阻。Furthermore, the low power loss boost type power factor correction device as described above further includes: an inductor electrically connected to the transistor switch, the anode of the diode, and the first voltage dividing resistor.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,更包含:一輸入端電容,該輸入端電容電性連接至該電感;及一輸出端電容,該輸出端電容電性連接至該二極體之陰極。Furthermore, the low power loss boost type power factor correction device as described above further includes: an input capacitor, the input capacitor is electrically connected to the inductor; and an output capacitor, the output capacitor electrical Connected to the cathode of the diode.
為達成本發明之目的,本發明之低功率損耗之升壓型功率因數校正裝置的另一實施例包含:一電晶體開關;一二極體,該二極體的陽極電性連接至該電晶體開關;一第一分壓電阻,該第一分壓電阻的一端電性連接至該二極體的陰極;及一功率因數校正控制單元,該功率因數校正控制單元電性連接至該電晶體開關及該第一分壓電阻的另一端。其中該功率因數校正控制單元包含:一脈波寬度調變信號產生器,該脈波寬度調變信號產生器電性連接至該電晶體開關;一開關子單元,該開關子單元電性連接至該第一分壓電阻的另一端;一取樣時脈產生器,該取樣時脈產生器電性連接至該開關子單元;及一第二分壓電阻,該第二分壓電阻的一端電性連接至該開關子單元。其中該取樣時脈產生器控制該開關子單元的開關狀態;當該開關子單元導通時,該功率因數校正控制單元接收到從該第一分壓電阻及該第二分壓電阻之間所產生之一電壓回授信號。In order to achieve the object of the present invention, another embodiment of the low power loss boost type power factor correction device of the present invention comprises: a transistor switch; a diode, the anode of the diode being electrically connected to the electricity a first voltage dividing resistor, one end of the first voltage dividing resistor is electrically connected to the cathode of the diode; and a power factor correction control unit electrically connected to the transistor The switch and the other end of the first voltage dividing resistor. The power factor correction control unit includes: a pulse width modulation signal generator electrically connected to the transistor switch; a switch subunit electrically connected to the switch subunit The other end of the first voltage dividing resistor; a sampling clock generator, the sampling clock generator is electrically connected to the switch subunit; and a second voltage dividing resistor, one end of the second voltage dividing resistor Connect to the switch subunit. The sampling clock generator controls a switching state of the switching subunit; when the switching subunit is turned on, the power factor correction control unit receives a difference between the first voltage dividing resistor and the second voltage dividing resistor One of the voltage feedback signals.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,其中該功率因數校正控制單元更包含:一取樣保持電路,該取樣保持電路電性連接至該開關子單元及該第二分壓電阻的該端。Furthermore, the low power loss boost type power factor correction device as described above, wherein the power factor correction control unit further comprises: a sample and hold circuit electrically connected to the switch subunit and the second This end of the voltage dividing resistor.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,其中該功率因數校正控制單元更包含:一回授補償器,該回授補償器電性連接至該取樣保持電路及該脈波寬度調變信號產生器。Furthermore, the boosting power factor correction device of the low power loss as described above, wherein the power factor correction control unit further comprises: a feedback compensator, the feedback compensator being electrically connected to the sample and hold circuit and the Pulse width modulation signal generator.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,更包含:一電感,該電感電性連接至該電晶體開關及該二極體的陽極。Furthermore, the low power loss boost type power factor correction device as described above further includes: an inductor electrically connected to the transistor switch and the anode of the diode.
再者,如上所述之低功率損耗之升壓型功率因數校正裝置,更包含:一輸入端電容,該輸入端電容電性連接至該電感;及一輸出端電容,該輸出端電容電性連接至該二極體之陰極及該第一分壓電阻的一端。Furthermore, the low power loss boost type power factor correction device as described above further includes: an input capacitor, the input capacitor is electrically connected to the inductor; and an output capacitor, the output capacitor electrical Connected to the cathode of the diode and one end of the first voltage dividing resistor.
本發明之功效在於降低用以產生電壓回授信號以傳送至功率因數校正控制器的分壓電阻的功率損耗。The effect of the present invention is to reduce the power loss of the voltage dividing resistor used to generate the voltage feedback signal for transmission to the power factor correction controller.
有關本發明的詳細說明及技術內容,請參閱以下的詳細說明和附圖說明如下,而附圖與詳細說明僅作為說明之用,並非用於限制本發明。The detailed description and the technical description of the present invention are to be understood as the
請參考圖1,其係為本發明之低功率損耗之升壓型功率因數校正裝置之第一實施例方塊圖。本發明之低功率損耗之升壓型功率因數校正裝置10係應用於一交流電壓供應裝置20、一橋式整流器30及一負載裝置40。該低功率損耗之升壓型功率因數校正裝置10包含一電晶體開關Q1、一二極體D1、一第一分壓電阻R1、一第二分壓電阻R2、一功率因數校正控制單元102、一電感L1、一輸入端電容C1及一輸出端電容C2。該低功率損耗之升壓型功率因數校正裝置10係輸出例如400伏特電壓至該負載裝置40。Please refer to FIG. 1, which is a block diagram of a first embodiment of a low power loss boost type power factor correction apparatus of the present invention. The low power loss boost type power factor correction device 10 of the present invention is applied to an AC voltage supply device 20, a bridge rectifier 30, and a load device 40. The low power loss boost type power factor correction device 10 includes a transistor switch Q1, a diode D1, a first voltage dividing resistor R1, a second voltage dividing resistor R2, a power factor correction control unit 102, An inductor L1, an input capacitor C1 and an output capacitor C2. The low power loss boost type power factor correction device 10 outputs a voltage of, for example, 400 volts to the load device 40.
該二極體D1的陽極電性連接至該電晶體開關Q1;該第一分壓電阻R1的一端電性連接至該電晶體開關Q1及該二極體D1的陽極;該第二分壓電阻R2的一端電性連接至該第一分壓電阻R1的另一端;該功率因數校正控制單元102電性連接至該電晶體開關Q1,以及該第一分壓電阻R1及該第二分壓電阻R2之間;該電感L1電性連接至該電晶體開關Q1、該二極體D1的陽極及該第一分壓電阻R1;該輸入端電容C1電性連接至該電感L1;該輸出端電容C2電性連接至該二極體D1之陰極。其中,該第一分壓電阻R1的一端係連接至該電晶體開關Q1的汲極(drain)及該二極體D1的陽極。The anode of the diode D1 is electrically connected to the transistor switch Q1; one end of the first voltage dividing resistor R1 is electrically connected to the transistor switch Q1 and the anode of the diode D1; the second voltage dividing resistor One end of the R2 is electrically connected to the other end of the first voltage dividing resistor R1; the power factor correction control unit 102 is electrically connected to the transistor switch Q1, and the first voltage dividing resistor R1 and the second voltage dividing resistor The inductor L1 is electrically connected to the transistor switch Q1, the anode of the diode D1 and the first voltage dividing resistor R1; the input capacitor C1 is electrically connected to the inductor L1; the output capacitor C2 is electrically connected to the cathode of the diode D1. The one end of the first voltage dividing resistor R1 is connected to the drain of the transistor switch Q1 and the anode of the diode D1.
該功率因數校正控制單元102包含一脈波寬度調變信號產生器10202、一信號反向子單元10204、一開關子單元10206、一取樣保持電路10208及一回授補償器10210。The power factor correction control unit 102 includes a pulse width modulation signal generator 10202, a signal reversal subunit 10204, a switch subunit 10206, a sample and hold circuit 10208, and a feedback compensator 10210.
該脈波寬度調變信號產生器10202電性連接至該電晶體開關Q1;該信號反向子單元10204電性連接至該電晶體開關Q1及該脈波寬度調變信號產生器10202之間;該開關子單元10206電性連接至該第一分壓電阻R1及該第二分壓電阻R2之間,以及該信號反向子單元10204;該取樣保持電路10208電性連接至該開關子單元10206;該回授補償器10210電性連接至該取樣保持電路10208及該脈波寬度調變信號產生器10202。The pulse width modulation signal generator 10202 is electrically connected to the transistor switch Q1; the signal reverse subunit 10204 is electrically connected between the transistor switch Q1 and the pulse width modulation signal generator 10202; The switch subunit 10206 is electrically connected between the first voltage dividing resistor R1 and the second voltage dividing resistor R2, and the signal reverse subunit 10204; the sample and hold circuit 10208 is electrically connected to the switch subunit 10206. The feedback compensator 10210 is electrically connected to the sample and hold circuit 10208 and the pulse width modulation signal generator 10202.
該脈波寬度調變信號產生器10202傳送一脈波寬度調變信號10212至該電晶體開關Q1以控制該電晶體開關Q1的開關狀態;該脈波寬度調變信號產生器10202傳送該脈波寬度調變信號10212至該信號反向子單元10204;依據該脈波寬度調變信號10212,該信號反向子單元10204產生一反向脈波寬度調變信號10214以控制該開關子單元10206的開關狀態;當該電晶體開關Q1導通時,該開關子單元10206不導通,使該第一分壓電阻R1無功率消耗;當該電晶體開關Q1不導通時,該開關子單元10206導通,使得該功率因數校正控制單元102接收到從該第一分壓電阻R1及該第二分壓電阻R2之間所產生之一電壓回授信號10216。The pulse width modulation signal generator 10202 transmits a pulse width modulation signal 10212 to the transistor switch Q1 to control a switching state of the transistor switch Q1; the pulse width modulation signal generator 10202 transmits the pulse wave The width modulation signal 10212 to the signal reversal subunit 10204; the signal reversal subunit 10204 generates a reverse pulse width modulation signal 10214 to control the switch subunit 10206 according to the pulse width modulation signal 10212. a switch state; when the transistor switch Q1 is turned on, the switch subunit 10206 is not turned on, so that the first voltage dividing resistor R1 has no power consumption; when the transistor switch Q1 is not turned on, the switch subunit 10206 is turned on, The power factor correction control unit 102 receives a voltage feedback signal 10216 generated between the first voltage dividing resistor R1 and the second voltage dividing resistor R2.
其中,該反向脈波寬度調變信號10214與該脈波寬度調變信號10212相反,使得當該電晶體開關Q1導通時,該開關子單元10206不導通,且當該電晶體開關Q1不導通時,該開關子單元10206導通。當該電晶體開關Q1導通時,該第一分壓電阻R1的一端透過該電晶體開關Q1接地,使得該第一分壓電阻R1的一端的電壓為零,且該第一分壓電阻R1及該第二分壓電阻R2不損耗功率。藉由該電壓回授信號10216,該功率因數校正控制單元102調整該脈波寬度調變信號10212以進行功率因數校正。The reverse pulse width modulation signal 10214 is opposite to the pulse width modulation signal 10212, such that when the transistor switch Q1 is turned on, the switch subunit 10206 is not turned on, and when the transistor switch Q1 is not turned on. At this time, the switch subunit 10206 is turned on. When the transistor switch Q1 is turned on, one end of the first voltage dividing resistor R1 is grounded through the transistor switch Q1, so that the voltage of one end of the first voltage dividing resistor R1 is zero, and the first voltage dividing resistor R1 and The second voltage dividing resistor R2 does not consume power. With the voltage feedback signal 10216, the power factor correction control unit 102 adjusts the pulse width modulation signal 10212 for power factor correction.
圖1所示之該第一分壓電阻R1的一端係連接至該電晶體開關Q1的汲極(drain)及該二極體D1的陽極,因此只有在該電晶體開關Q1不導通時,該電感L1的電流順偏該二極體D1,此時該第一分壓電阻R1的一端的電壓等於輸出電壓,此時取樣輸出電壓並保持取樣資料。當該電晶體開關Q1導通時,該第一分壓電阻R1的一端的電壓為零,就沒有功率消耗在該第一分壓電阻R1及該第二分壓電阻R2。One end of the first voltage dividing resistor R1 shown in FIG. 1 is connected to the drain of the transistor switch Q1 and the anode of the diode D1, so that only when the transistor switch Q1 is not turned on, The current of the inductor L1 is offset from the diode D1. At this time, the voltage of one end of the first voltage dividing resistor R1 is equal to the output voltage, and the output voltage is sampled at this time and the sample data is kept. When the transistor switch Q1 is turned on, the voltage at one end of the first voltage dividing resistor R1 is zero, and no power is consumed in the first voltage dividing resistor R1 and the second voltage dividing resistor R2.
請參考圖2,其係為本發明之低功率損耗之升壓型功率因數校正裝置之第二實施例方塊圖。本發明之低功率損耗之升壓型功率因數校正裝置10係應用於一交流電壓供應裝置20、一橋式整流器30及一負載裝置40。該低功率損耗之升壓型功率因數校正裝置10包含一電晶體開關Q1、一二極體D1、一第一分壓電阻R1、一功率因數校正控制單元102、一電感L1、一輸入端電容C1及一輸出端電容C2。該低功率損耗之升壓型功率因數校正裝置10係輸出例如400伏特電壓至該負載裝置40。Please refer to FIG. 2, which is a block diagram of a second embodiment of the low power loss boost type power factor correction apparatus of the present invention. The low power loss boost type power factor correction device 10 of the present invention is applied to an AC voltage supply device 20, a bridge rectifier 30, and a load device 40. The low power loss boosting power factor correction device 10 includes a transistor switch Q1, a diode D1, a first voltage dividing resistor R1, a power factor correction control unit 102, an inductor L1, and an input capacitor. C1 and an output capacitor C2. The low power loss boost type power factor correction device 10 outputs a voltage of, for example, 400 volts to the load device 40.
該二極體D1的陽極電性連接至該電晶體開關Q1;該第一分壓電阻R1的一端電性連接至該二極體D1的陰極;該功率因數校正控制單元102電性連接至該電晶體開關Q1及該第一分壓電阻R1的另一端;該電感L1電性連接至該電晶體開關Q1及該二極體D1的陽極;該輸入端電容C1電性連接至該電感L1;該輸出端電容C2電性連接至該二極體D1之陰極及該第一分壓電阻R1的一端。其中,該第一分壓電阻R1的一端可電性連接至該二極體D1的陰極或陽極(圖2顯示該第一分壓電阻R1的一端電性連接至該二極體D1的陰極)。The anode of the diode D1 is electrically connected to the transistor switch Q1; one end of the first voltage dividing resistor R1 is electrically connected to the cathode of the diode D1; the power factor correction control unit 102 is electrically connected to the cathode The transistor switch Q1 and the other end of the first voltage dividing resistor R1; the inductor L1 is electrically connected to the transistor switch Q1 and the anode of the diode D1; the input terminal capacitor C1 is electrically connected to the inductor L1; The output capacitor C2 is electrically connected to the cathode of the diode D1 and one end of the first voltage dividing resistor R1. One end of the first voltage dividing resistor R1 is electrically connected to the cathode or the anode of the diode D1 (FIG. 2 shows that one end of the first voltage dividing resistor R1 is electrically connected to the cathode of the diode D1) .
該功率因數校正控制單元102包含一脈波寬度調變信號產生器10202、一開關子單元10206、一取樣時脈產生器10218、一第二分壓電阻R2、一取樣保持電路10208及一回授補償器10210。The power factor correction control unit 102 includes a pulse width modulation signal generator 10202, a switch subunit 10206, a sampling clock generator 10218, a second voltage dividing resistor R2, a sample and hold circuit 10208, and a feedback Compensator 10210.
該脈波寬度調變信號產生器10202電性連接至該電晶體開關Q1;該開關子單元10206電性連接至該第一分壓電阻R1的另一端;該取樣時脈產生器10218電性連接至該開關子單元10206;該第二分壓電阻R2的一端電性連接至該開關子單元10206;該取樣保持電路10208電性連接至該開關子單元10206及該第二分壓電阻R2的該端;該回授補償器10210電性連接至該取樣保持電路10208及該脈波寬度調變信號產生器10202。The pulse width modulation signal generator 10202 is electrically connected to the transistor switch Q1; the switch subunit 10206 is electrically connected to the other end of the first voltage dividing resistor R1; the sampling clock generator 10218 is electrically connected To the switch subunit 10206; one end of the second voltage dividing resistor R2 is electrically connected to the switch subunit 10206; the sample and hold circuit 10208 is electrically connected to the switch subunit 10206 and the second voltage dividing resistor R2 The feedback compensator 10210 is electrically connected to the sample and hold circuit 10208 and the pulse width modulation signal generator 10202.
該取樣時脈產生器10218控制該開關子單元10206的開關狀態;當該開關子單元10206導通時,該功率因數校正控制單元102接收到從該第一分壓電阻R1及該第二分壓電阻R2之間所產生之一電壓回授信號10216。The sampling clock generator 10218 controls the switching state of the switching subunit 10206; when the switching subunit 10206 is turned on, the power factor correction control unit 102 receives the first voltage dividing resistor R1 and the second voltage dividing resistor. A voltage feedback signal 10216 is generated between R2.
再者,該脈波寬度調變信號產生器10202傳送一脈波寬度調變信號10212至該電晶體開關Q1以控制該電晶體開關Q1的開關狀態;藉由該電壓回授信號10216,該功率因數校正控制單元102調整該脈波寬度調變信號10212以進行功率因數校正。當該開關子單元10206不導通時,該第一分壓電阻R1不損耗功率,藉以節省功率。Furthermore, the pulse width modulation signal generator 10202 transmits a pulse width modulation signal 10212 to the transistor switch Q1 to control the switching state of the transistor switch Q1; the voltage is returned by the voltage feedback signal 10216. The factor correction control unit 102 adjusts the pulse width modulation signal 10212 for power factor correction. When the switch subunit 10206 is not turned on, the first voltage dividing resistor R1 does not consume power, thereby saving power.
再者,該取樣時脈產生器10218導通該開關子單元10206的頻率可為定頻或變頻;例如,藉由該交流電壓供應裝置20所提供的交流電壓的相位角決定該取樣時脈產生器10218導通該開關子單元10206的頻率;又例如,當該負載裝置40的負載增加時,該取樣時脈產生器10218導通該開關子單元10206的頻率增加;當該負載裝置40的負載減少時,該取樣時脈產生器10218導通該開關子單元10206的頻率減少。Moreover, the frequency at which the sampling clock generator 10218 turns on the switch subunit 10206 can be a fixed frequency or a frequency conversion; for example, the sampling clock generator is determined by the phase angle of the alternating voltage provided by the alternating voltage supply device 20. 10218 turns on the frequency of the switch subunit 10206; for example, when the load of the load device 40 increases, the frequency of the sampling clock generator 10218 turning on the switch subunit 10206 increases; when the load of the load device 40 decreases, The frequency at which the sampling clock generator 10218 turns on the switch subunit 10206 is reduced.
圖2所示之該功率因數校正控制單元102欲進行輸出電壓的取樣時,該開關子單元10206導通,此時取樣輸出電壓並保持取樣資料。在其他時間(該開關子單元10206不導通),該第一分壓電阻R1因為斷路而不損耗功率,藉以節省功率。When the power factor correction control unit 102 shown in FIG. 2 is to perform sampling of the output voltage, the switch subunit 10206 is turned on, at which time the output voltage is sampled and the sample data is held. At other times (the switch subunit 10206 is not conducting), the first voltage dividing resistor R1 does not lose power due to an open circuit, thereby saving power.
本發明之功效在於降低用以產生電壓回授信號以傳送至功率因數校正控制器的分壓電阻的功率損耗。The effect of the present invention is to reduce the power loss of the voltage dividing resistor used to generate the voltage feedback signal for transmission to the power factor correction controller.
然以上所述者,僅為本發明之較佳實施例,當不能限定本發明實施之範圍,即凡依本發明申請專利範圍所作之均等變化與修飾等,皆應仍屬本發明之專利涵蓋範圍意圖保護之範疇。本發明還可有其它多種實施例,在不背離本發明精神及其實質的情況下,熟悉本領域的技術人員當可根據本發明作出各種相應的改變和變形,但這些相應的改變和變形都應屬於本發明所附的權利要求的保護範圍。綜上所述,當知本發明已具有產業利用性、新穎性與進步性,又本發明之構造亦未曾見於同類產品及公開使用,完全符合發明專利申請要件,爰依專利法提出申請。However, the above is only a preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the equivalent changes and modifications made by the scope of the present invention should still be covered by the patent of the present invention. The scope of the scope is intended to protect. The invention may be embodied in various other modifications and changes without departing from the spirit and scope of the inventions. It is intended to fall within the scope of the appended claims. In summary, it is known that the present invention has industrial applicability, novelty and advancement, and the structure of the present invention has not been seen in similar products and public use, and fully complies with the requirements of the invention patent application, and is filed according to the patent law.
10‧‧‧低功率損耗之升壓型功率因數校正裝置10‧‧‧Low power loss boost type power factor correction device
20‧‧‧交流電壓供應裝置20‧‧‧AC voltage supply device
30‧‧‧橋式整流器30‧‧‧Bridge rectifier
40‧‧‧負載裝置40‧‧‧Loading device
102‧‧‧功率因數校正控制單元102‧‧‧Power Factor Correction Control Unit
10202‧‧‧脈波寬度調變信號產生器10202‧‧‧ Pulse width modulation signal generator
10204‧‧‧信號反向子單元10204‧‧‧Signal reversal subunit
10206‧‧‧開關子單元10206‧‧‧Switch subunit
10208‧‧‧取樣保持電路10208‧‧‧Sampling and holding circuit
10210‧‧‧回授補償器10210‧‧‧Responsible compensator
10212‧‧‧脈波寬度調變信號10212‧‧‧ Pulse width modulation signal
10214‧‧‧反向脈波寬度調變信號10214‧‧‧Reverse pulse width modulation signal
10216‧‧‧電壓回授信號10216‧‧‧Voltage feedback signal
10218‧‧‧取樣時脈產生器10218‧‧‧Sampling clock generator
C1‧‧‧輸入端電容 C1‧‧‧ input capacitor
C2‧‧‧輸出端電容 C2‧‧‧ output capacitor
D1‧‧‧二極體 D1‧‧‧ diode
L1‧‧‧電感 L1‧‧‧Inductance
Q1‧‧‧電晶體開關 Q1‧‧‧Crystal Switch
R1‧‧‧第一分壓電阻 R1‧‧‧ first voltage divider resistor
R2‧‧‧第二分壓電阻 R2‧‧‧Second voltage divider resistor
下午 11:15 2017/4/30 11:15 PM 2017/4/30
圖1為本發明之低功率損耗之升壓型功率因數校正裝置之第一實施例方塊圖。1 is a block diagram showing a first embodiment of a low power loss boost type power factor correction device of the present invention.
圖2為本發明之低功率損耗之升壓型功率因數校正裝置之第二實施例方塊圖。2 is a block diagram showing a second embodiment of a low power loss boost type power factor correction device of the present invention.
10‧‧‧低功率損耗之升壓型功率因數校正裝置 10‧‧‧Low power loss boost type power factor correction device
20‧‧‧交流電壓供應裝置 20‧‧‧AC voltage supply device
30‧‧‧橋式整流器 30‧‧‧Bridge rectifier
40‧‧‧負載裝置 40‧‧‧Loading device
102‧‧‧功率因數校正控制單元 102‧‧‧Power Factor Correction Control Unit
10202‧‧‧脈波寬度調變信號產生器 10202‧‧‧ Pulse width modulation signal generator
10204‧‧‧信號反向子單元 10204‧‧‧Signal reversal subunit
10206‧‧‧開關子單元 10206‧‧‧Switch subunit
10208‧‧‧取樣保持電路 10208‧‧‧Sampling and holding circuit
10210‧‧‧回授補償器 10210‧‧‧Responsible compensator
10212‧‧‧脈波寬度調變信號 10212‧‧‧ Pulse width modulation signal
10214‧‧‧反向脈波寬度調變信號 10214‧‧‧Reverse pulse width modulation signal
10216‧‧‧電壓回授信號 10216‧‧‧Voltage feedback signal
C1‧‧‧輸入端電容 C1‧‧‧ input capacitor
C2‧‧‧輸出端電容 C2‧‧‧ output capacitor
D1‧‧‧二極體 D1‧‧‧ diode
L1‧‧‧電感 L1‧‧‧Inductance
Q1‧‧‧電晶體開關 Q1‧‧‧Crystal Switch
R1‧‧‧第一分壓電阻 R1‧‧‧ first voltage divider resistor
R2‧‧‧第二分壓電阻 R2‧‧‧Second voltage divider resistor
Claims (10)
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