TW201702564A - Temperature sensing apparatus - Google Patents

Abstract

A temperature sensing apparatus including a bandgap circuit, a first temperature sensing circuit, a second temperature sensing circuit, a differential amplification circuit, and an output circuit is provided. The bandgap circuit generates a reference voltage. The first temperature sensing circuit couples to the bandgap circuit and generates a first temperature signal having positive correlation with temperature variation according to the reference voltage. The second temperature sensing circuit couples to the bandgap circuit and generates a second temperature signal having negative correlation with temperature variation according to the reference voltage. The differential amplification circuit couples to the first and the second temperature sensing circuits, receives the first and the second temperature signals, and accordingly generates a differential output signal. The output circuit couples to the differential amplification circuit to receive the differential output signal and accordingly generates a temperature indication signal.

Description

Temperature sensing device

The present invention relates to a temperature sensing device, and more particularly to a temperature sensing device that can be applied to an in-vehicle network standard (Flex Ray) and has high sensing accuracy.

During the long-distance driving of the car, there may be overheating of the internal parts of the car body, including the automobile engine and the battery for the car. Therefore, it is an important issue to focus on the temperature consideration of the car. In order to be able to grasp the performance of the vehicle battery while driving, and to ensure the safety of driving or passengers on the road, the control system in the vehicle needs to implement the corresponding control/protection mechanism for the change of the temperature inside the vehicle or the temperature of the part.

In order to provide accurate temperature change data as a control basis for the control system in the vehicle, various temperature sensing devices on the market that utilize different principles and methods can be applied thereto. However, in the existing temperature sensing device, generally due to the problem of circuit process drift, the temperature sensing device cannot have high sensing accuracy under a large temperature difference range.

The present invention provides a temperature sensing device that is applied to a vehicle-mounted network standard (Flex Ray) and that provides a temperature indicating signal that is less affected by process drift.

The temperature sensing device of the present invention includes an energy gap circuit, a first temperature sensing circuit, a second temperature sensing circuit, a differential amplifying circuit, and an output circuit. The bandgap circuit is used to generate a reference voltage. The first temperature sensing circuit is coupled to the bandgap circuit for generating a first temperature signal that is positively correlated with the temperature change according to the reference voltage. The second temperature sensing circuit is coupled to the bandgap circuit for generating a second temperature signal that is negatively correlated with the temperature change according to the reference voltage. The differential amplifying circuit is coupled to the first and second temperature sensing circuits, and receives the first and second temperature signals, and accordingly generates a differential output signal. The output circuit is coupled to the differential amplifying circuit to receive the differential output signal and generate a temperature indicating signal accordingly.

Based on the above, the embodiment of the present invention provides a temperature sensing device, which can generate temperature signals with opposite polarities by using two temperature sensing circuits, so that the differential amplifying circuit at the rear end can be used as a differential input according to a temperature signal with opposite polarity. Therefore, the signal error caused by the circuit drift of the circuit is eliminated as common mode noise, thereby improving the stability and accuracy of the temperature indicating signal output by the temperature sensing device.

The above described features and advantages of the invention will be apparent from the following description.

100‧‧‧Temperature sensing device

110‧‧‧Gap circuit

120‧‧‧First temperature sensing circuit

130‧‧‧Second temperature sensing circuit

140‧‧‧Differential Amplifying Circuit

142‧‧‧Input charge injection suppression unit

144‧‧‧Differential amplification unit

146‧‧‧Output charge injection unit

150‧‧‧Output circuit

AT, AT1~AT4‧‧‧ analog switch circuit

C1~C6‧‧‧ capacitor

GND‧‧‧ ground terminal

IM1, IM2, IM5, IM6‧‧‧ current

M1~M16‧‧‧O crystal

N1~N4‧‧‧Sampling switch

R1, R2‧‧‧ resistance

SCout+‧‧‧ positive output signal

SCout-‧‧‧negative output signal

Sd‧‧‧Differential output signal

Stemp‧‧‧temperature indication signal

ST, ST1~ST4‧‧‧Stack switch circuit

Si1, Si2‧‧‧ differential input signal

VDD‧‧‧Power supply voltage

Vctat‧‧‧ first temperature signal

Vptat‧‧‧Second temperature signal

Vcm‧‧‧ Common mode voltage

Vref‧‧‧reference voltage

ψ 1~ψ 4‧‧‧ Clock signal

ψ 1b, ψ 2b‧‧‧ inverted clock signal

1 is a schematic view of a temperature sensing device according to an embodiment of the present invention.

2A and 2B are circuit diagrams of a temperature sensing circuit according to an embodiment of the invention.

3 is a circuit diagram of a differential amplifier circuit according to an embodiment of the present invention.

4 is a circuit diagram of an analog switch circuit and a stack switch circuit according to an embodiment of the invention.

FIG. 5 is a timing diagram of a clock signal according to an embodiment of the invention.

In order to make the disclosure of the present disclosure easier to understand, the following specific embodiments are examples of the disclosure that can be implemented. In addition, wherever possible, the same elements, components, and steps in the drawings and embodiments are used to represent the same or similar components.

1 is a schematic view of a temperature sensing device according to an embodiment of the present invention. Referring to FIG. 1 , the temperature sensing device 100 includes an energy gap circuit 110 , a first temperature sensing circuit 120 , a second temperature sensing circuit 130 , a differential amplifying circuit 140 , and an output circuit 150 .

The bandgap circuit 110 can be used to generate a reference voltage Vref that is less affected by temperature and process drift. The first temperature sensing circuit 120 and the second temperature sensing circuit 130 are respectively coupled to the band gap circuit 110 to receive the reference voltage Vref. The first temperature sensing circuit 120 generates a first temperature signal Vctat that is positively correlated with the temperature change according to the reference voltage Vref, and the second temperature sensing circuit 130 generates a negative correlation with the temperature change according to the reference voltage Vref. Two temperature signals Vptat.

The differential amplifying circuit 140 is coupled to the first temperature sensing circuit 120 and the second temperature The sensing circuit 130 receives the first temperature signal Vctat and the second temperature signal Vptat. The differential amplifying circuit 140 uses the first temperature signal Vctat and the second temperature signal Vptat as differential inputs to generate a differential output signal Sd.

The output circuit 150 is coupled to the differential amplifying circuit 140. The output circuit 150 is, for example, a differential to single ended circuit that receives the differential output signal Sd and generates a temperature indicating signal Stemp accordingly. The differential amplifier circuit 140 and the output circuit 150 operate according to the timings of the clock signals ψ 1, ψ 2, ψ 3, and ψ 4, and the clock signals ψ 1, ψ 2, ψ 3, and ψ 4 can be a clock. A generator is provided, but the invention is not limited thereto.

In this embodiment, since the first temperature sensing circuit 120 and the second temperature sensing circuit 130 are implemented by the same circuit architecture, the circuit parameter errors generated by the process are substantially consistent. Further, since the first temperature signal Vctat and the second temperature signal Vptat generated by the first temperature sensing circuit 120 and the second temperature sensing circuit 130 have signal characteristics that are opposite to each other but have the same offset, After the first temperature signal Vctat and the second temperature signal Vptat are amplified by the differential amplifier circuit 140, the offset caused by the process drift of the first temperature signal Vctat and the second temperature signal Vptat is regarded as a total of differential inputs. The analog noise is cancelled, so that the output circuit 150 can generate the temperature indicating signal Stemp accurately indicating the ambient temperature according to the differential output signal Sd.

The specific circuit architecture of the above temperature sensing device 100 is further explained below with reference to the embodiment of FIGS. 2A to 5. 2A and 2B are circuit diagrams of a temperature sensing circuit according to an embodiment of the present invention. FIG. 3 is a differential shift according to an embodiment of the present invention; Schematic diagram of a large circuit. 4 is a circuit diagram of an analog switch circuit and a stack switch circuit according to an embodiment of the invention. FIG. 5 is a timing diagram of a clock signal according to an embodiment of the invention.

Referring first to FIG. 2A, the first temperature sensing circuit 120 includes transistors M1 M M4 and a resistor R1. Wherein, the transistors M1 and M2 are exemplified by an N-type gold oxide half field effect transistor (NMOS), and the transistors M3 and M4 are exemplified by a P-type gold oxide half field effect transistor (PMOS), but the present invention does not This is limited.

The transistors M1 to M4 form a current mirror. The source of the transistor M1 is coupled to the ground GND, and the gate of the transistor M1 receives the reference voltage Vref provided by the bandgap circuit 110. The drain of the transistor M2 is coupled to its gate and outputs a first temperature signal Vctat. The source of the transistor M3 receives the power supply voltage VDD, and the drain of the transistor M3 and the gate are commonly coupled to the drain of the transistor M1. The source of the transistor M4 receives the power supply voltage VDD, the drain of the transistor M4 is coupled to the drain of the transistor M2, and the gate of the transistor M4 is coupled to the gate of the transistor M3. The resistor R1 is coupled between the source of the transistor M2 and the ground GND.

In the present embodiment, the transistor M1 is implemented by using a transistor having a threshold voltage of a heat sensitive characteristic. Wherein, the threshold voltage of the transistor M1 can be expressed as V _THN =V _TH0 +α(TT ₀ ), α is a temperature coefficient (about -0.5~2mV/°C), T is temperature, and T ₀ is the lowest preset temperature. V _TH0 is a threshold voltage at which the temperature T is equal to the lowest preset temperature T ₀ . It can be seen that the magnitude of the current IM1 generated by the transistor M1 is related to the ambient temperature. On the other hand, the width-to-length ratio (W/L ratio) of the transistor M2 is designed to be larger than the aspect ratio of the transistor M1 so that the mapped current IM2 (ie, the current in the current path of the transistor M2) The current IM1 (which can be expressed as IM2=C×IM1, C>0) on the current path larger than the transistor M1. In this way, the first sensing circuit 120 can output the first temperature signal Vctat that linearly increases the voltage value as the temperature increases.

On the other hand, referring to FIG. 2B, the second temperature sensing circuit 130 has substantially the same circuit architecture as the first temperature sensing circuit 120, and includes transistors M5-M8 and a resistor R2. Among them, the transistors M5 and M6 are exemplified by an N-type gold oxide half field effect transistor (NMOS), and the transistors M7 and M8 are exemplified by a P-type gold oxide half field effect transistor (PMOS), but the present invention does not This is limited.

The transistors M5~M8 will also form a current mirror. The source of the transistor M5 is coupled to the ground GND, and the gate of the transistor M5 receives the reference voltage Vref provided by the bandgap circuit 110. The drain of the transistor M6 is coupled to its gate and outputs a second temperature signal Vptat. The source of the transistor M7 receives the power supply voltage VDD, and the drain of the transistor M7 and the gate are commonly coupled to the drain of the transistor M5. The source of the transistor M8 receives the power supply voltage VDD, the drain of the transistor M8 is coupled to the drain of the transistor M6, and the gate of the transistor M8 is coupled to the gate of the transistor M7. The resistor R2 is coupled between the source of the transistor M6 and the ground GND.

In the present embodiment, the transistor M6 is also implemented by using a transistor having a threshold voltage of a heat sensitive characteristic. On the other hand, the aspect ratio of the transistor M6 is designed to be smaller than the aspect ratio of the transistor M5 such that the mapped current IM6 (ie, the current in the current path of the transistor M6) is smaller than the current of the transistor M5. The current IM5 on the path (which can be expressed as IM6=C×IM5, C<1). Such as In this way, the second sensing circuit 130 can output the second temperature signal Vptat that linearly decreases the voltage value as the temperature increases.

In addition, in an exemplary embodiment, the resistors R1 and R2 may be, for example, a thermal resistor, which may be used to increase the linearity of the first temperature signal Vctat and the second temperature signal Vptat. More specifically, in the application of Figure 2A, the resistor R1 can be, for example, a temperature sensitive resistor having a positive temperature coefficient, the resistance of which increases in response to an increase in temperature. Therefore, when the current IM2 flowing through the resistor R1 becomes larger due to an increase in temperature, the voltage drop caused by the resistance R1 increases with temperature, so that the voltage of the first temperature signal Vctat is worth further. Upgrade. On the other hand, in the application of FIG. 2B, the resistor R2 may be, for example, a temperature sensitive resistor having a negative temperature coefficient, and its resistance value may decrease in response to an increase in temperature. Therefore, when the current IM6 flowing through the resistor R2 is lowered due to an increase in temperature, the voltage drop caused by the resistance R2 is also lowered as the temperature changes, so that the voltage of the second temperature signal Vptat is further lowered. .

Based on the above structure, the voltage difference between the temperature signals Vctat and Vptat output by the first temperature sensing circuit 120 and the second temperature sensing circuit 130 of the present embodiment may be, for example, a linear equation, and the results are in different processes. For the same.

Referring to FIG. 3 , the differential amplifier circuit 140 of the present embodiment is a full differential switched capacitor circuit as an example (but not limited thereto), and includes an input charge injection suppression unit 142 and a differential amplification unit 144 . And an output charge injection suppression unit 146.

The input charge injection suppression unit 142 is coupled to the first temperature sensing circuit 120. And the second temperature sensing circuit 130 receives the first temperature signal Vctat and the second temperature signal Vptat. The input charge injection suppression unit 142 switches between the clock signals ψ 1 and ψ 2 to generate the differential input signals Si1 and Si2.

The differential amplifying unit 144 is coupled to the input charge injection suppressing unit 142 to receive the differential input signals Si1 and Si2, and generates a differential output signal Sd in response to the clock signal ψ 3 and the clock signal ψ 4, wherein the differential output signal Sd The positive output signal SCout+ and the negative output signal SCout- are mutually inverted.

The output charge injection suppression unit 146 is coupled to the differential amplification unit 144 and is responsive to the switching of the clock signals ψ 1 and ψ 2 to adjust the differential output signal Sd.

More specifically, the input charge injection suppressing unit 142 includes analog switching circuits AT1 and AT2 and stacked switching circuits ST1 and ST2. The output charge injection suppression unit 146 includes analog switch circuits AT3 and AT4 and stacked switch circuits ST3 and ST4.

In the input charge injection suppression unit 142, one end of the analog switch circuit AT1 receives the first temperature signal Vctat, and the other end of the analog switch circuit AT1 (ie, the node P1) is coupled to the first input terminal of the differential amplification unit 144. One end of the analog switch circuit AT2 receives the second temperature signal Vptat, and the other end of the analog switch circuit AT2 (ie, the node P2) is coupled to the second input terminal of the differential amplifying unit 144. The analog switch circuits AT1 and AT2 are controlled by the clock signal ψ 2 and its inverted signal to switch the on state.

One end of the stack switch circuit ST1 receives the common mode voltage Vcm (for example, half of the power supply voltage VDD and the ground terminal voltage GND), and the stack switch circuit ST1 The other end is coupled to the first input end of the analog switching circuit AT1 and the differential amplifying unit 144 via the node P1. One end of the stacking switch circuit ST2 receives the common mode voltage Vcm, and the other end of the stacking switch circuit ST2 is coupled to the second input terminal of the analog switching circuit AT2 and the differential amplifying unit 144 via the node P2. The stack switch circuits ST1 and ST2 are controlled by the clock signal ψ 1 and its inverted signal to switch the on state.

In this embodiment, the analog switch circuits AT1 to AT4 have the same circuit architecture, and the stacked switch circuits ST1 to ST4 also have the same circuit architecture. The details are described below with reference to the embodiment of Fig. 4.

Referring to FIG. 4, in the embodiment, the analog switch circuits AT1~AT4 (here denoted by AT) respectively include transistors M9~M14, and the stack switch circuits ST1~ST4 (here denoted by ST) They include transistors M15 and M16, respectively. Among them, the transistors M9, M12, M13 and M16 are exemplified by P-type gold-oxygen half-field effect transistors, and the transistors M10, M11, M14 and M15 are exemplified by N-type gold-oxygen half-field effect transistors, but the invention Not limited to this.

In the analog switching circuit AT, the source of the transistor M9 receives the common mode voltage Vcm, and the gate of the transistor M9 receives the inverted clock signal ψ 2b which is inverted with respect to the clock signal ψ 2. The source of the transistor M10 is coupled to the drain of the transistor M9, the drain of the transistor M10 serves as the first signal coupling terminal SCP1 of the analog switch circuit AT, and the gate of the transistor M10 receives the inverted clock signal ψ 2b. The source of the transistor M11 serves as the second signal coupling terminal SCP2 of the analog switch circuit AT, the drain of the transistor M11 is coupled to the drain of the transistor M9, and the gate of the transistor M11 receives the inverted clock signal ψ 2b. . The drain of the transistor M12 is coupled to the drain of the transistor M10, and the transistor The gate of M12 receives the clock signal ψ 2. The source of the transistor M13 is coupled to the source of the transistor M11, the drain of the transistor M13 is coupled to the source of the transistor M12, and the gate of the transistor M13 receives the clock signal ψ 2. The source of the transistor M14 receives the common mode voltage Vcm, the drain of the transistor M14 is coupled to the source of the transistor M12 and the drain of the transistor M13, and the gate of the transistor M14 receives the clock signal ψ 2.

In the stack switching circuit ST, the source of the transistor M15 receives the common mode voltage Vcm, and the gate of the transistor M15 receives the inverted clock signal ψ 1b which is inverted with respect to the clock signal ψ 1. The source of the transistor M16 is coupled to the sources of the transistors M11 and M13, the drain of the transistor M16 is coupled to the drain of the transistor M15, and the gate of the transistor M16 receives the clock signal ψ 1.

The relative arrangement relationship between the differential amplifying unit 144 and each of the analog switching circuits AT1 to AT4 and the stacking switching circuits ST1 to ST4 will be described below with reference to FIGS. 3 and 4. Referring to FIG. 3 and FIG. 4 simultaneously, the differential amplifying unit 144 includes a differential amplifier AMP, capacitors C1 C C6, and sampling switches N1 N N4.

The differential amplifier AMP has a positive input (indicated as "+"), a negative input (indicated as "-"), a positive output (output labeled "+"), and a negative output (output marked "-"). The positive output end of the differential amplifier AMP is coupled to the first signal coupling end SCP1 of the analog switch circuit AT3 (ie, node P3) and outputs a positive output signal SCout+, and the negative output end of the differential amplifier AMP is coupled to the analog switch circuit AT4. A signal couples the end SCP1 (ie, node P4) and outputs a negative output signal SCout-.

The first end of the capacitor C1 (ie, the first input of the differential amplifying unit 144) The second signal coupling end SCP2 (ie, node P1) of the analog switching circuit AT1 is coupled, and the second end of the capacitor C1 is coupled to the negative input terminal of the differential amplifier AMP. The first end of the capacitor C2 is coupled to the second end of the capacitor C1 and the negative input of the differential amplifier AMP, and the second end of the capacitor C2 is coupled to the second signal coupling end SCP2 of the analog switch circuit AT3 (ie, node P5) . The first end of the capacitor C3 is coupled to the sampling switches N1 and N2, and the second end of the capacitor C3 is coupled to the positive output of the differential amplifier AMP. The first end of the capacitor C4 is coupled to the second signal coupling end SCP2 of the analog switch circuit AT2 (ie, the pole P2), and the second end of the capacitor C4 is coupled to the positive input terminal of the differential amplifier AMP. The first end of the capacitor C5 is coupled to the second end of the capacitor C4 and the positive input terminal of the differential amplifier AMP, and the second end of the capacitor C5 is coupled to the second signal coupling end SCP2 of the analog switch circuit AT4 (ie, node P6) . The first end of the capacitor C6 is coupled to the sampling switches N3 and N4, and the second end of the capacitor C6 is coupled to the negative output end of the differential amplifier AMP.

The first end of the sampling switch N1 receives the common mode voltage Vcm, the second end of the sampling switch N1 is coupled to the first end of the capacitor C3, and the control end of the sampling switch N1 receives the clock signal ψ 4. The first end of the sampling switch N2 is coupled to the second end of the sampling switch N1, the second end of the sampling opening N2 is coupled to the negative input end of the differential amplifier AMP, and the control end of the sampling switch N2 receives the clock signal ψ 3. The first end of the sampling switch N3 receives the common mode voltage Vcm, the second end of the sampling switch N3 is coupled to the first end of the capacitor C6, and the control end of the sampling switch N3 receives the clock signal ψ 4. The first end of the sampling switch N4 is coupled to the second end of the sampling switch N3, the second end of the sampling switch is coupled to the positive input terminal of the differential amplifier AMP, and the control end of the sampling switch N3 receives the clock signal ψ 3.

The signal timing illustrated in FIG. 5 is further described below to illustrate the temperature. The specific operation of the sensing device 100. Referring to FIG. 3, FIG. 4 and FIG. 5 simultaneously, in this embodiment, the clock signals ψ 1 and ψ 2 are a set of substantially inverted and non-overlapping clocks, and the clock signals ψ 3 and ψ 4 respectively The phase is ahead of the clock of the clock signals ψ 1 and ψ 2. In addition, the inverted clock signals ψ 1b and ψ 2b are inverted signals of the clock signals ψ 1 and ψ 2, respectively.

Through the configuration and control timing of the analog switch circuit AT and the stack switch circuit ST described above, it can effectively reduce the undesired error of the charge injection capacitor when the switch is switched. More specifically, when the pulse signal ψ 2 is at a high level (for example, the power supply voltage VDD), the analog switch circuit AT is turned off. At this time, leakage current may leak from the analog switch circuit AT to the front and rear ends. At the same time, because the clock signal ψ 1 received by the stack switch circuit ST is at a low level (for example, the ground voltage GND), the stack switch circuit ST is turned on, thereby making the gate-source of the transistors M11~M13 The voltage across the voltage (Vgs) is a negative voltage, so the amount of charge injection capacitance can be minimized when the switch is switched.

It should be noted that, although not shown in the embodiment, the input charge injection suppression unit 142 and the output charge injection unit 146 may also be applied to the output circuit 150, thereby reducing the leakage current effect of the output circuit 150. However, the invention is not limited thereto.

In addition, since the temperature sensing device 100 of the present invention can generate a stable voltage that resists process drift and changes with temperature as the temperature indicating signal Stemp, the technology of the present invention can be applied to a vehicle temperature sensing protection device, and is applicable to a vehicle network. Road standard (FlexRay) enables vehicles to perform control actions related to ambient temperature More precise.

In summary, the embodiment of the present invention provides a temperature sensing device, which can generate temperature signals with opposite polarities by using two temperature sensing circuits, so that the differential amplifying circuit at the rear end can be differentially driven according to the temperature signal with opposite polarity. The input is used to eliminate the signal error caused by the circuit drift of the circuit as common mode noise, thereby improving the stability and accuracy of the temperature indicating signal output by the temperature sensing device.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧Temperature sensing device

110‧‧‧Gap circuit

120‧‧‧First temperature sensing circuit

130‧‧‧Second temperature sensing circuit

140‧‧‧Differential Amplifying Circuit

150‧‧‧Output circuit

Sd‧‧‧Differential output signal

Stemp‧‧‧temperature indication signal

Vctat‧‧‧ first temperature signal

Vptat‧‧‧Second temperature signal

Vref‧‧‧reference voltage

ψ 1~ψ 4‧‧‧ Clock signal

Claims (11)

A temperature sensing device includes: a bandgap circuit for generating a reference voltage; a first temperature sensing circuit coupled to the bandgap circuit for generating a positive correlation with a temperature change according to the reference voltage a temperature signal; a second temperature sensing circuit coupled to the band gap circuit for generating a second temperature signal negatively correlated with the temperature change according to the reference voltage; a differential amplifying circuit coupled to the first And receiving, by the second temperature sensing circuit, the first and second temperature signals, and generating a differential output signal; and an output circuit coupled to the differential amplifying circuit to receive the differential output signal and According to to generate a temperature indication signal. The temperature sensing device of claim 1, wherein the first temperature sensing circuit comprises: a first transistor, the first end of which is coupled to a ground, and the control terminal receives the reference voltage; a second transistor having a second end coupled to the control end thereof and outputting the first temperature signal, wherein the second transistor has a width to length ratio greater than a width to length ratio of the first transistor; and a third transistor The first end receives a power supply voltage, and the second end is coupled to the second end of the first transistor together with the control end thereof; a fourth transistor receives the power supply voltage at the first end and the second end coupled Connected to the second end of the second transistor, and its control end is coupled to the control end of the third transistor; A first resistor is coupled between the first end of the second transistor and the ground. The temperature sensing device of claim 2, wherein the second temperature sensing circuit comprises: a fifth transistor, the first end of which is coupled to a ground end, and the control end thereof receives the reference voltage; a sixth transistor having a second end coupled to the control end thereof and outputting the second temperature signal, wherein the sixth transistor has a width to length ratio smaller than a width to length ratio of the fifth transistor; a seventh transistor, The first end receives a power supply voltage, and the second end of the eighth transistor is coupled to the second end of the fifth transistor; the eighth transistor receives the power supply voltage at the first end, and the second end is coupled Connected to the second end of the sixth transistor, and the control end is coupled to the control end of the seventh transistor; and a second resistor coupled between the first end of the sixth transistor and the ground . The temperature sensing device of claim 3, wherein the first resistor and the second resistor are respectively a temperature sensitive resistor, the first resistor has a positive temperature coefficient, and the second resistor has a negative temperature coefficient. . The temperature sensing device of claim 3, wherein the differential amplifying circuit comprises: an input charge injection suppressing unit, receiving the first temperature signal and the second temperature signal, and reacting to a first time The pulse signal is switched with a second clock signal to generate a differential input signal; a differential amplification unit coupled to the input charge injection suppression unit to receive the difference Transmitting a signal, and reacting to a third clock signal and a fourth clock signal to generate the differential output signal; and an output charge injection suppression unit coupled to the differential amplifying unit and reacting to the first time The pulse signal is switched with the second clock signal to adjust the differential output signal. The temperature sensing device of claim 5, wherein the input charge injection suppression unit comprises: a first analog switch circuit, receiving the first temperature signal and coupling the differential amplification unit, and is controlled by The second clock signal; a second analog switch circuit, receiving the second temperature signal and coupled to the differential amplifying unit, and controlled by the second clock signal; a first stacked switch circuit receiving a common mode The voltage is coupled to the first analog switch circuit and controlled by the first clock signal; and a second stacked switch circuit receives the common mode voltage and is coupled to the second analog switch circuit, and is controlled by the The first clock signal. The temperature sensing device of claim 6, wherein the output charge injection suppression unit comprises: a third analog switch circuit coupled to the differential amplification unit and controlled by the second clock signal; a fourth analog switching circuit coupled to the differential amplifying unit and controlled by the second clock signal; a third stacked switching circuit receiving the common mode voltage and coupling the third analog to open Turning off the circuit and controlling the first clock signal; and a fourth stacking switch circuit, receiving the common mode voltage and coupling the fourth analog switch circuit, and being controlled by the first clock signal. The temperature sensing device of claim 7, wherein each of the first to fourth analog switching circuits respectively comprises: a ninth transistor, the first end of which receives the common mode voltage, and the control end thereof Receiving a second inverted clock signal inverted from the second clock signal; a tenth transistor having a first end coupled to the second end of the ninth transistor and a second end serving as a first a signal coupling end, and a control end thereof receives the second inverted clock signal; an eleventh transistor, the first end of which is a second signal coupling end, and the second end of the eleventh transistor is coupled to the ninth transistor a second end, and the control end receives the second inverted clock signal; a twelfth transistor, the second end of which is coupled to the second end of the tenth transistor, and the control end thereof receives the second clock a 13th transistor having a first end coupled to the first end of the eleventh transistor, a second end coupled to the first end of the twelfth transistor, and a control end receiving the first a second clock signal; and a fourteenth transistor, the first end of which receives the common mode voltage, and the second end of which is coupled to the twelfth electric crystal The first end of the body and the second end of the thirteenth transistor, and the control end thereof receives the second clock signal. The temperature sensing device of claim 8, wherein each of the The fourth stacking switch circuit includes a fifteenth transistor, the first end of which receives the common mode voltage, and the control end receives a first inverted clock signal that is inverted from the first clock signal. And a sixteenth transistor having a first end coupled to the eleventh transistor and the first end of the thirteenth transistor, and a second end coupled to the second end of the fifteenth transistor, And the control terminal receives the first clock signal. The temperature sensing device of claim 9, wherein the differential output signal comprises a positive output signal and a negative output signal, the differential amplification unit comprising: a differential amplifier having a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, the positive output terminal is coupled to the first signal coupling end of the third analog switch circuit and outputs the positive output signal, and the negative output terminal is coupled to the fourth The first signal coupling end of the analog switch circuit outputs the negative output signal; a first capacitor is coupled to the second signal coupling end of the first analog switch circuit, and the second end is coupled to the differential a second input end of the first capacitor is coupled to the second end of the first capacitor and the negative input end of the differential amplifier, and the second end of the second capacitor is coupled to the third analog switch circuit a second capacitor coupled to the positive output of the differential amplifier; a fourth capacitor coupled to the second signal coupling end of the second analog switch circuit The second end is coupled to the differential a positive input terminal of the device; a fifth capacitor having a first end coupled to the second end of the fourth capacitor and the differential a positive input end of the device, and a second end coupled to the second signal coupling end of the fourth analog switch circuit; a sixth capacitor coupled to the negative output of the differential amplifier; a sampling switch having a first end receiving the common mode voltage, a second end coupled to the first end of the third capacitor, and a control end receiving the fourth clock signal; and a second sampling switch having a first end The second end of the first sampling switch is coupled to the second terminal of the differential amplifier, and the control terminal receives the third clock signal; and the third sampling switch receives the first terminal The second terminal is coupled to the first end of the sixth capacitor, and the control terminal receives the fourth clock signal; and a fourth sampling switch, the first end of which is coupled to the third sampling switch The second end of the second end is coupled to the positive input terminal of the differential amplifier, and the control end thereof receives the third clock signal. The temperature sensing device of claim 9, wherein the first, the second, the fifth, the sixth, the tenth, the eleventh, the fourteenth, and the fifteenth The transistor is an N-type MOS field effect transistor, and the third, the fourth, the seventh, the eighth, the ninth, the twelfth, the thirteenth, and the sixteenth transistor are A P-type MOS field effect transistor, wherein the first end of the transistor is a source, the second end of the transistor is a drain, and the control end of the transistor is a gate.