TW201636881A - Layout resetting method for modified layout processing - Google Patents

Layout resetting method for modified layout processing Download PDF

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TW201636881A
TW201636881A TW104111590A TW104111590A TW201636881A TW 201636881 A TW201636881 A TW 201636881A TW 104111590 A TW104111590 A TW 104111590A TW 104111590 A TW104111590 A TW 104111590A TW 201636881 A TW201636881 A TW 201636881A
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group
mandrels
layout
mandrel
block
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TW104111590A
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TWI697796B (en
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李冠賢
黃瑞民
曾奕銘
黃同雋
黃振銘
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聯華電子股份有限公司
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Abstract

A layout resetting method for implementing a modified layout processing is provided, and the modified layout processing is performed by at least one a processor. First, an electronic design is received by the processer. Then, a first block and one or more first rules for first mandrels in the first block in the electronic design are identified. A second block and one or more second rules for second mandrels in the second block in the electronic design are identified, wherein the second block is adjacent to the first block. Then, at least a first group of the first mandrels is determined based on the one or more first rules, and at least a second group of the second mandrels is determined based on the one or more second rules and the one or more first rules. Afterwards, the first group of the first mandrels is matched with the second group of the second mandrels, and a modified layout of the electronic design is generated by aligning at least parts of the first group of the first mandrels with at least parts of the second group of the second mandrels.

Description

佈局變更處理之佈局重置方法 Layout change processing layout reset method

本發明是有關於一種佈局重置方法,且特別是有關於一種以一處理器進行佈局變更處理的佈局重置方法。 The present invention relates to a layout reset method, and more particularly to a layout reset method for performing layout change processing by a processor.

近年來半導體裝置尺寸日益減小。對半導體科技來說,持續縮小半導體結構尺寸、改善速率、增進效能、提高密度及降低每單位積體電路的成本,都是重要的發展目標。隨著半導體裝置尺寸的縮小,裝置的電子特性也必須維持甚至是加以改善,以符合市場上對應用電子產品的要求。例如,半導體裝置的各層結構與所屬元件如有缺陷或損傷,會對裝置的電子特性造成無法忽視之影響,因此是製造半導體裝置需注意的重要問題之一。一般而言,擁有優異電性表現的半導體裝置必須具有良好性質的內部元件,例如具有完整表面廓形的內部元件。 The size of semiconductor devices has been decreasing in recent years. For semiconductor technology, continuing to shrink semiconductor structure size, improve speed, increase performance, increase density, and reduce the cost per unit of integrated circuit are important development goals. As the size of semiconductor devices shrinks, the electronic characteristics of the devices must also be maintained or even improved to meet the requirements of the market for applied electronic products. For example, if the layers of the semiconductor device and the associated components are defective or damaged, the electronic characteristics of the device may be ignored, and thus it is one of the important issues to be paid attention to in manufacturing the semiconductor device. In general, semiconductor devices with excellent electrical performance must have internal components of good nature, such as internal components with a complete surface profile.

以一鰭式場效電晶體製程(FinFET process)為例,通常使用一側壁影像轉移(a sidewall image transfer,SIT)製程來製作鰭狀結構。其中芯軸係根據主動區域之設計進行佈局,也定義了結構中的鰭部位置。現有芯軸佈局設計中,例如應用於靜態隨 機存取記憶體(Static Random-Access Memory,SRAM)或邏輯元件,不同的佈局區域會有不同的圖案密度,而有圖形疏密負載(ISO/dense loading),可能導致黃光(lithography)和蝕刻製程控制上有明顯的變異,因而形成構型上具有缺陷的半導體元件。 Taking a FinFET process as an example, a sidewall image transfer (SIT) process is usually used to fabricate the fin structure. The mandrel is laid out according to the design of the active area, and also defines the position of the fin in the structure. Existing mandrel layout design, for example, applied to static Static Random Access Memory (SRAM) or logic components, different layout areas will have different pattern density, and there are graphic density loads (ISO/dense loading), which may lead to lithography and There is a significant variation in the etching process control, thereby forming a semiconductor component having a defect in configuration.

本發明係有關於一種佈局重置方法進行佈局變更處理,可大幅減少製程負載,進而提高形成元件之均齊度,改善製得元件之電子特性。 The present invention relates to a layout reset method for performing layout change processing, which can greatly reduce the process load, thereby improving the uniformity of forming components and improving the electronic characteristics of the fabricated components.

根據一實施例,係提出一種佈局重置方法(layout resetting method),係由一處理器(processer)進行佈局變更處理(modified layout processing)。首先,處理器接收一電子佈局;接著,識別電子佈局之一第一區塊和確認第一區塊中之複數個第一芯軸(first mandrels)的一或多個第一設計規則。識別電子佈局之一第二區塊和確認該第二區塊中之複數個第二芯軸(second mandrels)的一或多個第二設計規則,其中第二區塊相鄰於第一區塊。根據第一設計規則,決定出第一芯軸之至少一第一群組。根據第二設計規則和第一設計規則,決定出第二芯軸之至少一第二群組。之後,比對第一群組和第二群組,使第一群組中至少部分的第一芯軸對齊於第二群組中至少部分的第二芯軸,以產生電子佈局之一變更佈局(modified layout)。 According to an embodiment, a layout resetting method is proposed, which is performed by a processor (modified layout processing). First, the processor receives an electronic layout; then, identifying one of the first blocks of the electronic layout and confirming one or more first design rules for the plurality of first mandrels in the first block. Identifying a second block of the electronic layout and confirming one or more second design rules of the plurality of second mandrels in the second block, wherein the second block is adjacent to the first block . According to the first design rule, at least a first group of the first mandrels is determined. According to the second design rule and the first design rule, at least a second group of the second mandrels is determined. Thereafter, comparing the first group and the second group, aligning at least a portion of the first mandrel of the first group with at least a portion of the second mandrel of the second group to generate a layout of one of the electronic layouts (modified layout).

為了對本發明之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式,作詳細說明如下。然而,本發 明之保護範圍當視後附之申請專利範圍所界定者為準。 In order to better understand the above and other aspects of the present invention, the following detailed description of the embodiments and the accompanying drawings are set forth below. However, this issue The scope of protection of the Ming Dynasty shall be subject to the definition of the scope of the patent application attached.

100‧‧‧處理器 100‧‧‧ processor

10‧‧‧曝光區域 10‧‧‧Exposure area

11‧‧‧第一區塊 11‧‧‧First block

111‧‧‧第一芯軸 111‧‧‧First mandrel

12‧‧‧第二區塊 12‧‧‧Second block

121‧‧‧第二芯軸 121‧‧‧Second mandrel

G1‧‧‧第一群組 G1‧‧‧First Group

GD1‧‧‧第一密集分佈芯軸群 G D1 ‧‧‧The first densely distributed mandrel group

GL1‧‧‧第一疏鬆分佈芯軸群 G L1 ‧‧‧First loose distribution mandrel group

DP11、DP12、DP13、DP14、DP15、DP16、DP17、DP18、DP20、DP21‧‧‧第一間距 D P11 , D P12 , D P13 , D P14 , D P15 , D P16 , D P17 , D P18 , D P20 , D P21 ‧ ‧ first spacing

DP1m‧‧‧第一最小芯軸間距 D P1m ‧‧‧first minimum mandrel spacing

DP19‧‧‧第一區塊中所有第一芯軸的最小芯軸間距 D P19 ‧‧‧ Minimum mandrel spacing of all first mandrels in the first block

DPD1m‧‧‧第一密集分佈芯軸群的第一芯軸之間距 D PD1m ‧‧‧ first mandrel densely distributed population of first mandrel pitch

G2‧‧‧第二群組 G2‧‧‧ second group

GD2‧‧‧第二密集分佈芯軸群 G D2 ‧‧‧Second densely distributed mandrel group

GL2‧‧‧第二疏鬆分佈芯軸群 G L2 ‧‧‧Second loose distribution mandrel group

DP21、DP22、DP23、DP24、DP25、DP26、DP28、DP29‧‧‧第二間距 D P21 , D P22 , D P23 , D P24 , D P25 , D P26 , D P28 , D P29 ‧‧‧Second spacing

DP2m‧‧‧第二最小芯軸間距 D P2m ‧‧‧Second minimum mandrel spacing

DP27‧‧‧第二區塊中所有第二芯軸的最小芯軸間距 D P27 ‧‧‧ second block all second minimum spacing mandrel spindle

DPD2m‧‧‧第二密集分佈芯軸群的第二芯軸之間距 D PD2m ‧‧‧The distance between the second mandrels of the second densely distributed mandrel group

13‧‧‧第三區塊 13‧‧‧ Third block

131‧‧‧第三芯軸 131‧‧‧third mandrel

G3‧‧‧第三群組 G3‧‧‧ third group

DP35、DP36、DP37‧‧‧第三間距 D P35, D P36, D P37 ‧‧‧ third interval

DP3m‧‧‧第三最小芯軸間距 D P3m ‧‧‧ third minimum mandrel spacing

S301~S306、S601~S606、S801~S808‧‧‧步驟 S301~S306, S601~S606, S801~S808‧‧‧ steps

第1A圖繪示根據本揭露一實施例之一晶圓之示意圖。晶圓上係具有預定的多個曝光區域10。 FIG. 1A is a schematic diagram of a wafer according to an embodiment of the present disclosure. The wafer has a predetermined plurality of exposed regions 10 thereon.

第1B圖係為第1A圖之晶圓的一曝光區域之放大示意圖。 Figure 1B is an enlarged schematic view of an exposed region of the wafer of Figure 1A.

第2圖係繪示根據本揭露第一實施例中兩相鄰區塊之多個芯軸於其中一種變更佈局之排列示意圖。 FIG. 2 is a schematic diagram showing the arrangement of a plurality of mandrels of two adjacent blocks in one of the modified layouts according to the first embodiment of the present disclosure.

第3圖係為本揭露第一實施例之佈局重置方法以進行佈局變更處理的流程圖。 FIG. 3 is a flow chart showing the layout reset method of the first embodiment for performing the layout change processing.

第4圖繪示根據本揭露第一實施例中兩相鄰區塊之多個芯軸於另一種變更佈局之排列示意圖。 FIG. 4 is a schematic diagram showing the arrangement of a plurality of mandrels of two adjacent blocks in another modified layout according to the first embodiment of the present disclosure.

第5圖係繪示根據本揭露第二實施例中兩相鄰區塊之多個芯軸於其中一種變更佈局之排列示意圖。 FIG. 5 is a schematic diagram showing the arrangement of a plurality of mandrels of two adjacent blocks in one of the modified layouts according to the second embodiment of the present disclosure.

第6圖係為本揭露第二實施例之佈局重置方法以進行佈局變更處理的流程圖。 Fig. 6 is a flow chart showing the layout resetting method of the second embodiment for performing the layout change processing.

第7圖係繪示根據本揭露第三實施例中相鄰三個區塊之多個芯軸之一種變更佈局之排列示意圖。 Figure 7 is a schematic view showing the arrangement of a modified layout of a plurality of mandrels of adjacent three blocks in the third embodiment of the present disclosure.

第8圖係為本揭露第三實施例之佈局重置方法以進行佈局變更處理的流程圖。 FIG. 8 is a flowchart of the layout reset method of the third embodiment for performing the layout change processing.

以下所揭露之內容中,係配合圖示以詳細說明實施 例所提出之一種佈局重置方法進行佈局變更處理(modified layout processing)。實施例之佈局變更處理例如是由一電子運算系統(computing system)之一處理器(processer)進行處理。本揭露之佈局重置方法例如是應用於一鰭式場效電晶體製程(FinFET process),使佈局設計中相鄰的不同區塊其中之芯軸可達到至少部分或全面性相互對齊之排列,如此進行黃光或蝕刻製程時,具有對齊區域的相同製程環境可以大幅減少製程負載,例如降低圖案密度之變異程度以及改善圖形疏密負載(ISO/dense loading)之問題,進而提高該些區域中形成元件(例如鰭部)的均齊度(uniformity)和減少鰭部間距之偏移(minimize Fin pitch shift),而得到良好的臨界尺寸(critical dimension,CD)控制,改善區塊之電子特性。再者,實施例所提出之方法係以簡化而有效率之步驟進行佈局變更處理,使製程得以大幅減少負載。 In the following disclosure, the implementation is described in detail with the illustration. A layout reset method proposed by the example performs modified layout processing. The layout change processing of the embodiment is processed, for example, by a processor of an electronic computing system. The layout reset method of the present disclosure is applied, for example, to a FinFET process, in which the mandrels of adjacent blocks in the layout design can be at least partially or fully aligned with each other. When performing a yellow or etch process, the same process environment with aligned areas can significantly reduce process load, such as reducing the variation in pattern density and improving the problem of ISO/dense loading, thereby increasing the formation in these areas. The uniformity of the components (such as the fins) and the reduction of the fin pitch (minimize Fin pitch shift), resulting in good critical dimension (CD) control, improve the electronic properties of the block. Furthermore, the method proposed in the embodiment performs the layout change processing in a simplified and efficient step, so that the process can greatly reduce the load.

以下係提出實施例,配合圖示以詳細說明本揭露之相關方法。相同和/或相似元件係沿用相同和/或相似元件符號。然而本揭露並不僅限於此,本揭露並非顯示出所有可能的實施例。注意,未於本揭露提出的其他實施態樣也可能可以應用。可實施之細部結構和步驟可能有些不同,可在不脫離本揭露之精神和範圍內根據實際應用之需要而加以變化與修飾。再者,圖式上的尺寸比例並非按照實物等比例繪製。因此,說明書和圖示內容僅作敘述實施例之用,而非作為限縮本揭露保護範圍之用。 The embodiments are presented below in conjunction with the drawings to illustrate the related methods of the present disclosure. Identical and/or similar elements follow the same and/or similar element symbols. However, the disclosure is not limited thereto, and the disclosure does not show all possible embodiments. It is noted that other implementations not presented in this disclosure may also be applicable. The details and steps that may be implemented may vary, and may be varied and modified depending on the needs of the actual application without departing from the spirit and scope of the disclosure. Furthermore, the scale ratios on the drawings are not drawn to scale in kind. Therefore, the description and illustration are for illustrative purposes only and are not intended to be limiting.

<第一實施例> <First Embodiment>

第1A圖繪示根據本揭露一實施例之一晶圓之示意圖。晶圓上係具有預定的多個曝光區域10。第1B圖係為第1A圖之晶圓的一曝光區域之放大示意圖。一曝光區域10係包括多個區塊,各區塊係根據實際應用之需求而有其對應的電路佈局與設計,使相應於各區塊所製得之半導體元件可具有其預定之功能。在第一實施例中,係以兩相鄰區塊(如11和12)之電子佈局設計為例,提出一種佈局重置方法以進行佈局變更處理的相關說明。 FIG. 1A is a schematic diagram of a wafer according to an embodiment of the present disclosure. The wafer has a predetermined plurality of exposed regions 10 thereon. Figure 1B is an enlarged schematic view of an exposed region of the wafer of Figure 1A. An exposed area 10 includes a plurality of blocks, each of which has its corresponding circuit layout and design according to the needs of the actual application, so that the semiconductor elements fabricated corresponding to the respective blocks can have their intended functions. In the first embodiment, an electronic layout design of two adjacent blocks (such as 11 and 12) is taken as an example, and a layout reset method is proposed to perform the layout change processing.

第2圖係繪示根據本揭露第一實施例中兩相鄰區塊之多個芯軸於其中一種變更佈局之排列示意圖。第一實施例中係以相鄰的第一區塊(first block)11和第二區塊(second block)12為例作說明,且第一區塊11係包括複數個第一芯軸(first mandrels)111之佈局,第二區塊12係包括複數個第二芯軸(second mandrels)121之佈局。如第2圖所示,第一區塊11之第一芯軸111和第二區塊12中之第二芯軸121係沿第一方向(例如x方向)延伸。第3圖係為本揭露第一實施例之佈局重置方法以進行佈局變更處理的流程圖。第一實施例之佈局變更處理例如是由一電子運算系統之一處理器(processer)100進行處理。 FIG. 2 is a schematic diagram showing the arrangement of a plurality of mandrels of two adjacent blocks in one of the modified layouts according to the first embodiment of the present disclosure. In the first embodiment, an adjacent first block 11 and a second block 12 are taken as an example, and the first block 11 includes a plurality of first mandrels (first The layout of the mandrels 111, the second block 12 includes a layout of a plurality of second mandrels 121. As shown in Fig. 2, the first mandrel 111 of the first block 11 and the second mandrel 121 of the second block 12 extend in a first direction (e.g., the x direction). FIG. 3 is a flow chart showing the layout reset method of the first embodiment for performing the layout change processing. The layout change processing of the first embodiment is processed, for example, by a processor 100 of an electronic computing system.

請同時參照第1A、1B、2和3圖。首先,如步驟S301所示,處理器100接收一電子佈局(an electronic design)。接著,如步驟S302所示,識別電子佈局之第一區塊11,和確認第一區塊11中之複數個第一芯軸(first mandrels)111的一或多個第 一設計規則(one or more first design rules)。 Please also refer to Figures 1A, 1B, 2 and 3. First, as shown in step S301, the processor 100 receives an electronic design. Next, as shown in step S302, the first block 11 of the electronic layout is identified, and one or more of the first plurality of first mandrels 111 in the first block 11 are confirmed. One or more first design rules.

一實施例中,確認第一區塊11中多個第一芯軸111的第一設計規則係包括:確認出第一區塊中11之第一芯軸111之第一間距(first pitches),如第2圖中所例示之第一間距DP11、DP12和DP13。其中,該些第一間距可能部分相同或完全相同(例如,DP11、DP12和DP13可能相等或不相等)。 In an embodiment, the first design rule of the plurality of first mandrels 111 in the first block 11 is confirmed to include: confirming a first pitch of the first mandrel 111 of the first block 11 The first pitches D P11 , D P12 and D P13 as illustrated in FIG. 2 . Wherein, the first pitches may be partially the same or identical (for example, D P11 , D P12 and D P13 may be equal or unequal).

接著,如步驟S303所示,識別電子佈局之第二區塊12和確認第二區塊中之複數個第二芯軸(second mandrels)121的一或多個第二設計規則(one or more second rules),其中第二區塊12係與第一區塊11相鄰。 Next, as shown in step S303, identifying the second block 12 of the electronic layout and confirming one or more second design rules of the plurality of second mandrels 121 in the second block (one or more second Rules), wherein the second block 12 is adjacent to the first block 11.

一實施例中,確認第二區塊12中多個第二芯軸121的第二設計規則係包括:確認出第二區塊12中多個第二芯軸121之第二間距(second pitches),如第2圖中所例示之第二間距DP21、DP22和DP23。其中,該些第二間距可能部分相同或完全相同(例如,DP21、DP22和DP23可能相等或不相等)。 In one embodiment, the second design rule for confirming the plurality of second mandrels 121 in the second block 12 includes: confirming the second pitches of the plurality of second mandrels 121 in the second block 12. The second pitches D P21 , D P22 and D P23 as illustrated in FIG. 2 . Wherein, the second pitches may be partially the same or identical (for example, D P21 , D P22 and D P23 may be equal or unequal).

如步驟S304所示,根據一或多個第一設計規則(例如根據第一間距之大小),決定出第一區塊11中多個第一芯軸111之至少一第一群組(a first group of the first mandrels)G1。 As shown in step S304, at least one first group of the plurality of first mandrels 111 in the first block 11 is determined according to one or more first design rules (eg, according to the size of the first pitch) (a first Group of the first mandrels)G1.

如步驟S305所示,根據一或多個第二設計規則(例例如根據第二間距之大小)和一或多個第一設計規則,決定出第二區塊12中多個第二芯軸121之至少一第二群組(a second group of the second mandrels)G2。 As shown in step S305, a plurality of second mandrels 121 in the second block 12 are determined according to one or more second design rules (for example, according to the size of the second pitch) and one or more first design rules. At least a second group of the second mandrels G2.

如步驟S306所示,比對第一群組G1和第二群組G2,並使第一群組G1中至少部分的第一芯軸111(即,可能是第一群組G1中部分或全部的第一芯軸111)對齊於第二群組G2中至少部分的第二芯軸121(即,可能是第二群組G2中部分或全部的第二芯軸121),而產生電子佈局之一變更佈局(modified layout)。 As shown in step S306, the first group G1 and the second group G2 are aligned, and at least a portion of the first mandrel 111 in the first group G1 (ie, may be part or all of the first group G1) The first mandrel 111) is aligned with at least a portion of the second mandrel 121 of the second group G2 (ie, possibly some or all of the second mandrel 121 of the second group G2) to produce an electronic layout A modified layout.

例如,若第一區塊11中有部分的第一芯軸111具有相同間距,如第2圖中所示之第一間距DP11等於DP12等於DP13(DP11=DP12=DP13),則相應於相等間距的該些第一芯軸111係決定為第一群組G1。而第二區塊12中有部分的第二芯軸121具有相同間距,如第2圖中所示之第二間距DP22等於DP23但不等於DP21,且第二間距DP22和DP23相等於第一間距DP11(DP11=DP12=DP13),因此根據第二和第一設計規則(i.e.即第二間距和第一間距),相應於第二間距DP22和DP23的第二芯軸121則決定為第二群組G2。比對第一群組G1和第二群組G2後,係令第一群組G1和第二群組G2中具相同間距的第一芯軸111和第二芯軸121對齊,以產生變更佈局(modified layout)。 For example, if a portion of the first mandrel 111 in the first block 11 has the same pitch, the first pitch D P11 as shown in FIG. 2 is equal to D P12 equal to D P13 (D P11 = D P12 = D P13 ) The first mandrels 111 corresponding to the equal spacing are determined as the first group G1. And a portion of the second mandrel 121 in the second block 12 has the same pitch, as shown in FIG. 2, the second pitch D P22 is equal to D P23 but not equal to D P21 , and the second pitch D P22 and D P23 Corresponding to the first pitch D P11 (D P11 = D P12 = D P13 ), so according to the second and first design rules (ie, the second pitch and the first pitch), corresponding to the second pitches D P22 and D P23 The second mandrel 121 is then determined to be the second group G2. After comparing the first group G1 and the second group G2, the first mandrel 111 and the second mandrel 121 having the same pitch in the first group G1 and the second group G2 are aligned to generate a modified layout. (modified layout).

再者,雖然第2圖中所繪示的第一群組G1是包括間距相同的第一芯軸111,第二群組G2是包括間距相同的第二芯軸121,並以第一群組G1中全部的第一芯軸111對齊於第二群組G2中全部的第二芯軸121,但本揭露並不以此為限。實施例之第一群組G1和第二群組G2中也可能分別包括間距不同的第一芯軸111和第二芯軸121。比對第一群組G1和第二群組G2時,係根 據相等的該些第一間距和該些第二間距,使第一群組G1和第二群組G2中具相同間距的部分第一芯軸111和部分第二芯軸121作相應對齊,以產生變更佈局。 Furthermore, although the first group G1 illustrated in FIG. 2 is the first mandrel 111 including the same pitch, the second group G2 is the second mandrel 121 including the same pitch, and is in the first group. All of the first mandrels 111 in G1 are aligned with all of the second mandrels 121 in the second group G2, but the disclosure is not limited thereto. It is also possible that the first group G1 and the second group G2 of the embodiment respectively include the first mandrel 111 and the second mandrel 121 having different pitches. When the first group G1 and the second group G2 are compared, the root is According to the first pitches and the second pitches, the first mandrel 111 and the second mandrel 121 having the same pitch in the first group G1 and the second group G2 are aligned correspondingly to Produce a change layout.

另一實施例中,是令兩相鄰區塊中相應於最小芯軸間距的芯軸作對齊。第4圖繪示根據本揭露第一實施例中兩相鄰區塊之多個芯軸於另一種變更佈局之排列示意圖。此實施例中,確認第一區塊11和第二區塊12的所有芯軸中之最小芯軸間距,如果兩最小芯軸間距相等,則可令兩區塊中相應於最小芯軸間距的芯軸作對齊,以減少製程負擔。 In another embodiment, the mandrels corresponding to the minimum mandrel spacing in two adjacent blocks are aligned. FIG. 4 is a schematic diagram showing the arrangement of a plurality of mandrels of two adjacent blocks in another modified layout according to the first embodiment of the present disclosure. In this embodiment, the minimum mandrel spacing among all the mandrels of the first block 11 and the second block 12 is confirmed. If the minimum mandrel spacing is equal, the spacing between the two blocks corresponding to the minimum mandrel spacing can be made. The mandrel is aligned to reduce process burden.

例如第4圖所示,確認第一區塊11中多個第一芯軸111的第一設計規則係包括:確認出第一區塊中11之第一芯軸111之第一最小芯軸間距(first minimum mandrel pitch)DP1m。確認第二區塊12中多個第二芯軸121的第二設計規則係包括:確認出第二區塊12中多個第二芯軸121之第二最小芯軸間距(second minimum mandrel pitch)DP2m。第一區塊中11其他第一芯軸111之間距如DP11、DP14、DP15、DP16等係可相等或不等,但皆大於第一最小芯軸間距DP1m;第二區塊中12其他第二芯軸121之間距如DP21、DP24、DP25、DP26等係可相等或不等,但皆大於第二最小芯軸間距DP2m。根據第一最小芯軸間距DP1m,決定出第一區塊11中多個第一芯軸111之第一群組G1。根據第二最小芯軸間距DP2m和第一最小芯軸間距DP1m,決定出第二區塊12中多個第二芯軸121之第二群組G2,其中第一群組G1中之第一最小芯軸間 距DP1m係相等於第二群組G2中之第二最小芯軸間距DP2m。之後,比對第一群組G1和第二群組G2,使第一群組G1中對應第一最小芯軸111間距DP1m的第一芯軸111對齊第二群組G2中對應第二最小芯軸間距DP2m的第二芯軸121,以產生電子佈局之一變更佈局。變更佈局完成後可儲存於處理器100中。 For example, as shown in FIG. 4, confirming the first design rule of the plurality of first mandrels 111 in the first block 11 includes: confirming the first minimum mandrel spacing of the first mandrel 111 of the first block 11 (first minimum mandrel pitch) D P1m . Confirming the second design rule of the plurality of second mandrels 121 in the second block 12 includes: confirming a second minimum mandrel pitch of the plurality of second mandrels 121 in the second block 12 D P2m . The distance between the other first mandrels 111 in the first block, such as D P11 , D P14 , D P15 , D P16 , etc., may be equal or unequal, but greater than the first minimum mandrel spacing D P1m ; the second block The distance between the other 12 second mandrels 121 may be equal or unequal, such as D P21 , D P24 , D P25 , D P26 , etc., but both are greater than the second minimum mandrel spacing D P2m . The first group G1 of the plurality of first mandrels 111 in the first block 11 is determined according to the first minimum mandrel pitch D P1m . Determining , according to the second minimum mandrel pitch D P2m and the first minimum mandrel pitch D P1m , a second group G2 of the plurality of second mandrels 121 in the second block 12, wherein the first group G1 the minimum spacing D P1m a mandrel equal to a second minimum line spacing D P2m mandrel in the second group G2. After that, comparing the first group G1 and the second group G2, the first mandrel 111 corresponding to the first minimum mandrel 111 pitch D P1m in the first group G1 is aligned with the corresponding second minimum in the second group G2 a second mandrel spacing D P2m mandrel 121, to generate one of an electronic layout change layout. After the change layout is completed, it can be stored in the processor 100.

<第二實施例> <Second embodiment>

在第二實施例中,是於收到的電子佈局中對欲變更和調整芯軸位置的兩相鄰區塊,識別出密集分佈的芯軸群,再對密集分佈的芯軸群根據設計規則進行比對,例如識別出兩相鄰區塊中的最小芯軸間距,並令相應於最小芯軸間距的芯軸進行對齊,以產生一變更佈局。 In the second embodiment, in the received electronic layout, two adjacent blocks for changing and adjusting the position of the mandrel are identified, and a densely distributed mandrel group is identified, and then a densely distributed mandrel group is designed according to the design rule. The alignment is performed, for example, by identifying the minimum mandrel spacing in two adjacent blocks and aligning the mandrels corresponding to the minimum mandrel spacing to produce a modified layout.

第5圖係繪示根據本揭露第二實施例中兩相鄰區塊之多個芯軸於其中一種變更佈局之排列示意圖。請同時參照第1A、1B圖。第二實施例中,相鄰的第一區塊11和第二區塊12例如是分別包括多個第一芯軸111和第二芯軸121之佈局。再者,第二實施例中,第一區塊11的多個第一芯軸111係包括有一第一密集分佈芯軸群(first set of dense-arranged mandrels)GD1,第二區塊12的多個第二芯軸121係包括有一第二密集分佈芯軸群(second set of dense-arranged mandrels)GD2。一實施例中,第一區塊11中第一芯軸111更包括有第一疏鬆分佈芯軸群(first set of loose-arranged mandrels)GL1,第二區塊12的多個第二芯軸121更包括有第二疏鬆分佈芯軸群(second set of loose-arranged mandrels)GL2FIG. 5 is a schematic diagram showing the arrangement of a plurality of mandrels of two adjacent blocks in one of the modified layouts according to the second embodiment of the present disclosure. Please also refer to Figures 1A and 1B. In the second embodiment, the adjacent first block 11 and second block 12 are, for example, a layout including a plurality of first mandrel 111 and second mandrel 121, respectively. Furthermore, in the second embodiment, the plurality of first mandrels 111 of the first block 11 include a first set of dense-arranged mandrels G D1 , and the second block 12 The plurality of second mandrels 121 include a second set of dense-arranged mandrels G D2 . In an embodiment, the first mandrel 111 of the first block 11 further includes a first set of loose-arranged mandrels G L1 , and a plurality of second mandrels of the second block 12 . 121 further includes a second set of loose-arranged mandrels G L2 .

芯軸是密集或疏鬆分佈可依照芯軸間的間距大小和較小間距相應的芯軸數量而定,區塊中所有芯軸的最小芯軸間距不一定出現在緊密分佈且具一定數量的密集分佈芯軸群之中。如第5圖所示,假設第一區塊11中所有芯軸111的最小芯軸間距為DP19,但其鄰近間距如DP17、DP18、DP20、DP21較大,且其餘區域具有一定數量密集分佈的第一芯軸111,其間距為DPD1m,則決定此第一密集分佈芯軸群GD1為用來比對和作佈局變更的第一區域(其中,芯軸111的間距大小關係可能是:DP19<DPD1m<DP17/DP18/DP20/DP21)。類似地,假設第二區塊12中所有芯軸121的最小芯軸間距為DP27,但其鄰近間距如DP28、DP29、DP26、DP25、DP24較大,且其餘區域具有一定數量密集分佈的芯軸121,其間距為DPD2m,則決定此第二密集分佈芯軸群GD2用來比對和作佈局變更的第二區域(其中,芯軸121的間距大小關係可能是:DP27<DPD2m<DP28/DP29/DP26/DP25/DP24)。 The mandrel is dense or loosely distributed, depending on the spacing between the mandrels and the number of mandrels corresponding to the smaller spacing. The minimum mandrel spacing of all mandrels in the block does not necessarily appear to be closely distributed and has a certain amount of density. Distributed among the mandrel groups. As shown in FIG. 5, it is assumed that the minimum mandrel spacing of all mandrels 111 in the first block 11 is D P19 , but the adjacent spacings such as D P17 , D P18 , D P20 , D P21 are larger, and the remaining regions have A certain number of densely distributed first mandrels 111 having a pitch of D PD1m determines that the first densely distributed mandrel group G D1 is a first region for alignment and layout change (wherein the spacing of the mandrels 111) The size relationship may be: D P19 <D PD1m <D P17 /D P18 /D P20 /D P21 ). Similarly, it is assumed that the minimum mandrel spacing of all mandrels 121 in the second block 12 is D P27 , but the adjacent spacings such as D P28 , D P29 , D P26 , D P25 , D P24 are larger, and the rest of the area has a certain The number of closely spaced mandrels 121 with a spacing of D PD2m determines that the second densely distributed mandrel group G D2 is used for comparison and the second region of the layout change (wherein the spacing relationship between the mandrels 121 may be : D P27 <D PD2m <D P28 / D P29 / D P26 / D P25 / D P24).

第6圖係為本揭露第二實施例之佈局重置方法以進行佈局變更處理的流程圖。第二實施例之佈局變更處理例如是由一電子運算系統之一處理器100(如第1A圖所示)進行處理。請同時參照第5和6圖。 Fig. 6 is a flow chart showing the layout resetting method of the second embodiment for performing the layout change processing. The layout change processing of the second embodiment is processed, for example, by a processor 100 (shown in FIG. 1A) of an electronic computing system. Please also refer to Figures 5 and 6.

首先,如步驟S601所示,處理器100接收一電子佈局(an electronic design)。接著,如步驟S602所示,識別電子佈局之第一區塊11,和確認第一區塊11中之複數個第一芯軸111 的一或多個第一設計規則。第二實施例中,確認第一區塊11中多個第一芯軸111的第一設計規則例如是包括:確認出第一區塊11中所有第一芯軸111之間的間距和大小。 First, as shown in step S601, the processor 100 receives an electronic design. Next, as shown in step S602, the first block 11 of the electronic layout is identified, and a plurality of first mandrels 111 in the first block 11 are confirmed. One or more first design rules. In the second embodiment, the first design rule for confirming the plurality of first mandrels 111 in the first block 11 includes, for example, confirming the spacing and size between all of the first mandrels 111 in the first block 11.

接著,如步驟S603所示,識別電子佈局之第二區塊12和確認第二區塊中之複數個第二芯軸121的一或多個第二設計規則,其中第二區塊12係與第一區塊11相鄰。第二實施例中,確認第二區塊12中多個第二芯軸121的第二設計規則例如是包括:確認出第二區塊12中所有第二芯軸121之間的間距和大小。 Next, as shown in step S603, the second block 12 of the electronic layout is identified and one or more second design rules for confirming the plurality of second mandrels 121 in the second block, wherein the second block 12 is associated with The first block 11 is adjacent. In the second embodiment, the second design rule for confirming the plurality of second mandrels 121 in the second block 12 includes, for example, confirming the spacing and size between all of the second mandrels 121 in the second block 12.

如步驟S604所示,根據一或多個第一設計規則(例如根據第一間距之大小),決定出第一區塊11中多個第一芯軸111之至少一第一群組。例如,根據所確認出的第一區塊11中所有第一芯軸111之間的間距和大小,識別和決定出第一區塊11中第一密集分佈芯軸群GD1(作為第一群組),及識別出第一密集分佈芯軸群GD1之第一最小芯軸間距DPD1mAs shown in step S604, at least a first group of the plurality of first mandrels 111 in the first block 11 is determined according to one or more first design rules (eg, according to the size of the first pitch). For example, the first densely distributed mandrel group G D1 in the first block 11 is identified and determined according to the determined spacing and size between all the first mandrels 111 in the first block 11 (as the first group) group), and recognizes that the first minimum distance D PD1m mandrel first group G D1 dense distribution of the mandrel.

如步驟S605所示,根據一或多個第二設計規則(例例如根據第二間距之大小)和一或多個第一設計規則,決定出第二區塊12中多個第二芯軸121之至少一第二群組G2。例如,根據所確認出的第二區塊12所有第二芯軸121之間的間距和大小,識別和決定出第二區塊12中第二密集分佈芯軸群GD2(作為第二群組),及識別出第二密集分佈芯軸群GD2之第二最小芯軸間距DPD2mAs shown in step S605, a plurality of second mandrels 121 in the second block 12 are determined according to one or more second design rules (for example, according to the size of the second pitch) and one or more first design rules. At least one second group G2. For example, the second densely distributed mandrel group G D2 in the second block 12 is identified and determined according to the determined spacing and size between all the second mandrels 121 of the second block 12 (as a second group) And identifying the second minimum mandrel spacing D PD2m of the second densely distributed mandrel group G D2 .

如步驟S606所示,比對第一群組和第二群組,即第 一密集分佈芯軸群GD1和第二密集分佈芯軸群GD2,並使第一群組G1中至少部分的第一芯軸111(即,可能是第一密集分佈芯軸群GD1中部分或全部的第一芯軸111)對齊於第二群組G2中至少部分的第二芯軸121(即,可能是第二密集分佈芯軸群GD2中部分或全部的第二芯軸121),而產生電子佈局之一變更佈局(modified layout)。對齊調整後所產生的變更佈局如第5圖所示。 As shown in step S606, comparing the first group and the second group, that is, the first densely distributed mandrel group G D1 and the second densely distributed mandrel group G D2 , and at least part of the first group G1 The first mandrel 111 (ie, the first mandrel 111, which may be part or all of the first densely distributed mandrel group G D1 ) is aligned with at least a portion of the second mandrel 121 of the second group G2 (ie, possibly It is the second mandrel 121) which is part or all of the second densely distributed mandrel group G D2 , and produces a modified layout of the electronic layout. The layout of the changes resulting from the alignment adjustment is shown in Figure 5.

雖然如第5圖中所例示之第一區塊11的第一密集分佈芯軸群GD1之間距(ex:DPD1m)相同,但實際應用時也可能不同,只要與相鄰之第二區塊12的第二密集分佈芯軸群GD2之間距可相對應,而於後續比對密集分佈芯軸群時,第一密集分佈芯軸群GD1中的第一芯軸111和第二密集分佈芯軸群GD2第二芯軸121可以完成至少部分地、甚至全面地對齊排列,即可應用實施例之方法進行佈局變更。變更佈局完成後可儲存於處理器100中。 Although the distance between the first densely distributed mandrel group G D1 of the first block 11 as illustrated in FIG. 5 is the same (ex: D PD1m ), the actual application may be different as long as it is adjacent to the adjacent second zone. The distance between the second densely distributed mandrel groups G D2 of the block 12 may correspond, and the first mandrel 111 and the second dense one of the first densely distributed mandrel groups G D1 when the mandrel clusters are densely distributed subsequently the second group G D2 distribution mandrel mandrel 121 can be accomplished at least partially, or even fully aligned, the method according to the application for changing the layout embodiment. After the change layout is completed, it can be stored in the processor 100.

<第三實施例> <Third embodiment>

在第三實施例中,係以相鄰的第一區塊11、第二區塊12和第三區塊13之電子佈局設計為例,提出一種佈局重置方法以進行佈局變更處理的相關說明。第7圖係繪示根據本揭露第三實施例中相鄰三個區塊之多個芯軸之一種變更佈局之排列示意圖。請同時參照第1A、1B圖。第三實施例中,第三區塊13係相鄰於第二區塊12,且第一區塊11、第二區塊12和第三區塊13中例如是分別包括多個第一芯軸111、第二芯軸121和第三芯軸131之佈局。其中第一芯軸111、第二芯軸121和第三芯軸131 例如是沿第一方向(例如x方向)延伸。第8圖係為本揭露第三實施例之佈局重置方法以進行佈局變更處理的流程圖。 In the third embodiment, the electronic layout design of the adjacent first block 11, the second block 12, and the third block 13 is taken as an example, and a layout reset method is proposed to perform the layout change processing. . Figure 7 is a schematic view showing the arrangement of a modified layout of a plurality of mandrels of adjacent three blocks in the third embodiment of the present disclosure. Please also refer to Figures 1A and 1B. In the third embodiment, the third block 13 is adjacent to the second block 12, and the first block 11, the second block 12, and the third block 13 respectively include, for example, a plurality of first mandrels respectively. 111. The layout of the second mandrel 121 and the third mandrel 131. Wherein the first mandrel 111, the second mandrel 121 and the third mandrel 131 For example, it extends in a first direction (for example, the x direction). FIG. 8 is a flowchart of the layout reset method of the third embodiment for performing the layout change processing.

請同時參照第1A、1B、7和8圖。首先,如步驟S801所示,處理器100接收一電子佈局。接著,如步驟S802所示,識別電子佈局之第一區塊11,和確認第一區塊11中之複數個第一芯軸111的一或多個第一設計規則。接著,如步驟S803所示,識別電子佈局之第二區塊12和確認第二區塊中之複數個第二芯軸121的一或多個第二設計規則,其中第二區塊12係與第一區塊11相鄰。步驟S802同步驟S302,步驟S803同步驟S303,相關內容之細節請參照上述實施例,在此不再贅述。 Please also refer to Figures 1A, 1B, 7 and 8. First, as shown in step S801, the processor 100 receives an electronic layout. Next, as shown in step S802, the first block 11 of the electronic layout is identified, and one or more first design rules of the plurality of first mandrels 111 in the first block 11 are confirmed. Next, as shown in step S803, the second block 12 of the electronic layout is identified and one or more second design rules for confirming the plurality of second mandrels 121 in the second block, wherein the second block 12 is associated with The first block 11 is adjacent. Step S802 is the same as step S302, and step S803 is the same as step S303. For details of the related content, refer to the foregoing embodiment, and details are not described herein again.

接著,如步驟S804所示,識別該電子佈局之一第三區塊(third block)13和確認第三區塊13中之複數個第三芯軸(third mandrels)131的一或多個第三設計規則(one or more third rules),其中第三區塊13相鄰於第二區塊12。一實施例中,確認第三區塊13中多個第三芯軸131的第三設計規則係包括:確認出第三區塊13中多個第二芯軸131之第三間距(third pitches),該些第三間距可能部分相同或完全相同(例如,DP35、DP36、DP37、DP3m可能相等或不相等)。於一實施例中,第三間距如DP35、DP36、DP37例如是皆大於第三最小芯軸間距DP3mNext, as shown in step S804, one of the third block 13 of the electronic layout and one or more third of the third mandrels 131 in the third block 13 are identified. One or more third rules, wherein the third block 13 is adjacent to the second block 12. In one embodiment, the third design rule for confirming the plurality of third mandrels 131 in the third block 13 includes: confirming the third pitches of the plurality of second mandrels 131 in the third block 13. The third pitches may be partially identical or identical (eg, D P35 , D P36 , D P37 , D P3m may be equal or unequal). In one embodiment, the third pitches, such as D P35 , D P36 , D P37 , are all greater than the third minimum mandrel pitch D P3m , for example .

接著,如步驟S805所示,根據一或多個第一設計規則(例如根據第一間距之大小),決定出第一區塊11中多個第一芯軸111之至少一第一群組G1。並且,如步驟S305所示,根據一 或多個第二設計規則(例如根據第二間距之大小)和一或多個第一設計規則,決定出第二區塊12中多個第二芯軸121之至少一第二群組G2。步驟S805同步驟S304,步驟S806同步驟S305,相關內容之細節請參照上述實施例,在此不再贅述。 Next, as shown in step S805, at least one first group G1 of the plurality of first mandrels 111 in the first block 11 is determined according to one or more first design rules (eg, according to the size of the first pitch) . And, as shown in step S305, according to one Or a plurality of second design rules (eg, according to the size of the second pitch) and one or more first design rules, determining at least a second group G2 of the plurality of second mandrels 121 in the second block 12. Step S805 is the same as step S304, and step S806 is the same as step S305. For details of the related content, refer to the foregoing embodiment, and details are not described herein again.

如步驟S807所示,根據一或多個第三設計規則和第二設計規則,決定出第三區塊13中多個第三芯軸131之至少一第三群組G3。一實施例中,如第三芯軸131之第三最小芯軸間距DP3m與第二芯軸121之第二最小芯軸間距DP2m相等,則相應於第三最小芯軸間距DP3m的第三芯軸131則決定為第三群組G3。 As shown in step S807, at least one third group G3 of the plurality of third mandrels 131 in the third block 13 is determined according to one or more third design rules and second design rules. Embodiment, the third mandrel 131 as the mandrel of a third minimum distance D P3m P2m equal to the second minimum distance D mandrel a second embodiment of the mandrel 121, the mandrel corresponding to the minimum distance D of the third to P3m The three-core shaft 131 is determined to be the third group G3.

如步驟S808所示,比對第一群組G1和第二群組G2,並使第一群組G1中至少部分(即部分或全部)的第一芯軸111對齊於第二群組G2中至少部分(即部分或全部)的第二芯軸121,以及比對第二群組G2和第三群組G3,並使第三群組G3中至少部分的第三芯軸131對齊於第二群組G2中至少部分的第二芯軸121,而產生電子佈局之一變更佈局。 As shown in step S808, the first group G1 and the second group G2 are aligned, and at least part (ie, part or all) of the first mandrel 111 of the first group G1 is aligned with the second group G2. At least a portion (ie, partially or wholly) of the second mandrel 121, and aligning the second group G2 and the third group G3, and aligning at least a portion of the third mandrel 131 of the third group G3 with the second At least a portion of the second mandrel 121 in the group G2, resulting in a change in layout of one of the electronic layouts.

如上述,依據第三實施例之變更佈局的一種處理方法,可根據第一最小芯軸間距DP1m,決定出第一區塊11中多個第一芯軸111之第一群組G1;根據第二最小芯軸間距DP2m和第一最小芯軸間距DP1m,決定出第二區塊12中多個第二芯軸121之第二群組G2;根據第三最小芯軸間距DP3m和第二最小芯軸間距DP2m,決定出第三區塊13中多個第三芯軸131之第三群組G3。其中第二群組G2中之第二最小芯軸間距DP2m係相等於第一群組 G1中之第一最小芯軸間距DP1m,和相等於第三群組G3中之第三最小芯軸間距DP3m,而所產生的變更佈局中,係使對應最小第三芯軸間距的DP3m之第三芯軸131對齊於對應最小第二芯軸間距的DP2m之第二芯軸121,如第7圖所示。產生後之變更佈局可儲存於處理器100(第1A圖)中。 As described above, according to a processing method of the modified layout of the third embodiment, the first group G1 of the plurality of first mandrels 111 in the first block 11 can be determined according to the first minimum mandrel pitch D P1m ; The second minimum mandrel pitch D P2m and the first minimum mandrel pitch D P1m determine a second group G2 of the plurality of second mandrels 121 in the second block 12; according to the third minimum mandrel pitch D P3m and second minimum spacing mandrel D P2m, a third decision block 13 a plurality of third group G3 of the third spindle 131. Wherein the second group G2 in the second minimum distance D P2m mandrel equal to the first line of the first group G1, the smallest mandrel pitch D P1m, and equal to the minimum third group G3, the third mandrel The pitch D P3m is generated, and the resulting modified layout is such that the third mandrel 131 of D P3m corresponding to the minimum third mandrel pitch is aligned with the second mandrel 121 of D P2m corresponding to the minimum second mandrel pitch, such as Figure 7 shows. The resulting changed layout can be stored in the processor 100 (Fig. 1A).

值得注意的是,雖然如第8圖所示之流程圖,識別第三區塊131和確認第三規則之步驟804,是在決定第一群組G1的步驟805之前,但本揭露並不以此為限,步驟804亦可在步驟806之後才進行,亦即待決定第二群組G2之後,再進行識別第三區塊131和確認第三規則之步驟804,以及進行決定第三群組G3的步驟807。 It should be noted that although the flowchart shown in FIG. 8 recognizes the third block 131 and the step 804 of confirming the third rule is before the step 805 of determining the first group G1, the disclosure does not For this reason, step 804 may also be performed after step 806, that is, after the second group G2 is determined, the step 804 of identifying the third block 131 and confirming the third rule is performed, and the third group is determined. Step 807 of G3.

再者,雖然如第8圖所示之流程圖,識別第三區塊131和決定第三芯軸131之第三群組G3的步驟804,是在第一群組G1中部分第一芯軸111對齊於第二群組G2中部分第二芯軸121的步驟之前進行,但本揭露並不以此為限,亦可在第一群組G1中部分第一芯軸111對齊於第二群組G2中部分第二芯軸121的步驟之後才進行第三區塊的相關步驟,例如識別第三區塊131和確認第三規則之步驟804,以及決定第三群組G3的步驟807,以產生電子佈局之變更佈局。 Furthermore, although the flow chart of the third block 131 and the third group G3 for determining the third mandrel 131 is identified as the flowchart shown in FIG. 8, the first mandrel is in the first group G1. 111 is performed before the step of aligning the second mandrel 121 in the second group G2, but the disclosure is not limited thereto, and part of the first mandrel 111 may be aligned with the second group in the first group G1. The steps of the third block 121 are performed after the step of the partial second mandrel 121 in the group G2, such as the step 804 of identifying the third block 131 and confirming the third rule, and the step 807 of determining the third group G3, Produce a change layout for the electronic layout.

根據上述,實施例所提出之佈局重置方法進行佈局變更處理,例如是由一電子運算系統之一處理器(processer)進行處理,可使佈局設計中相鄰的不同區塊其中之芯軸達到至少部分 或全面性相互對齊之排列。例如,相鄰區塊具有相同芯軸間距之芯軸作對齊排列(如第一實施例,第2圖);或是識別出區塊內所有芯軸的最小芯軸間距,並選擇對應最小芯軸間距之芯軸作對齊排列(如第一實施例,第4圖);或是先識別出相鄰區塊之密集分佈區,再對密集分佈區內部相應於最小芯軸間距的芯軸作對齊排列(如第二實施例,第5圖)。且實施例之方法可應用於多個相鄰區塊(如第三實施例,第7圖)之佈局變更。應用實施例之方法,於進行黃光或蝕刻製程時,具有對齊區域的相同製程環境可以大幅減少製程負載,例如降低圖案密度之變異程度以及改善圖形疏密負載問題,提高該些區域中元件形成之均齊度和減少間距之偏移,進而使製得元件具有良好的臨界尺寸(CD)和改善之電子特性。 According to the above, the layout reset method proposed by the embodiment performs the layout change processing, for example, by a processor of an electronic computing system, so that the core of the adjacent different blocks in the layout design can be reached. At least part Or a comprehensive alignment of each other. For example, the adjacent blocks have the same mandrel spacing as the alignment of the mandrel (as in the first embodiment, FIG. 2); or the minimum mandrel spacing of all the mandrels in the block is identified, and the corresponding minimum core is selected. The mandrel of the shaft spacing is aligned (as in the first embodiment, FIG. 4); or the densely distributed area of the adjacent block is first identified, and then the mandrel corresponding to the minimum mandrel spacing inside the densely distributed area is made Aligned (as in the second embodiment, Figure 5). And the method of the embodiment can be applied to the layout change of a plurality of adjacent blocks (such as the third embodiment, FIG. 7). By applying the method of the embodiment, the same process environment with aligned areas can greatly reduce the process load during the yellow light or etching process, such as reducing the variation of pattern density and improving the problem of pattern dense load, and improving component formation in the regions. The uniformity of the uniformity and the reduction of the pitch are offset, which in turn results in a component having a good critical dimension (CD) and improved electronic properties.

其他實施例,例如電子佈局上不同區塊與芯軸之位置構與排列等,亦可能可以應用,可視應用時之電子佈局各區塊芯軸的實際狀況與對製程所造成的負載程度而作適當選擇與改變。因此,如第2、4、5、7圖所示之結構僅作說明之用,並非用以限制本揭露欲保護之範圍。例如,可參考如第三實施例所述之方法對多個相鄰區塊(如四、五...或是更多區塊)之佈局進行相關變更。另外,相關技藝者當知,實施例中構成元素之形狀和位置亦並不限於圖示所繪之態樣,而是根據實際應用時之需求和/或製造步驟作相應調整。 Other embodiments, such as the positional arrangement and arrangement of different blocks and mandrels on the electronic layout, may also be applicable, and the actual condition of the core of each block in the electronic layout and the degree of load caused by the process can be applied. Appropriate choices and changes. Therefore, the structures shown in Figures 2, 4, 5, and 7 are for illustrative purposes only and are not intended to limit the scope of the disclosure. For example, related changes may be made to the layout of a plurality of adjacent blocks (such as four, five, ... or more blocks) by referring to the method as described in the third embodiment. In addition, it is to be understood by those skilled in the art that the shapes and positions of the constituent elements in the embodiments are not limited to those illustrated in the drawings, but are adjusted accordingly according to the requirements and/or manufacturing steps of the actual application.

綜上所述,雖然本發明已以實施例揭露如上,然其 並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。 In summary, although the invention has been disclosed above by way of example, It is not intended to limit the invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

S301~S306‧‧‧步驟 S301~S306‧‧‧Steps

Claims (16)

一種佈局重置方法(layout resetting method),係由一處理器(processer)進行佈局變更處理(modified layout processing),該方法包括:該處理器接收一電子佈局(an electronic design);識別該電子佈局之一第一區塊(first block)和確認該第一區塊中之複數個第一芯軸(first mandrels)的一或多個第一設計規則(one or more first rules);識別該電子佈局之一第二區塊(second block)和確認該第二區塊中之複數個第二芯軸(second mandrels)的一或多個第二設計規則(one or more second rules),其中該第二區塊相鄰於該第一區塊;根據該個或該些第一設計規則,決定出該些第一芯軸之至少一第一群組(a first group of the first mandrels);根據該個或該些第二設計規則和該個或該些第一設計規則,決定出該些第二芯軸之至少一第二群組(a second group of the second mandrels);和比對該第一群組和該第二群組,使該第一群組中至少部分的該些第一芯軸對齊該第二群組中至少部分的該些第二芯軸,以產生該電子佈局之一變更佈局(modified layout)。 A layout resetting method is performed by a processor (process layout), the method comprising: the processor receiving an electronic design; identifying the electronic layout a first block and one or more first rules for confirming a plurality of first mandrels in the first block; identifying the electronic layout a second block and one or more second rules confirming a plurality of second mandrels in the second block, wherein the second block a block adjacent to the first block; determining, according to the one or the first design rules, at least a first group of the first mandrels; Or the second design rule and the one or the first design rules, determining a second group of the second mandrels; and comparing the first group Group and the second group to make at least the first group The plurality of first mandrel aligned with the plurality of points of the second group in a second mandrel at least partially to produce one of the electronic layout change layout (modified layout). 如申請專利範圍第1項所述之佈局重置方法,其中該個或該些第一設計規則係包括該第一區塊中之該些第一芯軸之第 一間距(first pitches)。 The layout reset method of claim 1, wherein the one or the first design rules include the first mandrels in the first block First pitches. 如申請專利範圍第2項所述之佈局重置方法,其中該個或該些第二設計規則係包括該第二區塊中之該些第二芯軸之第二間距(second pitches)。 The layout reset method of claim 2, wherein the one or the second design rules include second pitches of the second mandrels in the second block. 如申請專利範圍第3項所述之佈局重置方法,其中至少部分該些第一間距相等於至少部分該些第二間距,產生該變更佈局之步驟係包括:根據相等的該些第一間距和該些第二間距,使該第一群組和該第二群組中分別對應相同的該些第一間距和該些第二間距的該些第一芯軸和該些第二芯軸相互對齊,以產生該變更佈局。 The layout reset method of claim 3, wherein at least some of the first pitches are equal to at least a portion of the second pitches, and the step of generating the changed layout comprises: according to the equal first intervals And the second spacings, the first and second core axes of the first group and the second group respectively corresponding to the first group and the second groups Align to produce the change layout. 如申請專利範圍第1項所述之佈局重置方法,其中該個或該些第一設計規則係包括一第一最小芯軸間距(first minimum mandrel pitch),該個或該些第二設計規則係包括一第二最小芯軸間距(second minimum mandrel pitch)。 The layout reset method of claim 1, wherein the one or the first design rules comprise a first minimum mandrel pitch, the second design rule or the second design rule The system includes a second minimum mandrel pitch. 如申請專利範圍第5項所述之佈局重置方法,其中該第一最小芯軸間距相等於該些第二芯軸間距,根據該第二芯軸間距和該第一最小芯軸間距決定出該第二群組,產生該變更佈局之步驟係包括:比對該第一群組和該第二群組,係使該第一群組和該第二群組中分別對應於相等的該第一最小芯軸間距和該第二最小芯軸間距的該些第一芯軸和該些第二芯軸相互對齊,以產生該變更佈局。 The layout reset method of claim 5, wherein the first minimum mandrel pitch is equal to the second mandrel pitches, and is determined according to the second mandrel pitch and the first minimum mandrel pitch The second group, the step of generating the change layout includes: comparing the first group and the second group to the first group and the second group respectively corresponding to the same The first mandrel and the second mandrel of a minimum mandrel pitch and the second minimum mandrel pitch are aligned with one another to create the modified layout. 如申請專利範圍第1項所述之佈局重置方法,其中該些 第一芯軸係包括一第一密集分佈芯軸群(first set of dense-arranged mandrels),該些第二芯軸係包括一第二密集分佈芯軸群(second set of dense-arranged mandrels)。 Such as the layout reset method described in claim 1 of the patent scope, wherein the The first mandrel includes a first set of dense-arranged mandrels, and the second mandrel includes a second set of dense-arranged mandrels. 如申請專利範圍第7項所述之佈局重置方法,其中該個或該些第一設計規則係包括:確認出該第一區塊中所有該些第一芯軸之間的間距和大小;該個或該些第二設計規則係包括:確認出該第二區塊中所有該些第二芯軸之間的間距和大小。 The layout reset method of claim 7, wherein the one or the first design rules comprise: determining a spacing and a size between all of the first mandrels in the first block; The one or the second design rules include: confirming the spacing and size between all of the second mandrels in the second block. 如申請專利範圍第8項所述之佈局重置方法,其中決定出該些第一芯軸之至少該第一群組的步驟係包括:根據確認出該第一區塊中所有該些第一芯軸之間的間距和大小,識別和決定出該第一區塊中之該第一密集分佈芯軸群與相應之該些第一芯軸,及識別出該第一密集分佈芯軸群之一第一最小芯軸間距;決定出該些第二芯軸之至少該第二群組的步驟係包括:根據確認出該第二區塊中所有該些第二芯軸之間的間距和大小,識別和決定出該第二區塊中之該第二密集分佈芯軸群與相應之該些第二芯軸,及識別出該第二密集分佈芯軸群之一第二最小芯軸間距。其中該第一和該第二密集分佈芯軸群分別為該第一群組和該第二群組。 The method for resetting the layout according to claim 8 , wherein the determining the at least the first group of the first mandrels comprises: confirming all of the first ones in the first block The spacing and size between the mandrels, identifying and determining the first densely distributed mandrel group in the first block and the corresponding first mandrels, and identifying the first densely distributed mandrel group a first minimum mandrel spacing; determining at least the second group of the second mandrels includes: determining a spacing and size between all of the second mandrels in the second block Identifying and determining the second densely distributed mandrel group in the second block and the corresponding second mandrels, and identifying a second minimum mandrel spacing of the second densely distributed mandrel group. The first and the second densely distributed mandrel groups are the first group and the second group, respectively. 如申請專利範圍第9項所述之佈局重置方法,其中該第一最小芯軸間距相等於該第二芯軸間距,產生該變更佈局之步驟 係包括:比對該第一和該第二密集分佈芯軸群,係使該第一和該第二密集分佈芯軸群中分別對應於相等的該第一最小芯軸間距和該第二最小芯軸間距的該些第一芯軸和該些第二芯軸相互對齊,以產生該變更佈局。 The layout reset method of claim 9, wherein the first minimum mandrel pitch is equal to the second mandrel pitch, and the step of changing the layout is generated. The method includes: comparing the first and the second densely distributed mandrel groups such that the first and second densely distributed mandrel groups respectively correspond to the first minimum mandrel spacing and the second minimum The first mandrels and the second mandrels of the mandrel spacing are aligned with each other to create the modified layout. 如申請專利範圍第1項所述之佈局重置方法,其中該第一區塊中之該些第一芯軸和該第二區塊中之該些第二芯軸係沿一第一方向延伸。 The layout reset method of claim 1, wherein the first mandrels in the first block and the second mandrels in the second block extend in a first direction . 如申請專利範圍第1項所述之佈局重置方法,更包括:識別該電子佈局之一第三區塊(third block)和確認該第三區塊中之複數個第三芯軸(third mandrels)的一或多個第三設計規則(one or more third rules),其中該第三區塊相鄰於該第二區塊;根據該個或該些第三設計規則和該個或該些第二設計規則,決定出該些第三芯軸之至少一第三群組(a third group of the third mandrels);和比對該第二群組和該第三群組,並使該第三群組中至少部分的該些第三芯軸對齊該第二群組中至少部分的該些第二芯軸,產生該電子佈局之該變更佈局。 The layout reset method of claim 1, further comprising: identifying a third block of the electronic layout and confirming a plurality of third mandrels in the third block (third mandrels) One or more third rules, wherein the third block is adjacent to the second block; according to the one or the third design rule and the one or the a second design rule, determining a third group of the third mandrels; and comparing the second group and the third group, and making the third group At least a portion of the third mandrels in the set are aligned with at least a portion of the second mandrels of the second group to produce the altered layout of the electronic layout. 如申請專利範圍第12項所述之佈局重置方法,其中該第一區塊中之該些第一芯軸、該第二區塊中之該些第二芯軸和該第三區塊中之該些第三芯軸係沿一第一方向延伸。 The layout reset method of claim 12, wherein the first mandrels in the first block, the second mandrels in the second block, and the third block are The third mandrels extend in a first direction. 如申請專利範圍第12項所述之佈局重置方法,其中識別該第三區塊和決定該些第三芯軸之該第三群組之步驟,係在該 第一群組中部分該些第一芯軸對齊於該第二群組中部分該些第二芯軸的步驟之前進行。 The layout reset method of claim 12, wherein the step of identifying the third block and determining the third group of the third mandrels is The steps of the first group of the first group in the first group are aligned with the portions of the second mandrels in the second group. 如申請專利範圍第12項所述之佈局重置方法,其中識別該第三區塊和決定該些第三芯軸之該第三群組之步驟,係在該第一群組中部分該些第一芯軸對齊於該第二群組中部分該些第二芯軸的步驟之後進行,以產生該電子佈局之該變更佈局。 The layout reset method of claim 12, wherein the step of identifying the third block and determining the third group of the third mandrels is partially in the first group The step of aligning the first mandrel with a portion of the second mandrels in the second group is performed to produce the altered layout of the electronic layout. 如申請專利範圍第1項所述之佈局重置方法,更包括:儲存該變更佈局於該處理器。 The method for resetting a layout as described in claim 1, further comprising: storing the change layout in the processor.
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