TW201624215A - Touch device - Google Patents
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Abstract
Description
本發明是有關於一種電子裝置,且特別是有關於一種觸控裝置。 The present invention relates to an electronic device, and more particularly to a touch device.
近年來,隨著資訊技術、無線行動通訊和資訊家電的快速發展與應用,為了達到更便利、體積更輕巧化以及更人性化的目的,許多資訊產品已由傳統之鍵盤或滑鼠等輸入裝置,轉變為使用觸控面板(Touch Panel)作為輸入裝置。藉由將手指或其他物件(例如觸控筆)觸碰(或接近)觸控面板,使用者可以對電子裝置進行操作。一般觸控控制器需以高壓信號來驅動觸控面板。高電壓的輸出,意味著一般觸控控制器必須採用昂貴的高壓製程。 In recent years, with the rapid development and application of information technology, wireless mobile communication and information appliances, many information products have been input devices such as traditional keyboards or mice for the purpose of being more convenient, lighter and more humanized. , changed to use a touch panel (Touch Panel) as an input device. The user can operate the electronic device by touching (or approaching) the touch panel with a finger or other object (such as a stylus). Generally, the touch controller needs to drive the touch panel with a high voltage signal. The high voltage output means that the general touch controller must use an expensive high pressure process.
本發明提供一種觸控裝置,以降低控制器積體電路的輸出電壓擺幅。 The invention provides a touch device to reduce the output voltage swing of the integrated circuit of the controller.
本發明的實施例提供一種觸控裝置,其包括觸控面板以 及控制器積體電路。觸控面板具有一第一位準偏移器、一移位暫存器串、多個第一觸控電極以及多個第二觸控電極。移位暫存器串包括相互串連的多個移位暫存器。第一位準偏移器的輸出端連接至這些移位暫存器中第一移位暫存器的輸入端。這些移位暫存器的輸出端以一對一方式連接至這些第一觸控電極。這些第一觸控電極與這些第二觸控電極相互交錯以形成觸控區域。控制器積體電路具有一起始脈衝輸出端與多個感測端。起始脈衝輸出端連接至觸控面板的第一位準偏移器的輸入端。這些感測端以一對一方式連接至這些第二觸控電極。 Embodiments of the present invention provide a touch device including a touch panel. And the controller integrated circuit. The touch panel has a first level shifter, a shift register string, a plurality of first touch electrodes, and a plurality of second touch electrodes. The shift register string includes a plurality of shift registers that are serially connected to each other. The output of the first quasi-offset is coupled to the input of the first shift register of the shift registers. The outputs of these shift registers are connected to the first touch electrodes in a one-to-one manner. The first touch electrodes and the second touch electrodes are interdigitated to form a touch area. The controller integrated circuit has a starting pulse output and a plurality of sensing terminals. The start pulse output is connected to the input of the first level shifter of the touch panel. The sensing terminals are connected to the second touch electrodes in a one-to-one manner.
在本發明的一實施例中,上述的第一位準偏移器、移位暫存器串、第一觸控電極以及第二觸控電極皆經由觸控面板製程而形成於觸控面板的基板上。 In an embodiment of the invention, the first level shifter, the shift register string, the first touch electrode, and the second touch electrode are all formed on the touch panel by the touch panel process. On the substrate.
在本發明的一實施例中,上述控制器積體電路的起始脈衝輸出端的電壓擺幅(voltage swing)小於第一位準偏移器的輸出端的電壓擺幅。 In an embodiment of the invention, the voltage swing of the initial pulse output of the controller integrated circuit is smaller than the voltage swing of the output of the first level shifter.
在本發明的一實施例中,上述的第一位準偏移器的電源端被供電於控制器積體電路,或是被供電於用於驅動顯示面板的時序控制器。 In an embodiment of the invention, the power supply terminal of the first level shifter is powered by the controller integrated circuit or is powered by a timing controller for driving the display panel.
在本發明的一實施例中,上述的第一位準偏移器包括第一電晶體、第二電晶體、第三電晶體以及電容。第一電晶體的第一端與控制端耦接至第一位準偏移器的第一電源端。第二電晶體的第一端耦接至第一位準偏移器的第一電源端。第二電晶體的第 二端耦接至第一位準偏移器的輸出端。第二電晶體的控制端耦接至第一電晶體的第二端。第三電晶體的第一端耦接至第二電晶體的第二端。第三電晶體的第二端耦接至第一位準偏移器的第二電源端。第三電晶體的控制端耦接至第一位準偏移器的輸入端。電容的第一端耦接至第一電晶體的第二端。電容的第二端耦接至第二電晶體的第二端。 In an embodiment of the invention, the first level shifter includes a first transistor, a second transistor, a third transistor, and a capacitor. The first end of the first transistor and the control end are coupled to the first power terminal of the first level shifter. The first end of the second transistor is coupled to the first power terminal of the first level shifter. Second transistor The two ends are coupled to the output of the first level offset. The control end of the second transistor is coupled to the second end of the first transistor. The first end of the third transistor is coupled to the second end of the second transistor. The second end of the third transistor is coupled to the second power terminal of the first level shifter. The control end of the third transistor is coupled to the input of the first level shifter. The first end of the capacitor is coupled to the second end of the first transistor. The second end of the capacitor is coupled to the second end of the second transistor.
在本發明的一實施例中,上述的觸控面板更包括第二位準偏移器。第二位準偏移器的輸出端連接至這些移位暫存器的時脈觸發端。第二位準偏移器的輸入端連接至控制器積體電路的時脈輸出端。 In an embodiment of the invention, the touch panel further includes a second level shifter. The output of the second level shifter is connected to the clock trigger of these shift registers. The input of the second level shifter is coupled to the clock output of the controller integrated circuit.
在本發明的一實施例中,上述的觸控面板更包括除時脈器。除時脈器的輸入端連接至高頻時脈源以接收高頻時脈。除時脈器的多個輸出端連接至控制器積體電路的多個時脈輸入端,以提供不同頻率的多個時脈信號。 In an embodiment of the invention, the touch panel further includes a clock removing device. The input of the clock is connected to the high frequency clock source to receive the high frequency clock. A plurality of outputs of the clock divider are coupled to the plurality of clock inputs of the controller integrated circuit to provide a plurality of clock signals of different frequencies.
在本發明的一實施例中,上述的除時脈器、第一位準偏移器、移位暫存器串、第一觸控電極以及第二觸控電極皆經由觸控面板製程而形成於觸控面板的基板上。 In an embodiment of the invention, the clock removing device, the first level shifting device, the shift register string, the first touch electrode and the second touch electrode are all formed by the touch panel process. On the substrate of the touch panel.
在本發明的一實施例中,上述的高頻時脈源為用於驅動顯示面板的時序控制器。 In an embodiment of the invention, the high frequency clock source is a timing controller for driving the display panel.
基於上述,觸控面板的位準偏移器可以將控制器積體電路的輸出電壓擺幅加大,以便驅動觸控面板的移位暫存器串。因此,控制器積體電路的輸出電壓擺幅可以有效降低。 Based on the above, the level shifter of the touch panel can increase the output voltage swing of the controller integrated circuit to drive the shift register string of the touch panel. Therefore, the output voltage swing of the controller integrated circuit can be effectively reduced.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.
100、300‧‧‧觸控裝置 100, 300‧‧‧ touch devices
110、310‧‧‧觸控面板 110, 310‧‧‧ touch panel
111‧‧‧第一位準偏移器 111‧‧‧First positional offset
112‧‧‧第二位準偏移器 112‧‧‧Second position shifter
113‧‧‧第三位準偏移器 113‧‧‧ third positional offset
120、320‧‧‧控制器積體電路 120, 320‧‧‧ controller integrated circuit
311‧‧‧除時脈器 311‧‧‧In addition to the clock
330‧‧‧時序控制器 330‧‧‧Sequence Controller
C1‧‧‧電容 C1‧‧‧ capacitor
CK‧‧‧時脈輸出端 CK‧‧‧ clock output
CLK‧‧‧時脈輸出端 CLK‧‧‧ clock output
F1、F2、F3、F4‧‧‧時脈輸入端 F1, F2, F3, F4‧‧‧ clock input
In_LS‧‧‧輸入端 In_LS‧‧‧ input
M1、M2、M3、M4‧‧‧第二觸控電極 M1, M2, M3, M4‧‧‧ second touch electrode
N1、N2、N3、N4、N5、N6、N7、N8‧‧‧第一觸控電極 N1, N2, N3, N4, N5, N6, N7, N8‧‧‧ first touch electrodes
Out_LS‧‧‧輸出端 Out_LS‧‧‧output
R1、R2、R3、R4‧‧‧感測端 R1, R2, R3, R4‧‧‧ sensing end
SR1、SR2、SR3、SR4、SR5、SR6、SR7、SR8‧‧‧移位暫存器 SR1, SR2, SR3, SR4, SR5, SR6, SR7, SR8‧‧‧ shift register
T1‧‧‧第一電晶體 T1‧‧‧first transistor
T2‧‧‧第二電晶體 T2‧‧‧second transistor
T3‧‧‧第三電晶體 T3‧‧‧ third transistor
Vdd_LS‧‧‧第一電源端 Vdd_LS‧‧‧First power terminal
Vss_LS‧‧‧第二電源端 Vss_LS‧‧‧second power terminal
Vst‧‧‧起始脈衝輸出端 Vst‧‧‧ starting pulse output
XCK‧‧‧反相時脈輸出端 XCK‧‧‧Inverted Clock Output
圖1是依照本發明一實施例說明一種觸控裝置的電路示意圖。 FIG. 1 is a schematic circuit diagram of a touch device according to an embodiment of the invention.
圖2是依照本發明實施例說明圖1所示第一位準偏移器111的電路示意圖。 FIG. 2 is a circuit diagram showing the first level shifter 111 of FIG. 1 according to an embodiment of the invention.
圖3是依照本發明另一實施例說明一種觸控裝置的電路示意圖。 FIG. 3 is a schematic circuit diagram of a touch device according to another embodiment of the invention.
在本案說明書全文(包括申請專利範圍)中所使用的「耦接」一詞可指任何直接或間接的連接手段。舉例而言,若文中描述第一裝置耦接於第二裝置,則應該被解釋成該第一裝置可以直接連接於該第二裝置,或者該第一裝置可以透過其他裝置或某種連接手段而間接地連接至該第二裝置。另外,凡可能之處,在圖式及實施方式中使用相同標號的元件/構件/步驟代表相同或類似部分。不同實施例中使用相同標號或使用相同用語的元件/構件/步驟可以相互參照相關說明。 The term "coupled" as used throughout the specification (including the scope of the patent application) may be used in any direct or indirect connection. For example, if the first device is described as being coupled to the second device, it should be construed that the first device can be directly connected to the second device, or the first device can be connected through other devices or some kind of connection means. Connected to the second device indirectly. In addition, wherever possible, the elements and/ Elements/components/steps that use the same reference numbers or use the same terms in different embodiments may refer to the related description.
圖1是依照本發明一實施例說明一種觸控裝置100的電 路示意圖。觸控裝置100包括觸控面板110以及控制器積體電路120。觸控面板110具有第一位準偏移器111、移位暫存器串、多個第一觸控電極以及多個第二觸控電極。第一觸控電極的數量與/或第二觸控電極的數量可以依照產品設計需求來決定。舉例來說(但不限於此),圖1所示觸控面板110具有第一觸控電極N1、N2、N3、N4、N5、N6、N7、N8,以及具有第二觸控電極M1、M2、M3、M4。第一觸控電極N1~N8與第二觸控電極M1~M4相互交錯以形成一個觸控區域。第一觸控電極N1~N8、第二觸控電極M1~M4、第一位準偏移器111以及移位暫存器SR1~SR8可以經由相同製程(觸控面板製程)而內嵌/形成於觸控面板110的基板上。 FIG. 1 illustrates an electric device of a touch device 100 according to an embodiment of the invention. Road map. The touch device 100 includes a touch panel 110 and a controller integrated circuit 120. The touch panel 110 has a first level shifter 111, a shift register string, a plurality of first touch electrodes, and a plurality of second touch electrodes. The number of first touch electrodes and/or the number of second touch electrodes can be determined according to product design requirements. For example, but not limited to, the touch panel 110 shown in FIG. 1 has first touch electrodes N1, N2, N3, N4, N5, N6, N7, N8, and has second touch electrodes M1, M2. , M3, M4. The first touch electrodes N1 N N8 and the second touch electrodes M1 M M4 are interdigitated to form a touch area. The first touch electrodes N1 N N8 , the second touch electrodes M1 M M4 , the first level shifter 111 , and the shift registers SR1 SR SR8 can be embedded/formed through the same process (touch panel process). On the substrate of the touch panel 110.
所述移位暫存器串包括相互串連的多個移位暫存器。觸控面板110的移位暫存器的數量,可以依照產品設計需求來決定。舉例來說(但不限於此),圖1所示觸控面板110的移位暫存器串包括相互串連的移位暫存器SR1、SR2、SR3、SR4、SR5、SR6、SR7與SR8。在此所述「相互串連」,是指一個移位暫存器的輸入端電性連接至另一個移位暫存器的輸出端。「多個移位暫存器相互串連」的意思並沒有包括移位暫存器的電源端、控制端、時脈觸發端或是其他連接端的連接關係。 The shift register string includes a plurality of shift registers that are serially connected to each other. The number of shift registers of the touch panel 110 can be determined according to product design requirements. For example, but not limited to, the shift register string of the touch panel 110 shown in FIG. 1 includes shift register SR1, SR2, SR3, SR4, SR5, SR6, SR7, and SR8 connected in series with each other. . As used herein, "interconnected" means that the input of one shift register is electrically connected to the output of another shift register. The meaning of "multiple shift registers are connected in series" does not include the connection relationship between the power supply terminal, the control terminal, the clock trigger terminal or other connection terminals of the shift register.
所述移位暫存器SR1~SR8可以是習知移位暫存器或是其他移位暫存器,本實施例並不加以限制。移位暫存器SR1~SR8的輸出端以一對一方式連接至第一觸控電極N1~N8。第一位準偏 移器111的輸出端連接至移位暫存器SR1~SR8中第一個移位暫存器SR1的輸入端。 The shift register SR1~SR8 may be a conventional shift register or other shift register, which is not limited in this embodiment. The output terminals of the shift registers SR1 to SR8 are connected to the first touch electrodes N1 to N8 in a one-to-one manner. First quasi-bias The output of the shifter 111 is connected to the input of the first shift register SR1 of the shift registers SR1 to SR8.
觸控面板110還具有第二位準偏移器112與第三位準偏移器113。第二位準偏移器112的輸出端連接至移位暫存器SR1~SR8的正時脈觸發端。第三位準偏移器113的輸出端連接至移位暫存器SR1~SR8的負時脈觸發端。第一觸控電極N1~N8、第二觸控電極M1~M4、位準偏移器111~113以及移位暫存器SR1~SR8可以經由相同製程(觸控面板製程)而內嵌/形成於觸控面板110的基板上。 The touch panel 110 also has a second level shifter 112 and a third level shifter 113. The output of the second level shifter 112 is coupled to the positive clock trigger of the shift registers SR1~SR8. The output of the third level shifter 113 is connected to the negative clock trigger of the shift registers SR1~SR8. The first touch electrodes N1 to N8, the second touch electrodes M1 to M4, the level shifters 111 to 113, and the shift registers SR1 to SR8 can be embedded/formed through the same process (touch panel process). On the substrate of the touch panel 110.
控制器積體電路120具有起始脈衝輸出端、時脈輸出端與多個感測端。起始脈衝輸出端、時脈輸出端與感測端的數量可以依照產品設計需求來決定。舉例來說(但不限於此),圖1所示控制器積體電路120具有起始脈衝輸出端Vst、時脈輸出端CK、反相時脈輸出端XCK以及感測端R1、R2、R3、R4。起始脈衝輸出端Vst連接至觸控面板110的移位暫存器串中的第一個移位暫存器SR1的輸入端。時脈輸出端CK耦接至第二位準偏移器112的輸入端,以提供時脈信號。反相時脈輸出端XCK耦接至第三位準偏移器113的輸入端,以提供反相時脈信號。感測端R1~R4以一對一方式連接至第二觸控電極M1~M4。 The controller integrated circuit 120 has a start pulse output terminal, a clock output terminal and a plurality of sensing terminals. The number of start pulse outputs, clock outputs and sense terminals can be determined according to product design requirements. For example, but not limited to, the controller integrated circuit 120 shown in FIG. 1 has a start pulse output terminal Vst, a clock output terminal CK, an inverted clock output terminal XCK, and sensing terminals R1, R2, and R3. , R4. The start pulse output terminal Vst is connected to the input terminal of the first shift register SR1 in the shift register string of the touch panel 110. The clock output CK is coupled to the input of the second level shifter 112 to provide a clock signal. The inverting clock output terminal XCK is coupled to the input of the third level shifter 113 to provide an inverted clock signal. The sensing terminals R1 R R4 are connected to the second touch electrodes M1 M M4 in a one-to-one manner.
在另一些實施例中,移位暫存器SR1~SR8可能分別僅有一個時脈觸發端。因此,位準偏移器113與反相時脈輸出端XCK可以被省略。在其他實施例中,移位暫存器SR1~SR8可能分別 具有三個(或更多個)時脈觸發端,以接收不同相位的時脈信號。因此,觸控面板110可能配置了更多個位準偏移器,而控制器積體電路120可能配置了更多個時脈輸出端(例如CK1、CK2、CK3、…,以及XCK1、XCK2、XCK3、…,未繪示)。所述多個位準偏移器與所述多個時脈輸出端可以參照位準偏移器112、位準偏移器113、時脈輸出端CK與反相時脈輸出端XCK的相關說明而類推,故不予贅述。 In other embodiments, the shift registers SR1~SR8 may each have only one clock trigger. Therefore, the level shifter 113 and the inverted clock output terminal XCK can be omitted. In other embodiments, the shift registers SR1~SR8 may be respectively There are three (or more) clock trigger terminals to receive clock signals of different phases. Therefore, the touch panel 110 may be configured with more level offsets, and the controller integrated circuit 120 may be configured with more clock outputs (eg, CK1, CK2, CK3, ..., and XCK1, XCK2). XCK3,..., not shown). The plurality of level shifters and the plurality of clock outputs may refer to a reference description of the level shifter 112, the level shifter 113, the clock output terminal CK, and the inverted clock output terminal XCK. And analogy, so I won't repeat them.
請參照圖1,控制器積體電路120的起始脈衝輸出端Vst的電壓擺幅(voltage swing)小於第一位準偏移器111的輸出端的電壓擺幅。也就是說,觸控面板110的位準偏移器111、112與113可以將控制器積體電路120的輸出電壓擺幅加大,以便驅動觸控面板110的移位暫存器SR1~SR8。因此,控制器積體電路120的輸出電壓擺幅可以有效降低。輸出電壓擺幅的降低,意味著控制器積體電路120可以採用便宜的低壓製程。在一些實施例中,控制器積體電路120可以供電至位準偏移器111、112與113的電源端。在另一些實施例中,用於驅動顯示面板的時序控制器(未繪示)可以供電至位準偏移器111、112與113的電源端。 Referring to FIG. 1, the voltage swing of the start pulse output terminal Vst of the controller integrated circuit 120 is smaller than the voltage swing of the output terminal of the first level shifter 111. That is to say, the level shifters 111, 112 and 113 of the touch panel 110 can increase the output voltage swing of the controller integrated circuit 120 to drive the shift register SR1~SR8 of the touch panel 110. . Therefore, the output voltage swing of the controller integrated circuit 120 can be effectively reduced. The reduction in output voltage swing means that the controller integrated circuit 120 can employ an inexpensive low voltage process. In some embodiments, the controller integrated circuit 120 can be powered to the power terminals of the level shifters 111, 112, and 113. In other embodiments, a timing controller (not shown) for driving the display panel can be powered to the power terminals of the level shifters 111, 112, and 113.
控制器積體電路120可以經由起始脈衝輸出端Vst與第一位準偏移器111提供起始脈衝信號給觸控面板110的移位暫存器SR1~SR8。控制器積體電路120可以經由時脈輸出端CK與第二位準偏移器112提供時脈信號給觸控面板110的移位暫存器SR1~SR8。控制器積體電路120可以經由反相時脈輸出端XCK與第 三位準偏移器113提供反相時脈信號給觸控面板110的移位暫存器SR1~SR8。依照時脈輸出端CK與反相時脈輸出端XCK所輸出時脈信號的觸發時序,這些移位暫存器SR1~SR8可以基於控制器積體電路120所提供的起始脈衝信號,而產生/輸出驅動脈衝信號至第一觸控電極N1~N8,以掃描第一觸控電極N1~N8。於掃描第一觸控電極N1~N8的期間,控制器積體電路120可以經由感測端R1~R4同步地感測第二觸控電極M1~M4,以偵測在觸控面板110的觸控區域的觸碰事件。 The controller integrated circuit 120 can provide a start pulse signal to the shift registers SR1 SRSR8 of the touch panel 110 via the start pulse output terminal Vst and the first level shifter 111. The controller integrated circuit 120 can provide a clock signal to the shift registers SR1 SRSR8 of the touch panel 110 via the clock output terminal CK and the second level shifter 112. The controller integrated circuit 120 can pass through the inverted clock output terminal XCK and the The three-bit shifter 113 provides an inverted clock signal to the shift registers SR1 SR SR8 of the touch panel 110. According to the trigger timing of the clock signal outputted by the clock output terminal CK and the inverted clock output terminal XCK, the shift registers SR1 SR SR8 may be generated based on the start pulse signal provided by the controller integrated circuit 120. / output driving pulse signal to the first touch electrodes N1 N N8 to scan the first touch electrodes N1 N N8. During the scanning of the first touch electrodes N1 N N8, the controller integrated circuit 120 can synchronously sense the second touch electrodes M1 M M4 via the sensing terminals R1 R R4 to detect the touch on the touch panel 110 . The touch event of the control area.
本實施例並不限制位準偏移器111、112與113的實施方式。舉例來說,在一些實施例中,位準偏移器111、112與113可以是公知位準偏移器或是其他位準偏移電路。 This embodiment does not limit the implementation of the level shifters 111, 112 and 113. For example, in some embodiments, the level shifters 111, 112, and 113 can be well-known level shifters or other level shifting circuits.
圖2是依照本發明實施例說明圖1所示第一位準偏移器111的電路示意圖。其他位準偏移器112與113的實施方式可以參照第一位準偏移器111的相關說明而類推。第一位準偏移器111具有輸入端In_LS、輸出端Out_LS、第一電源端Vdd_LS與第二電源端Vss_LS。輸入端In_LS可以耦接至控制器積體電路120的起始脈衝輸出端Vst。輸出端Out_LS可以耦接至移位暫存器SR1的輸入端。第一電源端Vdd_LS與第二電源端Vss_LS可以耦接至電源供應電路。在另一些實施例中,控制器積體電路120可以供電至位準偏移器111的第一電源端Vdd_LS與第二電源端Vss_LS。在其他實施例中,用於驅動顯示面板的時序控制器(未繪示)可以供電至位準偏移器111的第一電源端Vdd_LS與第二電 源端Vss_LS。 FIG. 2 is a circuit diagram showing the first level shifter 111 of FIG. 1 according to an embodiment of the invention. Embodiments of the other level shifters 112 and 113 can be analogized with reference to the related description of the first level shifter 111. The first bit shifter 111 has an input terminal In_LS, an output terminal Out_LS, a first power supply terminal Vdd_LS, and a second power supply terminal Vss_LS. The input terminal In_LS may be coupled to the start pulse output terminal Vst of the controller integrated circuit 120. The output terminal Out_LS can be coupled to the input of the shift register SR1. The first power terminal Vdd_LS and the second power terminal Vss_LS may be coupled to the power supply circuit. In other embodiments, the controller integrated circuit 120 can supply power to the first power terminal Vdd_LS of the level shifter 111 and the second power terminal Vss_LS. In other embodiments, a timing controller (not shown) for driving the display panel can be powered to the first power terminal Vdd_LS and the second power of the level shifter 111. Source Vss_LS.
第一位準偏移器111包括第一電晶體T1、第二電晶體T2、第三電晶體T3以及電容C1。於本實施例中(但不以此為限),第一電晶體T1、第二電晶體T2與第三電晶體T3可以是N型金氧半導體(N-channel Metal Oxide Semiconductor,NMOS)電晶體。第一電晶體T1的第一端(例如汲極)與控制端(例如閘極)耦接至第一位準偏移器111的第一電源端Vdd_LS。第二電晶體T2的第一端(例如汲極)耦接至第一電源端Vdd_LS。第二電晶體T2的第二端(例如源極)耦接至第一位準偏移器111的輸出端Out_LS。第二電晶體T2的控制端(例如閘極)耦接至第一電晶體T1的第二端(例如源極)。第三電晶體T3的第一端(例如汲極)耦接至第二電晶體T2的第二端。第三電晶體T3的第二端(例如源極)耦接至第一位準偏移器111的第二電源端Vss_LS。第三電晶體T3的控制端(例如閘極)耦接至第一位準偏移器111的輸入端In_LS。電容C1的第一端耦接至第一電晶體T1的第二端。電容C1的第二端耦接至第二電晶體T2的第二端。 The first bit alignment deflector 111 includes a first transistor T1, a second transistor T2, a third transistor T3, and a capacitor C1. In this embodiment, but not limited thereto, the first transistor T1, the second transistor T2 and the third transistor T3 may be N-channel Metal Oxide Semiconductor (NMOS) transistors. . The first end (eg, the drain) of the first transistor T1 is coupled to the control terminal (eg, the gate) to the first power terminal Vdd_LS of the first level shifter 111. The first end (eg, the drain) of the second transistor T2 is coupled to the first power terminal Vdd_LS. The second end (eg, the source) of the second transistor T2 is coupled to the output terminal Out_LS of the first level shifter 111. A control terminal (eg, a gate) of the second transistor T2 is coupled to a second end (eg, a source) of the first transistor T1. The first end (eg, the drain) of the third transistor T3 is coupled to the second end of the second transistor T2. The second end (eg, the source) of the third transistor T3 is coupled to the second power terminal Vss_LS of the first level shifter 111. The control terminal (eg, the gate) of the third transistor T3 is coupled to the input terminal In_LS of the first level shifter 111. The first end of the capacitor C1 is coupled to the second end of the first transistor T1. The second end of the capacitor C1 is coupled to the second end of the second transistor T2.
在另一些實施例中,第一位準偏移器111可以包括相互串聯的多組圖2所示電路。 In other embodiments, the first level shifter 111 can include a plurality of sets of circuits shown in FIG. 2 in series with each other.
圖3是依照本發明另一實施例說明一種觸控裝置300的電路示意圖。觸控裝置300包括觸控面板310、控制器積體電路320以及時序控制器330。時序控制器330可以控制/驅動顯示面板(例如液晶顯示面板,未繪示)。觸控面板310具有多個位準偏移 器、移位暫存器串、除時脈器(clock divider)311、多個第一觸控電極以及多個第二觸控電極。第一觸控電極T1~N8、第二觸控電極M1~M4、位準偏移器111~113、移位暫存器SR1~SR8以及除時脈器311可以經由相同製程(觸控面板製程)而內嵌/形成於觸控面板310的基板上。圖3所示觸控裝置300、觸控面板310、控制器積體電路320可以參照圖1所示觸控裝置100、觸控面板110、控制器積體電路120的相關說明而類推。 FIG. 3 is a schematic circuit diagram of a touch device 300 according to another embodiment of the invention. The touch device 300 includes a touch panel 310 , a controller integrated circuit 320 , and a timing controller 330 . The timing controller 330 can control/drive a display panel (eg, a liquid crystal display panel, not shown). The touch panel 310 has multiple levels of offset a shift register string, a clock divider 311, a plurality of first touch electrodes, and a plurality of second touch electrodes. The first touch electrodes T1 to N8, the second touch electrodes M1 to M4, the level shifters 111 to 113, the shift registers SR1 to SR8, and the clock saver 311 can be processed through the same process (touch panel process). And embedded/formed on the substrate of the touch panel 310. The touch device 300, the touch panel 310, and the controller integrated circuit 320 shown in FIG. 3 can be analogized with reference to the related descriptions of the touch device 100, the touch panel 110, and the controller integrated circuit 120 shown in FIG.
圖3所示觸控面板310更包括除時脈器311。除時脈器311的輸入端連接至高頻時脈源,以接收高頻時脈。於圖3所示實施例中,所述高頻時脈源可以是用於驅動顯示面板(未繪示)的時序控制器330或是其他外部時脈源。觸控面板310與控制器積體電路320的時脈來自於外部時脈源(例如時序控制器330),因此可以降低觸控面板310與/或控制器積體電路320的功耗。 The touch panel 310 shown in FIG. 3 further includes a clock separator 311. The input of the clock 311 is connected to the high frequency clock source to receive the high frequency clock. In the embodiment shown in FIG. 3, the high frequency clock source may be a timing controller 330 for driving a display panel (not shown) or other external clock source. The clock of the touch panel 310 and the controller integrated circuit 320 comes from an external clock source (for example, the timing controller 330), so the power consumption of the touch panel 310 and/or the controller integrated circuit 320 can be reduced.
時序控制器330的時脈輸出端CLK輸出高頻時脈(例如數MHz至數百MHz)給除時脈器311。除時脈器311的多個輸出端連接至控制器積體電路320的多個時脈輸入端(例如時脈輸入端F1、F2、F3與F4),以提供不同頻率的多個時脈信號。圖3所示時脈輸入端F1~F4為實施範例。時序控制器330的時脈輸入端的數量不以此為限。除時脈器311可以將時序控制器330的時脈輸出端CLK所輸出高頻時脈進行除頻,以輸出不同頻率的時脈信號給控制器積體電路320的時脈輸入端F1~F4。舉例來說(但不限於此),假設時序控制器330的時脈輸出端CLK所輸出高頻時 脈的頻率為f Hz,則除時脈器311可以輸出頻率f/2Hz、f/4Hz、f/8Hz、f/16Hz的時脈信號給控制器積體電路320的時脈輸入端F1~F4。 The clock output terminal CLK of the timing controller 330 outputs a high frequency clock (for example, several MHz to several hundreds of MHz) to the clock divider 311. The plurality of outputs of the clock divider 311 are coupled to a plurality of clock inputs (eg, clock inputs F1, F2, F3, and F4) of the controller integrated circuit 320 to provide a plurality of clock signals of different frequencies. . The clock input terminals F1 to F4 shown in FIG. 3 are examples of implementation. The number of clock inputs of the timing controller 330 is not limited thereto. The clock divider 311 can divide the high frequency clock outputted by the clock output terminal CLK of the timing controller 330 to output clock signals of different frequencies to the clock input terminals F1 to F4 of the controller integrated circuit 320. . For example, but not limited to, assuming that the clock output terminal CLK of the timing controller 330 outputs a high frequency When the frequency of the pulse is f Hz, the clock 311 can output the clock signals of the frequency f/2 Hz, f/4 Hz, f/8 Hz, and f/16 Hz to the clock input terminals F1 to F4 of the controller integrated circuit 320. .
控制器積體電路320可以從時脈輸入端F1~F4選擇其一,並將被選擇的時脈輸入端的時脈信號經由時脈輸出端CK與反相時脈輸出端XCK輸出給位準偏移器112與113。控制器積體電路320可以藉由選擇時脈輸入端F1~F4來進行跳頻(frequency hopping)操作。跳頻操作可以改善觸控面板的觸控性能。 The controller integrated circuit 320 can select one of the clock input terminals F1~F4, and output the clock signal of the selected clock input terminal to the level offset via the clock output terminal CK and the inverted clock output terminal XCK. Shifters 112 and 113. The controller integrated circuit 320 can perform a frequency hopping operation by selecting the clock input terminals F1 to F4. The frequency hopping operation can improve the touch performance of the touch panel.
本實施例並不限制除時脈器311的實施方式。舉例來說,在一些實施例中,除時脈器311可以是公知除頻器或是其他除頻電路。在另一些實施例中,除時脈器311可以包括相互串連的多個正反器(flip-flop)。利用正反器串可以將時序控制器330的時脈輸出端CLK所輸出高頻時脈進行除頻,以輸出不同頻率的時脈信號。另一方面,本實施例並不限制除時脈器311的數量。舉例來說,在一些實施例中,除時脈器311可以包含多個除時脈器,分別提供不同的除頻倍率。因此,這些除時脈器可以各自將時序控制器330的時脈輸出端CLK所輸出高頻時脈進行不同倍率的除頻,而輸出不同頻率的時脈信號給控制器積體電路320的時脈輸入端F1~F4。 This embodiment does not limit the implementation of the clock 311. For example, in some embodiments, the clock saver 311 can be a known frequency divider or other frequency dividing circuit. In other embodiments, the clock saver 311 can include a plurality of flip-flops connected in series with one another. The high frequency clock outputted by the clock output terminal CLK of the timing controller 330 can be frequency-divided by using the flip-flop string to output clock signals of different frequencies. On the other hand, the present embodiment does not limit the number of the clock separators 311. For example, in some embodiments, the clock saver 311 can include a plurality of clock dividers that provide different frequency division ratios, respectively. Therefore, the de-clocking devices can respectively divide the high-frequency clock outputted by the clock output terminal CLK of the timing controller 330 by different ratios, and output the clock signals of different frequencies to the controller integrated circuit 320. Pulse input terminals F1~F4.
綜上所述,本發明實施例所述觸控面板的位準偏移器可以將控制器積體電路的輸出電壓擺幅加大,以便驅動觸控面板的移位暫存器。因此,控制器積體電路的輸出電壓擺幅可以有效降 低。輸出電壓擺幅的降低,意味著控制器積體電路可以採用便宜的低壓製程。 In summary, the level shifter of the touch panel of the embodiment of the present invention can increase the output voltage swing of the controller integrated circuit to drive the shift register of the touch panel. Therefore, the output voltage swing of the controller integrated circuit can be effectively reduced. low. The reduction in output voltage swing means that the controller integrated circuit can be used in an inexpensive low voltage process.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
100‧‧‧觸控裝置 100‧‧‧ touch device
110‧‧‧觸控面板 110‧‧‧Touch panel
111‧‧‧第一位準偏移器 111‧‧‧First positional offset
112‧‧‧第二位準偏移器 112‧‧‧Second position shifter
113‧‧‧第三位準偏移器 113‧‧‧ third positional offset
120‧‧‧控制器積體電路 120‧‧‧Controller integrated circuit
CK‧‧‧時脈輸出端 CK‧‧‧ clock output
M1、M2、M3、M4‧‧‧第二觸控電極 M1, M2, M3, M4‧‧‧ second touch electrode
N1、N2、N3、N4、N5、N6、N7、N8‧‧‧第一觸控電極 N1, N2, N3, N4, N5, N6, N7, N8‧‧‧ first touch electrodes
R1、R2、R3、R4‧‧‧感測端 R1, R2, R3, R4‧‧‧ sensing end
SR1、SR2、SR3、SR4、SR5、SR6、SR7、SR8‧‧‧移位暫存器 SR1, SR2, SR3, SR4, SR5, SR6, SR7, SR8‧‧‧ shift register
Vst‧‧‧起始脈衝輸出端 Vst‧‧‧ starting pulse output
XCK‧‧‧反相時脈輸出端 XCK‧‧‧Inverted Clock Output
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