TW201618417A - Switch capacitor charge equalization circuit for series-connected battery cells - Google Patents

Abstract

The present invention relates to a switch capacitor charge equalization circuit for series-connected battery cells. In conventional circuit, when the capacitor is charging or discharging, the capacitor is shunted across only one battery cell. Thus, the balance current becomes smaller as the voltage differences between each battery, as such, the balance time is prolonged. In the present invention, the capacitor is shunted across at least two battery cells when the capacitor is charged, and the capacitor is shunted across a battery cell when the capacitor is discharged. Thus, the balance current is increased, and the balance time is effectively reduced.

Description

Capacitor switching battery cell balancing circuit

The present invention relates to a technique of a series battery, and more particularly to a capacitance switching type cell balancing circuit.

The cell imbalance means that the capacity of each battery becomes different. This is usually caused by the physical and electrical characteristics of the battery. Specifically, cell imbalance in multi-cell series cells is caused by a slight mismatch in capacity degradation rate and in mass production, equivalent parallel connection to the internal resistance or self-discharge resistance of the battery, and peripheral circuit configuration. Although the capacity deterioration rate and internal resistance are well controlled as the battery manufacturing technology is improved, the micro-mismatch effect will gradually increase and affect the performance of the battery over time.

Since the minimum capacity battery cannot be fully charged after the charging process is completed, until the total battery voltage is equal to the charger's output voltage, or when one or more batteries are in an overcharged state, the protection integrated circuit can turn off the protection switch. . In addition, in the discharged state, the battery pack The execution time is limited by the battery of the lowest capacity, that is, the battery cannot be fully utilized in the state of battery imbalance. In order to prevent cell imbalance, a circuit, the "cell balancing circuit", is required.

The basic concept of a cell balancing circuit is to equalize the energy of each cell. The cell balance can be divided into two types depending on the type of battery and power consumption: passive cell balancing and active cell balancing. Passive cell balancing is the method of consuming battery energy to equalize the voltage of all cells, as described in the reference [1]; active cell balancing is the use of low-power capacitors or inductors to redistribute energy between cells.

Taiwan Patent Publication TWI415365 discloses a switching and supercapacitance of a switch to achieve the transfer of power between two adjacent batteries to achieve battery string balance. Taiwan Patent Publication TWM441267 discloses a balanced path between a module and a module by using a flyback converter to discharge a high battery to the entire battery string to achieve battery balance. Taiwan Patent Notice TWM382598 uses eight switches to charge a battery with a lower charge to achieve a balance. Reference [2] uses a switch and a diode to create a bypass to stop the discharge of a lower voltage battery or to stop charging a higher voltage battery to achieve battery balance.

Since the balance circuit is affected by the characteristics of the components, not only the resistance and capacitance characteristics of the components but also the characteristics of stray inductance and capacitance on the wires. FIG. 1 is a circuit diagram of a conventional capacitance-switched cell balancing circuit. Referring to FIG. 1 , the conventional capacitor-switched cell balancing circuit includes four single cells B ₁ , B ₂ , B ₃ , B ₄ , eight switches S _a1 , S _a2 , S _a3 , S _a4 , S _b1 , S _b2 , S _b3 , S _b4 and three capacitors C ₁ , C ₂ , C ₃ . The circuit seems to require a very complicated control method, but in reality, a simple PWM signal can be used to complete the control functions required for balancing. Figure 2 is a diagram showing the ideal waveform of the voltage and current of a conventional capacitance-switched cell balancing circuit. For convenience of explanation, a simplified circuit is illustrated - taking two lithium ion batteries in series as an example, and assuming that the battery voltage B _{1 is} greater than B ₂ to dictate the operation mode of the balancing circuit. Figure 3 is a simplified circuit diagram of a conventional capacitively switched cell balancing circuit. FIG. 4 is a schematic diagram showing the operation mode of a conventional capacitance switching type power balance circuit. FIG. 5 is a schematic diagram showing the operation mode of a conventional capacitance switching type power balance circuit. Hereinafter, the operation of the prior art capacitance switching type circuit will be described with reference to FIGS. 3 to 5.

Mode 1 (t ₀ ~ t ₁ ):

At time t ₀ , the switches S _a1 and _{Sa 2 are} turned on, and the current conducting path is as shown in FIG. 4 . In this mode, the B ₁ battery begins to discharge energy to the capacitor C ₁ to charge it; when the switch is turned off, this mode is terminated and enters the hysteresis mode.

Mode 2 (t ₂ ~ t ₃ ):

At time t ₂ , switches S _b1 and S _{b2 are} turned on, and the current conducting path is as shown in FIG. In this mode by the capacitor C ₁ begins to release the energy to the battery B _2, to charge it. When the switch is turned off, this mode is terminated, enters the hysteresis mode, and waits for the return mode 1.

The difference in battery voltage, through the transmission between the battery and the capacitor, transfers the energy of the higher voltage battery to the battery with a lower voltage, and slowly narrows the gap between the voltages as shown in Fig. 6. Figure 6 shows the tradition The balance result of the capacitance-switched cell balancing circuit. It is thus seen that the balance takes a long time, and the voltage gap after the balance is still large. The main focus of the invention is to improve the balance time and the voltage difference after the balance.

[1] C. Pascual, and PT Krein, "Switched Capacitor System for Automatic Series Battery Equalization," 12 th Applied Power Electronics Conference and Exposition, APEC'97, pp. 848-854, 1997.

[2] H. Shibata, S. Taniguchi, K. Adachi, K. Yamasaki, G. Ariyoshi, K. Kawata, K. Nishijima and K. Harada, “Management of Serially-Connected Battery System Using Multiple Switches,” IEEE International Conference on Power Electronics and Drive Systems, Vol. 2, pp. 508-511, Oct. 2001.

It is an object of the present invention to provide a capacitance switching type battery balancing circuit and a battery pack using the same, which balances the power of each sub-battery, reduces the time for balancing the battery power, and prolongs the service life of the battery pack.

In view of the above, the present invention provides a capacitance switching battery cell balancing circuit, which is applicable to a first battery cell (Cell) and a second battery cell, wherein the first end of the second battery cell is coupled to the first battery cell. At the second end, the capacitor-switched battery cell balancing circuit includes a capacitor, an upper switch circuit, a lower switch circuit, and a control circuit. The capacitor includes a first end and a second end for storing energy. The upper switch circuit includes at least two first ends and a second end, wherein the second end of the upper branch switch element is coupled to the first end of the capacitor, and the first end of the upper branch switch element is coupled to the first end The first end of the single cell, the second first end of the upper switching element is coupled to the first end of the second cell. The lower switch circuit includes at least two first ends and a second end, wherein the second end of the lower branch switch element is coupled to the second end of the capacitor, and the first first end of the lower branch switch element is coupled to the first end The second end of the single cell is coupled to the second end of the second cell. The control circuit is used to control the upper switch circuit and the lower switch circuit.

When the battery balance of the Kth battery is performed, the control circuit controls the first first end of the upper switch to be electrically connected to the second end of the upper switch at a first preset time, and the control circuit controls the lower switch The second first end is electrically connected to the second end of the lower switch, so that the first single cell (Cell) and the second single cell are connected in series to charge the capacitor. At a second predetermined time, the control circuit controls the Kth first end of the upper switch to be electrically connected to the second end of the upper switch, and the control circuit controls the Kth first end and the lower switch of the lower switch The second end is turned on to cause the capacitor to discharge the Kth cell, wherein 0<K<=2.

The present invention further provides a capacitor-switched battery cell balancing circuit, which is applicable to a group of N-series battery packs, wherein each of the series-connected battery packs includes at least two cells (Cell), wherein The first end of the first +1 battery pack is coupled to the second end of the first battery pack, and the capacitor-switched battery balance circuit includes an electric a container, an upper switch circuit, a lower switch circuit, and a control circuit. The capacitor includes a first end and a second end for storing energy. The upper switching circuit includes N first ends and a second end, wherein the second end of the upper switching element is coupled to the first end of the capacitor, and the J first end of the upper switching element is coupled to the Jth The first end of the battery pack. The lower switch circuit includes N first ends and a second end, wherein the second end of the lower branch switching element is coupled to the second end of the capacitor, and the J first end of the lower branch switching element is coupled to the Jth The second end of the battery pack. The control circuit is used to control the upper switch circuit and the lower switch circuit.

When performing the balance of the Kth battery pack: at a first preset time, the control circuit controls the first first end of the upper switch to be turned on with the second end of the upper switch, and the control circuit controls the lower switch The Nth first end is electrically connected to the second end of the lower switch, so that the N battery packs charge the capacitor. At a second predetermined time, the control circuit controls the Kth first end of the upper switch to be electrically connected to the second end of the upper switch, and the control circuit controls the Kth first end and the lower switch of the lower switch The second end is turned on to cause the capacitor to discharge the Kth battery pack, wherein N, I, J, and K are natural numbers, and 0<I, J, K<=N.

The present invention further provides a capacitor-switched battery cell balancing circuit, which is applicable to N series connected cells (Cells), wherein the first end of the first +1 cells is coupled to the second end of the first cell The capacitance switching battery balancing circuit includes a capacitor, an upper switching circuit, a lower switching circuit, and a control circuit. The capacitor includes a first end and a second end for storing energy. The upper switch circuit includes N a first end and a second end, wherein the second end of the upper switching element is coupled to the first end of the capacitor, and the Jth first end of the upper switching element is coupled to the first of the Jth battery end. The lower switch circuit includes N first ends and a second end, wherein the second end of the lower branch switching element is coupled to the second end of the capacitor, and the J first end of the lower branch switching element is coupled to the Jth The second end of the battery. The control circuit is used to control the upper switch circuit and the lower switch circuit.

When the battery balance of the Kth battery is performed, the control circuit controls the first first end of the upper switch to be electrically connected to the second end of the upper switch at a first preset time, and the control circuit controls the lower switch The Nth first end is electrically connected to the second end of the lower switch, so that the N single cells charge the capacitor. At a second predetermined time, the control circuit controls the Kth first end of the upper switch to be electrically connected to the second end of the upper switch, and the control circuit controls the Kth first end and the lower switch of the lower switch The second end is turned on to cause the capacitor to discharge the Kth cell, wherein N, I, J, and K are natural numbers, and 0<I, J, K<=N.

The spirit of the present invention is to provide a capacitance switching type power balance circuit, which mainly improves the balance time between the conventional circuit and the voltage difference between the batteries. In order to improve the influence of line and component characteristics, it will change the energy storage of the capacitor from one battery to two to many cells (Cell) to store energy, and then transfer the energy to the lower voltage cell by capacitor. (Cell), although there is still a voltage drop on the switch, because the voltage of the two batteries is used to transfer the voltage of the battery, the voltage drop on the switch is not so serious for the gap between the batteries. . Although in power There are many components on the road and the control mechanism is also more complicated; but relatively, the balance effect is quite improved, and the conversion efficiency is also greatly improved.

The above and other objects, features and advantages of the present invention will become more <RTIgt;

S _a1 , S _a2 , S _a3 , S _a4 , S _b1 , S _b2 , S _b3 , S _b4 ‧‧ ‧ switch

C ₁ , C ₂ , C ₃ ‧ ‧ capacitors

B ₁ , B ₂ , B ₃ , B ₄ ‧ ‧ single cells

B ₇₁ , B ₇₂ , B ₇₃ , B ₇₄ ‧‧‧ four series cells (Cell)

C ₇₁ , C ₇₂ , C ₇₃ ‧ ‧ capacitors

S _71a , S _71b , S _71c , S _71d , S _72a , S _72b , S _72c , S _72d , S _73a , S _73b , S _73c , S _73d ‧‧‧ transistor switch

701‧‧‧Control circuit

V _GS1a ‧‧‧ control circuit 701 outputs the gate voltage to transistor switch S _71a

V _GS1b ‧‧‧ control circuit 701 outputs the gate voltage to transistor switch S _71b

V _GS1c ‧‧‧ control circuit 701 outputs the gate voltage to transistor switch S _71c

V _GS1d ‧‧‧ control circuit 701 outputs the gate voltage to transistor switch S _71d

i _C1 ‧‧‧current flowing to capacitor C ₇₁

V _C1 ‧‧‧Voltage of capacitor C ₇₁

t ₀ ~t ₅ ‧‧‧ time label

B ₁₄₁ , B ₁₄₂ , B ₁₄₃ ‧‧‧Battery

C ₁₄₁ ‧‧‧ capacitor

SW141‧‧‧Upper switch circuit

SW142‧‧‧ lower switch circuit

N1, N2, N3, N4‧‧‧ nodes

S151, S152, S153, S154, S155, S156‧‧‧ transistor switch

FIG. 1 is a circuit diagram of a conventional capacitance-switched cell balancing circuit.

Figure 2 is a diagram showing the ideal waveform of the voltage and current of a conventional capacitance-switched cell balancing circuit.

Figure 3 is a simplified circuit diagram of a conventional capacitively switched cell balancing circuit.

FIG. 4 is a schematic diagram showing the operation mode of a conventional capacitance switching type power balance circuit.

FIG. 5 is a schematic diagram showing the operation mode of a conventional capacitance switching type power balance circuit.

Figure 6 is a diagram showing the balance result of the conventional capacitance-switched cell balancing circuit.

FIG. 7 is a circuit diagram of a capacitor switching power balance circuit according to a preferred embodiment of the present invention.

FIG. 8 is a waveform diagram showing voltage and current of a capacitance switching type power balance circuit according to a preferred embodiment of the present invention.

Figure 9 is a diagram of a preferred embodiment of the present invention A simplified circuit diagram of a capacitively switched cell balancing circuit.

FIG. 10 is a schematic diagram showing the operation of the capacitance switching type cell balancing circuit according to the preferred embodiment of the present invention.

FIG. 11 is a schematic diagram showing the operation of the capacitance switching type cell balancing circuit according to the preferred embodiment of the present invention.

FIG. 12 is a schematic diagram showing the operation of the capacitance switching power balance circuit according to the preferred embodiment of the present invention.

FIG. 13 is a diagram showing the balance result of the capacitance switching type power balance circuit according to the preferred embodiment of the present invention.

FIG. 14 is a circuit diagram of a capacitor switching power balance circuit according to a preferred embodiment of the present invention.

FIG. 15 is a detailed circuit diagram of a capacitance switching type power balance circuit according to a preferred embodiment of the present invention.

Certain terms are used throughout the description and following claims to refer to particular elements. Those of ordinary skill in the art should understand that a hardware manufacturer may refer to the same component by a different noun. The scope of this specification and the subsequent patent application do not use the difference of the names as the means for distinguishing the elements, but the difference in function of the elements as the criterion for distinguishing. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term "coupled" is used herein to include any direct and indirect electrical connection. Therefore, if a first device coupling is described Connecting to a second device means that the first device can be directly electrically connected to the second device or indirectly electrically connected to the second device through other devices or connection means.

FIG. 7 is a circuit diagram of a capacitor switching power balance circuit according to a preferred embodiment of the present invention. Referring to FIG. 7, the capacitor switching circuit includes four cells (Cell) B ₇₁ , B ₇₂ , B ₇₃ , B ₇₄ , three capacitors C ₇₁ , C ₇₂ , C ₇₃ , and twelve transistor switches connected in series. S _71a , S _71b , S _71c , S _71d , S _72a , S _72b , S _72c , S _72d , S _73a , S _73b , S _73c , S _73d and a control circuit 701 . The twelve control pins of the control circuit are respectively coupled to twelve transistor switches S _71a , S _71b , S _71c , S _71d , S _72a , S _72b , S _72c , S _72d , S _73a , S _73b , S _73c The gate of S _73d to control the above twelve transistor switches S _71a , S _71b , S _71c , S _71d , S _72a , S _72b , S _72c , S _72d , S _73a , S _73b , S _73c , S The conduction state of _73d .

FIG. 8 is a waveform diagram showing voltage and current of a capacitance switching type power balance circuit according to a preferred embodiment of the present invention. As shown in Fig. 7 and Fig. 8, wherein reference numeral V _GS1a denotes a gate voltage which the control circuit 701 outputs to the transistor switch S _71a ; and reference numeral V _GS1b denotes a gate voltage which the control circuit 701 outputs to the transistor switch S _71b ; V _GS1c represents the gate voltage outputted to the transistor switch S _71c by the control circuit 701; reference numeral V _GS1d represents the gate voltage outputted to the transistor switch S _71d by the control circuit 701; reference numeral i _C1 represents the current flowing to the capacitor C ₇₁ , reference numeral V _C1 Indicates the voltage of capacitor C ₇₁ . For convenience of explanation, the following embodiment is exemplified by connecting two lithium ion batteries in series, and assuming that the battery voltage B _{71 is} greater than B ₇₂ to dictate the operation mode of the balancing circuit. FIG. 9 is a simplified circuit diagram of a capacitance switching type power balance circuit according to a preferred embodiment of the present invention. As shown in Figure 9, the voltage and current waveforms on the control signal and capacitor are shown in Figure 8. In order to facilitate the description of the operation of the capacitance switching type cell balancing circuit of the embodiment of the present invention, in FIG. 8, the time labels t ₀ to t ₅ are also indicated. Hereinafter, the operation mode of the circuit will be described in accordance with the control circuit 701.

Mode 1 (t ₀ ~ t ₁ ):

At time t ₀ , the transistor switches S _71a and S _{71d are} turned on. As shown in FIG. 10, FIG. 10 is a schematic diagram showing the operation of the capacitance switching type cell balancing circuit according to the preferred embodiment of the present invention. . The solid line in FIG. 10 indicates a current conduction path, and the broken line indicates that no current is passed. In this mode, battery B ₇₁ and battery B ₇₂ simultaneously begin to release energy to capacitor C ₇₁ . When the transistor switches S _71a and S _{71d are} turned off, this mode ends and enters the hysteresis mode (t ₁ ~ t ₂ ).

Mode 2 (t ₂ ~ t ₃ ):

At time t ₂ , the transistor switches S _{71 a} and S _{71 c are} turned on. As shown in FIG. 11 , FIG. 11 is a schematic diagram showing the operation of the capacitance switching type cell balancing circuit according to the preferred embodiment of the present invention. . Here, the solid line in Fig. 11 indicates a current conduction path, and the broken line indicates that no current is passed. In this mode, energy is released from capacitor C ₇₁ to battery B ₇₁ and charged. When the transistor switches S _71a and S _{71c are} turned off, this mode ends, and the hysteresis (t ₃ ~ t ₄ ) also enters. The purpose of this mode is to transfer power from battery B ₇₁ and B ₇₂ to relay C ₇₁ as a relay and then to battery B ₇₁ . Therefore, as in the foregoing case where the battery voltage B ₇₁ is assumed to be greater than B ₇₂ , the control circuit 701 will not activate this mode; only if the battery voltage B _{72 is} greater than B ₇₁ , the control circuit 701 will activate this. mode.

Mode 3 (t ₄ ~ t ₅ ):

At time t ₄ , the transistor switches S _71b and S _{71d are} turned on. As shown in FIG. 12 , FIG. 12 is a schematic diagram showing the operation of the capacitance switching type cell balancing circuit according to the preferred embodiment of the present invention. . The solid line in Fig. 12 indicates the current conduction path, and the broken line indicates the passage of no current. In this mode, energy is released from capacitor C ₇₁ to battery B ₇₂ . When the transistor switches S _71b and S _{71d are} turned off, this mode is terminated, and after the hysteresis, the mode 1 is returned. As discussed in the previous mode, this mode also operates the control circuit 701 only if the battery voltage B _{71 is} greater than B ₇₂ .

The balance circuit of the above-described embodiment of the present invention is theoretically divided into three modes. Actually, in the preferred embodiment, mode 2 and mode 3 are selected during one charge and discharge. Selection method by which the high and low battery voltage to make the selection, when the battery voltage is greater than B ₇₂ B ₇₁ if only the boot mode 3, mode 2 is started and vice versa. The purpose of this selection is to avoid energy transfer between the cells, which consumes energy; conversely, only the energy is selectively directed to the destination battery. As a result, the efficiency of the circuit will greatly improve the balance results, as shown in Figure 13. FIG. 13 is a diagram showing the balance result of the capacitance switching type power balance circuit according to the preferred embodiment of the present invention. Referring to FIG. 13 and FIG. 6 , it can be seen by those skilled in the art that the power balance time of the embodiment of the present invention can achieve the battery balance of each battery cell extremely quickly compared to the prior art.

In addition, the operating principles of the above-described transistor switches S _73a , S _71c and S _73c and S _73d are similar to those of the above-described transistor switches S _73a , S _71c and S _73c and S _73d in mode 1 to mode 3, and the difference is similar. It is to be noted that the above-described transistor switches S _73a , S _71c and S _73c and S _{73d are} responsible for balancing the charge balance of the first battery (B ₇₁ , B ₇₂ ) and the second battery ( B ₇₁ , B ₇₂ ) connected in series. Since the operation is similar, it will not be described here.

In the above embodiments, the applicant has proposed that the best mode of implementation of the present invention is to perform energy balance with two batteries. However, those skilled in the art should know that three or more batteries may be employed with reference to the present invention. Balance. FIG. 14 is a circuit diagram of a capacitor switching power balance circuit according to a preferred embodiment of the present invention. Referring to FIG. 14, in FIG. 14, a total of three batteries B ₁₄₁ , B ₁₄₂ , and B _{143 are} connected in series. The two ends of the capacitor C ₁₄₁ are respectively coupled to the upper switch circuit SW141 and the lower switch circuit SW142. For convenience of explanation, the 14th icon shows four nodes, which are node N1, node N2, node N3, and node N4. Hereinafter, the description will be made in accordance with the operation mode of the circuit.

Mode 1:

The upper switch circuit SW141 turns on the node N1 and the first end of the capacitor C141, and the lower switch circuit SW142 turns on the node N4 and the second end of the capacitor C141. In this mode, battery B ₁₄₁ , battery B _142, and battery B ₁₄₃ simultaneously begin to release energy to capacitor C ₁₄₁ .

Mode 2:

The upper branch switch circuit SW141 turns on the node N1 and the first end of the capacitor C141, and the lower branch switch circuit SW142 turns on the node N2 and the second end of the capacitor C141. In this mode, the capacitor C ₁₄₁ starts to release energy to the battery B ₁₄₁ and charges it. The purpose of this mode is to transfer the amount of power of the battery B ₁₄₁ , the battery B _142, and the battery B ₁₄₃ to the battery B ₁₄₁ via transfer to the capacitor C ₁₄₁ as a relay. This mode is only activated if the voltage of battery B ₁₄₁ is less than the voltage of battery B ₁₄₂ or the voltage of battery B ₁₄₃ .

Mode 3:

The upper switch circuit SW141 turns on the node N2 and the first end of the capacitor C141, and the lower switch circuit SW142 turns on the node N3 and the second end of the capacitor C141. In this mode, energy is released from capacitor C ₁₄₁ to battery B ₁₄₂ and charged. The purpose of this mode is to use batteries B _141, B ₁₄₂ and the battery power of the battery B _143, via the capacitor C ₁₄₁ proceeds to act as a relay, then transferred to the battery B _142. This mode is activated only if the voltage of the battery B ₁₄₂ is less than the voltage of the battery B ₁₄₁ or the voltage of the battery B ₁₄₃ .

Mode 4:

The upper switch circuit SW141 turns on the node N3 and the first end of the capacitor C141, and the lower switch circuit SW142 turns on the node N4 and the second end of the capacitor C141. In this mode, energy is released from capacitor C ₁₄₁ to battery B ₁₄₃ and charged. The purpose of this mode is to transfer the amount of power of the battery B ₁₄₁ , the battery B _142, and the battery B ₁₄₃ to the battery B ₁₄₁ via transfer to the capacitor C ₁₄₁ as a relay. This mode is activated only if the voltage of the battery B ₁₄₃ is less than the voltage of the battery B ₁₄₁ or the voltage of the battery B ₁₄₂ .

By the same token, the balancing circuit of the above embodiment of the present invention is theoretically divided into four modes, but in practice, in the preferred embodiment, mode 2, mode 3 and mode 4 are during one charge and discharge. , choose an action.

FIG. 15 is a detailed circuit diagram of a capacitance switching type power balance circuit according to a preferred embodiment of the present invention. Referring to FIG. 14 and FIG. 15, in this embodiment, the upper switch circuit SW141 is implemented by the transistor switches S151, S152, and S153, and the lower switch circuit SW142 is implemented by the transistor switches S154, S155, and S156. . The operation of this circuit is the same as that of Fig. 14, and therefore will not be described again.

As can be seen from the above embodiment, although the above embodiment is implemented by charging three capacitors simultaneously for one capacitor, those skilled in the art should know that the present invention can be extended to a plurality of batteries simultaneously according to the above rules. A capacitor is charged. However, in general, more than three batteries charge the capacitors, and discharging the individual cells causes excessive current. Therefore, in the preferred embodiment of the present invention, two batteries are used in the current lithium battery technology. Or three batteries. However, with advances in battery technology, the present invention does not exclude that more than three batteries can be used to charge the capacitor. Therefore, the invention is not limited thereto.

In summary, the spirit of the present invention is to provide a capacitance switching type power balance circuit, which mainly improves the balance time between the conventional circuit and the voltage difference between the batteries. In order to improve the influence of the line and the original characteristics, Will change the original storage battery from a battery to use two or more cells (Cell) to store energy, and then transfer the energy to a lower voltage cell (Cell), although on the switch There is still a voltage drop, but because the sum of the two batteries makes energy transfer to the voltage of the single cell, the voltage drop across the switch is not so severe for the gap between the cells. Although there are many components on the circuit and the control mechanism is more complicated; but relatively, the balance effect is considerably improved, and the conversion efficiency is also greatly improved.

The specific embodiments of the present invention are intended to be illustrative only and not to limit the invention to the above embodiments, without departing from the spirit of the invention and the following claims. The scope of the invention and the various changes made are within the scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

C ₇₁ , C ₇₂ , C ₇₃ ‧ ‧ capacitors

S _71a , S _71b , S _71c , S _71d , S _72a , S _72b , S _72c , S _72d , S _73a , S _73b , S _73c , S _73d ‧‧‧ transistor switch

701‧‧‧Control circuit

Claims (6)

A capacitor-switched battery cell balancing circuit is applicable to a first cell (Cell) and a second cell, wherein a first end of the second cell is coupled to a second end of the first cell, and the capacitor is switched. The battery cell balancing circuit includes: a capacitor including a first end and a second end for storing energy; and an upper switch circuit comprising at least two first ends and a second end, wherein the upper branch The second end of the switching element is coupled to the first end of the capacitor, the first end of the upper switching element is coupled to the first end of the first battery, and the second end of the upper switching element One end is coupled to the first end of the second unit cell; the lower branch switch circuit includes at least two first ends and a second end, wherein the second end of the lower branch switching element is coupled to the capacitor a second end, the first end of the lower switching element is coupled to the second end of the first battery, and the second first end of the lower switching element is coupled to the second battery a second circuit; a control circuit for controlling the upper switch circuit and the lower a switching circuit, wherein when the power balance of the Kth battery cell is performed: the control circuit controls the first first end of the upper switch to be electrically connected to the second end of the upper switch at a first preset time And the control circuit controls the second first end of the lower switch to be electrically connected to the second end of the lower switch, so that the first single cell (Cell) and the second single cell are connected in series The capacitor is charged, and the control circuit controls the Kth first end of the upper switch to be electrically connected to the second end of the upper switch at a second predetermined time, and the control circuit controls the Kth of the lower switch The first end is electrically connected to the second end of the lower switch, so that the capacitor discharges the Kth cell, wherein K<=2. The capacitor switching battery cell balancing circuit of claim 1, wherein the upper switching circuit comprises: a first transistor comprising a gate, a first source drain and a second source drain The first transistor of the first transistor is coupled to the first first end of the upper transistor, and the first transistor is coupled to the control circuit. a second source drain is coupled to the second end of the upper branch switch circuit; and a second transistor includes a gate, a first source drain, and a second source drain, wherein the gate of the second transistor The first source of the second transistor is coupled to the second first end of the upper switch circuit, and the second source of the second transistor is coupled to the upper switch a second end of the circuit, wherein the lower switch circuit comprises: a third transistor comprising a gate, a first source drain and a second source drain, wherein the third transistor has a gate coupling Connected to the control circuit, the first source drain of the third transistor is coupled to the first first of the lower switch circuit The second source drain of the third transistor is coupled to the lower switch circuit And a fourth transistor, comprising a gate, a first source drain, and a second source drain, wherein the gate of the fourth transistor is coupled to the control circuit, the fourth The first source drain of the crystal is coupled to the second first end of the lower switch circuit, and the second source drain of the fourth transistor is coupled to the second end of the lower switch circuit. A capacitor-switched battery cell balancing circuit is applicable to N groups of series of cells, wherein each group of serially connected battery cells includes at least two cells (Cell), wherein The first end of the battery pack is coupled to the second end of the first battery pack. The capacitor-switched battery balance circuit includes: a capacitor including a first end and a second end for storing energy; The switching circuit includes a first end and a second end, wherein the second end of the upper switching element is coupled to the first end of the capacitor, and the Jth first end of the upper switching element is coupled a first end of the Jth battery pack; a lower branch switch circuit comprising N first ends and a second end, wherein the second end of the lower branch switch element is coupled to the second end of the capacitor, the lower end The Jth first end of the switching element is coupled to the second end of the Jth battery; a control circuit is configured to control the upper switch circuit and the lower switch circuit, Wherein, when the power balance of the Kth battery pack is performed: at a first preset time, the control circuit controls the first first end of the upper switch to be electrically connected to the second end of the upper switch, and the The control circuit controls the Nth first end of the lower switch to be electrically connected to the second end of the lower switch, so that the N battery packs charge the capacitor, and the control circuit controls the upper limit for a second preset time The Kth first end of the branch switch is electrically connected to the second end of the upper branch switch, and the control circuit controls the Kth first end of the lower switch to be electrically connected to the second end of the lower switch, so that the capacitor The Kth battery pack is discharged, wherein N, I, J, and K are natural numbers, and 0 < I, J, K <= N. The capacitor-switched battery cell balancing circuit of claim 3, wherein each group of battery cells comprises a first cell (Cell) and a second cell, wherein the second cell is first The end is coupled to the second end of the first battery, and each battery pack is further coupled to a group of battery balancing circuits. The battery balancing circuit includes: a group of capacitors including a first end and a second The first end of the switching circuit includes at least two first ends and a second end, wherein the second end of the upper switching element is coupled to the first end of the group of capacitors a first first end of the switching element is coupled to the first end of the first battery, and a second first end of the upper switching element is coupled to the first end of the second battery; a lower switch circuit comprising at least two first ends and a first a second end, wherein the second end of the lower switching element is coupled to the second end of the group capacitor, and the first first end of the lower switching element is coupled to the second end of the first battery The second first end of the lower switching element is coupled to the second end of the second battery; wherein, in a third predetermined time, the control circuit controls the first first end of the upper switch The second end of the upper switch is turned on, and the control circuit controls the second first end of the lower switch to be electrically connected to the second end of the lower switch, so that the first battery cell (Cell) and the second The single battery is connected in series to charge the group capacitor. In a fourth preset time, the control circuit controls the Kth first end of the upper switch to be electrically connected to the second end of the upper switch, and the control circuit controls the The Kth first end of the lower switch is electrically connected to the second end of the lower switch, so that the group capacitor discharges the Kth cell, wherein 0<K<=2. The capacitor switching battery cell balancing circuit of claim 4, wherein the group upper switching circuit comprises: a first transistor comprising a gate, a first source drain, and a second source a first electrode of the first transistor is coupled to the first first end of the group of upper switching circuits, the first transistor a second source drain is coupled to the second end of the group of upper switch circuits; and a second transistor includes a gate, a first source drain, and a second a source drain, wherein a gate of the second transistor is coupled to the control circuit, and a first source drain of the second transistor is coupled to a second first end of the group of upper switch circuits, the second The second source drain of the transistor is coupled to the second end of the group of upper switch circuits, wherein the group of lower switch circuits includes: a third transistor including a gate, a first source drain, and a a second source drain, wherein a gate of the third transistor is coupled to the control circuit, and a first source drain of the third transistor is coupled to a first first end of the group of lower switch circuits a second source drain of the three transistors is coupled to the second end of the group of lower switch circuits; and a fourth transistor includes a gate, a first source drain, and a second source drain, wherein a gate of the fourth transistor is coupled to the control circuit, a first source drain of the fourth transistor is coupled to a second first end of the group of lower switch circuits, and a second source of the fourth transistor The pole is coupled to the second end of the sub-switch circuit of the group. A capacitor-switched battery cell balancing circuit is applicable to N serially connected cells (Cells), wherein a first end of the first +1 cells is coupled to a second end of the first cell, and the capacitor is switched. The battery balancing circuit includes: a capacitor including a first end and a second end for storing energy; and an upper switching circuit comprising N first ends and a second end, wherein the upper switch The second end of the component is coupled to the first end of the capacitor, The Jth first end of the upper switching element is coupled to the first end of the Jth battery; the lower switching circuit includes N first ends and a second end, wherein the lower switching element The second end is coupled to the second end of the capacitor, the Jth first end of the lower switching element is coupled to the second end of the Jth battery; a control circuit is configured to control the upper switch circuit and the a lower switch circuit, wherein when the power balance of the Kth battery cell is performed: the control circuit controls the first first end of the upper switch and the second switch of the upper switch at a first preset time The terminal is turned on, and the control circuit controls the Nth first end of the lower switch to be electrically connected to the second end of the lower switch, so that the N single cells charge the capacitor, for a second preset time, The control circuit controls the Kth first end of the upper switch to be electrically connected to the second end of the upper switch, and the control circuit controls the Kth first end of the lower switch and the second end of the lower switch Turning on, causing the capacitor to discharge the Kth cell, wherein N, I, J, and K are natural And 0 <I, J, K <= N.