TW201606932A - Wire structure and manufacturing method thereof - Google Patents

Abstract

This invention provide a wire structure and a manufacturing method thereof. The wire structure comprising a metal layer and a graphene layer being close to a side wall and bottom of an outer periphy on portion of the metal layer. The metal layer is produced by electroplating using the graphene layer as a seed layer.

Description

Wire structure and manufacturing method thereof 【0001】

The invention relates to a wire structure and a manufacturing method thereof, in particular to a wire structure formed by plating a graphene layer and a manufacturing method thereof.

【0002】

Graphene has high electron mobility, high thermal conductivity, high electrical conductivity, high current density, high mechanical strength, high flexibility and light transparency, and thus has become an extremely important electronic material. For the development of electronic components in the future, the trend is to become more and more miniaturized, and to apply graphene materials with extremely high carrier mobility (>105cm2/V.s) and high current density (>109A/cm2). Flexible touch panels or wires and other components have become an important direction for the development of the electronics industry today.

[0003]

While the present invention is directed to this trend, a novel wire structure and a fabrication method thereof are proposed to apply graphene materials to wire structures and fabrications on the premise of compatibility with existing process technologies.

[0004]

The main object of the present invention is to provide a wire structure and a manufacturing method thereof, which use a graphene layer as a seed layer of a metal layer of a wire during electroplating to simplify the fabrication steps of the seed layer and reduce the fabrication and cost of the wire.

[0005]

Another object of the present invention is to provide a wire structure and a manufacturing method thereof, which use a graphene layer as a part of a wire to improve the reliability of the wire as a whole and reduce the resistance.

[0006]

Another object of the present invention is to provide a wire structure and a method for fabricating the same, which are characterized by graphene, which can have a long dead time and no surface oxidation of the seed layer.

【0007】

A further object of the present invention is to provide a wire structure and a method for fabricating the same, which have little change in process steps and high compatibility for the wire process in the future.

[0008]

It is still another object of the present invention to provide a wire structure and a method of fabricating the same that can be applied to metal trenches and/or plungers, through-silicon via (TSV) packaging techniques for 3D ICs, or flexible touch panels.

【0009】

Another object of the present invention is to provide a wire structure and a manufacturing method thereof, wherein the graphene layer can be used not only as a seed layer for electroplating a metal layer but also as a barrier layer of a metal layer, which is known as a metal. When the layer is combined with the seed layer and the barrier layer, the thickness caused by the layer is often not easily lowered and the value of the overall conductive resistance is high.

[0010]

Another object of the present invention is to provide a wire structure and a manufacturing method thereof, which use an atomic layer graphene layer as a seed layer and a barrier layer, and can be applied to increasingly fine wires, for example, under 100 nm. Line width.

[0011]

In order to achieve the above-mentioned various purposes and effects, the present invention discloses a wire structure formed on a substrate, comprising a metal layer; and a graphene seed layer adjacent to the metal layer and located at the metal Side and bottom of the layer.

[0012]

The present invention further provides a method for fabricating a wire, the method comprising the steps of: first providing a substrate, the substrate is formed with at least one open groove or a through hole; and forming a graphene layer along the sidewall and the bottom of the open groove or the through hole; Finally, a metal layer is deposited by chemical plating using the above graphene layer as a seed layer to form a wire having a sidewall and a graphene layer at the bottom.

10‧‧‧Substrate

12‧‧‧Open slot

14‧‧‧ trench

16‧‧‧Plunger

18‧‧‧ side wall

20‧‧‧ bottom

22‧‧‧graphene layer

24‧‧‧metal layer

26‧‧‧Conductors

28‧‧‧Barrier layer

A‧‧‧ sidewall

B‧‧‧ bottom

[0013]

1(a) to 1(c) are schematic diagrams showing steps of an embodiment of the present invention;
Figure 2 is a schematic view showing a conductor structure of the present invention;
Figure 3 is a schematic structural view of another embodiment of the present invention;
4(a) to 4(c) are schematic diagrams showing steps of still another embodiment of the present invention;
Figure 5 is a schematic view showing another conductor structure of the present invention;
Figure 6 is a schematic view showing the structure of another embodiment of the present invention.

[0014]

In order to provide a better understanding and understanding of the features and the efficacies of the present invention, the preferred embodiment and the detailed description are as follows:

[0015]

The invention provides a wire structure and a manufacturing method thereof. The main spiritual structure is to use a graphene layer of an atomic level as a seed layer for electroplating a metal to form a wire structure having an outer peripheral edge at least partially containing a graphene layer, such as a peripheral edge. The sidewalls and the bottom portion have a wire structure of a graphene layer. Moreover, when the metal layer is an alloy containing copper, the graphene layer can be more used as a diffusion barrier.

[0016]

Hereinafter, the present invention will be described by way of examples.

[0017]

Please refer to FIG. 1(a) to FIG. 1(c) together, which are schematic diagrams of steps of an embodiment of the present invention. First, as shown in Fig. 1(a), a substrate 10 is provided, and an open groove 12 is formed in the substrate 10. The open slot 12 can be an open slot 12 having a trench 14 and a via 16 formed by one of the existing dual damascene processes. It is of course also possible to have an open groove 12 having only a groove 14 or a plunger 16. The material and structure of the substrate 10, and the portion in which the opening is formed by using the dual damascene process are not the technical features of the present invention, and are the same as the prior art, and will not be described herein.

[0018]

Next, as shown in FIG. 1(b), a graphene layer 22 is formed on at least the sidewall 18 and the cap 20 of the opening trench 12. This graphene layer 22 can be a two-dimensional atomic level.

[0019]

Then, as shown in Fig. 1(c), a chemical plating process of the metal layer is performed. The process uses the graphene layer 22 as a seed crystal to perform nucleation growth of the metal layer, and deposits and fills the metal layer 24 in a conformal manner to form the wires 26. Finally, a wire 26 as shown in Fig. 2 is formed which has a graphene layer 22 adjacent to the metal layer 24 at the double side wall a and the bottom b of the outer periphery.

[0020]

After the electroless plating process, a chemical mechanical polishing process (CMP) can be performed to remove excess metal deposits, and an insulating layer for protecting the wires can also be formed. However, since these parts are familiar with the well-known techniques that the skilled person can understand, they will not be described again.

[0021]

In this embodiment, when graphene is used as a seed crystal, it is possible to have a longer stagnation time than a common metal seed layer, such as a copper seed layer, and there is no problem of surface oxidation of the seed layer. The stagnation time can be as long as 12 hours or more. Furthermore, the high carrier mobility and high current density of graphene will reduce the overall resistance of the wire and improve reliability.

[0022]

When the metal layer contains a copper component, the graphene layer can be used as a copper diffusion barrier to prevent copper diffusion.

[0023]

Further, before the formation of the graphene layer 22, a barrier layer 28 may be formed before the opening trench 12, for example, the sidewall 18 and the bottom portion 20, as in the embodiment shown in FIG. 3, or only the sidewall 18 is formed. Barrier layer 28. The barrier layer 28 can be a low-k dielectric layer material such as SiOCH, or titanium nitride (TiN), copper, ruthenium (Ru) or tantalum carbide. Another embodiment may also form a catalyst layer before the opening of the graphene layer 22, for example, the side wall 18 and the bottom portion 20, or only the bottom portion 20 is formed with a catalyst layer, such as titanium nitride (TiN). ), copper, ruthenium (Ru), tantalum carbide, niobium or nickel.

[0024]

The advantage of using the electroless plating method in the present invention compared to the physical vapor deposition method is that the electroless plating has high output efficiency, low tool cost, low process temperature, simple process steps, and is carried out under room temperature and normal pressure conditions. There is no need to vacuum, and more, the composition of the metal can be more diverse.

[0025]

It can be found from the above embodiments that the graphene layer is used as a seed layer for metal layer plating. For the current wire manufacturing process, such as the dual damascene process, the process steps are not changed much, and it is easy to replace the original use. The metal seed layer can be applied to both the metal trench and/or the plunger. It can also be applied to the through-silicon via (TSV) package technology of 3D ICs.

[0026]

Furthermore, as the size of the semiconductor process component is smaller, the existing wire needs to overcome the thickness of the metal layer plus the seed layer and the barrier layer, so the thickness is often not easily lowered, resulting in a problem that the overall conductance value is too high. However, the present invention uses an atomic-level graphene layer as a seed layer, and can also serve as a barrier layer, which not only solves the problems of the conventional seed layer and the barrier layer thickness, but also is applicable to increasingly fine wires, such as 100. The line width below the nanometer.

[0027]

In addition, the graphene layer taught by the present invention may be formed in any manner in an open cell or substrate, for example, by obtaining a prepared graphene solution for coating on a substrate, or by chemical vapor phase. Deposition, atomic layer deposition, electroplating, molecular beam epitaxy (MBE), etc., thus greatly simplifying the process steps of the seed layer.

[0028]

Please refer to Figures 4(a) to 4(c), which are another embodiment of the present invention when the wire of the present invention is formed on a via. First, as shown in Fig. 4(a), a substrate 10 is provided, on which a plunger 16 is formed. Next, as shown in Fig. 4(b), a graphene layer 22 is formed on the side wall 18 and the bottom portion 20 of the plunger 16. This graphene layer 22 can be a two-dimensional atomic level.

[0029]

Then, as shown in Fig. 4(c), a chemical plating process of the metal layer is performed. The process uses the graphene layer 22 as a seed crystal to perform nucleation growth of the metal layer, and deposits and fills the metal layer 24 in a conformal manner to form the wires 26. Finally, a wire 26 as shown in Fig. 5 is formed which has a graphene layer 22 adjacent to the metal layer 24 at the double side wall a and the bottom b of the outer periphery.

[0030]

After the electroless plating process, a chemical mechanical polishing process (CMP) can be performed to remove excess metal deposits, and an insulating layer for protecting the wires can also be formed. However, since these parts are familiar with the well-known techniques that the skilled person can understand, they will not be described again.

[0031]

Further, the barrier layer 28 may be formed before the graphene layer 22 is formed to form an embodiment as shown in FIG. In FIG. 6, the barrier layer 28 is located around the plunger 16, for example, the sidewall 18 and the bottom 20 are formed with a barrier layer 28, but only the sidewall 18 may be formed with a barrier layer 28. The barrier layer can also serve as a catalyst layer before the formation of the graphene layer.

[0032]

The characteristics of graphene as a seed layer, and the material selection and characteristics of the barrier layer described above are as previously described.

[0033]

In summary, the present invention teaches a seed layer in which a graphene layer is used as a metal layer for plating, to prepare a new wire structure and a manufacturing method thereof, to simplify the fabrication steps of the conventional seed layer, and to reduce the fabrication and cost of the wire. Furthermore, the wire combined with the graphene layer can improve the overall reliability and reduce the resistance. The use of a graphene layer having an atomic layer thickness as a seed layer further solves the problem that the thickness of the conventional seed layer and the barrier layer is not easily lowered, and thus the present invention can form a relatively fine wire.

[0034]

The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and the variations, modifications, and modifications of the shapes, structures, features, and spirits described in the claims of the present invention. All should be included in the scope of the patent application of the present invention.

[0035]

The invention is a novelty, progressive and available for industrial use, and should meet the requirements of the patent application stipulated in the Patent Law of China, and the invention patent application is filed according to law, and the prayer bureau will grant the patent as soon as possible. prayer.

22‧‧‧graphene layer

24‧‧‧metal layer

26‧‧‧Wire

A‧‧‧ sidewall

B‧‧‧ bottom

Claims (10)

[Item 1] A wire structure formed on a substrate, the wire comprising:
a metal layer, and;
A graphene layer is adjacent to the metal layer and is located at the sidewall and bottom of the metal layer. [Item 2] The wire structure of claim 1, wherein the graphene layer is a seed layer of the metal layer. [Item 3] The wire structure of claim 1, wherein the graphene layer is an atomic layer thickness. [Item 4] The wire structure of claim 1, which is disposed in an open groove or perforation of the substrate. [Item 5] The wire structure of claim 5, wherein the open slot includes a trench and/or a via. [Item 6] The wire structure of claim 5, wherein the opening groove or the periphery or sidewall of the through hole is formed with a barrier layer. [Item 7] The wire structure according to claim 1, wherein the material of the metal layer comprises copper, and the graphene layer also serves as a barrier layer of the metal layer. [Item 8] The wire structure of claim 1, wherein the substrate is a flexible substrate or a semiconductor substrate. [Item 9] A method of manufacturing a wire, comprising the following steps:
Providing a substrate comprising an open groove or a perforation;
Forming a graphene layer on the sidewall and the bottom of the open trench; and depositing a metal layer on the graphene layer by chemical plating. [Item 10] The method of claim 9, wherein the graphene layer has a stagnation time of greater than 12 hours.