TW201546887A - CMOS-MEMS integration by sequential bonding method - Google Patents

Abstract

Methods for bonding two wafers are disclosed. In one aspect, a first wafer includes an integrated circuit and the second wafer including a MEMS device. The method comprises depositing a bond pad on a metal on the first wafer and sequentially bonding the first wafer to the second wafer utilizing first and second temperatures. The second wafer is bonded to the bond pad at the first temperature and the bond pad and the metal are bonded at the second temperature. In another aspect, a first wafer including an integrated circuit, the second wafer includes a MEMS device. The method comprises depositing a bond pad on a metal on one of the first wafer and the second wafer and bonding the first wafer to the second wafer at a first temperature via a direct bond interface. The method includes bonding the bond pad to the metal at a second temperature.

Description

CMOS-MEMS integration by continuous bonding method Cross-reference to related applications

The present application claims priority to U.S. Provisional Patent Application Serial No. 61/985,340, entitled " CMOS- MEMS INTEGRATION BY SEQUENTIAL BONDING METHOD", filed on Apr. 28, 2014, which is incorporated herein by reference. U.S. Patent Application Serial No. 15/453,431 (Attorney Docket No. IVS-416/5415P), entitled "METHOD TO IMPROVE SURFACE ROUGHTNESS AND ELIMINATE SHARP CORNERS ON AN ACTUATOR LAYER OF A MEMS DEVICE", filed on August 6 Partial continuation, both of which are incorporated herein by reference in its entirety.

The present invention generally relates to the fabrication of MEMS (Microelectromechanical system) devices, and more particularly to a method and system for bonding first and second substrates.

Methods for joining germanium and aluminum between CMOS and MEMS to form strong electrical and mechanical contacts have been modified. However, in After depositing and patterning the germanium on the MEMS device, the excessive shelf time of the MEMS device wafer with the germanium pad can result in poor aluminum-germanium bonding quality due to moisture collection from the surrounding environment and formation of native oxide. In addition, the tantalum material properties may be a limiting factor in the new process inserted between the mat and the CMOS-MEMS bonding process. Therefore, a method and system are needed to solve the above problems. The present invention addresses such needs.

The present invention discloses a method for bonding a first wafer and a second wafer. In a first aspect, the first wafer includes an integrated circuit and the second wafer includes a MEMS device. The method includes depositing a bond pad on a metal of the first wafer, and sequentially bonding the first wafer and the second wafer using the first and second temperatures. The second wafer is bonded to the bond pad at the first temperature, and the bond pad is bonded to the metal at the second temperature.

In a second aspect, the first wafer includes an integrated circuit and the second wafer includes a MEMS device. The method includes depositing a bond pad on a metal of one of the first wafer and the second wafer, and bonding the first wafer and the second wafer at a first temperature through a direct bonding interface. The method includes bonding the bond pad to the metal at a second temperature.

100‧‧‧ integrated sensor

101‧‧‧Operation layer

102‧‧‧Thin dielectric film

103‧‧‧Device layer

104‧‧‧Support

105‧‧‧锗 pads

106a‧‧‧Removable structure

107‧‧‧ CMOS substrate

108‧‧‧ Conductive material layer, aluminum layer

111‧‧‧ MEMS substrate

202, 204, 206, 402, 404, 406‧ ‧ steps

502‧‧‧MEMS substrate

503‧‧‧ CMOS substrate, device layer

504‧‧‧Direct joint interface material

505‧‧‧锗 pads

508‧‧‧ top aluminum layer

Figures 1A and 1B show related diagrams of conventional processes for bonding CMOS-MEMS integrated sensors.

2 is a flow chart showing a first process for bonding a CMOS-MEMS integrated sensor in accordance with the present invention.

Figures 3A and 3B show the phase of the process shown in Figure 2 Off schematic.

Figure 4 shows a flow diagram of a second process for bonding a CMOS-MEMS integrated sensor in accordance with the present invention.

Figures 5A and 5B show related diagrams of the process shown in Figure 4.

Figure 6 shows an example bond graph for achieving MEMS telluride bonding at a first temperature and eutectic bonding at a second temperature.

The present invention generally relates to the fabrication of MEMS (microelectromechanical system) devices, and more particularly to a method and system for bonding first and second substrates. The description provided below enables one skilled in the art to make and use the invention, and the description is provided in the context of the patent application and its claims. Various modifications to the preferred embodiments, general principles and features described herein will be apparent to those skilled in the art. Therefore, the present invention is not intended to be limited to the embodiments shown, but the broadest scope of the principles and features described herein.

In the illustrated embodiment, a microelectromechanical system (MEMS) refers to a type of structure or device that is fabricated using a similar semiconductor process and exhibits mechanical features such as movement or deformation. In the described embodiments, a MEMS device can refer to a semiconductor device implemented as a microelectromechanical system. A MEMS structure can refer to any feature that may be part of a larger MEMS device. MEMS devices often (but not always) interact with electrical signals. MEMS devices include, but are not limited to, gyroscopes, accelerometers, magnetometers, pressure sensors, microphones, and radio frequency components. A germanium wafer containing a MEMS structure is referred to as a MEMS wafer.

A structural layer may refer to a layer of germanium having a movable structure. An engineered silicon-on-insulator (ESOI) wafer may refer to an SOI wafer having a cavity under a germanium structure layer. A cap wafer generally refers to a thicker substrate that serves as a carrier for a thinner germanium device substrate in an insulator overlying a wafer.

The MEMS substrate provides mechanical support for the MEMS structure. The MEMS structural layer is attached to the MEMS substrate. A MEMS substrate is also referred to as a handle substrate or a handle wafer. In some embodiments, the handle substrate acts as a cover for the MEMS structure. The cover or cover provides mechanical protection to the structural layer and optionally forms part of the closed housing. A standoff defines a vertical gap between the structural layer and the IC substrate.

The holder can also provide electrical contact between the structural layer and the IC substrate. The holder may also provide a seal that defines a closed housing. An integrated circuit (IC) substrate may refer to a germanium substrate having an electrical circuit (typically a CMOS circuit). A hole can refer to a recess in a substrate. The wafer includes at least one substrate that is typically formed from a semiconductor material. A single wafer can be formed from a plurality of substrates, wherein the substrates are mechanically bonded together. The multi-wafer includes at least two substrates, wherein the two substrates are electrically connected, but do not require mechanical bonding.

For example, U.S. Patent No. 7,442,570, issued on October 28, 2008, entitled "METHOD OF FABRICATION OF AL/GE BONDING IN A WAFER PACKAGING ENVIRONMENT AND A PRODUCT PRODUCED THEREFROM" A method for joining germanium and aluminum between a CMOS substrate and a MEMS substrate to form a strong electrical and mechanical contact is described in the PCT document No. IVS-105/3404P), the patent being assigned to the assignee of the present application. This application is incorporated by reference in its entirety. Although germanium (Ge) is sometimes deposited and patterned on MEMS substrates, this process is effective in many environments, but the excessive shelf life of MEMS substrates with germanium pads can result from the collection of moisture from the surrounding environment and the formation of native oxides. Aluminum-锗 bonding quality is poor. In addition, the tantalum material properties may be a limiting factor in the new process inserted between the mat and the CMOS-MEMS bonding process.

For these reasons, patterned germanium pads over the top metal have been selected as part of the CMOS process and the CMOS-MEMS bonding process is changed to bond the MEMS germanium directly to the patterned germanium pads on the CMOS bond pads.

1A and 1B are diagrams showing related processes for bonding the CMOS-MEMS integrated sensor 100. The CMOS-MEMS integrated sensor 100 includes a MEMS substrate 111 and a CMOS substrate 107. The MEMS substrate 111 includes an operation layer 101 in which holes are etched, and a device layer 103 which are bonded together by a thin dielectric film 102 (e.g., hafnium oxide) between the two layers. In some embodiments, device layer 103 is made of single crystal germanium or polycrystalline germanium. The holder 104 is formed with a germanium (Ge) pad 105 at the top of the holder 104. The MEMS substrate 111 is completed after the device layer 103 is patterned and etched to form the movable structure 106a.

The MEMS integrated sensor 100 includes a CMOS substrate 107. Depositing a layer 108 of conductive material (eg, aluminum) on the CMOS substrate 107 to provide Electrical connection from the device layer 103 to the CMOS substrate 107. In one embodiment, CMOS substrate-MEMS integration is achieved by eutectic bonding of germanium pads 105 on MEMS substrate 111 to aluminum layer 108 on CMOS substrate 107. In one embodiment, MEMS substrate 111 is bonded to CMOS substrate 107 to form MEMS integrated sensor 100.

Starting from an engineered SOI wafer as shown in FIG. 1A, a support 104 is formed by deep reactive ion etching (DRIE) to define small bumps on the MEMS wafer. It defines the distance (interval) between the device layer 103 and the pad 105, and the aluminum-germanium eutectic bonded region is electrically connected to the device layer 103 and the CMOS metal pad. A hermetic seal ring defining a MEMS hole is also defined by patterning the support 104 into a seal ring shape. The pad 105 is deposited and patterned for subsequent eutectic bonding with the aluminum layer 108 on the CMOS substrate 107. Deep reactive ion etching (DRIE) will pattern the actuator and release the MEMS structure.

Since the mattress 105 has a limited shelf life due to factors of primary oxide formation, CMOS-MEMS bonding should be performed within the shelf life limit to ensure excellent bonding quality. Once the actuator is patterned by deep ion reactive etch (DRIE), it is impossible to redo the pad 105, and the pad 105 that appears after deep ion reactive etching (DRIE) exceeds the shelf life. The wafer will eventually be scrapped. Moreover, any process step insertion of a MEMS device can also be limited by the material properties of the crucible. Therefore, a system and method are needed to solve this problem.

Figure 2 shows a flow diagram of a process for bonding a CMOS-MEMS integrated sensor in accordance with the present invention. Figures 3A and 3B show the second picture A schematic diagram of the process shown. Referring to FIG. 2, FIG. 3A and FIG. 3B together, in a process according to an embodiment, a pad 105 is deposited on the aluminum layer 108 on the CMOS substrate 107 by step 202.

Next, in step 204, the pad 105 is bonded to the MEMS substrate 111 at a first temperature. In the embodiment illustrated in FIG. 3A, the support 104 of the device layer 103 of the MEMS substrate 111 is bonded to the mattress 105 to form a germanide bond. Typically, the temperature of the first temperature ranges between 200 and 300 °C. Additionally, typically, the first temperature is provided at a predetermined pressure for a predetermined length of time (e.g., between 1 hour and 2 hours). Some surface treatment of the mattress 105 may be required prior to the bonding step to remove contaminants.

Thereafter, through step 206, the crucible pad 105 is bonded to the aluminum layer 108 at a second temperature. Typically, the temperature of the second temperature ranges between 400 and 450 °C. It can be seen that the first temperature is less than the second temperature. In one embodiment, CMOS-MEMS integration is achieved by eutectic bonding of the germanium pad 105 to the aluminum layer 108 of the CMOS substrate 107.

Figure 4 shows a flow diagram of a second process for bonding a CMOS-MEMS integrated sensor in accordance with the present invention. Figures 5A and 5B show related diagrams of the process shown in Figure 4. Referring to FIG. 4, FIG. 5A and FIG. 5B together, in a process according to an embodiment, through step 402, a top-level aluminum layer 508 on the MEMS germanium substrate 502 (FIG. 5A) or the CMOS substrate 503 ( Figure 5B) deposits a mat 505. In FIGS. 5A and 5B, a direct bonding interface material 504 is provided on the CMOS substrate 503. In one embodiment, the direct bonding interface material 504 includes any oxidation Material, cobalt (Co) or nickel (Ni) material. In the embodiment according to FIGS. 5A and 5B, by step 404, bonding is formed between the MEMS germanium substrate 502 and the direct bonding interface material 504 at a low temperature (ie, below 300 ° C), and then, through step 406, to a second A temperature level (i.e., above 400 ° C) can form a second bond between the mattress 505 and the top aluminum layer 508.

In the embodiment of Figure 5B, additional features may be provided as needed to improve the process. High temperature annealing may be provided to the MEMS(R) substrate 502 prior to the low temperature bonding to further enhance the shelf life of the integrated device. For example, U.S. Patent Application Serial No. 14/453,431, filed on Aug. 6, 2014, entitled "METHOD TO IMRPOVE SURFACE ROUGHNESS AND ELIMINATE SHARP CORNERS ON AN ACTUATOR LAYER OF A MEMS DEVICE" (Attorney Docket IVS- 416/5 415 P) (the application being assigned to the assignee of the present application and the entire disclosure of which is incorporated herein by reference in its entirety in the entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire portion High temperature annealing in the hydrogen environment background means a temperature of 1000 ° C or higher.

Figure 6 shows an example bond graph for achieving a MEMS telluride bond at a first temperature and a eutectic bond at a second temperature using any of the above processes. As shown, the temperature is raised to, for example, 275 °C for a first predetermined length of time to provide a telluride bond between the operating layer of the MEMS substrate and the mattress. Thereafter, a eutectic bond was formed between the crucible pad and the aluminum layer by raising the temperature to 423 °C.

The present invention discloses a method and structure for joining germanium and aluminum between two substrates to form a strong electrical and mechanical contact. Aluminum-bismuth joint It has the following unique combination of properties: (1) it can form a hermetic seal; (2) it can be used to form an electrically conductive path between two substrates; (3) it can be patterned to position the conductive path (4) The bonding can be formed by using aluminum available in a standard fab CMOS process. This has the significant advantage of allowing wafer level bonding or packaging without the need to add any additional processing layers to the CMOS wafer.

Although the present invention has been described in terms of the embodiments shown, it will be understood by those skilled in the art Therefore, many modifications may be made by those skilled in the art without departing from the spirit and scope of the invention.

The representative figure has no component symbols and the meaning of its representation.

Claims (21)

A method for bonding a first wafer and a second wafer, comprising: depositing a bonding pad on a metal of the first wafer, the first wafer including an integrated circuit, and the second wafer including a MEMS device And sequentially bonding the first wafer and the second wafer by using the first and second temperatures; wherein the second wafer is bonded to the bonding pad at the first temperature, and wherein, in the second The bonding pad is bonded to the metal at a temperature. The method of claim 1, wherein the sequential bonding step comprises: bonding the bonding pad and the second wafer at a temperature not exceeding 300 ° C; and bonding the bonding pad at a temperature greater than 420 ° C. And the metal to form a eutectic bond. The method of claim 1, wherein the first temperature is less than the second temperature. The method of claim 1, wherein the first temperature is less than 400 ° C and the second temperature is greater than 400 ° C. The method of claim 1, wherein the bonding pad comprises a tantalum bond pad and the metal comprises aluminum. The method of claim 1, wherein the bonding between the tantalum bond pad and the aluminum comprises eutectic bonding. The method of claim 6, wherein the eutectic bonding provides a hermetic seal. The method of claim 6, wherein the second wafer comprises a device layer and an operation layer. The method of claim 8, wherein the operating layer comprises at least one support formed thereon. The method of claim 9, wherein the at least one support is joined to the bond pad by bonding the bond pad to the second wafer. The method of claim 6, wherein the second wafer comprises an engineered silicon-on-insulator (ESOI). A method for bonding a first wafer and a second wafer, comprising: depositing a bonding pad on a metal of one of the first wafer and the second wafer, the first wafer including an integrated circuit, The second wafer includes a MEMS device; the first wafer and the second wafer are bonded at a first temperature by a direct bonding interface; and the bonding pad and the metal are bonded at a second temperature. The method of claim 12, wherein the first temperature is less than the second temperature. The method of claim 12, wherein the first temperature is less than 400 ° C and the second temperature is greater than 400 ° C. The method of claim 12, wherein the bonding pad comprises a tantalum bond pad and the metal comprises aluminum. The method of claim 15, wherein the bonding between the tantalum bond pad and the aluminum comprises eutectic bonding. The method of claim 16, wherein the eutectic bonding provides a hermetic seal. The method of claim 16, wherein the high temperature annealing of the second wafer is provided in a hydrogen environment prior to the second bonding step. The method of claim 12, wherein bonding to the direct bonding interface requires surface treatment prior to bonding. The method of claim 12, wherein the step of bonding the bond pad to the metal provides an electrical connection. The method of claim 12, wherein the bond pad is etched prior to formation of the bond pads.