TW201543450A - Method of display panel defect line repair and data line driving circuit using the same - Google Patents

Abstract

A method of panel defect line repair and a data line driving circuit using the method are provided. The data line driving circuit includes multiple data channels and at least one repair channel. Each of the data channels is configured to drive corresponding one of the data lines of a display panel respectively. The repair channel is configured to receive an address value or a pixel data corresponding to a defect line of the data lines. The method of panel defect line repair includes the following steps. An address value or a pixel data of a data channel corresponding to a defect line is provided to a repair channel, and the same data line driving signals are generated and outputted by the repair channel and the data channel respectively according to the address value or the pixel data.

Description

Method for displaying panel repairing line and data line driving circuit using the same

The present invention relates to a display device, and more particularly to a method of repairing a panel repair line and a data line driving circuit using the same.

Referring to FIG. 1 , FIG. 1 is a circuit block diagram of a general liquid crystal display (LCD) 100. The liquid crystal display 100 includes a display panel 120, a timing controller (not shown), and a scan line driving circuit. (Scan Line Driving Circuit, not shown) and Data Line Driving Circuit 140. The display panel 120 has a plurality of data lines, such as the data lines 121, 122, 123, ..., 12n shown in FIG. The data line drive circuit 140 includes n data channels Y ₁ , Y ₂ , Y ₃ , ‧, Y _n . The data channels Y ₁ ~Y _{n of the} data line driving circuit 140 are respectively coupled to the data lines 121 to 12n of the display panel 120.

It is assumed here that the data line 123 contains a Defect DP. The dead pixel DP causes the data line 123 to be disconnected in the middle, so the data line driving signal cannot pass the bad point DP of the data line 123. Part of the pixel of the display panel 120 due to the presence of the dead pixel DP Cannot be displayed.

The invention provides a plurality of panel repairing lines and a plurality of data line driving circuits using the same method, which can save the input of the data channel of the data line driving circuit connected to the data line driving circuit on the display panel or the printed circuit board to the input of the repairing operational amplifier The wiring space at the end has greater flexibility in application.

The invention provides a method for repairing a panel to repair a damaged data line of a display panel. The method for repairing the panel includes providing an address value of a data channel of a data line driving circuit corresponding to the damaged data line to a repair channel of the data line driving circuit, and repairing the channel and the damaged data line according to the address value. The corresponding data channels respectively generate and output the same data line driving signal.

In an embodiment of the present invention, in the method for repairing a panel, the step of providing the address value to the patching channel includes providing the address value by configuration setting of a plurality of setting pins of the data line driving circuit. The patch channel is provided; or a timing control circuit provides an address value to the patch channel of the data line driver circuit.

In an embodiment of the present invention, in the method of repairing a panel, the data line driving signal outputted by the data channel and the data line driving signal output by the repairing channel are respectively transmitted through different electrical paths of the display panel. A first end and a second end of the damaged data line.

In an embodiment of the invention, in the method for repairing a panel, The repair channel includes a repair unit and a repair operational amplifier. The method for generating a data line driving signal by the repairing channel includes: the repairing unit counts a clock signal according to a horizontal start pulse signal to generate a count value; when the count value meets the address value, the data channel corresponding to the data line is damaged. The one pixel data is latched to the repair unit to generate a gray scale signal; and the gray scale signal is supplied to the repair operational amplifier to generate the data line drive signal.

In an embodiment of the present invention, in the method of repairing a panel, the patching channel includes a counter, a first latch, a second latch, a level shifter, and a digit to Analog converter. The method for generating the gray-scale signal includes: when the count value meets the address value, latching the pixel data to the first latch as a first latch signal; according to the first-line latch signal a latch signal is latched to the second latch as a second latch signal; a second latch signal is supplied to the level shifter to generate a level shift signal; and the level shift is provided The signal is transmitted to the digital to analog converter to generate the gray scale signal described above.

In an embodiment of the invention, in the method for repairing a panel, the repairing channel includes a repairing unit and a repairing operational amplifier. The method for generating the data line driving signal by the repairing channel includes: selecting, by the repairing unit, one of the plurality of gray level signals generated by the plurality of data channels of the data line driving circuit as an analog signal according to the address value; and providing the same The analog signal is applied to the repair op amp to generate the data line drive signal of the above patch channel.

The invention further provides a method for repairing a panel to repair a damaged data line of a display panel. The method of repairing the panel includes: destroying the data line pair A pixel data of a data channel of a data line driving circuit is provided to a repair channel; and according to the pixel data, the data channel corresponding to the repair channel and the damaged data line respectively generate and output the same data line driver Signal.

In an embodiment of the invention, in the method for repairing a panel, the step of providing the pixel data to the patching channel includes providing a pixel data to the patching channel by a timing control circuit.

In an embodiment of the present invention, in the method of repairing a panel, the data line driving signal outputted by the data channel and the data line driving signal output by the repairing channel are respectively transmitted through different electrical paths of the display panel. A first end and a second end of the damaged data line.

In an embodiment of the invention, in the method for repairing a panel, the repairing channel includes a repairing unit and a repairing operational amplifier. The method for generating a data line driving signal by the repairing channel includes: the patching unit latching the pixel data into the repairing unit according to a channel latching signal and a line latching signal to generate a gray level signal, and providing the gray level signal. The signal is here to repair the operational amplifier to generate the above data line drive signal.

In an embodiment of the present invention, in the method of repairing a panel, the repairing unit includes a shift register, a first latch, a second latch, a level shifter, and a digital-to-analog converter, wherein the method for generating the gray-scale signal comprises: providing a clock signal and a control signal to the shift register to generate the channel latch signal, and the pixel data is latched according to the channel latch signal Latching to the first latch as a first latch signal, according to the above line latch signal will be the first The latch signal is latched to the second latch as a second latch signal, providing a second latch signal to the level shifter to generate a level shift signal, and providing the level shift signal To the digital to analog converter to generate the above gray scale signal.

In an embodiment of the invention, in the method of repairing a panel, the patching channel is disposed in the data line driving circuit.

In an embodiment of the invention, in the method for repairing a panel, the patching channel is disposed in another data line driving circuit.

The invention provides a data line driving circuit for driving different data lines of a display panel, the data line driving circuit comprising a plurality of data channels and a repairing channel. These data channels are used to drive the data lines respectively. The patching channel is configured to receive an address value corresponding to a damaged data line of the data lines, wherein the patching channel is generated according to the address value and a corresponding data channel corresponding to the damaged data line in the data channels. And output the same data line driver signal.

In an embodiment of the invention, in the data line driving circuit, the address value is set by a configuration of a plurality of setting pins of the data line driving circuit or a timing control circuit.

In an embodiment of the invention, in the data line driving circuit, the repairing channel includes a repairing unit and a repairing operational amplifier. The repairing unit receives a clock signal, a horizontal start pulse signal, and the address value, and correspondingly latches a pixel data of the corresponding data channel to generate a gray level signal. The input end of the repair operational amplifier is coupled to the repairing unit to receive the gray-scale signal, and generates and outputs the data line driving signal according to the gray-scale signal.

In an embodiment of the present invention, in the data line driving circuit, the repairing unit includes a counter, a first latch, a second latch, a level shifter, and a digit to analogy. converter. The counter receives the clock signal and the horizontal start pulse signal to generate a count value, and compares the count value with the address value to generate a channel latch signal. The enable input of the first latch is coupled to the counter to receive the channel latch signal, the data input of the first latch receives the pixel data, and the pixel data is latched according to the channel latch signal as A first latch signal. The enable input of the second latch receives a line latch signal, and the data input end of the second latch is coupled to the first latch to receive the first latch signal, and is latched according to the line latch signal A latch signal is used as a second latch signal. The input of the level shifter is coupled to the second latch to receive the second latch signal and generate a level shift signal. The input of the digital to analog converter is coupled to the level shifter to receive the level shift signal and generate the gray scale signal.

In an embodiment of the invention, in the data line driving circuit, the repairing channel includes a repairing unit and a repairing operational amplifier. The repairing unit receives the address value and the plurality of gray-scale signals of the data channels of the data line driving circuit, and selectively outputs one of the gray-level signals as an analog signal according to the address value. The input end of the repair operational amplifier is coupled to the repair unit to receive such a specific signal and generate the data line drive signal.

In an embodiment of the invention, in the data line driving circuit, the upper repairing unit includes a multiplexer.

The invention provides another data line driving circuit for driving a display surface Different data lines of the board, the data line driving circuit includes a plurality of data channels and a repair channel. These data channels are used to drive these data lines individually. The patch channel is configured to receive a pixel data corresponding to a damaged data line of the data lines, wherein the patch channel and the corresponding data of the data channels corresponding to the damaged data line are determined according to the pixel data The channels each generate and output the same data line drive signal.

In an embodiment of the invention, in the data line driving circuit, the pixel data is provided by a timing control circuit.

In an embodiment of the invention, in the data line driving circuit, the repairing channel includes a repairing unit and a repairing operational amplifier. The repairing unit receives a clock signal, a control signal, and the pixel data to generate a gray level signal. The input end of the repair operational amplifier is coupled to the repair unit to receive the gray scale signal to generate the data line drive signal.

In an embodiment of the present invention, in the data line driving circuit, the repairing unit includes a shift register, a first latch, a second latch, a level shifter, and a Digital to analog converter. The shift register receives the clock signal and the control signal to generate a channel latch signal. The enable input of the first latch is coupled to the shift register to receive the channel latch signal, the data input of the first latch receives the pixel data, and latches the pixel according to the channel latch signal The data is used as a first latch signal. The enable input of the second latch receives a line latch signal, and the data input end of the second latch is coupled to the first latch to receive the first latch signal, and is latched according to the line latch signal A latch signal is used as a second latch signal. quasi- The input of the bit shifter is coupled to the second latch to receive the second latch signal and generate a level offset signal. The input of the digital to analog converter is coupled to the level shifter to receive the level shift signal and generate the gray scale signal.

Based on the above, the embodiment of the present invention transmits the address value or the pixel data of the data channel of the data line driving circuit corresponding to the damaged data line to the data line driving circuit through a plurality of setting pins of the timing controller or the data line driving circuit. The channel is repaired, so that the wiring space of the data channel of the data line driving circuit connected to the data line driving circuit to the input end of the repairing operational amplifier can be saved on the display panel or the printed circuit board, and the application has greater flexibility.

The above described features and advantages of the invention will be apparent from the following description.

100‧‧‧LCD display

120, 220, 320, 720‧‧‧ display panels

121, 122, 12n, 221, 222, 22n‧‧‧ data lines

123, 223, 323 ‧ ‧ damaged data line

140, 240, 340‧‧‧ data line drive circuit

200, 300, 700‧‧‧ flat panel display

224, 324, 724, 794‧‧ ‧ the second end of the damaged data line

231, 232, 233, ..., 23n, 731, 732, 733, ..., 73n, 751, 752, 753, ..., 75n‧‧‧ drive line

241‧‧‧ Receiver

242, 342, 742, 762‧‧‧ repair op amps

243‧‧‧ Grayscale voltage generator

244‧‧‧Shift register

245‧‧‧First latch

246‧‧‧Second latch

247‧‧ ‧ level shifter

248‧‧‧Digital to analog converter

249‧‧‧Output buffer

251‧‧‧crossing line

253, 353‧‧‧ wires

The first end of the damaged data line of 321, 721, 791‧‧

331, 332, 333, ..., 33n‧‧‧ drive line

341, 741, 761‧‧ ‧ repair channel

410‧‧‧ Receiver

420‧‧‧ Grayscale voltage generator

431‧‧‧Shift register

432‧‧‧First latch

433‧‧‧Second latch

434‧‧ ‧ level shifter

435‧‧‧Digital to analog converter

436‧‧‧Output buffer

460‧‧‧ repair unit

461‧‧‧ counter

462‧‧‧First latch

463‧‧‧Second latch

464‧‧ ‧ level shifter

465‧‧‧Digital to analog converter

560‧‧‧Repair unit

568‧‧‧Multiplexer

660‧‧‧Repair unit

661‧‧‧Shift register

722‧‧‧ first dead point

723‧‧‧First damaged data line

740‧‧‧First data line driver circuit

760‧‧‧Second data line driver circuit

773‧‧‧second wire

783‧‧‧First wire

792‧‧‧ second dead point

793‧‧‧Second damaged data line

A1, A2, A3, ..., An, AR‧‧‧ grayscale signals

Addr‧‧‧ address value

AS‧‧‧ analog signal

CLK‧‧‧ clock signal

CTRL‧‧‧ control signal

D1, D2, D3, ..., Dn, DR‧‧‧ data line drive signals

DL11, DL12, DL13, ..., DL1n, DLR1‧‧‧ first latch signal

DL21, DL22, DL23, ..., DL2n, DLR2‧‧‧ second latch signal

DP‧‧‧bad points

HV1, HV2, HV3, ..., HVn, HVR‧‧ ‧ level offset signal

LE1, LE2, LE3, ..., Len, LER‧‧‧ channel latch signal

LL‧‧‧ line latch signal

O3‧‧‧ output

PDATA, RP_RGB, RP_RGB1, RP_RGB2‧‧‧ pixel data

REN‧‧‧ repair enable signal

RPI‧‧‧ input

RPO, RPO1, RPO2‧‧‧ output

SP‧‧‧ horizontal start pulse signal

Y ₁ , Y ₂ , Y ₃ , ..., Y _n ‧‧‧ data channel

1 is a circuit block diagram of a conventional liquid crystal display.

2A is a block diagram showing a method of repairing a damaged data line by a flat panel display.

2B is a block diagram showing the data line driving circuit of the flat panel display repairing damaged data line shown in FIG. 2A.

3 is a circuit block diagram of a method of repairing a panel in accordance with an embodiment of the invention.

4 is a diagram showing the data line driving circuit of FIG. 3 according to an embodiment of the invention. Schematic diagram of the circuit block.

FIG. 5 is a block diagram showing the circuit of the data line driving circuit of FIG. 3 according to another embodiment of the present invention.

FIG. 6 is a block diagram showing the circuit of the data line driving circuit of FIG. 3 according to still another embodiment of the present invention.

7 is a circuit block diagram of a method of repairing a panel in accordance with another embodiment of the present invention.

2A is a block diagram of a method for repairing a damaged data line by a Flat Panel Display (FPD) 200. In different application examples, the flat panel display 200 shown in FIG. 2A may be a liquid crystal display (LCD), a plasma display panel (PDP) display, or other display. The flat panel display 200 includes a display panel 220, a timing controller (not shown), a scan line driving circuit (not shown), and a data line driving circuit. 240. The display panel 220 has a plurality of data lines, such as the data lines 221, 222, 223, ..., 22n shown in FIG. 2A. The data line driving circuit 240 includes n data channels Y ₁ , Y ₂ , Y ₃ , ..., Y _n and a repair operational amplifier (Repair Operation Amplifier) 242. The data channels Y ₁ to Y _{n of the} data line driving circuit 240 are respectively coupled to the first ends of the data lines 221 22 22 n of the display panel 220 through the n driving lines 231 , 232 , 233 , . . . , 23 n . The data line driving circuit 240 and/or the driving lines 231 to 23n may be placed on the substrate of the display panel 220 or placed on a printed circuit board (PCB) or a flexible circuit board. on.

It is assumed here that the data line 223 contains a Defect DP. The dead pixel DP causes the data line 223 to be disconnected in the middle, so the data line driving signal cannot pass the bad point DP of the data line 223. Due to the presence of the dead pixel DP, some of the pixels of the display panel 220 cannot be displayed.

The manner in which the damaged data line is repaired as shown in FIG. 2A includes the following steps. The first is to locate the address of the corrupted data line 223 containing the dead pixel DP. As shown in FIG. 2A, the corrupted data line 223 is driven by the data path Y3 of the data line driving circuit 240. Next, the output terminal O3 of the data path Y3 is connected to the input terminal RPI of the repair operational amplifier 242 by a traverse line 251 reserved in advance on the display panel 220. Then, the output terminal RPO of the repair operational amplifier 242 is electrically connected to the second end 224 of the damaged data line 223 through the wire 253 disposed on the display panel 220. The repair operational amplifier 242 can gain the data line drive signal output by the data channel Y3, and output the gained data line drive signal from the output terminal RPO to the second end 224 of the corrupted data line 223 via the wire 253. As such, the patching operational amplifier 242 of the data line driver circuit 240 can repair the corrupted data line 223 on the display panel 220.

FIG. 2B is a block diagram showing the data line driving circuit 240 in the flat panel display 200 shown in FIG. 2A. Referring to FIG. 2B, the data line driving circuit 240 includes a receiver 241, a gray scale voltage generator 243, a plurality of data channels Y ₁ , Y ₂ , Y ₃ , .... Y _n and the patching operational amplifier 242, wherein the plurality of data channels Y ₁ -Y _n include a shift register 244, a first latch (Latch) 245, a second latch 246, and a level A Level Shifter 247, a Digit to Analog Converter (DAC) 248, and an Output Buffer 249. The receiver 241 is coupled to an external timing controller (not shown) for receiving the display data signal and the control signal, and outputs the clock signal CLK, the horizontal start pulse signal SP, the line latch signal LL, and the pixel data PDATA. The shift register 244 receives the clock signal CLK and the horizontal start pulse signal SP to sequentially generate a plurality of channel latch signals LE1, LE2, LE3, . . . , LEn. The first latches 245 sequentially latch the pixel data PDATA according to the corresponding channel latch signals LE1 LE LEen as a plurality of first latch signals DL11, DL12, DL13, . . . , DL1n. After the first latch signals DL11 DL DL1 n are all ready, the second latches 246 simultaneously latch the first latch signals DL11 DL DL1 n according to the line latch signal LL as a plurality of The second latch signals DL21, DL22, DL23, ..., DL2n. The level shifters 247 receive the second latch signals DL21 DL DL2n to generate a plurality of level shift signals HV1, HV2, HV3, . . . , HVn. The digit-to-analog converters 248 receive the level shift signals HV1 HVHVn to generate a plurality of gray scale signals A1, A2, A3, ..., An. The output buffers 249 receive and gain the gray scale signals A1~An to generate a plurality of data line drive signals D1, D2, D3, ..., Dn.

Can be seen from Figure 2B, the damage due to the dead pixel DP data line 223 comprises a circuit 240 is driven by a data channel transmitted through the data lines Y ₃ driving the driving lines 233 (i.e., the data lines are driven by driving signals D3). The output of the data channel Y ₃ can be electrically connected to the input terminal RPI of the repair operational amplifier 242 of the data line driving circuit 240 through the traverse line 251 reserved on the display panel 220. The repair operational amplifier 242 receives the driving signal D3 of the data channel Y ₃ and is controlled by the repair enable signal REN to generate and output the data line driving signal DR, wherein the data line driving signal DR and the data line driving signal D3 are substantially the same. Data line drive signal. The output RPO of the patching operational amplifier 242 is then connected to the second terminal 224 of the corrupted data line 223 via a wire 253 reserved on the display panel 220.

The above-mentioned repairing line method must reserve a wiring space on the display panel 220 or the printed circuit board (PCB) to traverse the line 251 (used to connect the output end of the data channel to the input terminal RPI of the repair operational amplifier). The traversing line 251 reserved (but not necessarily used) will occupy a limited amount of wiring space on the printed circuit board (or display panel 220). In order to make the repair work more flexible, the following embodiment provides a method for connecting the output end of the data channel of the data line driving circuit through the external traverse line of the data line driving circuit to the input end of the repairing operational amplifier and the data of applying the method. Line drive circuit architecture to improve the efficiency of display panel repair.

Please refer to FIG. 3. FIG. 3 is a schematic diagram of a method for repairing a panel according to an embodiment of the invention. In different application examples, the flat panel display 300 shown in FIG. 3 may be a liquid crystal display, a plasma display panel display, or other display. The flat panel display 300 includes a display panel 320, a timing controller (not shown), a scan line driving circuit (not shown), and a data line driving circuit 340. The embodiment shown in FIG. 3 can be analogized with reference to the related description of FIG. 2A. The display panel 320 has a corrupted data line 323 containing a dead pixel DP. The data line drive circuit 340 includes n data channels Y ₁ , Y ₂ , Y ₃ , ..., Y _n and a repair channel 341. Patching channel 341 includes patching operational amplifier 342. The n data channels Y ₁ ~Y _{n of the} data line driving circuit 340 are respectively coupled to the n data lines of the display panel 320 through the n driving lines 331, 332, 333, ..., 33n (for example, the data lines 323, and the remaining data lines) Not shown). For example, the data channel Y3 of the data line driving circuit 340 can be coupled to the first end 321 of the damaged data line 323 of the display panel 320 through the driving line 333. In the embodiment of the present invention, the configuration of the plurality of setting pins of the data line driving circuit 340 or the data channel Y3 of the data line driving circuit 340 corresponding to the damaged data line 323 may be configured by the timing controller. The address value addr or the pixel data RP_RGB is supplied to the patch channel 341. Compared with the repairing line method shown in FIG. 2A, the embodiment shown in FIG. 3 can save the traversing line 251 (the output end of the data channel for connecting the data line driving circuit 340) on the display panel 320 or the printed circuit board. The trace space to the input of the repair operational amplifier 342). The detailed embodiment is as follows.

In an embodiment of the invention, the method of repairing a damaged data line includes the following steps. First, the damaged data line 323 containing the dead pixel DP is found on the display panel 320. As shown in FIG. 3, the corrupted data line 323 is driven by the data path Y3 of the data line driving circuit 340. Therefore, the pixel data RP_RGB of the data channel Y3 of the data line driving circuit 340 corresponding to the damaged data line 323 is supplied to the repair channel 341 disposed in the data line driving circuit 340. According to the pixel data RP_RGB, the repair channel 341 of the data line driver circuit 340 and the data channel Y3 of the data line driver circuit 340 corresponding to the corrupted data line 323 respectively generate and output the same data line driver. number. It should be noted that the data line driving signal outputted by the data channel Y3 is transmitted to the first end 321 of the damaged data line 323 via the driving line 333 of the display panel 320, and the data line driving signal output by the repairing channel 341 is via The wire 353 of the display panel 320 is transmitted to the second end 324 of the damaged data line 323. In addition, the pixel data RP_RGB described above may be provided to the patch channel 341 by a timing control circuit (not shown).

In another embodiment of the invention, the method of repairing the corrupted data line 323 includes the following steps. First, the damaged data line 323 containing the dead pixel DP is found on the display panel 320. For example, as shown in FIG. 3, the corrupted data line 323 is driven by the data path Y3 of the data line drive circuit 340. Therefore, the address value addr of the data path Y3 of the data line drive circuit 340 corresponding to the damaged data line 323 is supplied to the repair channel 341 disposed in the data line drive circuit 340. This embodiment does not limit the manner in which the address value addr is supplied to the patching channel 341. For example, the address value addr is supplied to the patching channel 341 by the configuration setting of the plurality of setting pins of the data line driving circuit 340. Alternatively, the address value addr is supplied to the patch channel 341 of the data line driving circuit 340 by a timing control circuit (not shown). According to the address value addr, the same data line driving signal is generated and outputted by the data channel Y3 of the data line driving circuit 340 corresponding to the repairing channel 341 of the data line driving circuit 340 and the damaged data line 323.

Please refer to FIG. 4. FIG. 4 is a circuit block diagram showing the data line driving circuit 340 of FIG. 3 according to an embodiment of the invention. The data line driving circuit 340 is used to drive different data lines (not shown) of the display panel 320. Data line driver circuit 340 package A receiver 410, a gray scale voltage generator 420, a plurality of data channels Y1, Y2, Y3, ..., Yn and a repair channel 341 are included. The plurality of data channels Y1~Yn are used to drive different data lines of the display panel 320. The plurality of data channels Y1, Y2, Y3, ..., Yn include a plurality of shift registers 431, a plurality of first latches 432, a plurality of second latches 433, and a plurality of level shifters 434 A plurality of digits to analog converter 435 and a plurality of output buffers 436.

In this embodiment, the implementation and operation of the receiver 410, the grayscale voltage generator 420, and the data channels Y1, Y2, Y3, . . . , Yn can refer to the receiver 210 and the grayscale voltage generator 220 shown in FIG. 2B. And the related descriptions of the data channels Y1, Y2, Y3, ..., Yn, and so on, so the detailed operation will not be repeated here. Since the damaged data line 323 including the dead pixel DP is driven by the data channel Y3 of the data line driving circuit 340 through the driving line 333 in the display panel 320, the address value addr corresponding to the data channel Y3 is transmitted to the repairing channel 341. . This embodiment does not limit the manner in which the address value addr is supplied to the patching channel 341. For example, the address value addr is supplied to the patching channel 341 by the configuration setting of the plurality of setting pins of the data line driving circuit 340. Alternatively, the address value addr is supplied to the patch channel 341 of the data line driving circuit 340 by a timing control circuit (not shown). The repair channel 341 can generate and output a data line driving signal DR according to the address value addr, wherein the data line driving signal DR and the data line driving signal D3 generated and outputted by the corresponding data channel Y3 corresponding to the damaged data line 323 are substantially the same.

Referring to FIG. 4 again, in the above embodiment of the present invention, the repair channel 341 includes a repair unit 460 and a repair operational amplifier 342. Repair unit 460 Receiving a clock signal CLK, a horizontal start pulse signal SP and an address value addr and correspondingly latching a pixel data PDATA of the corresponding data channel Y3 to generate a gray level signal AR. The operational amplifier 342 has an input coupled to the repairing unit 460 to receive the gray-scale signal AR, and generates and outputs the data line driving signal DR according to the gray-scale signal AR.

In the above embodiment of the present invention, the repair unit 460 includes a counter 461, a first latch 462, a second latch 463, a level shifter 464, and a digit to analog converter 465. The first latch 462, the second latch 463, the level shifter 464, and the digital-to-analog converter 465 of the repairing unit 460 have the first latch 432 and the second latches respectively 433. The level shifters 434 and the digits to analog converters 435 are substantially identical circuits.

The counter 461 receives the clock signal CLK and the horizontal start pulse signal SP to generate a count value, and compares the count value with the address value addr to generate a channel latch signal LER. For example, the counter 461 can count the clock signal CLK according to the timing of the horizontal start pulse signal SP to generate a count value. When the count value meets the above address value addr, the pixel data PDATA representing the time is the pixel data corresponding to the corresponding data channel Y3 of the damaged data line 323, and the channel latch signal LER will be located at the first time. The level is, for example, a logic high level. The enable input of the first latch 462 is coupled to the counter 461 to receive the channel latch signal LER. The data input end of the first latch 462 receives the pixel data PDATA, and latches the pixel data PDATA according to the channel latch signal LER as the first latch signal DLR1. For example, the first latch 462 can be in the channel latch signal LER When the first level is located, the pixel data PDATA is latched as the first latch signal DLR1. The enable input of the second latch 463 receives the receive line latch signal LL. The data input terminal of the second latch 463 is coupled to the first latch 462 to receive the first latch signal DLR1, and latches the first latch signal DLR1 as a second lock according to the line latch signal LL. Save the signal number DLR2. For example, when the line latch signal LL is at a first level, for example, a logic high level, the pixel data representing the same column to be output to the display panel 320 is ready for all the first locks. In the memory (including the plurality of first latches 432 and the first latch 462 of the patching unit), the second latch 463 latches the first latch signal DLR1 as a second latch. Signal DLR2. The input of the level shifter 464 is coupled to the second latch 463 to receive the second latch signal DLR2 and generate a level shift signal HVR. The input of the digital to analog converter 465 is coupled to the level shifter 464 to receive the level shift signal HVR and generate a gray scale signal AR.

In an embodiment of the present invention, the method of repairing the panel of the panel shown in FIG. 4 is similar to that of FIG. 3, and thus the method thereof can be referred to the description of FIG. 3 described above. Referring to FIG. 4 , in the method of repairing the panel, the repairing channel 341 includes a repairing unit 460 and a repairing operational amplifier 342. The method for generating the data line driving signal DR by the repairing channel 341 includes: A horizontal start pulse signal SP counts a clock signal CLK to generate a count value; when the count value meets the address value addr, the pixel data PDATA of the data channel Y3 corresponding to the corrupted data line 323 is latched to the repair unit 460. Generating a gray-scale signal AR; and providing the gray-scale signal AR to the repair operational amplifier 342 to generate a data line drive Signal DR.

In the above embodiment of the present invention, in the method for repairing a panel, the repair unit 460 includes a counter 461, a first latch 462, a second latch 463, and a level shifter 464. And a digit-to-analog converter 465, wherein the method for generating the gray-scale signal AR includes: when the count value meets the address value addr, latching the pixel data PDATA to the first latch 462 as a first a latch signal DLR1; latching the first latch signal DLR1 to the second latch 463 as a second latch signal DLR2 according to the line latch signal LL; providing the second latch signal DLR2 to the level shift The shifter 464 generates a level shift signal HVR; and provides a level shift signal HVR to the digital to analog converter 465 to generate a gray scale signal AR.

Please refer to FIG. 5. FIG. 5 is a circuit block diagram showing the data line driving circuit 340 of FIG. 3 according to another embodiment of the present invention. The embodiment shown in FIG. 5 can be analogized with reference to the related description of FIG. In this embodiment, the implementation and operation of the receiver 410, the grayscale voltage generator 420, and the data channels Y1, Y2, Y3, ..., Yn can be analogized with reference to the related description of FIG. 2, so that the detailed operation thereof is here. No longer. In the display panel 320, the damaged data line 323 including the dead pixel DP is driven by the data channel Y3 of the corresponding data line driving circuit 340 through the driving line 333, so the address value addr corresponding to the data channel Y3 can be transmitted to Patch channel 341. The repair channel 341 can generate and output a data line driving signal DR according to the address value addr, wherein the data line driving signal DR and the data line driving signal D3 generated and outputted by the corresponding data channel Y3 corresponding to the damaged data line 323 Essentially the same. In the above embodiment of the present invention, the address value addr may be set by a configuration of a plurality of setting pins of the data line driving circuit 340 or a timing control circuit, but the invention is not limited thereto.

Referring to FIG. 5 again, in the above embodiment of the present invention, the repair channel 341 includes a repair unit 560 and a repair operational amplifier 342. The repairing unit 560 receives the address value addr and the digits of the data channels Y1, Y2, Y3, . . . , Yn of the data line driving circuit 340 to the plurality of gray scale signals A1, A2, and A3 generated by the analog converter 435. ..., An, and selectively output one of the gray-scale signals A1, A2, A3, ..., An according to the address value addr as an analog signal AS. The input end of the repair operational amplifier 342 is coupled to the repair unit 560 to receive the analog signal AS and generate the data line drive signal DR. Further, as follows, the gray-scale signal A3 generated by the digit-to-analog converter of the data channel Y3 corresponds to the corrupted data line 323, and the repairing unit 560 can select the grayscale of the gray-scale signals A1~An according to the address value addr. Signal A3 is used as the analog signal AS. The repair operational amplifier 342 receives such a ratio signal AS to generate and output a data line drive signal DR at an output RPO of the repair operational amplifier 342.

In the above embodiment of the present invention, the repair unit 560 shown in FIG. 5 may include a multiplexer 568. The plurality of input ends of the multiplexer 568 are respectively coupled to the outputs of the data channels Y1, Y2, Y3, . . . , Yn to the output of the analog converter 435 in a one-to-one manner to receive the gray-scale signal A1. A2, A3, ..., An. The control terminal of the multiplexer 568 receives the address value addr. According to the control of the address value addr, the multiplexer 568 can select from the gray-scale signals A1, A2, A3, ..., An. A gray scale signal (e.g., gray scale signal A3 of data channel Y3) is output to the input of the patching operational amplifier 342.

In an embodiment of the present invention, the method of repairing the panel of the panel shown in FIG. 5 is similar to that of FIG. 3, and therefore the method thereof can be referred to the description of FIG. 3 described above. Referring to FIG. 5, in the method for repairing the panel line, the method for generating the data line driving signal DR by the repairing channel 341 includes: selecting, by the repairing unit 560, the plurality of data channels Y1 of the data line driving circuit 340 according to the address value addr. One of the plurality of gray-scale signals A1, A2, A3, ..., An generated by Y2, Y3, ..., Yn is used as an analog signal AS; and such a specific signal AS is supplied to the repair operational amplifier 342 to generate repair The data line of channel 341 drives signal DR.

Please refer to FIG. 6. FIG. 6 is a circuit block diagram showing the data line driving circuit 340 of FIG. 3 according to still another embodiment of the present invention. The embodiment shown in FIG. 6 can be analogized with reference to the related description of FIG. 4 or FIG. In this embodiment, the implementation and operation of the receiver 410, the grayscale voltage generator 420, and the data channels Y1, Y2, Y3, ..., Yn can be analogized with reference to the related description of FIG. 2, so that the detailed operation thereof is here. No longer. In the above embodiment of the present invention, the repair channel 341 includes a repair unit 660 and a repair operational amplifier 342. The repairing unit 660 receives a clock signal CLK, a control signal CTRL, and a pixel data PDATA to generate a gray-scale signal AR. The input end of the repair operational amplifier 342 is coupled to the repair unit 660 to receive the gray scale signal AR and generate the data line drive signal DR.

In the above embodiment of the present invention, the repair unit 660 includes a shift register 661, a first latch 462, a second latch 463, and a level offset. And a digital to analog converter 465, wherein the shift register 661 of the repair unit 660, the first latch 462, the second latch 463, the level shifter 464, and the digital to analog converter 465 Each of the shift register 431, the first latch 432, the second latch 433, the level shifter 434, and the digit-to-analog converter 435 are substantially the same. Circuit. In the overall operation, the shift register 661 receives the clock signal CLK and the control signal CTRL to generate the channel latch signal LER. An external timing control circuit (not shown) can stream the data of the pixel data RGB containing the data channels Y1~Yn and the pixel data RP_RGB of the repair channel 341 to the receiver 410. Since the damaged data line 323 including the dead pixel DP is driven by the data channel Y3 of the corresponding data line driving circuit 340 through the driving line 333 in the display panel 320, the pixel data RP_RGB of the repairing channel 341 can be the same as the data channel. Y3's pixel data. The receiver 410 can transfer the pixel data PDATA including the pixel data RGB and the pixel data RP_RGB to the first latch 432 of the data channels Y1 to Yn and the first latch 432 of the patch channel 341. According to the timings of the channel latch signals LE1~Len and LER outputted by the shift register 431 and the shift register 661, the first latch 432 of the data channels Y1~Yn can latch different data in the pixel data PDATA. The pixel data RGB of the channels Y1 to Yn, and the first latch 462 of the patch channel 341 can latch the pixel data RP_RGB in the pixel data PDATA.

When the channel latch signal LER is at the first level, for example, a logic high level, the pixel data PDATA representing the time is the pixel data RP_RGB corresponding to the corresponding data channel Y3 of the damaged data line 323. Enablement of the first latch 462 The input terminal is coupled to the shift register 661 to receive the channel latch signal LER. The data input end of the first latch 462 receives the pixel data PDATA, and latches the pixel data PDATA according to the channel latch signal LER. Is a first latch signal DLR1. For example, the first latch 462 can latch the pixel data PDATA as the first latch signal DLR1 when the channel latch signal LER is at the first level. The enable input of the second latch 463 receives a line latch signal LL, and the data input end of the second latch 463 is coupled to the first latch 462 to receive the first latch signal DLR1 and is latched according to the line. The lock signal LL latches the first latch signal DLR1 as a second latch signal DLR2. For example, when the line latch signal LL is at a first level, for example, a logic high level, the pixel data representing the same column to be output to the display panel 320 is ready for all the first locks. The second latch 463 latches the first latch signal DLR1 as the second latch signal. DLR2. The input of the level shifter 464 is coupled to the second latch 463 to receive the second latch signal DLR2 and generate a level shift signal HVR. The input of the digital to analog converter 465 is coupled to the level shifter 464 to receive the level shift signal HVR and to generate the gray level signal AR described above. It should be noted that, in this embodiment, since the repair channel 341 is disposed in the next stage of the data channel Yn, the control signal CTRL is the channel latch signal LEn generated by the shift register of the data channel Yn.

In an embodiment of the present invention, the method of repairing the panel of the panel shown in FIG. 6 is similar to that of FIG. 3, and thus the method thereof can be referred to the description of FIG. 3 described above. Referring to FIG. 6 again, in the method for repairing a panel, the repairing channel 341 includes a repair. The complementing unit 660 and the repairing operational amplifier 342, the method for generating the data line driving signal DR by the repairing channel 341 includes: the patching unit 660 latches the pixel data PDATA according to the one-channel latching signal LER and the one-line latching signal LL. The repairing unit 660 generates a gray-scale signal AR; and provides the gray-scale signal AR to the repair operational amplifier 342 to generate the data line driving signal DR.

In the above embodiment of the present invention, in the method for repairing a panel, the repair unit 660 includes a shift register 661, a first latch 462, a second latch 463, and a level. The offset 464 and a digital-to-analog converter 465, wherein the method for generating the gray-scale signal AR comprises: providing a clock signal CLK and a control signal CTRL to the shift register 661 to generate a channel latch signal LER; The channel latch signal LER latches the pixel data PDATA to the first latch 462 as a first latch signal DLR1; and latches the first latch signal DLR1 to the second latch according to the line latch signal LL The device 463 serves as a second latch signal DLR2; provides a second latch signal DLR2 to the level shifter 464 to generate a level shift signal HVR; and provides a level shift signal HVR to digital to analog conversion The device 465 generates a gray scale signal AR.

In some cases, a display panel may have multiple corrupted data lines, and these corrupted data lines may be driven by different data channels of the same data line drive circuit. Since the number of patch channels of each data line driver circuit is limited, a portion of these damaged data lines can be repaired by patching channels of other data line driver circuits. That is to say, the repaired pixel data transmitted to the repair channel of a data line driving circuit through the timing controller may be repaired by other data line driving circuits. The pixel data of the damaged data line. Refer to Figure 7 for a detailed implementation.

7 is a circuit block diagram of a method of repairing a panel in accordance with another embodiment of the present invention. The embodiment shown in FIG. 7 can be analogized with reference to the related description of FIG. The flat panel display 700 includes a display panel 720, a timing controller (not shown), a scan line driving circuit (not shown), a first data line driving circuit 740, and a second data line driving circuit 760, wherein the first data line driver The circuit 740 and the second data line driving circuit 760 have the same circuit structure as the data line driving circuit 340 shown in FIG. 6. For detailed operation, refer to the description of FIG. 6 above, and details are not described herein again. In the embodiment, the first data line driving circuit 740 includes n data channels Y11, Y12, Y13, ..., Y1n and a repair channel 741. The n data channels Y11, Y12, Y13, ..., Y1n of the first data line driving circuit 740 are respectively coupled to the n data lines of the display panel 720 through the n driving lines 731, 732, 733, ..., 73n (not drawn Show). The second data line driving circuit 760 includes n data channels Y21, Y22, Y23, ..., Y2n and a repair channel 761. The n data channels Y21, Y22, Y23, ..., Y2n of the second data line driving circuit 760 are respectively coupled to the other n data lines of the display panel 720 through the n driving lines 751, 752, 753, ..., 75n (not Painted). As shown in FIG. 7, display panel 720 has a first dead point 722 and a second dead point 794. The first corrupted data line 723 where the first dead point 722 is located and the second damaged data line 795 where the second dead point 794 is located are respectively driven by the data channel Y23 and the data channel Y2n of the second data line driving circuit 760. As shown in FIG. 7, the first corrupted data line 723 driven by the data path Y23 of the second data line driving circuit 760 can be repaired by the repair channel 741 of the first data line driving circuit 740. Second data The second corrupted data line 795 driven by the data path Y2n of the line drive circuit 760 can be repaired by the repair channel 761 of the second data line drive circuit 760.

In this embodiment, the manner of repairing the first damaged data line 723 includes the following steps. First, the first damaged data line 723 including the first dead point 722 is found on the display panel 720. Since the first damaged data line 723 is driven by the data channel Y23 of the second data line driving circuit 760, the first The pixel data RP_RGB1 of the data channel Y23 of the second data line driving circuit 760 corresponding to the damaged data line 723 is supplied to the repair channel 741 disposed in the first data line driving circuit 740. According to the pixel data RP_RGB1, the repair channel 741 of the first data line driver circuit 740 and the data channel Y23 of the second data line driver circuit 760 corresponding to the first corrupted data line 723 respectively generate and output the same data line driving signal. . It should be noted that the data line driving signal outputted by the data channel Y23 and the data line driving signal output by the repairing channel 741 are respectively transmitted to the first of the damaged data line 723 via the electrical paths 753 and 783 of the display panel 720. End 721 and second end 724. In addition, the pixel data RP_RGB1 described above may be supplied to the repair channel 741 by a timing control circuit.

In this embodiment, the manner of repairing the second damaged data line 793 includes the following steps. First, the second damaged data line 793 including the second dead point 792 is found on the display panel 720. Since the second damaged data line 793 is driven by the data channel Y2n of the second data line driving circuit 760, the second The pixel data RP_RGB2 of the data channel Y2n of the second data line driving circuit 760 corresponding to the damaged data line 793 is supplied to the repair channel disposed in the second data line driving circuit 760. 761. According to the pixel data RP_RGB2, the repair channel 761 of the second data line driver circuit 760 and the data channel Y2n of the second data line driver circuit 760 corresponding to the second corrupted data line 793 respectively generate and output the same data line driver signal. . It should be noted that the data line driving signal outputted by the data channel Y2n and the data line driving signal output by the repairing channel 761 are respectively transmitted to the first of the damaged data line 793 via the electrical paths 75n and 773 of the display panel 720. End 791 and second end 794. Further, the pixel data RP_RGB2 described above may be supplied to the repair channel 761 by a timing control circuit.

The above embodiment is described by taking the repairing method of two damaged data lines as an example. However, the present invention is not limited thereto, and other methods for repairing damaged data lines can be referred to the description of FIG. 7 above.

In summary, the embodiment of the present invention can transmit the address value or pixel data of the data channel of the data line driving path corresponding to the damaged data line to the repair channel of the data line driving path through the timing controller or the plurality of setting pins. The data line driving signal is generated, and according to the address value or the pixel data, the data channel corresponding to the damaged channel and the damaged data line respectively generate and output the same data line driving signal, thereby saving on the display panel or the printed circuit board. The wiring space of the data channel leaving the data line driver circuit to the input end of the repair operational amplifier has greater flexibility in application.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of protection of the present invention It is subject to the definition of the scope of the patent application attached.

300‧‧‧Flat panel display

320‧‧‧ display panel

321‧‧‧ first end

323‧‧‧damaged data line

324‧‧‧ second end

331, 332, 333, ..., 33n‧‧‧ drive line

340‧‧‧Data line driver circuit

341‧‧‧ repair channel

342‧‧‧Fixed Operational Amplifier

353‧‧‧Wire

Addr‧‧‧ address value

DP‧‧‧bad points

RPO‧‧‧ output

RP_RGB‧‧‧ pixel data

Y1, Y2, Y3, ..., Yn‧‧‧ data channel

Claims (23)

A method for repairing a panel for repairing a damaged data line of a display panel, the method for repairing the panel includes: providing an address value of a data channel of a data line driving circuit corresponding to the damaged data line to the a repair channel of the data line driving circuit; and according to the address value, the data channel corresponding to the damaged data line is generated and outputted by the repair channel and the same data line driving signal. The method for applying the panel repairing line according to claim 1, wherein the step of providing the address value to the repairing channel comprises: configuring, by using a plurality of setting pins of the data line driving circuit, The address value is provided to the patch channel; or the timing control circuit provides the address value to the patch channel of the data line driver circuit. The method of claim 2, wherein the data line driving signal outputted by the data channel and the data line driving signal output by the repairing channel are respectively through different electrical paths of the display panel. A first end and a second end are transmitted to the damaged data line. The method of claim 2, wherein the patching channel comprises a repairing unit and a repairing operational amplifier, and the method for generating the data line driving signal by the repairing channel comprises: Counting a clock signal according to a horizontal start pulse signal to generate a count value; When the count value meets the address value, latching a pixel data of the data channel corresponding to the damaged data line to the repairing unit to generate a gray level signal; and providing the gray level signal to the patching operational amplifier The data line driving signal is generated. The method for repairing a panel repair line according to claim 4, wherein the repairing unit comprises a counter, a first latch, a second latch, a level shifter, and a digit to analog conversion The method for generating the gray-scale signal includes: when the count value meets the address value, latching the pixel data to the first latch as a first latch signal; The latch signal latches the first latch signal to the second latch as a second latch signal; providing the second latch signal to the level shifter to generate a level shift And providing the level offset signal to the digit to the analog converter to generate the gray scale signal. The method of claim 2, wherein the patching channel comprises a repairing unit and a repairing operational amplifier, and the method for generating the data line driving signal by the repairing channel comprises: Selecting one of a plurality of gray-scale signals generated by the plurality of data channels of the data line driving circuit as an analog signal according to the address value; The analog signal is provided to the patching operational amplifier to generate the data line driving signal of the patching channel. A method for repairing a panel to repair a damaged data line of a display panel, the method for repairing the panel includes: providing a pixel data of a data channel of a data line driving circuit corresponding to the damaged data line to a patching channel; and according to the pixel data, the data channel corresponding to the damaged data line by the patching channel generates and outputs the same data line driving signal. The method of claim 2, wherein the step of providing the pixel data to the patching channel comprises: providing the pixel data to the patching channel by a timing control circuit. The method for repairing a panel repairing line according to claim 7, wherein the data line driving signal outputted by the data channel and the data line driving signal output by the repairing channel respectively pass different electrical paths of the display panel A first end and a second end are transmitted to the damaged data line. The method for repairing a panel repairing line according to claim 7, wherein the repairing channel includes a repairing unit and a repairing operational amplifier, and the method for generating the data line driving signal by the repairing channel comprises: The pixel data is latched to the repairing unit to generate a gray-scale signal according to a channel latch signal and a line latch signal; and the gray-scale signal is supplied to the patching operational amplifier to generate the data line driving signal. The method for repairing a panel repairing line according to claim 10, wherein the repairing unit comprises a shift register, a first latch, a second latch, a level shifter, and a a digital-to-analog converter, wherein the method for generating the gray-scale signal comprises: providing a clock signal and a control signal to the shift register to generate the channel latch signal; and the latching signal according to the channel The data is latched to the first latch as a first latch signal; the first latch signal is latched to the second latch as a second lock according to the line latch signal And storing the second latch signal to the level shifter to generate a level shift signal; and providing the level shift signal to the digit to the analog converter to generate the gray level signal. The method of repairing a panel according to claim 7, wherein the repairing channel is disposed in the data line driving circuit. The method of repairing a panel according to claim 7, wherein the repairing channel is disposed in another data line driving circuit. A data line driving circuit for driving different data lines of a display panel, the data line driving circuit comprising: a plurality of data channels for respectively driving the data lines; and a repair channel configured to receive the data a damaged data line in the line Corresponding one address value, wherein the repair channel generates and outputs the same data line driving signal according to the address value and a corresponding data channel corresponding to the damaged data line in the data channels. The data line driving circuit of claim 14, wherein the address value is set by a configuration of a plurality of setting pins of the data line driving circuit or a timing control circuit. The data line driving circuit of claim 14, wherein the repairing channel comprises: a repairing unit, receiving a clock signal, a horizontal start pulse signal, and the address value and correspondingly latching the corresponding data channel The pixel data is generated to generate a gray-scale signal; and a repair operational amplifier has an input coupled to the repairing unit to receive the gray-scale signal, and the data line driving signal is generated and output according to the gray-scale signal. The data line driving circuit of claim 16, wherein the repairing unit comprises: a counter that receives the clock signal and the horizontal start pulse signal to generate a count value, and compares the count value with the address value. To generate a channel latch signal; a first latch having a uniform input coupled to the counter to receive the channel latch signal, a data input receiving the pixel data and latching according to the channel The signal latches the pixel data as a first latch signal; a second latch has a uniform input terminal receiving a line latch signal, and a data input terminal coupled to the first latch Receiving the first latch signal and according to the The line latch signal latches the first latch signal as a second latch signal; a level shifter having an input coupled to the second latch to receive the second latch signal And generating a level shift signal; and a digit to analog converter, an input coupled to the level shifter to receive the level shift signal and generate the gray level signal. The data line driving circuit of claim 14, wherein the repairing channel comprises: a repairing unit, receiving the address value and the plurality of gray level signals of the data channels of the data line driving circuit, according to the address Numerically selectively outputting one of the gray-scale signals as an analog signal; and a patching operational amplifier having an input coupled to the repairing unit to receive the analog signal and generate the data line driving signal. The data line driving circuit of claim 18, wherein the repairing unit comprises a multiplexer. A data line driving circuit for driving different data lines of a display panel, the data line driving circuit comprising: a plurality of data channels for respectively driving the data lines; and a repair channel configured to receive the data a pixel data corresponding to a damaged data line in the line, wherein the repair channel and the corresponding data channel corresponding to the damaged data line in the data channel respectively generate and output the same data according to the pixel data Line drive signal. The data line driving circuit of claim 20, wherein the pixel data is provided by a timing control circuit. The data line driving circuit of claim 20, wherein the repairing channel comprises: a repairing unit, receiving a clock signal, a control signal and the pixel data to generate a gray scale signal; and a repair operational amplifier An input end is coupled to the repairing unit to receive the gray level signal and generate the data line driving signal. The data line driving circuit of claim 22, wherein the repairing unit comprises: a shift register, receiving the clock signal and the control signal to generate a channel latch signal; a first latch The unifying input terminal is coupled to the shift register to receive the channel latch signal, and a data input terminal receives the pixel data, and latches the pixel data according to the channel latch signal to do a first latch signal; a second latch having a coincidence input receiving a line latch signal, a data input coupled to the first latch to receive the first latch signal, and The first latch signal is latched according to the line latch signal as a second latch signal; a level shifter having an input coupled to the second latch to receive the second latch And storing a level shift signal; and a digit to analog converter, an input coupled to the level shifter to receive the level shift signal and generate the gray level signal.