TW201520582A - Detector - Google Patents

Abstract

A PET device is provided with a ring-shaped gantry, a cradle, and a computer for operation, and the gantry has therein a plurality of detectors disposed around a living body. A detector is configured through the combination of scintillators and a photodetector. Between the photodetector (D1) and the scintillators (SC), there are first reflectors (RF1) surrounding light-sensitive areas, and between light transmission areas of the scintillators, there are second reflectors (RF2).

Description

Detector

The present invention relates to a detector for use in a medical device such as a positron CT (Computerized Tomography) device (Positron Emission Tomography).

Currently, there are various medical machines used. The PET device is a device that introduces a drug identified by an isotope that releases a positron (positive electron) into a living body, and detects a gamma ray from a drug by a plurality of detectors. The PET device has a ring-shaped bracket (seat), a pallet (stage), and a computer for operation. Inside the bracket, a plurality of detectors disposed around the living body are built therein.

Here, an efficient detector of X-rays or gamma rays can be constructed by combining a scintillator and a photodetector.

Further, a CT/PET apparatus in which an X-ray CT apparatus and a PET apparatus are combined or a composite diagnostic apparatus in which an MRI (Magnetic Resonance Imaging) apparatus is combined is also considered.

The photodetector (photodiode array) used in the diagnostic apparatus as described above is described, for example, in Patent Document 1. In a photodiode array such as a SiPM (Silicon Photo Multiplier) or a PPD (Pixelated Photon Detector), the APD (Avalance Photo-Diode, Avalanche Photoelectric II) is configured. The polar bodies are arranged in a matrix, and a plurality of APDs are connected in parallel to read out the sum of the APD outputs. If the APD is operated in Geiger mode, it can detect weak Light.

In other words, when a photon is incident on the APD, the carrier generated inside the APD is output to the outside through the wiring pattern for the arc extinguishing resistor and the signal reading. In the pixel of the APD where electron avalanche is generated, a current flows, but a voltage drop occurs in a quenching resistor of several hundreds kΩ connected in series to the pixel. With this voltage drop, the applied voltage to the amplification region of the APD is lowered, and the multiplication effect by the electron avalanche is ended. In this way, one pulse signal is output from the APD by the incidence of one photon.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2008-311651

However, in previous detectors, both precise time measurement and energy detection were required, and this requirement could not be achieved. In the detector of the present invention, it is an object of the invention to provide a detector which can precisely measure both time measurement and energy detection.

In order to solve the above problems, the detector of the present invention includes: a photodetector having a semiconductor wafer; and a scintillator disposed on the photodetector and divided into a plurality of light transmitting regions; and the characteristics of the detector The semiconductor wafer includes: a photosensitive region including a plurality of APDs operating in a Geiger mode; a plurality of arc extinguishing resistors respectively connected to the respective APDs; and an output terminal electrically connected to each of the arc extinguishing resistors The light sensing region is opposite to the light transmitting region, and the detector includes: a first reflector interposed between the photodetector and the scintillator to surround the light sensing region; and a second reflector It is disposed between the light transmission regions of the scintillator.

In order to accurately perform time measurement, it is preferable to reduce the size of the semiconductor wafer. The reason is that the parasitic capacitance of the semiconductor wafer is small, so the output is relative to the incident light. The peak will rise sharply. However, if the semiconductor wafer is reduced, the area of the photosensitive region becomes small, and thus the energy cannot be accurately detected.

Therefore, the detector has the first reflector and the second reflector. In this case, the energy line incident on the scintillator is converted into fluorescence, and is reflected by the second reflector and transmitted in the light transmission region to reach the photosensitive region. Since the first reflector is provided around the photosensitive region, the light incident on the first reflector is reflected, but is again reflected by the second reflector, and finally the probability of entering the photosensitive region becomes high. Thereby, the amount of light finally received by the light-sensing area is increased, and the energy of the precise incident energy line can be detected.

Further, the second reflector surrounds the photosensitive region as viewed in the thickness direction of the scintillator. In this case, light propagating in one light-transmitting region can be surely conducted into one photosensitive region, and unevenness in output per measurement can be suppressed.

As described above, the semiconductor chip has a small time resolution and is excellent in time resolution. In contrast, the area of each of the light sensing regions is smaller than the area of each of the light transmitting regions perpendicular to the thickness direction of the scintillator.

Further, the photodetector may further include a support substrate having a concave portion for accommodating the semiconductor wafer. In this case, the photodetector is protected by the support substrate and becomes easy to handle.

Further, the concave portion is filled with a resin. In this case, the semiconductor wafer is fixed to the support substrate by the resin being in contact with the semiconductor wafer.

Further, the first reflector is formed on the support substrate and the resin to be filled. Since the resin can be filled in the gap between the concave portion and the semiconductor wafer, the first reflector can be formed on the resin in the portion, so that the amount of reflection of the first reflector can be increased, and the amount of light detected during energy measurement can be increased.

Further, the semiconductor wafer has a through electrode electrically connected to the APD and penetrating the semiconductor wafer, and the through electrode is electrically connected to the bump electrode disposed in the recess.

In this case, the through electrode passes through the bottom side of the recess of the semiconductor wafer, so that the scintillator can be brought closer to the semiconductor wafer without wire bonding, so that more fluorescence generated by the scintillator can be incident on the light without attenuation. Sensing area.

The detector of the present invention includes: a photodetector including a semiconductor wafer; and a support substrate having a recess for accommodating the semiconductor wafer; and a scintillator disposed on the photodetector and divided into a plurality of light transmission regions And the detector is characterized in that: the semiconductor wafer comprises: a light sensing region comprising a plurality of APDs operating in a Geiger mode; a plurality of arc extinguishing resistors respectively connected to the respective APDs; and an output terminal, the electricity Sexually connected to each of the arc extinguishing resistors; and the light sensing region is opposite to the light transmitting region.

In this case, even in the case where the semiconductor wafer becomes small, a configuration can be employed in which the semiconductor wafer can be protected by the support substrate, and as described above, the amount of incident light is increased, so that energy detection can be performed accurately. Determination.

According to the detector, both time measurement and energy detection can be performed accurately.

1Na‧‧‧ main face

1Nb‧‧‧ main face

1PC‧‧‧Semiconductor area

3A‧‧‧1st contact electrode

3C‧‧‧Wiring pattern

4‧‧‧Resistor

4A‧‧‧Contact electrode

4B‧‧‧resist layer

4C‧‧‧Contact electrode

10‧‧‧Light Inspection Department

12‧‧‧Semiconductor area

13‧‧‧Semiconductor area

14‧‧‧Semiconductor area

16‧‧‧Insulation

17‧‧‧Insulation

50‧‧‧Signal Processing Circuit

50A‧‧‧Addition Circuit

50B‧‧‧Injection position detection circuit

50C‧‧‧Timing detection circuit

51‧‧‧ computer

52‧‧‧ display

53‧‧‧ memory device

54‧‧‧Central Processing Unit (CPU)

55‧‧‧ Input device

56‧‧‧Image Processing Circuit

101‧‧‧ pallet

102‧‧‧ bracket

103‧‧‧Control device

104‧‧‧Drive motor

105‧‧‧The subject

106‧‧‧Control and detection device

A(1), A(2)...A(N)‧‧‧ Output of each photodiode array

A1‧‧‧ preamplifier

A2‧‧Amplifier

A3‧‧Amplifier

A4‧‧‧AD conversion circuit

BE‧‧‧Bump electrode

BM‧‧‧ under bump metal

D‧‧‧Detector

D1‧‧‧Photodetector

D(k)‧‧‧ detector

D(n)‧‧‧ detector

E‧‧‧Energy

E2‧‧‧ wiring

E3‧‧‧electrode

E4‧‧‧electrode

GND‧‧‧ Grounding

HD‧‧‧Light transmission area

J‧‧‧Resin

L2‧‧‧Insulation

L3‧‧‧Insulation

M1‧‧‧Light detection module

P‧‧‧ position

PAD‧‧‧electrode pad

PD‧‧‧Photoelectric diode

PDA‧‧‧Photodiode Array

PF‧‧‧passivation film

Pros (1), Pros (2) ... Pros (N) ‧ ‧ signal conversion circuit

R1‧‧‧ arc extinguishing resistor

RF1‧‧‧1st reflector

RF2‧‧‧2nd reflector

S1‧‧‧Semiconductor wafer

SB1‧‧‧Support substrate

SB2‧‧‧ mounting substrate

SC‧‧‧Scintillator

Sig(e)‧‧‧Signal for energy detection

Sig(p)‧‧‧Signal for incident position detection of gamma rays

Sig(t)‧‧‧Signal for timing detection

T‧‧‧ Timing

TE‧‧‧through electrode

TH‧‧‧through hole

TL‧‧‧Reading wiring

W‧‧‧ bonding wire

Γ‧‧‧ gamma rays

Fig. 1 is a schematic view of a sample diagnosing device such as a PET device or a CT device.

Figure 2 is a block diagram of a PET device.

Fig. 3 is a view showing the configuration (A) of the signal processing circuit of the detection system and the signal conversion circuit (B).

Figure 4 is a circuit diagram of a photodiode array in one photo-sensing region.

5(A)-(D) are longitudinal cross-sectional views of a photodetector having a support substrate.

Fig. 6 is a side view (A), (B) of a detector in which a photodetector and a scintillator are combined.

Figure 7 is a side view of a detector in which a photodetector and a scintillator are combined.

Figure 8 is a side view (A) and a top view of a detector in which a photodetector and a scintillator are combined. Figure (B).

Fig. 9 is a side view (A) and a plan view (B) of a detector in which a photodetector and a scintillator are combined.

Fig. 10 is a circuit diagram (A) of one photodiode and arc extinguishing resistor, and a diagram (B) showing a unit structure in a semiconductor wafer for realizing the configuration.

Figure 11 is a perspective view of a photodiode array.

Figure 12 is a longitudinal cross-sectional view of the A-A arrow of the photodiode array.

Figure 13 is a cross-sectional view showing a peripheral portion of a common electrode.

Fig. 14 is a graph showing the relationship between the elapsed time (ns) from the incidence of light and the output voltage (V) from the photodetector.

Hereinafter, a PET apparatus using the detector of the embodiment will be described. In the following, the same elements or elements having the same functions are denoted by the same reference numerals, and the description thereof will not be repeated.

Fig. 1 is a schematic view of a sample diagnosing device such as a PET device. In the case of combining a CT device with a composite diagnostic device in a PET device, the basic configuration is also the same as that of the figure.

The subject diagnostic apparatus includes a pallet 101, a bracket 102 having an opening in which the pallet 101 is located inside, and a control device 103. The control device 103 controls the drive motor 104 that moves the pallet 101 by driving the motor control signal to change the relative position of the pallet 101 with respect to the bracket 102. On the pallet 101, a subject 105 to be diagnosed is disposed. The subject 105 is transported to the inside of the opening of the holder 102 by the drive of the drive motor 104. The drive motor 104 can move the pallet 101 or move the bracket 102.

A plurality of detecting devices 106 are disposed in such a manner as to surround the opening of the bracket 102. Detection device 106 has a plurality of detectors D (Fig. 2), respectively. The control signal of the control detecting device 106 is output from the control device 103 to the support 102, and the detection signal from the detecting device 106 is self-supporting. The rack 102 is input to the control device 103.

Figure 2 is a block diagram of a PET apparatus having the configuration of Figure 1.

In the PET apparatus, a plurality of detectors D are arranged in a ring shape so as to surround the opening of the holder. Each of the detectors D has a plurality of photodiode arrays PDA (see photodetectors (Fig. 3(A))) arranged in two dimensions. In the subject 105, a radioisotope (RI) (positive electron-releasing nuclear species) of a type that emits cations (positrons) is injected. Further, the RI used in the PET apparatus is an element such as carbon, oxygen, fluorine, nitrogen, or the like which exists in a living body. The positron is combined with the negative electrons in the body to generate annihilation radiation (gamma rays). That is, gamma rays are emitted from the subject 105. The detector D detects the emitted gamma rays and outputs the detection signals to the signal processing circuit 50 of the control device 103.

The detector D is an aggregate of a plurality of photodiode arrays PDA (see Fig. 3). The signal processing circuit 50 processes the detection signal from the detector D and outputs: (1) the total energy E output from each detector D; (2) the position of the gamma ray incident in the plurality of photodiode array PDAs P; (3) The timing T of the peak value of the waveform of the detection signal outputted from the photodetector at the initial stage when the fluorescence emitted from the scintillator is incident on the photodetector corresponding to the incidence of the gamma ray. Further, regarding the detector D, it will be described later.

The energy E, the position P, and the time T corresponding to the information output from the gamma ray emitted from the subject 105 are converted into a digital signal by an AD (Analog to Digital) conversion circuit (not shown), and then input. Go to computer 51. The computer 51 has a display 52, a memory device 53, a central processing unit (CPU) 54, an input device 55, and an image processing circuit 56 including a software. When a processing command is input from the input device 55 to the CPU 54, a control signal is transmitted to each of the detectors D based on the program stored in the memory device 53, so that the ON/OFF of the detector D can be controlled.

The image processing circuit 56 performs image processing on the detection signals (energy E, position P, and timing T) output from the respective detectors D to generate an image related to the internal information of the subject 105, that is, a map of the fault. image. The prepared image can be stored in the memory device 53 and displayed on the display On the display 52. A program for performing image processing or the like is stored in the memory device 53, and the program operates in accordance with an instruction from the CPU 54. Check one of the required series of operations (control signal (detector ON/OFF) output to detector D, drive motor control, detection signal from detector D, image processing, image formation to memory The storage in the device and the display on the display can be performed by the input device 55.

The γ-rays are emitted from the RI position P inside the subject 105 in one direction and in the opposite direction. A plurality of detectors D are arranged in a ring shape, and gamma rays are incident on a specific detector D(n) and a detector D(k) opposed to the detector D(n) via an RI position. When the N detectors D are arranged on one ring, the gamma rays are incident on the nth detector D(n) along the clockwise direction and the kth detection from the detector D at the highest position. The device D(k), but when the RI position P is located at the center of the ring and the gamma rays are directed in opposite directions to each other in the plane of the ring, k = n + (2 / N). Furthermore, n, k, and N are natural numbers.

In the case of a PET apparatus type TOF type (Time Of Flight), a substance containing RI is administered to a human body, an animal, a plant, or the like, and a pair of radiation generated by electron-positive electron pair quenching in the measurement target ( The gamma ray is measured to obtain information on the distribution of the administered substance in the measurement target. That is, since the difference between the timings corresponds to the displacement distance from the center of gravity of the ring to the position of the RI position P on the diagonal line between the opposite detectors D, it is only necessary to identify each of the detectors D disposed at the opposite position. The timing T outputted by each of the signal processing circuits 50 enables position detection.

Further, in the case of the computer 51, when two timings T are obtained, it is also determined whether or not the source is derived from the electron-positive electron annihilation. The determination is based on whether or not a gamma ray is detected in the other detector D(k) during a certain period of time after the detection time of the gamma ray is detected in the detector D(n). When the gamma ray is detected under the condition, it can be determined that it is accompanied by the same electron-positive electron pair annihilation gamma ray pair, and can be used as an effective value in the image processing of the image processing circuit 56. .

In the measurement of the timing T, when the signal strength of the detector D exceeds a certain threshold (set to In the case of SH), it is determined that there is incidence of gamma rays, and when this is not the case, it is determined that there is no incidence. The threshold value SH is set to, for example, a photon energy of one pair of gamma rays generated by electron-positive electron pair quenching, that is, about 511 keV. Thereby, it is possible to eliminate electrical noise signals or noise signals derived from scattered gamma rays (one of which annihilates gamma rays or both of which are gamma rays whose direction is changed by scattering materials, and whose energy is reduced by scattering) .

After the determination of the timing T, the incident of fluorescence from the scintillator to the photodetector also continues. Therefore, when the cumulative value of the amount of incident light of the fluorescent light is obtained, the intensity of the incident fluorescent light, that is, the energy E can be obtained. The incident position P of the fluorescent light in each detector D can be calculated by determining the two-dimensional center of gravity position of the signal intensity from each photodiode array in the signal processing circuit 50. This position P can be used in the case of more sophisticated image analysis, as needed.

The TOF-PET (Time Of Flight-Positron Emission Tomography) device includes: a radiation detector array (detection device 106) including a plurality of detectors D; a signal processing circuit 50; and a computer 51, It performs image processing based on the output of the signal processing circuit 50. All of the detectors D arranged in a ring shape have such configurations, but in order to clarify the description, only one group is shown in the figure.

3 is a view (A) showing the configuration of the signal processing circuit 50 of the detection system, and a diagram (B) showing the signal conversion circuit Pros.

The detector D is a combination of a scintillator that converts radiation (gamma rays, X-rays) into fluorescence, and a plurality of photodetectors (photodiode arrays) that detect fluorescence. Each photodetector D has a semiconductor wafer for photodetection. In one semiconductor wafer, a photodiode array PDA including a group of photodiodes is formed. The output of a plurality of photodiodes in one semiconductor wafer is confined in one place and extracted as outputs A(1), A(2)...A(N) of each photodiode array PDA. Furthermore, the number of photodiode arrays PDA included in one detector D is set to N (an integer of 2 or more).

As shown in the diagram (B), the output A(n) of each photodiode array PDA is input to the respective signal conversion circuits Pros(n). The signal conversion circuit Pros(n) has a preamplifier A1 Amplifier A2, amplifier A3, and AD conversion circuit A4.

The output A(n) of each photodiode array PDA is amplified by the preamplifier A1, amplified by the amplifier A2, and output as the signal Sig(e) for energy detection.

The output A(n) of each photodiode array PDA is amplified by the preamplifier A1, amplified by the amplifier A2, amplified by the amplifier A3, and used as the signal Sig for detecting the incident position of the gamma ray ( p) and output.

The output A(n) of each photodiode array PDA is amplified by the preamplifier A1, converted into a digital value by the AD conversion circuit A4, and output as a signal Sig(t) for timing detection. The AD conversion circuit A4 is a comparator that outputs a signal exceeding a specific threshold SH as an H level, thereby converting an analog analog signal into a digital signal. The threshold SH can also sample and memorize the output A(n) for a specific time, and use the average of the sampled output A(n) as the threshold SH.

The output Sig(e) for energy detection in the output of the signal conversion circuit Pros(n) is all input to the addition circuit 50A, and all are added in accordance with the number of photodiode arrays PDA, and the cumulative values thereof It is output as the total energy E incident on the detector D.

The output Sig(p) for position detection in the output of the signal conversion circuit Pros(n) is all input to the incident position detecting circuit 50B, and the photodiode array PDA is incident on the photodiode array PDA, and the result is determined as a gamma ray. The incident position P is output. The incident position detecting circuit 50B selects the largest of the N signals input thereto, or obtains the position of the center of gravity of the gamma ray incident based on the distribution of the respective signal intensities, and outputs a signal corresponding to the position of the center of gravity. Furthermore, this can also be achieved by adopting a configuration in which a voltage dividing circuit is used, that is, for example, a connection point between resistors in which a plurality of resistors are connected in series, and each output Sig(p) is input.

The output Sig(t) for timing detection in the output of the signal conversion circuit Pros(n) is all input to the timing detection circuit 50C, and outputs the timing T of the gamma ray input to the detector D. The timing detection circuit 50C may include an OR circuit. That is, the square wave pulse signals output from the AD conversion circuit A4 connected to each photodiode array PDA are high level. At the time of shape, the timing signal T becomes a high level.

Next, the configuration of each photodiode array PDA will be described. A photodiode array PDA is formed in the photo-sensing region of the semiconductor wafer.

4 is a circuit diagram of a photodiode array PDA in one photo-sensing region. The photodiode array PDA has a plurality of photodiodes PD and arc extinguishing resistors R1 connected in series to the respective photodiodes PD. The cathodes of the respective photodiodes PD are connected to each other, and the anodes are connected to each other via the arc extinguishing resistor R1. A plurality of photodiode PDs are two-dimensionally arranged.

Also, all the arc extinguishing resistors R1 are connected to the electrode pads PAD. In the case of using a cathode of the photodiode PD as a substrate in a semiconductor wafer, the substrate potential is connected to the ground GND, and a signal is extracted from the electrode pad PAD serving as an anode. Further, the cathode and the anode of the photodiode may be replaced and used. Although the conductivity type of the semiconductor wafer is N-type and P-type, the same function can be exhibited even if they are replaced with each other.

Furthermore, the photodiode PD is an avalanche photodiode (APD) operating in a Geiger mode. In the Geiger mode, a reverse voltage (reverse bias voltage) greater than the APD's breakdown voltage is applied between the anode/cathode of the APD. That is, a potential of (-) is applied to the anode, and a potential of (+) is applied to the cathode. The polarity of the equipotentials is relative, and a potential can also be set to the ground potential.

Fig. 5 is a longitudinal cross-sectional view showing a photodetector having a supporting substrate (in the case where one semiconductor wafer is used). In the following, an element in which a semiconductor wafer and a support substrate are combined is referred to as a photodetection module M1. Further, actually, a plurality of semiconductor wafers (photodiode arrays) are arranged in two dimensions in the photodetector D.

The above-described photodiode array PDA is formed on the light sensing region of the semiconductor wafer S1. When the semiconductor wafer S1 is viewed from a direction perpendicular to the thickness direction, the photosensitive region is set to a quadrangle and is located substantially at the center of the semiconductor wafer S1. Further, the support substrate SB1 includes an insulator such as a resin or a ceramic for accommodating the concave portion of the semiconductor wafer S1, and is formed in the concave portion. The wiring E2 is provided on the bottom surface, and the wiring E2 is electrically connected to the internal wiring (not shown) of the support substrate SB1, and the output of the semiconductor wafer S1 is extracted to the outside through the internal wiring.

In the photodetecting module M1 of FIG. 5A, the semiconductor wafer S1 is attached to the bottom surface of the concave portion, and the electrode for output (connected to the anode) provided on the surface of the semiconductor wafer S1 is connected to the wiring via the bonding wire W. E2. The semiconductor substrate (for example, the potential of the cathode) of the semiconductor wafer S1 is electrically connected to a ground electrode (not shown) provided on the bottom surface of the concave portion. The first reflector (reflection film) RF1 is fixed to the opening end surface of the light incident surface side of the support substrate SB1. Further, in the concave portion of the support substrate SB1, the resin J that is transparent to the light is filled, and the semiconductor wafer S1 is fixed in the concave portion. The first reflector RF1 can reflect the light generated in the scintillator toward the scintillator. Since the second reflector is formed on the side surface of the scintillator (for example, the side surface of the columnar crystal), the light reflected by the first reflector RF1 is reflected again by the second reflector and is incident on the photodiode array.

In the light detecting module M1 of FIG. 5(B), only the structure of the first reflector RF1 is different from that of the structure of FIG. 5(A), and other structures are the same. In the case of FIG. 5(B), the first reflector RF1 extends from the opening end surface of the support substrate SB1 to the opening of the concave portion, and is in contact with the resin J filled in the concave portion. Thereby, more light generated in the scintillator can be reflected.

In the photodetecting module M1 of FIG. 5(C), the semiconductor wafer S1 is fixed to the wiring E2 provided on the bottom surface of the concave portion via the conductive bump electrode BE. The bump electrode BE is electrically connected to the anode on the surface side of the semiconductor wafer S1 (refer to FIG. 13). The semiconductor substrate (for example, the potential of the cathode) of the semiconductor wafer S1 is similarly electrically connected to a ground electrode (not shown) provided on the bottom surface of the concave portion by a bump electrode. The first reflector (reflection film) RF1 is fixed to the opening end surface of the light incident surface side of the support substrate SB1. Further, the concave portion of the support substrate SB1 is filled with a resin J that can transmit fluorescence, and the semiconductor wafer S1 is fixed in the concave portion. Since the second reflector is formed on the side surface of the scintillator (for example, the side surface of the columnar crystal), the light reflected by the first reflector RF1 is reflected again by the second reflector and then incident on the photodiode array. Column.

In the light detecting module M1 of FIG. 5(D), only the structure of the first reflector RF1 is different from that of the structure of FIG. 5(C), and the other structures are the same. In the case of FIG. 5(D), the first reflector RF1 extends from the opening end surface of the support substrate SB1 to the opening of the concave portion, and is in contact with the resin J filled in the concave portion. Thereby, more light generated in the scintillator can be reflected.

As the material of the first reflector RF1, a metal film containing aluminum, gold, stainless steel or the like or a highly reflective white photoresist can be used. Further, as the material of the second reflector RF2 (see FIG. 6) provided on the side wall of the scintillator, a multilayer film using a polyester resin can be used.

Further, when the first reflector RF1 of any one of the structures is viewed from the thickness direction thereof, the shape is a quadrangular ring shape (angular ring shape), and the light sensing region of the semiconductor wafer S1 is located at the opening of the first reflector RF1. Inside.

Fig. 6(A) is a side view of the detector D in which a photodetector D1 having a plurality of photodetecting modules M1 and a scintillator SC are combined.

The photodetector D1 has a mounting substrate SB2 and a photodetecting module M1 that is two-dimensionally fixedly disposed on the mounting substrate SB2. The surface of the first reflector RF1 is in contact with the light emitting surface of the scintillator SC. The scintillator SC is divided into a plurality of light transmitting regions HD, and each of the light sensing regions (photodiode array PDA) is opposed to each of the light transmitting regions HD. Further, the relationship between the light-transmitting region HD and the light-sensing region is preferably one-to-one correspondence, but it is not always necessary to correspond to one-to-one correspondence.

When an energy ray such as a gamma ray is incident on the scintillator, the scintillator SC emits light. In the figure, three light-transmitting regions HD of the scintillator SC are shown. However, since these two-dimensionally arranged, there are a total of nine light-transmitting regions HD. The second reflector RF2 is provided between the light transmission regions HD of the scintillator SC. The second reflector RF2 completely covers all of the four side faces (surfaces parallel to the thickness direction) of the quadrangular prism-shaped light transmission region HD to constitute a light guide structure. The four side faces surround the surface in the thickness direction of the light transmission region HD, and in addition, The incident surface of the measuring line (the surface opposite to the semiconductor wafer) is provided with the second reflector RF2 to cover the side surface of the fifth surface. The light (fluorescence) generated in the scintillator SC is reflected by the side wall (second reflector RF2) of the light transmission region HD as indicated by the arrow, and reaches the photodetection module M1. A portion of the light is incident on the light sensing region of the semiconductor wafer S1, and the remaining light is reflected by the first reflector RF1 and returned to the scintillator SC again. The light that is reflected again in the scintillator SC is also repeatedly reflected inside, and a large amount of light is finally incident on the light sensing region of the semiconductor wafer S1.

Fig. 6(B) is a side view of the detector D in which a photodetector D1 having a plurality of photodetecting modules M1 and a scintillator SC are combined. The structure of FIG. 6(B) is different from that of FIG. 6(A) in that the first reflector RF1 is laterally extended, and the other aspects are the same. That is, the length (=width) of the first reflector RF1 in the direction perpendicular to the thickness direction is larger than the width of the support substrate SB1, and there is a gap between the adjacent support substrates SB1, but the first reflector is also provided above the gap. RF1 can reflect more light.

Further, the first reflector RF1 may be attached to the light exit surface of the scintillator SC.

Fig. 7 is a side view of a detector D in which a photodetector (including a plurality of semiconductor wafers and a mounting substrate) D1 and a scintillator SC are combined. The structure of FIG. 7 is different from that shown in FIG. 6(B) in that the semiconductor wafer S1 is directly fixed to the mounting substrate SB2, and the first reflector RF1 is attached to the light emitting surface of the scintillator SC. The first reflector RF1 has an opening for causing light to enter the semiconductor wafer S1. Since the semiconductor wafer S1 is arranged two-dimensionally, the opening of the first reflector RF1 is also arranged two-dimensionally in accordance with this. The other aspects of the configuration of Fig. 7 are the same as those shown in Fig. 6(B), and exert the same effects.

Fig. 8 is a side view (A) and a plan view (B) of a detector in which a photodetector and a scintillator are combined. In the plan view, the description of the scintillator is omitted, and the position of the second reflector RF2 is indicated by a chain line, and the state in which a plurality of openings of the first reflector RF1 are visible is shown.

The structure of FIG. 8 is different from that shown in FIG. 6(B) in that a plurality of support substrates are provided. SB1 is set to the shared support substrate SB1, and other structures are the same as those shown in FIG. 6(B). Further, in the support substrate SB1, a plurality of concave portions are provided, and the semiconductor wafer S1 is disposed in each of the concave portions.

Further, the size of the opening of the first reflector RF1 can be set to various states as shown in FIG. 5. That is, the opening size of the rectangular (square) first reflector RF1 may be larger or smaller than or smaller than the rectangular (square) semiconductor wafer S1 in plan view. In Fig. 6(A), the state is represented by representing all the states. Further, in the case of the opening size of the first reflector RF1, when it is smaller than the size of the semiconductor wafer S1, as long as it is larger than the size of the photo-sensing region in which the photodiode array PDA is formed, the light incidence efficiency is not reduced. Small, so better. Further, in FIG. 6(B), the case where the opening size of the first reflector RF1 is smaller than the size of the semiconductor wafer S1 is shown.

In this case, the first reflector RF1 extends from the opening end surface of the support substrate SB2 beyond the gap between the inner side surfaces of the recesses of the semiconductor wafer S1 and the support substrate SB in a plan view, and extends to the semiconductor wafer S1. The position of the peripheral area (the area around the light-sensing area) overlaps.

Furthermore, in the case of this configuration, the mounting substrate SB2 may be omitted.

In this configuration, since the first reflector RF1 is integrated, there is an advantage that it is easy to manufacture.

Fig. 9 is a side view (A) and a plan view (B) of a detector in which a photodetector and a scintillator are combined. In the plan view, the description of the scintillator is omitted, and the position of the second reflector RF2 is indicated by a chain line, indicating that a plurality of openings of the first reflector RF1 are visible.

The configuration of FIG. 9 is different from that shown in FIG. 8 in that the support substrate SB1 does not have a recess and increases the size of the semiconductor wafer S1, and other configurations are the same as those shown in FIG. However, the size of the photo-sensing region in which the photodiode array PDA is formed in the semiconductor wafer S1 is not changed. Further, in the figure (B), the outer edge of the second reflector RF2 overlaps with the outer edge of the semiconductor wafer S1, and therefore, the same line is used for convenience. Furthermore, in this configuration In the case of the case, the mounting substrate SB2 may be omitted.

The region of the semiconductor wafer S1 outside the light-sensing region can be set to a semiconductor having a low impurity concentration, so that conduction does not occur. Spaces such as trenches may be isolated around the light sensing region.

Fig. 10 is a circuit diagram (A) showing one photodiode PD and a quenching resistor R1, and a diagram (B) showing a unit structure in the semiconductor wafer for realizing the configuration. Since the photodiode array is formed in the semiconductor wafer, the unit structure of the figure is formed in two dimensions in two dimensions.

The semiconductor region 12 constituting the semiconductor substrate is a N-type (first conductivity type) semiconductor substrate containing Si. The anode of the photodiode PD is a P-type semiconductor region 13 (14), and a cathode is an N-type semiconductor region 12. When a photon is incident on the photodiode PD as the APD, photoelectric conversion is performed inside the substrate to generate photoelectrons. Avalanche multiplication occurs in the vicinity of the pn junction interface of the first semiconductor region 13, and the amplified electron group flows toward the electrode formed on the back surface of the semiconductor region 12. In other words, when photons are incident on the photodiode PD, they are multiplied, and are electrically extracted from the electrode E3 electrically connected to the resistor R1 (resistance portion 4) as a signal. The electrode E3 is connected to the above electrode pad PAD.

Further, the resistor portion 4 (R1) is formed on the insulating layer 16 (17) on the semiconductor region P, and is electrically connected to the semiconductor region 14 having a higher impurity concentration than the semiconductor region 13. An electrode E4 for imparting a potential to the substrate is provided on the back surface of the semiconductor substrate, and the electrode E4 is connected to the ground potential GND.

A specific structural example of the photodiode array constituting the semiconductor wafer will be described.

11 is a perspective view of a semiconductor wafer S1 including a photodiode array, and FIG. 12 is a longitudinal cross-sectional view taken along line A-A of the semiconductor wafer S1.

A light receiving region is provided on a surface side of the semiconductor substrate including Si in the photodiode array. The light receiving region includes a plurality of light detecting portions 10 (constituting the above one photodiode) PD), the light detecting units 10 are two-dimensionally arranged in a matrix. In addition, in FIG. 11, three rows and three rows of light detecting sections 10 are disposed in addition to the electrode E3 at the center, and the light detecting sections 10 constitute the light receiving region, but the number of the light detecting sections 10 may be more or less. It can also form a one-dimensional configuration.

A wiring pattern (upper surface electrode) 3C (readout wiring TL) for signal reading patterned in a lattice shape is disposed on the surface of the substrate. In addition, in FIG. 11, in order to understand an internal structure, the description of the insulating layer 17 shown in FIG. 12 is abbreviate|omitted. A light detecting region is defined in the opening of the grid-like wiring pattern 3C. The light detecting unit 10 is disposed in the light detecting region, and the output of the light detecting unit 10 is connected to the wiring pattern 3C.

The lower surface electrode E4 is provided on the back surface of the substrate as needed. However, when the contact resistance between the bump electrode provided on the back surface and the semiconductor substrate is small, it may not be used. Therefore, when the driving voltage of the photodetecting portion 10 is applied between the wiring pattern 3C as the upper surface electrode and the lower surface electrode E4, the photodetection output can be extracted from the wiring pattern 3C.

In the pn junction, the p-type semiconductor region constituting the pn junction constitutes an anode, and the n-type semiconductor region constitutes a cathode. When a driving voltage is applied to the photodiode in such a manner that the potential of the p-type semiconductor region is higher than the potential of the n-type semiconductor region, it is a forward bias voltage; and is applied to the photodiode In the case of the opposite driving voltage, it is a reverse bias voltage.

The driving voltage is a reverse bias voltage applied to the photodiode formed by pn bonding inside the photodetecting portion 10. When the driving voltage is set to be higher than the breakdown voltage of the photodiode, avalanche collapse occurs in the photodiode, and the photodiode operates in the Geiger mode. That is, each photodiode system avalanche photodiode (APD).

A resistor portion (arcing resistor R1) 4 electrically connected to one end of the photodiode is disposed on the surface of the substrate. One end of the resistor portion 4 constitutes a contact electrode 4A electrically connected to one end of the photodiode via a contact electrode of another material located directly below, and the other end is configured to be in contact with the wiring pattern 3C for signal readout and electrically connected thereto Connected contact electrode 4C. That is, the resistance portion 4 of each photodetecting portion 10 includes a contact electrode 4A connected to the photodiode a resistive layer 4B that extends in a curve continuous with the contact electrode 4A; and a contact electrode 4C that is continuous with the terminal portion of the resistive layer 4B. Further, the contact electrode 4A, the resistance layer 4B, and the contact electrode 4C include a resistance layer of the same resistance material, and the like is continuous.

As described above, the resistor portion 4 extends in a curve from the electrical connection point with the photodiode, and is connected to the wiring pattern 3C for signal readout. Since the resistance value of the resistor portion 4 is proportional to its length, the resistance portion 4 can be extended in a curve to increase the resistance value. Further, by the presence of the resistor portion 4, the surface energy level of the semiconductor region existing underneath can be stabilized, and the output can be stabilized.

In the example shown in FIG. 11 , the wiring pattern 3C includes a shape surrounding the respective photodetecting portions 10, but the shape of the wiring pattern 3C is not limited thereto, and for example, may be formed to surround the shape of two or more photodetecting portions 10, or It is formed in a shape that surrounds one or more light detecting portions 10. Further, the resistive layer 4B can be disposed on the outline of the semiconductor region 14 as viewed from the thickness direction.

One end of the photodiode included in the photodetecting portion 10 is connected in principle to the wiring pattern 3C of the same potential at all positions, and the other end is connected to the surface electrode E4 below the potential of the supply substrate. That is, the photodiodes of all the photodetecting sections 10 are connected in parallel.

The common electrode E3 is provided on the surface of the semiconductor wafer S1, and the readout wiring TL is all connected to the common electrode E3. In FIG. 13, the cross-sectional structure around the common electrode E3 and the structure of the wiring board disposed under the bump electrode will be described.

In the example shown in FIG. 11, each of the contact electrodes 4A is located at the central portion of each of the photodetection regions surrounded by the wiring pattern 3C. Moreover, the two-dimensional pattern of the resistance layer 4B includes a shape extending in such a manner as to rotate around the circumference of the contact electrode 4A. The contact electrode 4A is disposed in the central portion of each of the photodetecting regions, and the resistive layer 4B is disposed so as to rotate around the periphery of the contact electrode 4A, whereby the length of the resistive layer 4B can be set long.

As shown in FIG. 12, each of the photodetecting sections 10 includes a first semiconductor region (layer) 12 of a first conductivity type (n-type) and a second semiconductor region (semiconductor layer 13 of a second conductivity type (p-type) and The high impurity concentration region 14) constitutes a pn junction with the first semiconductor region 12.

The first contact electrode 3A is in contact with the high impurity concentration region (semiconductor region) 14 of the second semiconductor region. The high impurity concentration region 14 is a diffusion region (semiconductor region) formed by diffusing impurities in the semiconductor layer 13, and has a higher impurity concentration than the semiconductor layer 13. In the present example (type 1), a p-type semiconductor layer 13 is formed on the n-type first semiconductor region 12, and a p-type high-concentration impurity region 14 is formed on the surface side of the semiconductor layer 13. Thereby, the pn junction constituting the photodiode is formed between the first semiconductor region 12 and the semiconductor layer 13.

Further, as the layer structure of the semiconductor substrate, a structure in which the conductive type and the layer structure are reversed may be employed. That is, the structure of (type 2) is formed in such a manner that an n-type semiconductor layer 13 is formed on the p-type first semiconductor region 12, and an n-type high concentration impurity is formed on the surface side of the semiconductor layer 13. Area 14.

Further, a pn junction interface may be formed on the surface layer side. In this case, the (type 3) structure has a structure in which an n-type semiconductor layer 13 is formed on the n-type first semiconductor region 12, and a p-type high concentration is formed on the surface side of the semiconductor layer 13. Impurity area 14. Further, in the case of this configuration, a pn junction is formed at the interface between the semiconductor layer 13 and the semiconductor region 14.

Of course, in this configuration, the conductivity type can also be reversed. In other words, the (type 4) structure has a structure in which a p-type semiconductor layer 13 is formed on the p-type first semiconductor region 12, and an n-type high-concentration impurity region 14 is formed on the surface side of the semiconductor layer 13. .

Figure 13 is a cross-sectional view showing a peripheral portion of a common electrode.

The semiconductor region 12 has an N-type (first conductivity type) semiconductor region 1PC. The semiconductor region 1PC is formed on the light incident surface side of the semiconductor region 12. In the semiconductor region 1PC, the PN formed between the N-type semiconductor region 12 and the P-type first semiconductor region 13 is prevented from being exposed to the through hole TH in which the through electrode TE is disposed. The semiconductor region 1PC is formed at a position corresponding to the through hole TH (through electrode TE).

An insulating layer 16 is formed on the surface of the second semiconductor region 14, and a total of The electrode E3 and the readout wiring TL are used. The common electrode E3 and the readout wiring TL are covered by the insulating layer 17. The back surface 1Nb of the semiconductor region 12 is covered with an insulating layer L3. The insulating L3 has an opening through which the through electrode TE passes. The common electrode E3 is in contact with and electrically connected to the through electrode TE, and the bump electrode BE may be in contact with the through electrode TE via the under bump metal BM, but is provided at another position.

That is, the through electrode TE is located on the insulating layer L3 on the back surface of the semiconductor substrate along the inner surface of the through hole. A contact hole may be formed in the insulating layer L3 to expose the through electrode TE, and the bump electrode BE may be provided on the exposed surface via the bump under the metal BM. Further, the passivation film PF at the bottom of the through hole TH can be removed, and the under bump metal BM can be provided in contact with the through electrode TE of the removed region. Depending on the design, bump electrodes can also be placed on the under bump metal BM at the bottom.

The inner surface of the through hole TH provided in the semiconductor region 12 is covered with an insulating layer L2, and the insulating layer L2 is continuous with the insulating layer L3. The through electrode TE and the insulating layer L3 are covered with a passivation film (protective film) PF. An electroless plating method can be used for the method of forming the under bump metal. As a method of forming the bump electrode BE, a method of mounting a solder ball or a printing method can be used.

As described above, each of the semiconductor wafers includes a semiconductor region 12 having a plurality of photodetecting portions 10 arranged in a two-dimensional shape, an insulating layer 16 formed on the surface of the semiconductor region 12, and a common electrode E3 disposed in the insulating region. The layer 16 is provided with a readout wiring TL electrically connecting the arcing resistor R1 of each of the photodetecting sections 10 to the common electrode E3, and a through electrode TE extending from the common electrode E3 via the through hole TH of the semiconductor region 12. To the back of the semiconductor region 12.

Further, each photodiode array PDA includes a through electrode TE that is independent or shared. The through electrode TE is formed to penetrate the semiconductor region 12 from the opposite principal surface 1Na side to the main surface 1Nb side. That is, the through electrode TE is disposed in the through hole TH penetrating the semiconductor region 12. The insulating layer L2 is also formed in the through hole TH. Therefore, the through electrode TE is disposed in the through hole TH via the insulating layer L2. One end of the through electrode TE is connected to the common electrode E3, and the readout wiring is TL is connected to the through electrode TE.

Each of the photodetecting sections 10 includes a photodiode PD including an APD, and each APD includes a semiconductor region 12 of a first conductivity type and a second semiconductor region of a second conductivity type, which is pn-bonded to the semiconductor region 12 and is output. Carrier. A resistor R1 (resistor 4) is electrically connected to the second semiconductor region 14 of the APD. The bump electrode BE electrically connects the through electrode TE to the electrode or the wiring E2 (see FIG. 5) on the support substrate.

The resistor R1 has a higher resistivity than the common electrode E3 connected to the resistor R1. The resistor R1 contains, for example, polysilicon or the like. As a method of forming the resistor R1, a CVD (Chemical Vapor Deposition) method can be used. Examples of the resistor constituting the resistor R1 include SiCr, NiCr, TaNi, FeCr, and the like.

The electrode and the through electrode TE contain a metal such as aluminum. In the case where the semiconductor substrate contains Si, as the electrode material, AuGe/Ni or the like is commonly used in addition to aluminum. As a method of forming the electrode and the through electrode TE, a sputtering method can be used.

As the P-type impurity in the case where Si is used, a group 3 element such as B can be used, and as the N-type impurity, a group 5 element such as N, P or As can be used. The N-type and P-type which are conductive types of semiconductors can be made to function even if they are replaced by each other. As a method of adding such impurities, a diffusion method or an ion implantation method can be used.

As the material of the insulating layer, SiO ₂ or SiN can be used. As a method of forming the insulating layer, when each insulating layer contains SiO ₂ , a thermal oxidation method or a sputtering method can be used.

Further, preferred ranges of the conductivity type, impurity concentration, and thickness of each layer of the semiconductor structure are as follows.

(type 1)

Semiconductor region 12 (conductivity type / impurity concentration / thickness)

(n type/5×10 ¹¹ ~1×10 ²⁰ cm ^-3 /30~700μm)

Semiconductor region 13 (conductivity type / impurity concentration / thickness) (p type / 1 × 10 ¹⁴ ~ 1 × 10 ¹⁷ cm ^-3 /2 ~ 50 μm)

Semiconductor region 14 (conductivity type / impurity concentration / thickness)

(p type / 1 × 10 ¹⁸ ~ 1 × 10 ²⁰ cm ^-3 /10 ~ 1000 nm)

(type 2)

Semiconductor region 12 (conductivity type / impurity concentration / thickness)

(p type/5×10 ¹¹ ~1×10 ²⁰ cm ^-3 /30~700μm)

Semiconductor region 13 (conductivity type / impurity concentration / thickness)

(n type / 1 × 10 ¹⁴ ~ 1 × 10 ¹⁷ cm ^-3 /2 ~ 50 μm)

Semiconductor region 14 (conductivity type / impurity concentration / thickness)

(n type / 1 × 10 ¹⁸ ~ 1 × 10 ²⁰ cm ^-3 /10 ~ 1000 nm)

(Type 3) Semiconductor region 12 (conductivity type / impurity concentration / thickness)

(n type/5×10 ¹¹ ~1×10 ²⁰ cm ^-3 /30~700μm)

Semiconductor region 13 (conductivity type / impurity concentration / thickness)

(n type / 1 × 10 ¹⁴ ~ 1 × 10 ¹⁷ cm ^-3 /2 ~ 50 μm)

Semiconductor region 14 (conductivity type / impurity concentration / thickness)

(p type / 1 × 10 ¹⁸ ~ 1 × 10 ²⁰ cm ^-3 /10 ~ 1000 nm)

(Type 4) Semiconductor region 12 (conductivity type / impurity concentration / thickness)

(p type/5×10 ¹¹ ~1×10 ²⁰ cm ^-3 /30~700μm)

Semiconductor region 13 (conductivity type / impurity concentration / thickness)

(p type / 1 × 10 ¹⁴ ~ 1 × 10 ¹⁷ cm ^-3 /2 ~ 50 μm)

Semiconductor region 14 (conductivity type / impurity concentration / thickness)

(n type / 1 × 10 ¹⁸ ~ 1 × 10 ²⁰ cm ^-3 /10 ~ 1000 nm)

Fig. 14 is a graph showing the relationship between the elapsed time (ns) from the incidence of light and the output voltage (V) from the photodetector (semiconductor wafer).

In the case where LYSO:Ce is used as the scintillator, in the PET apparatus, about 18,000 photons are generated with respect to the energy of the target annihilation gamma ray 511 keV. Detecting by the output pulse of a relatively early incident photon in a photon generated in a TOF-PET device Timing out.

In the figure, the output voltage in the case where the size of one semiconductor wafer included in the photodetector is 1 × 1 mm ² , 3 × 3 mm ² , and 6 × 6 mm ² is shown. As can be seen from the figure, the smaller the wafer size, the higher the peak value of the output voltage which rises when light is incident, and the more accurately the peak position can be detected. When the wafer size is small, the parasitic capacitance of the semiconductor wafer becomes small, so that the peak value of the output with respect to the incident light rises sharply. In this case, precise time measurement can be achieved in the TOF type analysis. Therefore, in order to accurately perform time measurement, it is preferable to reduce the size of the semiconductor wafer.

However, when the semiconductor wafer is reduced, the area of the photosensitive region is reduced, so that there is a tendency that the energy cannot be accurately detected. However, in the above configuration, since the first reflector RF1 and the second reflector RF2 are used, the incident can be made. The amount of light is increased, so that energy detection can be performed accurately.

As described above, the detector D includes a photodetector D1 having a semiconductor wafer S1 and a scintillator SC disposed on the photodetector D1 and divided into a plurality of optical transmission regions HD. a detector D; wherein the semiconductor wafer S1 includes: a photosensitive region including a plurality of APDs operating in a Geiger mode; a plurality of arc extinguishing resistors (resistors R1(4)) respectively connected to the respective APDs; and an output terminal (electrode pad PAD) electrically connected to each of the arc extinguishing resistors R1; the light sensing region is opposite to the light transmitting region HD, and the detector D includes: a first reflector RF1, which is interposed between the photodetector D1 and The scintillator SC surrounds the light sensing region, and the second reflector RF2 is disposed between the light transmitting regions HD of the scintillator SC.

In the detector D, the first reflector RF1 and the second reflector RF2 are provided, and the energy line incident on the scintillator SC is converted into fluorescence, and is reflected by the second reflector RF2 and transmitted in the light transmission region HD. And reach the light sensing area. Since the first reflector RF1 is provided around the photosensitive region, the light incident on the first reflector RF1 is reflected, but is again reflected by the second reflector RF2, and the probability of finally entering the photosensitive region becomes high. Thus, light The amount of light ultimately received by the sensing area is increased, and the energy of the precise incident energy line can be detected.

Further, when viewed from the thickness direction of the scintillator SC, the second reflector RF2 surrounds the photosensitive region. In this case, the light propagating in one light-transmitting region HD can be surely conducted into one photosensitive region, and the unevenness of the output per measurement can be suppressed.

As described above, the semiconductor chip has a small time resolution and is excellent in time resolution. In contrast, the area of each light-sensing area (PDA) is smaller than the area of each of the light-transmitting areas HD perpendicular to the thickness direction of the scintillator SC.

Further, when the photodetector D1 further includes the support substrate SB1 having the concave portion for accommodating the semiconductor wafer S2, the photodetector D1 is protected by the support substrate SB1, and becomes easy to handle. The recess J is filled with the resin J, and the resin J is brought into contact with the semiconductor wafer S1 to fix the semiconductor wafer to the support substrate, and the semiconductor wafer is protected.

Further, when the first reflector RF1 is formed on the support substrate SB1 and the resin J to be filled, the resin J can be filled in the gap between the recess and the semiconductor wafer S1, so that the first reflection can be formed on the resin of the portion. The body RF1 increases the amount of reflection of the first reflector RF1 and increases the amount of light detected during energy measurement.

Further, the semiconductor wafer S1 has a through electrode TE electrically connected to the APD and penetrating through the semiconductor wafer S1, and the through electrode TE is electrically connected to the bump electrode BE disposed in the concave portion of the support substrate. In this case, the through electrode TE passes through the bottom side of the concave portion of the semiconductor wafer S1, so that the scintillator SC and the semiconductor wafer S1 can be brought closer to each other without wire bonding, thereby enabling the scintillator SC to generate more fluorescent light. Attenuated into the light sensing area.

Further, the detector D includes a photodetector D1 including a semiconductor wafer S1 and a support substrate SB1 having a recess for accommodating the semiconductor wafer S1, and a scintillator SC disposed on the photodetector D1 and divided into a plurality of light-transmitting regions HD; wherein, the semiconductor wafer S1 comprises: a light-sensing region comprising a plurality of APDs operating in a Geiger mode; A plurality of arc extinguishing resistors R are respectively connected to the respective APDs; and output terminals (electrode pads PAD) electrically connected to the respective arc extinguishing resistors R; and the light sensing regions are opposite to the light transmitting regions HD.

In this case, even when the semiconductor wafer S1 becomes small, the semiconductor wafer S1 can be protected by the support substrate SB1, and the amount of incident light can be increased as described above; The determination of the energy detection is performed.

As described above, the radioactive detection device is configured such that the radiation detecting unit is arranged two-dimensionally, and the radiation detecting unit is provided with a scintillator on the photodetecting unit including the APG array in the Geiger mode operation; The light detecting unit comprises: an APD array area, wherein a plurality of APD units arranged in a Geiger mode are arranged in two dimensions; and a reflective area surrounding the APD array area and reflecting incident light toward the scintillator; corresponding to each light detecting unit The side wall of each scintillator is formed with a reflection film which surrounds the APD array region in which the APD unit is arranged two-dimensionally when viewed from the incident direction of the radiation.

D‧‧‧Detector

D1‧‧‧Photodetector

HD‧‧‧Light transmission area

M1‧‧‧Light detection module

PDA‧‧‧Photodiode Array

RF1‧‧‧1st reflector

RF2‧‧‧2nd reflector

S1‧‧‧Semiconductor wafer

SB1‧‧‧Support substrate

SB2‧‧‧ mounting substrate

SC‧‧‧Scintillator

Γ‧‧‧ gamma rays

Claims (8)

A detector comprising: a photodetector having a semiconductor wafer; and a scintillator disposed on the photodetector and divided into a plurality of light transmitting regions; and the detector is characterized by: the semiconductor wafer The method includes: a light sensing area, comprising a plurality of APDs operating in a Geiger mode; a plurality of arc extinguishing resistors respectively connected to the respective APDs; and an output terminal electrically connected to each of the arc extinguishing resistors; the light sensing area Facing the light transmission region, the detector includes: a first reflector interposed between the photodetector and the scintillator to surround the light sensing region; and a second reflector disposed on the light reflector region Between the light transmission areas of the scintillator. The detector of claim 1, wherein the second reflector surrounds the light sensing region as viewed in a thickness direction of the scintillator. The detector of claim 1 or 2, wherein an area of each of the light sensing regions is smaller than an area of each of the light transmitting regions perpendicular to a thickness direction of the scintillator. The detector of any one of claims 1 to 3, wherein the photodetector further comprises a support substrate having a recess for receiving the semiconductor wafer. The detector of claim 4, wherein the recess is filled with a resin. The detector according to claim 5, wherein the first reflector is formed on the support substrate and the resin to be filled. The detector of any one of claims 4 to 6, wherein the semiconductor wafer has a through electrode electrically connected to the APD and penetrates the semiconductor wafer, and The through electrode is electrically connected to the bump electrode disposed in the recess. A detector comprising: a photodetector including a semiconductor wafer; and a support substrate having a recess for receiving the semiconductor wafer; and a scintillator disposed on the photodetector and divided into a plurality of light transmission regions And the detector is characterized in that: the semiconductor wafer comprises: a light sensing region comprising a plurality of APDs operating in a Geiger mode; a plurality of arc extinguishing resistors respectively connected to the respective APDs; and an output terminal, the electricity Sexually connected to each of the arc extinguishing resistors; and the light sensing region is opposite to the light transmitting region.