TW201428923A - Semiconductor device and its process of manufacture - Google Patents

Semiconductor device and its process of manufacture Download PDF

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TW201428923A
TW201428923A TW102141769A TW102141769A TW201428923A TW 201428923 A TW201428923 A TW 201428923A TW 102141769 A TW102141769 A TW 102141769A TW 102141769 A TW102141769 A TW 102141769A TW 201428923 A TW201428923 A TW 201428923A
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layer
substrate
metal
alloy
organic polymer
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TW102141769A
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Chinese (zh)
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Vincent Mevellec
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Alchimer
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners

Abstract

The present invention relates to a semiconductor device comprising a semiconducting substrate having interconnection structures or through silicon vias in which the surface of the structures is covered with a polymer layer and then with a metal layer, the polymer layer simultaneously fulfilling the role of electrical insulator between the semiconductor and the metal layer and the role of barrier to the possible migration, toward the semiconducting substrate, of the metal ions originating from the metal layer. The invention also relates to a process for the manufacture of this device. Application: Metallization of very thin interconnections and of through silicon vias in 3D integrated circuits.

Description

半導體裝置及其製造方法 Semiconductor device and method of manufacturing same

本發明大體上係關於一種半導體裝置,其簡化結構係在絕緣層與傳導性層之間不包含對金屬離子自傳導性層向半傳導性基材的擴散形成屏障的金屬材料。 SUMMARY OF THE INVENTION The present invention generally relates to a semiconductor device having a simplified structure that does not include a metal material that forms a barrier to diffusion of metal ions from the conductive layer to the semiconducting substrate between the insulating layer and the conductive layer.

本發明亦係關於一種製造該半導體裝置的方法,其在於先後利用電絕緣層及金屬層塗覆基材表面。與先前技術之方法相比,該方法包括有限的階段數。 The present invention is also directed to a method of fabricating the semiconductor device in which the surface of the substrate is coated with an electrically insulating layer and a metal layer. The method includes a limited number of stages compared to prior art methods.

本發明發現主要在微電子領域中藉由銅使印刷電路之矽穿孔(TSV)及互連組件金屬化的應用。 The present inventors have found an application for the metallization of tantalum perforations (TSV) and interconnect components of printed circuits by copper primarily in the field of microelectronics.

微電子裝置包括兩種類型的傳導性結構網絡:互連,其係呈相當細的線的形式且運行於半傳導性基材之表面以使處在同一層位的電晶體及其他組件電連接;及矽穿孔,其係使若干層位之基材電連接以用於三維整合之具有更大尺寸之縱向空腔。 Microelectronic devices include two types of conductive structural networks: interconnects that are in the form of relatively thin lines and that run on the surface of a semiconducting substrate to electrically connect transistors and other components in the same layer. And 矽 perforations, which are used to electrically connect a plurality of layers of substrates for a three-dimensionally integrated longitudinal cavity having a larger size.

一般利用銅填充欲用於導電之此等結構。其係經介電材料的插入而與半導體矽支撐物絕緣。然而,沈積在該等結構中之傳導性金屬(特定言之銅)具有容易向基材(一般而言二氧化矽或經摻雜之矽)擴散的傾向。因此,需要在傳導性金屬與半傳導性基材之間插入用於金屬離子之擴散的屏障材料,以防止金屬至相鄰介電材料中的任何擴散。若金屬向敏感半傳導性區域遷移,則此極大地改變其性質且使半導體裝置失效。 These structures intended for electrical conduction are typically filled with copper. It is insulated from the semiconductor crucible support by the insertion of a dielectric material. However, the conductive metal (specifically, copper) deposited in such structures has a tendency to easily diffuse into the substrate (generally cerium oxide or doped cerium). Therefore, it is desirable to insert a barrier material for diffusion of metal ions between the conductive metal and the semiconducting substrate to prevent any diffusion of the metal into the adjacent dielectric material. If the metal migrates to the sensitive semiconducting region, this greatly changes its properties and disables the semiconductor device.

因此,使半導體裝置中之傳導性結構金屬化的方法通常包括一系列階段,其包括:- 矽晶圓中之線及矽穿孔的蝕刻;- 蝕刻結構中之絕緣介電材料層之沈積;- 用於防止銅向該絕緣層遷移之屏障層或襯層的沈積;- 藉由銅之電沈積填充該等結構;及- 藉由基材表面之化學機械拋光除去矽晶圓表面的過量銅。 Thus, a method of metallizing a conductive structure in a semiconductor device typically includes a series of stages including: - etching of lines and germanium vias in a germanium wafer; - deposition of an insulating dielectric material layer in an etched structure; Deposition of a barrier layer or liner for preventing migration of copper to the insulating layer; - filling the structures by electrodeposition of copper; and - removing excess copper from the surface of the wafer by chemical mechanical polishing of the surface of the substrate.

在此方法中,因此需要在絕緣體上沈積防止在裝置之操作期間施加之熱及電流密度之效應下產生的金屬原子遷移的屏障層。稱為「用於銅之擴散或遷移之屏障」或簡稱為「屏障」的此層係由金屬或金屬合金(諸如氮化鈦、氮化鉭或鎳/硼合金)組成。 In this method, it is therefore necessary to deposit on the insulator a barrier layer that prevents migration of metal atoms generated under the effect of heat and current density applied during operation of the device. This layer, referred to as "a barrier for diffusion or migration of copper" or simply "barrier", consists of a metal or metal alloy such as titanium nitride, tantalum nitride or nickel/boron alloy.

申請案FR 2 933 425描述在包含矽穿孔之前驅物空腔之p摻雜型矽基材的表面製備具有絕緣層、屏障層及隨後銅晶種層的堆疊。藉由電接枝法在矽上沈積用作絕緣材料的聚(4-乙烯基吡啶)。在聚(4-乙烯基吡啶)與銅層之間內插鎳/硼(用於銅之擴散的屏障材料)。 The application FR 2 933 425 describes the preparation of a stack having an insulating layer, a barrier layer and subsequently a copper seed layer on the surface of a p-doped ruthenium substrate comprising a precursor cavity before the ruthenium perforation. Poly(4-vinylpyridine) used as an insulating material was deposited on the crucible by electrografting. Nickel/boron (a barrier material for diffusion of copper) is interposed between the poly(4-vinylpyridine) and the copper layer.

用於使傳導性結構金屬化之先前技術方法均採用用於防止銅向矽遷移之屏障層或襯層的沈積階段。因此,有利言之,可簡化該等裝置之製造方法,以減少製造該等裝置所需之加工時間及初始材料的數量。 Prior art methods for metallizing conductive structures employ a deposition phase of a barrier layer or liner for preventing migration of copper to the crucible. Thus, advantageously, the manufacturing methods of such devices can be simplified to reduce the processing time and amount of starting materials required to fabricate such devices.

因此,本發明之一個目的在於解決該技術問題,其在於低成本製造在其操作期間歷時可靠的半導體裝置。該目標在於除去如在先前技術中所實踐之利用金屬屏障材料塗覆基材的階段。 Accordingly, it is an object of the present invention to solve the technical problem in that a semiconductor device which is reliable over time during its operation is manufactured at low cost. The goal is to remove the stage of coating the substrate with a metal barrier material as practiced in the prior art.

已發現(且此發現構成本發明之基礎):一些介電化合物展現對金屬離子之電遷移的屏障性質,從而(與所有預期相反)可提供一種不需要在介電材料上沈積金屬屏障材料之電阻層且在電壓下正確地操作的裝置。在本發明之內容中識別的該等介電化合物同時滿足絕緣作用及 屏障作用。 It has been discovered (and this discovery forms the basis of the present invention) that some dielectric compounds exhibit barrier properties to the electromigration of metal ions, thereby (as opposed to all expectations) providing a need to deposit a metal barrier material on a dielectric material. A device that resists the layer and operates correctly at voltage. The dielectric compounds identified in the context of the present invention simultaneously satisfy the insulating effect and Barrier function.

在半導體積體電路(諸如具有高功率、高存儲密度及低損耗之電腦晶片)中,縮小該等結構的尺寸已變得有必要。晶片尺寸之縮小及電路密度之增加因此需要使互連小型化。 In semiconductor integrated circuits, such as computer chips with high power, high storage density, and low loss, it has become necessary to reduce the size of such structures. The reduction in wafer size and the increase in circuit density therefore require miniaturization of the interconnect.

然而,當溝槽達到過小的尺寸時,由於在該等結構中缺乏足夠的空間,因此變得難以(實際上甚至不可能)沈積具有不同材料之若干層。為了填充越來越細的互連結構,因此需要刪除介於基材與金屬之間之某些中間材料層。 However, when the trenches reach an oversized size, it becomes difficult (actually impossible) to deposit several layers having different materials due to the lack of sufficient space in the structures. In order to fill a thinner interconnect structure, it is necessary to remove some intermediate material layer between the substrate and the metal.

本發明之另一個目的在於解決該技術問題,其在於提供一種具有極細互連線(諸如具有小於50nm寬度(例如7nm、10nm或15nm)之互連結構)的新穎裝置。 Another object of the present invention is to solve the technical problem by providing a novel device having a very fine interconnect (such as an interconnect structure having a width of less than 50 nm (e.g., 7 nm, 10 nm, or 15 nm).

為此,本發明提供一種不包含金屬屏障層的新穎裝置。金屬屏障之缺失可節約空間及節約必須經傳導性金屬填充之蝕刻結構的傳導性。 To this end, the present invention provides a novel device that does not include a metal barrier layer. The absence of a metal barrier saves space and saves the conductivity of the etched structure that must be filled with conductive metal.

因此,本發明係關於一種包含具有互連或矽穿孔結構的半傳導性基材的半導體裝置,其中該等結構之表面係先後經聚合物層及金屬層覆蓋,不論該裝置是置於電壓下還是熱應力之效應下,該聚合物層同時滿足介於該半導體與該金屬層之間之電絕緣體的作用及對來自該金屬層之金屬離子向該半傳導性基材之可能遷移的屏障作用。 Accordingly, the present invention is directed to a semiconductor device comprising a semiconducting substrate having an interconnect or tantalum perforated structure, wherein the surface of the structures is successively covered by a polymer layer and a metal layer, regardless of whether the device is placed under voltage Also under the effect of thermal stress, the polymer layer simultaneously satisfies the action of the electrical insulator between the semiconductor and the metal layer and the barrier to possible migration of metal ions from the metal layer to the semiconducting substrate. .

更具體言之,本發明係關於一種包含具有互連結構或矽穿孔之半傳導性或傳導性基材的裝置,其中該半傳導性基材之結構的表面係經有機聚合物層覆蓋,該有機聚合物層自身經覆蓋且與金屬銅層接觸,其特徵在於該聚合物層同時滿足:- 介於該半導體與該金屬層之間之電絕緣體的作用,及 - 對來自該金屬層之金屬離子向該半傳導性基材之遷移的屏障作用,及其特徵在於該裝置不包含對來自金屬層之金屬離子向半傳導性基材之遷移形成屏障的具有金屬性質的材料層。 More particularly, the present invention relates to a device comprising a semiconductive or conductive substrate having an interconnect structure or a perforated substrate, wherein the surface of the structure of the semiconductive substrate is covered by an organic polymer layer, The organic polymer layer itself is covered and in contact with the metallic copper layer, characterized in that the polymer layer simultaneously satisfies: - the role of an electrical insulator between the semiconductor and the metal layer, and a barrier to the migration of metal ions from the metal layer to the semiconducting substrate, and characterized in that the device does not comprise a metal having a barrier to migration of metal ions from the metal layer to the semiconducting substrate The layer of material of nature.

該裝置展現不包含在先前技術中內插於電絕緣層與傳導性金屬之間以限制金屬向矽基材電遷移的金屬材料層(用於金屬離子之擴散的屏障)的優勢。 The device exhibits the advantage of not including the prior art metal intercalation between the electrically insulating layer and the conductive metal to limit the electromigration of the metal to the tantalum substrate (a barrier for diffusion of metal ions).

該裝置展現不包含形成屏障的含有選自由鉭、鈦、鎳及鈷組成之群之金屬的具有金屬性質的材料層的優勢。為在矽基材與傳導性金屬之間建立屏障,先前技術中所用之此層一般係由鉭(Ta)、鈦(Ti)、鎳(Ni)、鈷(Co)、鎳/鎢(NiW)合金、鈷/鎢(CoW)合金、鎳/硼(NiB)合金、鈷/硼(CoB)合金、鎳/磷(NiP)合金、鈷/磷(CoP)合金、氮化鉭(TaN)、氮化鈦(TiN)、鈦/鎢(TiW)合金、氮化鎢/碳化鎢(WCN)或此等材料之組合組成。 The device exhibits the advantage of not including a barrier layer containing a layer of material having a metallic property selected from the group consisting of ruthenium, titanium, nickel and cobalt. In order to establish a barrier between the tantalum substrate and the conductive metal, the layer used in the prior art is generally made of tantalum (Ta), titanium (Ti), nickel (Ni), cobalt (Co), nickel/tungsten (NiW). Alloy, cobalt/tungsten (CoW) alloy, nickel/boron (NiB) alloy, cobalt/boron (CoB) alloy, nickel/phosphorus (NiP) alloy, cobalt/phosphorus (CoP) alloy, tantalum nitride (TaN), nitrogen Titanium (TiN), titanium/tungsten (TiW) alloy, tungsten nitride/tungsten carbide (WCN) or a combination of these materials.

根據第二態樣,本發明之標題物為一種塗覆導電性或半導電性基材(諸如矽基材)的方法,其包括下列階段:- 利用形成電絕緣膜之第一層塗覆該基材,- 利用與該第一層接觸並形成導電金屬層的第二層塗覆該第一層,其特徵在於該第一層包含至少一種在高溫下穩定且含有可經由離子鍵、氫鍵或凡得瓦鍵(Van der Waals bond)結合來自該金屬層之金屬離子的基團的聚合物,該聚合物因此展現對此等金屬離子向基材擴散之屏障效應。 According to a second aspect, the title of the present invention is a method of coating a conductive or semiconductive substrate, such as a tantalum substrate, comprising the following stages: - coating the first layer with an electrically insulating film Substrate, coating the first layer with a second layer in contact with the first layer and forming a conductive metal layer, characterized in that the first layer comprises at least one which is stable at high temperatures and contains hydrogen bonds via ionic bonds Or a Van der Waals bond polymer that combines groups of metal ions from the metal layer, which polymer thus exhibits a barrier effect of diffusion of such metal ions toward the substrate.

圖1表示本發明之P4VP-Cu樣品在400℃下退火2小時之後的前表面TOF-SIMS分析光譜。 Figure 1 shows the front surface TOF-SIMS analysis spectrum of the P4VP-Cu sample of the present invention after annealing at 400 °C for 2 hours.

圖2表示本發明之P4VP-Cu樣品在400℃下退火2小時之前及之後 的擊穿電壓的測量結果。 Figure 2 shows the P4VP-Cu sample of the present invention before and after annealing at 400 ° C for 2 hours. The breakdown voltage is measured.

該第一絕緣層為抵抗金屬層之金屬離子在電流效應下向傳導性或半傳導性基材遷移的層。 The first insulating layer is a layer that resists migration of metal ions of the metal layer to the conductive or semiconductive substrate under the effect of current.

其在矽穿孔結構中之厚度可為至少80奈米及較佳介於100與500奈米之間。 It may have a thickness in the perforated structure of at least 80 nm and preferably between 100 and 500 nm.

該絕緣層包含或由在高溫下有利地穩定的聚合物組成,該在高溫下有利地穩定意指該聚合物在介於100與400℃之間的溫度下曝露至少1小時之後損失其重量之小於1%。本發明之含義中的聚合物為由重複單元組成的大分子。其來自一或兩種已知為單體之分子的反應。該等單體係藉由加成或縮合而相互反應。本發明之含義中的有機聚合物包含碳及氫。 The insulating layer comprises or consists of a polymer which is advantageously stable at elevated temperatures, which advantageously stabilizes at high temperatures means that the polymer loses its weight after exposure to a temperature between 100 and 400 ° C for at least one hour. less than 1%. A polymer in the meaning of the present invention is a macromolecule composed of repeating units. It comes from the reaction of one or two molecules known as monomers. The single systems react with one another by addition or condensation. The organic polymer in the meaning of the present invention contains carbon and hydrogen.

較佳使該有機聚合物藉由共價結合而交聯及結合至基材。共價鍵係可(例如)藉由電接枝法在基材之存在下於聚合物之聚合期間形成。 Preferably, the organic polymer is crosslinked and bonded to the substrate by covalent bonding. The covalent bond can be formed, for example, by electrografting during the polymerization of the polymer in the presence of a substrate.

本發明之內容中所用之聚合物包含可與金屬離子形成鍵之游離官能團。另一方面,先前技術中用作絕緣體之聚合物(諸如氟聚合物-(CF2)n-、聚矽氧聚合物、聚對二甲苯基及聚醯亞胺)不包括該等官能團。本發明之內容中所用之聚合物可經由例如離子性、氫或凡得瓦性質的非共價鍵結合至金屬離子。 The polymer used in the context of the present invention contains a free functional group which can form a bond with a metal ion. On the other hand, polymers used as insulators in the prior art, such as fluoropolymer-(CF 2 ) n -, polyoxyl polymer, poly-p-xylylene, and polyimine, do not include such functional groups. The polymers used in the context of the present invention may be bonded to metal ions via non-covalent bonds such as ionic, hydrogen or van der Waals properties.

根據一個實施例,該聚合物包含可錯合來自金屬層之金屬離子的基團,且因此,展現對此等金屬離子向基材擴散之屏障效應。 According to one embodiment, the polymer comprises groups that can mate with metal ions from the metal layer and, therefore, exhibit a barrier effect of diffusion of such metal ions toward the substrate.

該聚合物可選自包含一或多種選自如下之官能團的聚合物:一級胺、二級胺、烯胺、醇、硫醇、羧酸、非芳族雜環及芳族雜環基團(特定言之含氮的芳族雜環,諸如吡啶、吡咯或噻吩)。 The polymer may be selected from polymers comprising one or more functional groups selected from the group consisting of primary amines, secondary amines, enamines, alcohols, thiols, carboxylic acids, non-aromatic heterocyclic rings, and aromatic heterocyclic groups ( Specifically, a nitrogen-containing aromatic heterocyclic ring such as pyridine, pyrrole or thiophene).

例如,該聚合物係獲自至少一種包含至少一種上述官能團的可聚合碳基單體。 For example, the polymer is obtained from at least one polymerizable carbon-based monomer comprising at least one of the above functional groups.

以可藉由自由基途徑進行鏈聚合的單體為較佳,諸如(例如)乙烯基單體。因此,該等單體將有利地選自包含至少一種可與金屬離子形成非共價鍵的官能團的水溶性乙烯基單體。 A monomer which can be chain-polymerized by a radical route is preferred, such as, for example, a vinyl monomer. Accordingly, the monomers will advantageously be selected from water-soluble vinyl monomers comprising at least one functional group that can form a non-covalent bond with a metal ion.

該等單體將有利地選自聚(乙烯基胺),特定言之選自胺之乙烯基衍生物,諸如:- 一級脂族胺,特定言之乙基胺、環己基胺或環己二胺;- 二級脂族胺,特定言之吡咯啶;- 三級脂族胺,特定言之羥乙基二乙胺或三縮四乙二胺;- 芳族胺,特定言之1,2-二胺基苯或3,5-二甲基苯胺;- 含氮雜環,特定言之吡啶、2,2'-聯吡啶、8-羥基喹啉磺酸、1,10-啡啉、3,5-二甲基吡啶或2,2'-聯嘧啶;- 肟,特定言之雙乙酮肟,特定言之含氮乙烯基芳族雜環之聚合物。 The monomers will advantageously be selected from poly(vinylamine), in particular vinyl derivatives selected from amines, such as: - primary aliphatic amines, in particular ethylamines, cyclohexylamines or cyclohexanes Amine;- a secondary aliphatic amine, in particular pyrrolidine; a tertiary aliphatic amine, in particular hydroxyethyldiethylamine or triethylenediamine; - an aromatic amine, in particular 1,2 -diaminobenzene or 3,5-dimethylaniline; - nitrogen-containing heterocycle, specifically pyridine, 2,2'-bipyridine, 8-hydroxyquinoline sulfonic acid, 1,10-morpholine, 3 , 5-dimethylpyridine or 2,2'-bipyrimidine; - anthracene, specifically a diketene oxime, specifically a polymer of a nitrogen-containing vinyl aromatic heterocycle.

在本發明之內容中所用之聚(乙烯基胺)中,氮原子未與乙烯基結合,從而氮原子保持可用於結合至金屬離子。 In the poly(vinylamine) used in the context of the present invention, the nitrogen atom is not bonded to the vinyl group, so that the nitrogen atom remains available for bonding to the metal ion.

例如,該等單體係選自不飽和含氮碳基單體及其硫基類似物,其包括:- 乙烯基吡啶,諸如2-乙烯基吡啶或4-乙烯基吡啶,及經低級(C1-C8)烷基之C-取代之乙烯基吡啶,諸如2-甲基-5-乙烯基吡啶、2-乙基-5-乙烯基吡啶、3-甲基-5-乙烯基吡啶、2,3-二甲基-5-乙烯基吡啶及2-甲基-3-乙基-5-乙烯基吡啶;- 乙烯基喹啉、乙烯基吡咯啶酮、乙烯基咪唑、乙烯基咔唑及乙烯基琥珀醯亞胺。 For example, the single systems are selected from the group consisting of unsaturated nitrogen-containing carbon-based monomers and their sulfur-based analogs, including: - vinyl pyridines such as 2-vinyl pyridine or 4-vinyl pyridine, and lower grades (C) a C-substituted vinyl pyridine of 1 - C 8 ) alkyl group, such as 2-methyl-5-vinyl pyridine, 2-ethyl-5-vinyl pyridine, 3-methyl-5-vinyl pyridine, 2,3-Dimethyl-5-vinylpyridine and 2-methyl-3-ethyl-5-vinylpyridine; -vinylquinoline, vinylpyrrolidone, vinylimidazole, vinylcarbazole And vinyl amber imine.

在一個實施例中,該單體為4-乙烯基吡啶或2-乙烯基吡啶。 In one embodiment, the monomer is 4-vinylpyridine or 2-vinylpyridine.

該等單體亦可選自:- 包含結合至羧基之碳碳雙鍵的單體,諸如丙烯酸、甲基丙烯 酸、衣康酸、馬來酸、富馬酸及其鈉、鉀、銨或胺鹽,- 包含結合至上述羧酸之醯胺基團之碳碳雙鍵的單體及特定言之丙烯醯胺及甲基丙烯醯胺及其N-取代之衍生物,- 包含結合至上述羧酸之酯基之碳碳雙鍵的單體,諸如甲基丙烯酸2-羥乙酯、甲基丙烯酸縮水甘油酯、(甲基)丙烯酸二甲基-或二乙基胺基(乙基或丙基)酯及其鹽以及此等陽離子酯之季鹼化衍生物,諸如(例如)氯化丙烯醯氧基乙基三甲基銨、2-丙烯醯胺基-2-甲基丙磺酸(AMPS)、乙烯基磺酸、乙烯基磷酸、乙烯基乳酸及其鹽、丙烯腈、N-乙烯基吡咯啶酮、乙酸乙烯酯、N-乙烯基咪唑啉及其衍生物、N-乙烯基咪唑及二烯丙基銨類型之衍生物(諸如氯化二甲基二烯丙基銨、溴化二甲基二烯丙基銨或氯化二乙基二烯丙基銨)。 The monomers may also be selected from: - monomers comprising carbon-carbon double bonds bonded to a carboxyl group, such as acrylic acid, methacrylic acid Acid, itaconic acid, maleic acid, fumaric acid and sodium, potassium, ammonium or amine salts thereof, - a monomer comprising a carbon-carbon double bond bonded to a guanamine group of the above carboxylic acid, and specifically a propylene oxime Amines and methacrylamides and N-substituted derivatives thereof, monomers comprising carbon-carbon double bonds bonded to ester groups of the above-mentioned carboxylic acids, such as 2-hydroxyethyl methacrylate, glycidyl methacrylate Esters, dimethyl- or diethylamino(ethyl) acrylates and their salts, and quaternized derivatives of such cationic esters, such as, for example, propylene oxyalkylene chloride Ethyltrimethylammonium, 2-propenylamido-2-methylpropanesulfonic acid (AMPS), vinylsulfonic acid, vinyl phosphoric acid, vinyl lactic acid and salts thereof, acrylonitrile, N-vinylpyrrolidine Ketones, vinyl acetates, N-vinyl imidazolines and their derivatives, N-vinylimidazoles and derivatives of diallyl ammonium type (such as dimethyl diallyl ammonium chloride, dimethyl bromide) Diallyl ammonium or diethyl diallyl ammonium chloride).

根據一個特定實施例,本發明之裝置之結構的壁係經具有介於100與400奈米之間之厚度的聚(4-乙烯基吡啶)層覆蓋,該聚(4-乙烯基吡啶)層自身係經銅(其構成該等結構之晶種層或填充層)覆蓋。 According to a particular embodiment, the wall of the structure of the device of the invention is covered by a layer of poly(4-vinylpyridine) having a thickness of between 100 and 400 nm, the poly(4-vinylpyridine) layer The self is covered by copper, which forms the seed layer or filling layer of the structures.

可藉由乾式途徑或藉由濕式途徑沈積該絕緣介電層以獲得均一的絕緣層。 The insulating dielectric layer can be deposited by a dry route or by a wet route to obtain a uniform insulating layer.

該聚合物較佳係藉由電接枝或旋塗法沈積在基材上。 The polymer is preferably deposited on the substrate by electrografting or spin coating.

電接枝為一種基於電活性單體在待覆蓋表面上之引發及接著藉由電誘發之鏈增長聚合作用之濕式途徑沈積技術。 Electrografting is a wet pathway deposition technique based on the initiation of electroactive monomers on the surface to be coated and subsequent polymerization by electrical induced chain growth.

一般而言,電接枝要求:- 一方面,使用包含引發劑化合物及上述單體之液體溶液;及- 另一方面,一份可在待塗覆之基材表面進行聚合反應並形成聚合物膜的電化學方案。 In general, electrografting requires: - on the one hand, a liquid solution comprising an initiator compound and the above monomers; and - on the other hand, a polymerization reaction on the surface of the substrate to be coated and formation of a polymer Electrochemical scheme of the membrane.

根據申請案FR 2 933 425中所述之電接枝法中之一者,將該聚合物較佳沈積在具有盲孔的基材上。本發明方法中之一者包括:a)使該表面與包括如下之液體溶液接觸: - 質子性溶劑,較佳係水;- 重氮鹽,較佳係4-硝基重氮苯鹽;- 在可溶於該質子性溶劑中的上述可聚合單體,較佳乙烯基吡啶;- 含量足以使該溶液之pH調整至低於7(較佳低於2.5)的數值而穩定該重氮鹽的至少一種酸;b)根據電位-或電化學-脉衝模式使該表面極化。 According to one of the electrografting processes described in the application FR 2 933 425, the polymer is preferably deposited on a substrate having blind holes. One of the methods of the present invention comprises: a) contacting the surface with a liquid solution comprising: a protic solvent, preferably water; - a diazonium salt, preferably a 4-nitrodiazobenzene salt; - a polymerizable monomer soluble in the protic solvent, preferably a vinyl pyridine; - at least one acid sufficient to stabilize the pH of the solution to a value below 7 (preferably below 2.5) to stabilize the diazonium salt; b) to polarize the surface according to a potential- or electrochemical-pulse mode .

一般而言,待經膜覆蓋之表面的極化係根據脉衝模式進行,其每個週期之特徵在於:- 介於10ms與2s之間之總時期P;- 介於0.01與1s之間之極化時間T開啟,其間在基材表面施加電位差或電流;及- 在零電位或電流下具有持續0.01至1s之斷開時間。 In general, the polarization of the surface to be covered by the membrane is based on a pulse pattern, each of which is characterized by: - a total period P between 10 ms and 2 s; - between 0.01 and 1 s The polarization time T is turned on , during which a potential difference or current is applied to the surface of the substrate; and - at zero potential or current, there is a break time of 0.01 to 1 s.

傳導性或半傳導性基材可為平坦表面或具有分別為互連線或矽穿孔之前驅物蝕刻或空腔的表面。 The conductive or semi-conductive substrate can be a flat surface or have a surface that is etched or cavity-embedded by interconnects or turns, respectively.

空腔之深度隨作為位置之函數及需要在矽晶圓中形成之矽穿孔的函數而變化。因此,其可在1至500微米、通常10至250微米變化。例如,該等空腔在其開口具有200nm至200微米、一般而言在1至75微米之範圍內的直徑。 The depth of the cavity varies as a function of position and as a function of the turns of the crucible that need to be formed in the germanium wafer. Thus, it can vary from 1 to 500 microns, typically from 10 to 250 microns. For example, the cavities have a diameter in their opening ranging from 200 nm to 200 microns, typically from 1 to 75 microns.

根據本發明之一個實施例,該等空腔之開口在1至10微米的範圍,然而其深度在10至50微米的範圍內。 According to one embodiment of the invention, the openings of the cavities are in the range of 1 to 10 microns, however the depth is in the range of 10 to 50 microns.

互連線之寬度一般小於200nm且可達到數十奈米。本發明可使(特定言之)具有小於50nm之寬度(例如7nm、10nm或15nm)的極細線金屬化。 The width of the interconnect is typically less than 200 nm and can reach tens of nanometers. The present invention can, in particular, metallize very fine lines having a width of less than 50 nm (e.g., 7 nm, 10 nm, or 15 nm).

金屬層可包含銅、錫、鋁、金或銀。 The metal layer may comprise copper, tin, aluminum, gold or silver.

較佳使用銅作為金屬,因為其展現優良的導電性及對電遷移現 象之高抵抗性,亦即銅原子在電流密度的效應(可為失效的主要原因)下的弱遷移。 Copper is preferably used as a metal because it exhibits excellent electrical conductivity and electromigration The high resistance of the image, that is, the weak migration of copper atoms under the effect of current density, which can be the main cause of failure.

該金屬層可為具有約數十至數百奈米厚度的銅金屬薄層(稱作晶種層)。亦可填充蝕刻線或矽穿孔之前驅物空腔的整個體積。 The metal layer may be a thin layer of copper metal (referred to as a seed layer) having a thickness of about several tens to several hundreds of nanometers. It is also possible to fill the entire volume of the actuator cavity before etching the etched wire or the ruthenium.

可藉由自動催化法(或無電)或藉由氣相法(分別為PVD或物理氣相沈積及CVD或化學氣相沈積、ALD或原子層沈積)沈積該金屬層。 The metal layer can be deposited by autocatalytic (or electroless) or by gas phase methods (PVD or physical vapor deposition and CVD or chemical vapor deposition, ALD or atomic layer deposition, respectively).

一種用於銅之自動催化沈積的方法描述於(例如)文獻US 2007/0261594(LAM專利案)中。 A method for autocatalytic deposition of copper is described, for example, in document US 2007/0261594 (LAM Patent).

經閱讀在實驗室規模下進行之下列非限制性實例的描述,將獲得對本發明之更佳理解。 A better understanding of the present invention will be obtained upon reading the description of the following non-limiting examples taken at the laboratory scale.

除非另有指示,否則此實例係在環境空氣中於標準溫度及壓力條件(約25℃,在1atm下)下進行且所用反應物係直接購得而無需另外純化。 Unless otherwise indicated, this example was carried out in ambient air under standard temperature and pressure conditions (about 25 ° C at 1 atm) and the reactants used were purchased directly without additional purification.

此實例中所用之矽基材展現介於1與100Ω.cm之間的電阻率值。 The tantalum substrate used in this example exhibited a resistivity value between 1 and 100 Ω.cm.

實例Instance

A-於平坦P-摻雜型矽基材上製備聚(4-乙烯基吡啶)(P4VP)膜A-Preparation of poly(4-vinylpyridine) (P4VP) film on a flat P-doped germanium substrate

基材:Substrate:

此實例中所用之基材為具有20Ω.cm之電阻率、4cm之邊長(4×4cm)及750μm之厚度的P-摻雜矽試樣塊。 In this example the substrate is used having a resistivity of 20Ω.cm, 4cm length of the edge (4 × 4cm) and a P- doped silicon coupons thickness of 750μm.

溶液: Solution:

此實例中所用之電接枝溶液為藉由將5ml 4-乙烯基吡啶(4-VP,4.5×10-2mol)引入95ml 1M HCl中且隨後將236mg四氟硼酸4-硝基重氮苯(DNO2,1×10-3mol)添加至如此形成的混合物中而製得的水溶液。 The electrografting solution used in this example was introduced by introducing 5 ml of 4-vinylpyridine (4-VP, 4.5 x 10 -2 mol) into 95 ml of 1 M HCl and then 236 mg of 4-nitrodiazobenzene tetrafluoroborate. (DNO2, 1 × 10 -3 mol) An aqueous solution prepared by adding to the mixture thus formed.

在使用該溶液之前,藉由氬氣流使其脫氣10分鐘。 The solution was degassed by a stream of argon for 10 minutes before using the solution.

方案:Program:

為了在該矽基材上進行電接枝,利用一種由如下組成之系統:- 配備用於在預定速度下旋轉之構件且經成形以支撐基材的樣品托架,如此形成之組合欲作為工作電極;- 欲作為反電極之碳片;- 穩定的電源及用於電接觸之裝置;- 置於P摻雜型矽樣品之前方的光源(鹵素燈,150W),從而在樣品表面上獲得最大的光強度。為此,將該燈放置在自樣品表面約10cm的距離。在實驗的整個持續時間照射該樣品。 In order to carry out electrografting on the crucible substrate, a system consisting of: - a sample holder equipped with a member for rotating at a predetermined speed and shaped to support the substrate, is formed, and the combination thus formed is intended to be a work Electrode; - carbon sheet to be used as counter electrode; - stable power supply and device for electrical contact; - light source (halogen lamp, 150W) placed in front of the P-doped erbium sample to maximize the surface of the sample Light intensity. To this end, the lamp was placed at a distance of about 10 cm from the surface of the sample. The sample was illuminated for the entire duration of the experiment.

P4VP於矽基材表面上之電接枝係藉由對該基材(其被事先設置在40至100rev.min-1之旋轉速度(在該實例中,60rev.min-1))施加「電位-脉衝」電化學方案達約10至30分鐘之預定時期(在該實例中,15分鐘)而進行,其中:- 介於0.01與2秒之間之總時期P(在該實例中,0.220秒);- 介於0.01與1秒之間之極化時間T開啟(在該實例中,0.02秒),其間在基材表面施加1V至10V的電位差(在該實例中,陰極電位為-19V);及- 在零電位下持續0.01至1秒之斷開時間(表示為T斷開)(在該實例中,0.200秒)。 The electrografting of P4VP on the surface of the ruthenium substrate is carried out by applying a potential to the substrate which is previously set at a rotation speed of 40 to 100 rev.min -1 (in this example, 60 rev. min -1 ) The -pulse" electrochemical scheme is carried out for a predetermined period of about 10 to 30 minutes (in this example, 15 minutes), wherein: - a total period P between 0.01 and 2 seconds (in this example, 0.220) Seconds; - a polarization time T between 0.01 and 1 second (in this example, 0.02 seconds) during which a potential difference of 1V to 10V is applied to the surface of the substrate (in this example, the cathode potential is -19V) ); and - a disconnection time (expressed as T- off ) of 0.01 to 1 second at zero potential (in this example, 0.200 seconds).

據瞭解,此電接枝階段之持續時間取決於絕緣聚合物層的所需厚度。熟習此項技術者可容易確定該持續時間,該層之生長為施加之電位差的函數。 It is understood that the duration of this electrografting stage depends on the desired thickness of the insulating polymer layer. This duration can be readily determined by those skilled in the art, and the growth of the layer is a function of the applied potential difference.

在上述條件下,獲得展現200奈米厚度的聚合物(P4VP)層。 Under the above conditions, a polymer (P4VP) layer exhibiting a thickness of 200 nm was obtained.

一旦完成電接枝,利用水清洗樣品若干次,然後在氬氣流下乾燥及隨後在惰性氣氛下的爐子中乾燥10min(250℃)。 Once the electrografting was completed, the sample was washed several times with water, then dried under a stream of argon and then dried in an oven under an inert atmosphere for 10 min (250 ° C).

表徵:Characterization:

掃描電子顯微鏡術(SEM)分析可顯示均質聚合物膜於P摻雜型矽 樣品之表面上的存在性。 Scanning electron microscopy (SEM) analysis shows homogeneous polymer film in P-doped 矽 The presence on the surface of the sample.

B-銅之沈積及P4VP膜對銅之擴散的屏障性質的證實Deposition of B-copper and confirmation of barrier properties of P4VP film on copper diffusion

藉由PVD之200nm的銅的沈積係在經先前製得之P4VP覆蓋之基材上進行。 The deposition of 200 nm of copper by PVD was carried out on a previously covered P4VP coated substrate.

在將樣品放置在400℃之溫度下達2小時之後,觀察到聚合物之結構未降解(樣品之重量損失小於1重量%)且銅未遷移至聚合物之完整厚度中。為此,進行深入TOF-SIMS分析以觀察在聚合物中是否存在銅。該分析係在拋光後進行,經由後表面分析該樣品。圖1顯示構成樣品之組分(即聚合物P4VP(碳C)及銅(Cu))的分佈。在銅與聚合物之間觀察到極明顯的界面,此反映該等兩種材料之極弱的互相滲透。獲得之光譜係呈現於圖1中。 After the sample was placed at a temperature of 400 ° C for 2 hours, the structure of the polymer was observed to be undegraded (weight loss of the sample was less than 1% by weight) and copper did not migrate into the full thickness of the polymer. To this end, an in-depth TOF-SIMS analysis was performed to see if copper was present in the polymer. The analysis was performed after polishing and the sample was analyzed via the back surface. Figure 1 shows the distribution of the components constituting the sample (i.e., the polymers P4VP (carbon C) and copper (Cu)). A very pronounced interface was observed between the copper and the polymer, reflecting the very weak interpenetration of the two materials. The obtained spectrum is presented in Figure 1.

僅在P4VP膜之上部10nm中發現痕量銅。 Trace copper was only found in 10 nm above the P4VP film.

在400℃下退火2小時之前及之後,亦對P4VP-Cu樣品進行電學測試。藉由在沈積於P4VP之表面上之銅觸點上利用一滴水銀製造觸點而測量P4VP絕緣體之擊穿電壓。獲得之結果係概括於圖2中。 The P4VP-Cu sample was also electrically tested before and after annealing at 400 °C for 2 hours. The breakdown voltage of the P4VP insulator was measured by making a contact with a drop of mercury on a copper contact deposited on the surface of the P4VP. The results obtained are summarized in Figure 2.

觀察到擊穿電壓(1.3MV/cm)之略微降低,此反映銅略微地滲透至聚合物層中。 A slight decrease in breakdown voltage (1.3 MV/cm) was observed, which reflects the slight penetration of copper into the polymer layer.

由於P4VP膜對銅離子之擴散具有抵抗性質,P4VP膜因而可用於半導體裝置中。 Since the P4VP film is resistant to the diffusion of copper ions, the P4VP film can thus be used in a semiconductor device.

Claims (11)

一種包括具有互連或矽穿孔結構之半傳導性或傳導性基材的裝置,其中該半傳導性基材之結構的表面係經有機聚合物層覆蓋,該有機聚合物層自身經覆蓋且與金屬銅層接觸,其特徵在於該聚合物層同時滿足- 介於該半導體與該金屬層之間之電絕緣體的作用,及- 對來自該金屬層之金屬離子向該半傳導性基材之遷移的屏障作用,其特徵在於該裝置不包含對來自該金屬層之金屬離子向該半傳導性基材之遷移形成屏障的具有金屬性質的材料層,及其特徵在於該有機聚合物係獲自包含一或多種可經由離子鍵、氫鍵或凡得瓦鍵(Van der Waals bond)結合來自該金屬層之銅離子的不可聚合官能團的乙烯基單體。 A device comprising a semiconducting or conductive substrate having an interconnect or tantalum perforated structure, wherein the surface of the structure of the semiconducting substrate is covered by an organic polymer layer that is itself covered and Contact with a metallic copper layer, characterized in that the polymer layer simultaneously satisfies the role of an electrical insulator between the semiconductor and the metal layer, and - the migration of metal ions from the metal layer to the semiconductive substrate Barrier effect, characterized in that the device does not comprise a layer of material having a metallic property that forms a barrier to migration of metal ions from the metal layer to the semiconducting substrate, and characterized in that the organic polymer is obtained from One or more vinyl monomers that can bind non-polymerizable functional groups of copper ions from the metal layer via ionic bonds, hydrogen bonds, or van der Waals bonds. 如請求項1之裝置,其中該形成屏障的具有金屬性質的材料層包含選自由鉭、鈦、鎳及鈷組成之群的金屬。 The device of claim 1, wherein the layer of material having a metallic property forming the barrier comprises a metal selected from the group consisting of ruthenium, titanium, nickel, and cobalt. 如請求項1之裝置,其中該形成屏障的具有金屬性質的材料層係由鉭(Ta)、鈦(Ti)、鎳(Ni)、鈷(Co)、鎳/鎢(NiW)合金、鈷/鎢(CoW)合金、鎳/硼(NiB)合金、鈷/硼(CoB)合金、鎳/磷(NiP)合金、鈷/磷(CoP)合金、氮化鉭(TaN)、氮化鈦(TiN)、鈦/鎢(TiW)合金、氮化鎢/碳化鎢(WCN)或此等材料之組合組成。 The device of claim 1, wherein the material layer of the barrier metal layer is made of tantalum (Ta), titanium (Ti), nickel (Ni), cobalt (Co), nickel/tungsten (NiW) alloy, cobalt/ Tungsten (CoW) alloy, nickel/boron (NiB) alloy, cobalt/boron (CoB) alloy, nickel/phosphorus (NiP) alloy, cobalt/phosphorus (CoP) alloy, tantalum nitride (TaN), titanium nitride (TiN) ), titanium/tungsten (TiW) alloy, tungsten nitride/tungsten carbide (WCN) or a combination of these materials. 如請求項1之裝置,其中該有機聚合物係獲自包含一或多種選自由一級胺、二級胺、烯胺、醇、硫醇、羧酸、芳族雜環及非芳族雜環基團組成之群的不可聚合官能團的乙烯基單體。 The device of claim 1, wherein the organic polymer is obtained from one or more selected from the group consisting of a primary amine, a secondary amine, an enamine, an alcohol, a thiol, a carboxylic acid, an aromatic heterocyclic ring, and a non-aromatic heterocyclic group. A group of non-polymerizable functional groups of vinyl monomers. 如請求項1之裝置,其中該有機聚合物係經由共價鍵結合至該半傳導性基材。 The device of claim 1, wherein the organic polymer is bonded to the semiconductive substrate via a covalent bond. 如請求項1之裝置,其中該有機聚合物係經交聯且在高溫下穩定。 The device of claim 1, wherein the organic polymer is crosslinked and stabilized at a high temperature. 如請求項1之裝置,其中該有機聚合物係藉由乙烯基吡啶之聚合作用而獲得。 The device of claim 1, wherein the organic polymer is obtained by polymerization of vinyl pyridine. 如請求項1之裝置,其中其包含矽穿孔結構,且該半傳導性基材之結構的壁係經具有介於100與400奈米之間之厚度的聚(4-乙烯基吡啶)有機聚合物層覆蓋,該聚(4-乙烯基吡啶)層自身係經銅層覆蓋,該銅層構成具有小於100nm之厚度的晶種層或填充該等結構之體積的層。 The device of claim 1, wherein the device comprises a perforated structure, and the wall of the structure of the semiconductive substrate is poly(4-vinylpyridine) organically polymerized to a thickness of between 100 and 400 nm. Covered by the layer, the poly(4-vinylpyridine) layer itself is covered by a layer of copper that forms a seed layer having a thickness of less than 100 nm or a layer filling the volume of the structures. 一種製造如請求項1之裝置的方法,其包括下列階段:- 利用形成電絕緣膜之有機聚合物層塗覆該基材,- 利用與該聚合物層接觸之導電金屬銅層塗覆該有機聚合物層。 A method of manufacturing the apparatus of claim 1, comprising the steps of: - coating the substrate with an organic polymer layer forming an electrically insulating film, - coating the organic layer with a conductive metallic copper layer in contact with the polymer layer Polymer layer. 如請求項9之方法,其中該有機聚合物層係藉由電接枝或藉由旋塗而沈積在該半傳導性基材上。 The method of claim 9, wherein the organic polymer layer is deposited on the semiconductive substrate by electrografting or by spin coating. 如請求項9之方法,其中該金屬層係藉由自動催化(或無電)法或氣相法(PVD、CVD、ALD)沈積。 The method of claim 9, wherein the metal layer is deposited by an autocatalytic (or electroless) process or a gas phase process (PVD, CVD, ALD).
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