TW201413259A - System and method of testing hardware - Google Patents

Abstract

The present invention provides a system and method of testing hardware of a plurality of units under test (UUTs), before the UUTs enter into operating systems. The method includes: receiving hardware information of the UUT; Determining whether the hardware information of the UUT is consist with the standard hardware information prestored in a first storage device; Sending command to Baseboard Management Controller (BMC) of the UUT to close the UUT while the hardware information of the UUT is inconsistent with the standard hardware information. The present invention can be used to test hardware information of the UUT before the UUT enters into operating system.

Description

Hardware detection system and method

The present invention relates to a hardware detection system and method.

When testing the servo motherboard or system in the production line, it is generally necessary to install all the hardware modules, and the quality of the test fixtures in the production line may be uneven, which may cause some hardware to be inserted after the hardware is not normal. jobs.

In the existing test process, to find the above problems, you must enter the operating system to execute the test program. After discovering the above problems during the test, you need to shut down, power off, reinsert the hardware in question, then reboot and retest. Obviously, this kind of operation process is a waste of time.

In view of the above, it is necessary to provide a hardware detection system and method for detecting whether the hardware required for the UUT is properly inserted before the UUT enters the operating system for motherboard or system testing.

A hardware detection method is applied to a test host communicatively coupled to a UUT of a device under test for checking a hardware of the UUT before the UUT enters the operating system, the method comprising: receiving a step of receiving hardware of the UUT The step of judging, comparing the hardware information of the UUT with the standard hardware information stored in the first memory to determine whether the UUT hardware meets the requirements; and the shutdown step, when the UUT hardware If the requirements are not met, the operator is prompted to detect the result and command the UUT's baseboard management controller BMC to shut down the UUT for the operator to check the hardware placement of the UUT.

A hardware detection system running on a test host communicatively coupled to a UUT of a device under test for checking a hardware of the UUT before the UUT enters the operating system, the system comprising: a receiving module, configured to receive the UUT The hardware information is used to compare the hardware information of the UUT with the standard hardware information stored in the first memory to determine whether the hardware of the UUT meets the requirements; When the hardware of the UUT does not meet the requirements, the operator is prompted to detect the result and command the base management controller BMC of the UUT to shut down the UUT for the operator to check the hardware placement condition of the UUT.

Compared with the prior art, the hardware detection system and method can detect whether the hardware required for the UUT is inserted before the UUT enters the operating system for testing the motherboard or the system, thereby avoiding the motherboard or system in the UUT. During the test, it was found that the UUT hardware needs to be shut down, checked and restarted after the hardware is not required, and the operation time can be reduced.

As shown in FIG. 1, it is an operating environment diagram of the hardware detection system of the present invention. In this embodiment, the hardware detection system 10 is operated in the test host 100, and the test host 100 is tested with the N(N>=1) UUT (Unit Under Test) tested in the same batch as shown in FIG. The device 200 is connected through a network, and the hardware detecting system 10 is configured to detect whether the hardware of each UUT 200 meets requirements before the N U200 200 needs to be tested (for example, a motherboard test or a system test), for example, detecting the Whether the number of hard disks and storage capacity of the N UUT 200 meet the requirements.

It should be noted that the test host 100 may be a computer with a DHCP (Dynamic Host Configuration Protocol) service, and an Internet Protocol (IP) address is allocated through the DHCP service. The N UUTs 200 are provided such that the test host 100 and the N UUTs 200 can communicate with each other. In a specific implementation process, a dedicated computer can also be used as a DHCP server to allocate IP addresses to the test host 100 and the N UUTs 200, so that the test host 100 and the N are The UUT 200 can perform network communication.

In this embodiment, the test host 100 and the N UUTs 200 are connected to the DHCP server 300 through the router 90, and the DHCP server 300 assigns an IP address to the test host 100 and the N UUTs 200. .

Each of the UUTs 200 includes a BMC (Baseboard Management Controller) 40, a BIOS (Basic Input Output System) 50, and a second memory 60 (see FIG. 2). The second memory 60 can be used to store the firmware of the BIOS 50.

In this embodiment, when the UUT 200 is powered on, the BMC 40 starts up and requests the DHCP server 300 to allocate an IP address, and communicates with the test host 100 by using the allocated IP address. When the UUT 200 is powered on for POST (Power On Self Test), the BIOS 50 scans the hardware information of the UUT 200 and stores the hardware information in the second memory 60. The BMC 40 reads the hardware information of the UUT 200 from the second memory 60 and sends the hardware information of the UUT 200 to the test host 100. In this embodiment, the BMC 40 needs to be added to the firmware of the BMC 40 to read the hardware information of the UUT 200 from the second memory 60 and send the hardware information to the test host. 100 features.

In this embodiment, the test host 100 further includes a first memory 20 and a processor 30. The first memory 20 pre-stores standard hardware information of the UUT 200, such as a CPU (Central Processing Unit), a memory, Hard disk, PCI (Peripheral Component Interconnect) card and other hardware standard information. For example, the information of a standard hard disk may include information such as the number of hard disks and the storage capacity of the hard disk (see FIG. 4). The standard hardware information is used to compare the hardware information of the UUT 200 with the standard hardware information after the test host 100 receives the hardware information of the UUT 200 to determine the UUT. 200 Whether the required hardware is inserted.

The first memory 20 is also used to store other materials, such as a stylized code that stores the hardware detection system 10. In the embodiment, the hardware detection system 10 includes a receiving module 11 , a determining module 12 , a shutdown module 13 , and a testing module 14 . The module referred to in the present invention is a program segment for performing a specific function, and the functions of each module will be specifically described in the flowchart of FIG.

3 is a flow chart of a preferred embodiment of the hardware detection method of the present invention.

In step S1, the test host 100 is powered on, and the test host 100 is applied from the DHCP server 300 and assigned to an IP address after booting. For example, the IP address assigned is: 192.168.1.10. When the UUT 200 is powered on, the BMC 40 of the UUT 200 starts up and requests the DHCP server 300 to allocate an IP address, and performs network communication with the test host 100 by using the allocated IP address, for example, The BMC 40 requests the IP address from the DHCP server to be 192.168.1.20.

In step S2, the UUT 200 is powered on, and the UUT 200 performs POST at the time of booting. The BIOS 50 scans the hardware information of the UUT 200 and stores the hardware information of the UUT 200 when the UUT 200 performs POST. In the second memory 60. The hardware information includes information about a hardware configuration such as a CPU, a memory, a hard disk, or a PCI card.

In order to clarify the present invention, the present embodiment is illustrated by the hard disk of the UUT 200. For example, the hard disk information of the UUT 200 is scanned: the storage capacity of the serial number S26VJ9AZA11029 is 320G, and the serial number is S26VJ9AZA11022. The capacity is 250G.

In step S3, the BMC 40 reads the hardware information of the UUT 200 from the second memory 60 and sends the hardware information of the UUT 200 to the test host 100. The receiving module 11 receives the hardware information of the UUT 200.

Here, it is necessary to add the function of reading the hardware information of the UUT 200 from the second memory 60 and transmitting the hardware information of the UUT 200 to the test host 100 in the firmware of the BMC 40.

In step S4, the determining module 12 compares the hardware information of the UUT 200 with the standard hardware information stored in the first memory 20 to determine whether the hardware required by the UUT 200 meets the requirements, if otherwise In step S5, if yes, step S6 is performed.

For example, the standard hardware information stored in the first memory 20 records three standard hard disks, but only scans the information of the two hard disks of the UUT 200 (for example, one hard disk is tested). If the fixture is not fixed and the information of the hard disk is not scanned, it can be determined that the hardware information of the UUT 200 is inconsistent with the standard hardware information stored in the first memory 20, and the steps are performed. S5.

For example, if the UUT 200 has 3 hard disks and the storage capacity is 320G, 250G, and 250G, the standard hardware information table requires the storage capacity of the hard disk to reach 320G, 250G, and 300G, respectively. Under this condition, step S5 is performed. That is, the judgment basis of this step can be set according to specific needs.

In step S5, the shutdown module 13 prompts the operator to detect the result and instructs the BMC 40 to shut down the UUT 200. For example, according to the judgment result of the step S4, it is suggested that the worker has a hard disk that is not inserted or not inserted, and it is necessary to check the hard disk insertion situation and the like. The shutdown module 13 sends a command to the BMC 40 through the IP address of the BMC 40 (such as 192.168.1.20), instructing the BMC 40 to shut down the UUT 200 for the operator to check the hard disk installation. The BMC 40 then shuts down the UUT 200 after receiving the shutdown command.

In step S6, the hardware of the UUT 200 meets the requirements to enter the operating system, and the test module 14 tests the UUT 200.

It can be seen from the process steps of the present invention that the present invention detects whether the hardware required for the UUT 200 is properly inserted before the UUT 200 enters the operating system, thereby avoiding the hardness of the UUT 200 when the UUT 200 performs motherboard or system testing. If the body does not meet the requirements, you need to shut down, check and restart the machine to reduce the working time.

It should be noted that the above embodiments are only for explaining the technical solutions of the present invention and are not intended to be limiting, and the present invention will be described in detail with reference to the preferred embodiments. Modifications or equivalents are made without departing from the spirit and scope of the invention.

100. . . Test host

200. . . UUT

10. . . Hardware detection system

20. . . First memory

30. . . processor

40. . . BMC

50. . . BIOS

60. . . Second memory

90. . . router

300. . . DHCP server

11. . . Receiving module

12. . . Judging module

13. . . Shutdown module

14. . . Test module

S1. . . Power on the UUT, initialize the BMC

S2. . . Boot the UUT, and the BIOS scans the UUT hardware information and stores it when the UUT performs POST.

S3. . . The BMC reads the hardware information of the UUT and sends it to the test host, and the test host receives the hardware information of the UUT.

S4. . . Does the UUT required hardware information meet the requirements?

S5. . . Prompt the operator to test the result and command the BMC to shut down the UUT

S6. . . UUT enters the operating system and tests

1 is a diagram showing the operating environment of the hardware detecting system of the present invention.

2 is a block diagram of a UUT of the device under test of the present invention.

3 is a flow chart of a preferred embodiment of the hardware detection method of the present invention.

Figure 4 illustrates standard hardware information.

S1. . . Power on the UUT, initialize the BMC

S2. . . Boot the UUT, and the BIOS scans the UUT hardware information and stores it when the UUT performs POST.

S3. . . The BMC reads the hardware information of the UUT and sends it to the test host, and the test host receives the hardware information of the UUT.

S4. . . Does the UUT required hardware information meet the requirements?

S5. . . Prompt the operator to test the result and command the BMC to shut down the UUT

S6. . . UUT enters the operating system and tests

Claims (10)

A hardware detection method is applied to a test host communicatively coupled to a UUT of a device under test for checking a hardware of the UUT before the UUT enters the operating system, the method comprising:
Receiving step of receiving hardware information of the UUT;
a judging step of comparing the hardware information of the UUT with the standard hardware information stored in the first memory to determine whether the hardware of the UUT meets the requirements;
The shutdown step, when the hardware of the UUT does not meet the requirements, prompts the operator to detect the result and instructs the substrate management controller BMC of the UUT to shut down the UUT for the operator to check the hardware placement of the UUT. The method for detecting a hardware according to claim 1, wherein the method further comprises: before the receiving step:
The power-on step, powering up the UUT to start the BMC of the UUT;
In the booting process, the UUT is powered on, so that the input and output system BIOS of the UUT scans the hardware information of the UUT and stores the hardware information in the second memory of the UUT when the UUT performs the POST POST. And in the reading step, the BMC reads the hardware information of the UUT from the second memory and sends the hardware information to the test host. The hardware detecting method according to claim 1, wherein the method further comprises a testing step of testing the UUT after the hardware of the UUT meets the requirements to enter the operating system. The hardware detection method according to any one of claims 1 to 3, wherein the test host is connected to a plurality of UUTs through a router. For example, in the hardware detection method described in claim 4, the test host is assigned to an IP address after being powered on, and each UUT is allocated to an IP address after being powered on, and each UUT utilizes The assigned IP address communicates with the test host. A hardware detection system running on a test host communicatively coupled to a UUT of a device under test for checking the hardware of the UUT before the UUT enters the operating system, the system comprising:
a receiving module, configured to receive hardware information of the UUT;
The determining module is configured to compare the hardware information of the UUT with the standard hardware information stored in the first memory to determine whether the hardware of the UUT meets the requirements;
The shutdown module is configured to prompt the operator to detect the result when the hardware of the UUT does not meet the requirement, and instruct the UUT's substrate management controller BMC to shut down the UUT for the operator to check the hardware placement condition of the UUT. The hardware detection system of claim 6, wherein the hardware information of the UUT is scanned by the input and output system BIOS of the UUT when the UUT performs a power-on self-test POST, and is stored in the UUT. In the second memory, the BMC of the UUT is read from the second memory and sent to the test host. The hardware detection system of claim 6, wherein the system further comprises a test module, and the UUT is tested after the hardware of the UUT meets the requirements to enter the operating system. The hardware detection system according to any one of claims 6 to 8, wherein the test host is connected to a plurality of UUTs through a router. For example, in the hardware detection system described in claim 9, the test host is assigned to an IP address after being powered on, and each UUT is allocated to an IP address after being powered on, and each UUT utilizes The assigned IP address communicates with the test host.