TW201401484A - Light-emitting component chip module, the circuit thereof, and method of connecting metal wires - Google Patents

Abstract

Disclosed is a light-emitting component chip module, comprising a plurality of light-emitting component chips in array alignment, a first metal wire for serially connecting arrays of light-emitting components and forming parallel connections between array, and at least one second metal wire for electrically connecting the two light-emitting component chips at the diagonal of 2 by 2 matrix, thereby letting electric current bypass the breakdown LED chip and pass through other LED chips in the same serial connection to achieve optimal electrical performance and reliability. The invention further provides a circuit and a method of connecting metal wires as described above.

Description

Light-emitting element chip set and circuit thereof and wire bonding method

The present invention relates to a light-emitting device chip set, and more particularly to a light-emitting element chip set (for example, an LED) and a circuit and wire bonding method thereof.

In the field of LED (Light Emitting Diode) packaging, in order to improve the efficacy of LEDs, a plurality of LED chips are usually arranged in one package, and most of them adopt constant current control to make each LED chip emit light. The characteristics are the same, so the circuit design mostly uses series design or series-parallel design, such as the series-parallel LED chip group 1 shown in Figure 1, but in these series-parallel designs, as long as one of the LED chips 10' is faulty (such as the first In the dotted circle shown in the figure, the other LED chips 10 in series will not be lit, and only two sets of series conduction (such as the arrow shown in Fig. 1) remain, thus causing problems of yield and reliability.

In order to avoid the above-mentioned defects, U.S. Patent No. 20080099772 discloses a light-emitting diode module 2, as shown in Figures 2A to 2C, which is formed on a substrate 20 by a plurality of n-type layers 22 and a p-type layer. 23 constituting LED element 21, and forming a pn junction between the n-type layer 22 and the p-type layer 23, so that when a current passes through the pn junction, the LED element 21 emits light, and each An LED element 21 has an n-electrode pad 220 and a p-electrode pad 230 for electrically connecting the n-electrode pads 220 and the p-electrode pads 230 with a metal conductive layer 24.

Furthermore, the LED elements 21 are arranged in an array to form a series-parallel conductive path by the metal conductive layer 24, as shown in FIG. 2B. The LED elements 21 are connected in series in a row, and three columns are connected in parallel with each other, and the p-electrode pads 230 of the upper and lower adjacent LED elements 21 are connected in parallel with the p-electrode pads 230. Therefore, as shown in the corresponding circuit diagram of FIG. 2C, when one of the LED elements 21' fails, the current S bypasses the faulty LED element 21', so that the other LED elements 21 in series can still emit light, as in the first As shown by the arrow in Fig. 2C, the traditional serial-parallel missing can be overcome to increase the reliability of the series-parallel design of the LED module.

However, the conventional light-emitting diode module 2 is fabricated by a semiconductor integrated circuit process, for example, a yellow light process, a coating process, an exposure and development process, an etching process, a chemical deposition process, etc., resulting in excessive cost and process time. It is lengthy and the process is quite complicated.

Therefore, how to overcome the above-mentioned problems of the prior art has become a problem that is currently being solved.

In view of the above-mentioned various deficiencies of the prior art, the present invention provides a light-emitting device wafer set comprising: a plurality of light-emitting element wafers arranged in an array of m rows and k columns, wherein m is an integer greater than 1, and k is greater than An integer of 1 and four light-emitting device chips corresponding to the intersection of two adjacent rows and two adjacent columns are defined as a 2 by 2 matrix; a plurality of first bonding wires are connected to the light-emitting device wafers in each row, and are connected in parallel The light-emitting element wafers at each of the rows of ends; and at least one second bonding wire electrically connected to the two light-emitting element wafers located at opposite corners of the 2 by 2 matrix.

In the above light-emitting element wafer set, the light-emitting element wafer has a p-electrode and an n-electrode, and the same p-electrode or the same n-electrode is connected. Several of the second bonding wires.

In the above light-emitting element wafer set, the light-emitting element wafer has a p-electrode and an n-electrode, and a part of the first and second bonding wires are stacked on the p-electrode or the n-electrode.

In the above-described light-emitting element wafer set, the light-emitting element wafer has a p-electrode and an n-electrode, and a part of the first and second bonding wires are electrically connected to the p-electrode or the n-electrode of the light-emitting element wafer.

In the above light-emitting device chip set, the light-emitting element chip has a p-electrode and an n-electrode, and the string is electrically connected to the adjacent two light-emitting elements of the first to k-th columns of the same row by the first bonding wire. The p-electrode and the n-electrode are formed between the wafers.

In the above-mentioned light-emitting device wafer set, the light-emitting element wafer has a p-electrode and an n-electrode, and is connected with a p-electrode or an n-electrode which are electrically connected to all of the light-emitting element wafers of the first column by the first bonding wire. Or a p-electrode or an n-electrode of all of the light-emitting element wafers of the k-th column.

In the above-mentioned light-emitting device wafer set, each of the light-emitting element wafers has a p-electrode and an n-electrode, so that two ends of the second bonding wire are electrically connected to one of the light-emitting element wafers at opposite corners of the 2 by 2 matrix. The p-electrode is on the n-electrode of the other light-emitting element wafer.

In the above-described light-emitting element wafer set, when the two-by-two matrix system is plural, the second bonding wire is electrically connected to two light-emitting element wafers in the same column of another two-by-two matrix.

In the above-described light-emitting element wafer set, when the two-by-two matrix system is plural, each of the light-emitting element wafers has a p-electrode and an n-electrode to make the light-emitting element The second bonding wire is electrically connected to the p-electrode or the n-electrode of the two light-emitting element chips of the same column of the other 2 by 2 matrix.

In the above-mentioned light-emitting device chip set, when the 2 by 2 matrix is plural, the second bonding wire is electrically connected to two rows of light-emitting element chips of different rows in any 2 by 2 matrix of the m-row k-column array.

In the aforementioned light-emitting element wafer set, the number of the first bonding wires is greater than or equal to (k+1)×m-2.

In the aforementioned light-emitting element wafer set, the number of the second bonding wires is greater than or equal to (k-1) × (m-1).

The foregoing light-emitting element wafer set further includes a carrier, and the array of light-emitting element wafers is disposed. In addition, an encapsulant is formed on the carrier to cover the light emitting device chips and the first and second bonding wires.

The present invention further provides a circuit for a light-emitting device chip set, comprising: a plurality of light-emitting element wafers; and a plurality of first bonding wires, wherein the light-emitting element chips are connected in series and in parallel, and electrically connected into an array circuit of m rows and k columns, and m is an integer greater than 1, k is an integer greater than 1, and four light-emitting element wafers whose conductive paths are located adjacent to two adjacent rows and adjacent two columns are defined as a 2 by 2 matrix circuit; and at least one The second bonding wire is electrically connected to the two light emitting element wafers located at opposite corners of the 2 by 2 matrix circuit.

In the above circuit, the light-emitting element chips are arranged in a non-array array.

In the above circuit, when the 2 by 2 matrix circuit is plural, the second bonding wire is electrically connected to two rows of light emitting element chips in different rows of the 2 by 2 matrix circuits of the m rows and k columns of array circuits.

The invention further provides a bonding wire connecting party of a light emitting device chip set The method is performed on a light-emitting device wafer array arranged in m rows and k columns, and m is an integer greater than 1, and k is an integer greater than 1. The bonding method includes: adjacent two rows and The four light-emitting device chips corresponding to the intersection of two adjacent columns are defined as a 2 by 2 matrix; at least one bonding wire connects the two light-emitting device wafers located at opposite corners of the 2 by 2 matrix, and the positions of the two light-emitting device wafers Is the i-th row j-th column and the i-th-th row j+1th column, or the i-th row j+1 column and the i+1th row j column respectively; i is an integer greater than 0; j is An integer greater than 0; i+1 is an integer not greater than m; and j+1 is an integer not greater than k.

The foregoing bonding method further includes electrodes of adjacent light-emitting element wafers in the respective rows in series, and parallel electrodes of the light-emitting element wafers at opposite ends of each row.

In the above connection method, when the 2 by 2 matrix is plural, the bonding wire is electrically connected to the two light emitting element wafers of the same column of the other 2 by 2 matrix.

In the above connection method, when the two-by-two matrix system is plural, the bonding wires are electrically connected to two rows of light-emitting element wafers of different rows in any two-by-two matrix of the m-row k-column array.

The present invention further provides a bonding wire bonding method for a light emitting device chip set, which is performed on a plurality of light emitting device wafers, wherein the bonding wire bonding method includes: an array circuit electrically connected in m rows and k columns, and the m system is An integer greater than 1, k is an integer greater than 1, and the conductive path is located in the adjacent two rows and the adjacent two columns correspond to the four light-emitting device wafers defined as a 2 by 2 matrix circuit; at least one wire connection The conductive path is located at two diagonals of the two-by-two matrix circuit, and the two light-emitting elements The conductive path positions of the chip are respectively the i-th column j-th column and the i-th-th row j+1 column, or the i-th row j+1 column and the i+1 row j column; i is greater than An integer of 0; j is an integer greater than 0; i+1 is an integer not greater than m; and j+1 is an integer not greater than k.

In the foregoing connection method, the array circuits of the m rows and k columns are composed of a series connection and a parallel connection.

In the above connection method, the light-emitting element chips are arranged in a non-array array.

In the above connection method, when the two-by-two matrix circuits are plural, the bonding wires are electrically connected to the two light-emitting element wafers in the same column of another 2 by 2 matrix circuit.

In the above connection method, when the 2 by 2 matrix circuit is plural, the bonding wire is electrically connected to the two rows of the light emitting device chips in any of the 2 by 2 matrix circuits of the m row and k column array circuits. .

It can be seen from the above that the light-emitting device chip set of the present invention and the circuit and the bonding wire bonding method thereof are arranged in an array or in a non-array arrangement, and the second bonding wire is connected by one of them. When the light-emitting element chip fails, the operation of the other light-emitting element chips in the same series is not affected, so that the reliability of the light-emitting element chip set can be improved.

Furthermore, by using a bonding wire as a bonding method, the process of the present invention is simpler and the process time is shorter than that of the semiconductor integrated circuit process of the prior art, so that the manufacturing cost can be greatly reduced.

The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can easily Other advantages and effects of the present invention are understood.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "first", "second" and "one" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments in the relative relationship are considered to be within the scope of the present invention. For example, "first bonding wire" as used herein is merely intended to be used in series and parallel connection, and "second bonding wire" is only used as a guiding current, and the line width of the first bonding wire is not limited to be smaller than the second bonding wire. Line width.

Fig. 3A is a top plan view showing the arrangement of the light-emitting element chip set 3 of the present invention.

The light-emitting element wafer set 3 includes a carrier (not shown), a plurality of light-emitting element wafers 30, a plurality of first bonding wires 31a, 31b, and a plurality of second bonding wires 32.

The carrier member is provided with the light-emitting element wafers 30.

The light-emitting device wafers 30 are arranged in an array of m rows and k columns, and m is an integer greater than 1, and k is an integer greater than 1, as shown in FIG. 3A, three rows and five columns, and will be located at any The four light-emitting element wafers 30 corresponding to the intersection of two adjacent rows and any two adjacent columns are defined as a 2 by 2 matrix A, such as The dotted rectangular circle shown in Fig. 3A.

In the present embodiment, the light-emitting element wafer 30 has a plurality of electrodes 300 which are divided into a p-electrode and an n-electrode. Furthermore, the light-emitting element wafer 30 may be an organic light-emitting diode (OLED), a polymer light emitting diode (PLED), a solid-state LED, a Laser Diode (LD) or a Vertical Cavity Surface Emitting Laser (VCSEL).

The first bonding wires 31a, 31b are arranged in series with the rows of the light-emitting device wafers 30, and the rows are formed in parallel. As shown in FIG. 3A, the five light-emitting device wafers 30 are connected in series in a row, and then The three rows are connected in parallel with each other.

In the embodiment, the first bonding wire 31a is electrically connected to the p electrode or the n electrode of the light emitting device chip 30. Specifically, the two ends of the first bonding wire 31a are electrically connected to the p-electrode of one of the light-emitting element wafers 30 and the n-electrode of the other light-emitting element chip 30 between the adjacent two light-emitting element wafers 30 in the same row. On, to form a series.

Furthermore, the other ends of the first bonding wires 31b are electrically connected to the n electrodes of all the light emitting device wafers 30 of the first column, and the two ends of the first bonding wires 31b are electrically connected to the fifth column. The p-electrodes of all of the light-emitting element wafers 30 are formed in parallel.

The second bonding wire 32 is electrically connected to the two light-emitting device wafers 30 located at opposite corners of the 2 by 2 matrix A, as shown by the thick oblique lines shown in FIG. 3A.

In the embodiment, the second bonding wire 32 is electrically connected to the p electrode or the n electrode of the light emitting device chip 30. Specifically, the two ends of the second bonding wire 32 are electrically connected to one of the opposite corners of the 2 by 2 matrix A. The p-electrode of the element wafer 30 is on the n-electrode of the other light-emitting element wafer 30.

Furthermore, as shown in FIG. 3B, a portion of the electrodes 300 (p electrodes or n electrodes) are stacked with the first and second bonding wires 31a, 32; in detail, the ball terminals 320 of the second bonding wires 32 are Stacked on the ball end 310 of the first bonding wire 31a.

As shown in FIGS. 4A and 4B, if one of the 2 by 2 matrix A fails, the current will be guided via the second bonding wire 32 (in the direction of the arrow in the figure) to the non-faulty state. The light-emitting element wafer 30 does not pass through the faulty light-emitting element wafer 30', so that the other light-emitting element wafers 30 in the same row in series can still emit light, so that the three sets can be turned on in series (such as the arrows shown in FIGS. 4A and 4B). .

5A to 5C, 6A to 6C, and 7A to 7C are design drawings of different embodiments in which two rows and three columns are connected in series. The second bonding wire 32' is electrically connected to the two light-emitting device wafers 30 in the same column of the 2 by 2 matrix A.

As shown in Figures 5C and 7A, the second bonding wire 32' is electrically connected to the n-electrode of the adjacent two light-emitting element wafers 30 of the same column.

Further, as shown in Figs. 6C, 7B and 7C, the second bonding wire 32' is electrically connected to the p-electrode of the adjacent light-emitting element wafer 30 of the same row.

Moreover, in a subsequent process, an encapsulant (not shown) is formed on the carrier to cover the light-emitting device wafer 30, the first and second bonding wires 31a, 31b, 32, 32'.

In the present invention, at least two bonding wires are connected to the same electrode 300, and one of the bonding wires (the first bonding wire 31a) is used as an original series circuit. The other bonding wires (second bonding wires 32, 32') are connected to other series wirings to constitute a wire bonding matrix, thereby improving the electrical reliability of the light emitting element chip group 3.

The present invention provides a bonding wire bonding method for a light-emitting element wafer set 3, as shown in FIGS. 8A and 8B, for performing a wire bonding process on an array of light-emitting element wafers 30a, 30b, 30c, 30d arranged in m rows and k columns, and m is an integer greater than 1, and k is an integer greater than one.

In the wire bonding method, the adjacent light-emitting device wafers 30 in each row are connected in series by the first bonding wires 31a, 31b, and the p-electrodes of all the light-emitting device wafers 30 at the upper ends are connected in parallel, and each The n electrodes of all of the light-emitting element wafers 30 arranged at the lower end are formed in parallel. Therefore, the number of the first bonding wires 31a, 31b is greater than or equal to (k+1) x m-2.

Next, four light-emitting element wafers corresponding to intersections of any two adjacent rows and any two adjacent columns are defined as a 2 by 2 matrix A, and the second bonding wires 32 are connected at the diagonal of the 2 by 2 matrix A. The light-emitting element wafers 30a, 30b are disposed, and one of the light-emitting element wafers 30a is located in the jth column of the ith row, and the other light-emitting element wafer 30b is located in the j+1th column of the (i+1)th row. In this embodiment, i is an integer greater than 0, j is an integer greater than 0, i+1 is an integer not greater than m, and j+1 is an integer not greater than k, such that the second bonding wire 32 is wired. In the upper right or lower left of the picture.

The bonding wire bonding method of the present invention reconnects the second bonding wire 32 to the light-emitting element wafers 30c, 30d located at the opposite corner of the other 2 by 2 matrix A', and one of the light-emitting element wafers 30c is located in the i-th row +1 column, and the other light-emitting element wafer 30d is located in the i+1th row j column. In this embodiment, i For an integer greater than 0, j is an integer greater than 0, i+1 is an integer not greater than m, and j+1 is an integer not greater than k, such that the second bonding wire 32 is oriented in the lower right or upper left direction of the figure. square.

The bonding wire bonding method of the present invention can also electrically connect the second bonding wire 32' to the two light emitting element wafers 30 of the same column of any two by two matrix A".

Furthermore, a plurality of second bonding wires 32 may be connected to the same electrode as required. As shown in FIG. 8A, two second bonding wires 32 are connected to the same n electrode of the light emitting device wafer 30d.

Therefore, the number of the 2 by 2 matrix A is (m-1) (k-1), and the number of the second bonding wires 32 is greater than or equal to (k-1) × (m-1).

In addition, the light-emitting device wafers 30 of the present invention can be disposed at random, in a non-array arrangement (as shown in FIG. 9), or a part of the light-emitting element wafers 30 in one of the arrays are offset, as long as they are electrically connected. The circuit is equivalent to the circuit shown in FIG. 8A. Therefore, the present invention provides a circuit and a connection method thereof. The first bonding wires 31a, 31b are connected in series and in parallel, and the second bonding wires 32, 32' are used. As a conduction current path, a simplified conductive path of the circuit constitutes an array circuit, and four of the light-emitting element wafers 30 whose conductive paths are located adjacent to two adjacent rows and adjacent columns are defined as a 2 by 2 matrix circuit.

In summary, the light-emitting device chip set and the bonding wire bonding method thereof of the present invention mainly use a second bonding wire connection method to guide a current bypassing the faulty light-emitting element wafer to make the other light-emitting element chips in the same series. Keeping operating, thus effectively improving the electrical reliability of the light-emitting device chip set.

Moreover, by using the bonding wire as a connection method, not only the process is simple, but also The process time is short, so the production cost can be greatly reduced.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

1‧‧‧LED chipset

10,10’‧‧‧LED chip

2‧‧‧Lighting diode module

20‧‧‧Substrate

21,21’‧‧‧LED components

22‧‧‧n-type layer

220‧‧‧n electrode pad

23‧‧‧p-type layer

230‧‧‧p electrode pad

24‧‧‧Metal conductive layer

3‧‧‧Lighting element chipset

30, 30', 30a, 30b, 30c, 30d‧ ‧ luminescent element wafer

300‧‧‧electrode

31a, 31b‧‧‧ first wire bond

310,320‧‧‧ ball end

32,32’‧‧‧second welding line

A, A’, A” ‧ ‧ 2 by 2 matrix

S‧‧‧ Current

1 is a circuit diagram of a conventional LED chip set; 2A to 2C are schematic views of a light-emitting diode module of US Pat. No. 20080099772; and FIG. 3A is a light-emitting element chip set of the present invention. FIG. 3B is a cross-sectional view showing the wiring method of the light-emitting element chip set of the present invention; FIGS. 4A and 4B are circuit diagrams showing the arrangement of the light-emitting element chip set of the present invention; FIGS. 5A to 5C An embodiment of the circuit diagram of the arrangement of the light-emitting element chipsets of the present invention; and FIGS. 6A to 6C are diagrams showing one embodiment of the circuit diagram of the light-emitting element chip set of the present invention; FIGS. 7A to 7C are An embodiment of a circuit diagram of a light-emitting device chip set of the present invention; and FIG. 8A is a schematic view of a wire bonding method of the light-emitting element chip set of the present invention; 8B is a schematic view showing the coordinates of an array of m rows and k columns of the light-emitting element chip set of the present invention; and FIG. 9 is a top view showing the arrangement of the light-emitting element chip set of the present invention.

3‧‧‧Lighting element chipset

30‧‧‧Lighting element chip

31a, 31b‧‧‧ first wire bond

32‧‧‧Second wire

A‧‧2 by 2 matrix

Claims (26)

A light-emitting element wafer set comprising: a plurality of light-emitting element wafers arranged in an array of m rows and k columns, wherein m is an integer greater than 1, k is an integer greater than 1, and is located adjacent to two adjacent rows The four light-emitting element wafers corresponding to the two columns intersect are defined as a 2 by 2 matrix; the plurality of first bonding wires are the light-emitting element wafers in the respective rows in series, and the light-emitting element wafers at the respective rows of the ends are connected; and at least one The second bonding wire is electrically connected to the two light emitting element wafers located at opposite corners of the 2 by 2 matrix. The light-emitting element wafer set according to claim 1, wherein the light-emitting element wafer has a p-electrode and an n-electrode, and a plurality of the second bonding wires are connected to the same p-electrode or to the same n-electrode. The light-emitting element wafer set according to claim 1, wherein the light-emitting element wafer has a p-electrode and an n-electrode, and a part of the first and second bonding wires are stacked on the p-electrode or the n-electrode . The light-emitting device wafer set according to claim 1, wherein the light-emitting device chip has a p-electrode and an n-electrode, and a part of the first and second bonding wires are electrically connected to the light-emitting device chip. Electrode or n-electrode. The light-emitting device wafer set according to claim 1, wherein the light-emitting device chip has a p-electrode and an n-electrode, and the string is electrically connected to the first row of the same row by the first bonding wire to The p-electrode and the n-electrode are arranged between the adjacent two light-emitting element wafers in the kth column. The light-emitting element wafer set according to claim 1, wherein the light-emitting element chip has a p-electrode and an n-electrode, and the light-emitting element is electrically connected to all the light-emitting elements of the first column by the first bonding wire. The p-electrode or the n-electrode of the wafer or the p-electrode or n-electrode of all the light-emitting element wafers of the k-th column. The light-emitting device wafer set according to claim 1, wherein each of the light-emitting device chips has a p-electrode and an n-electrode, so that two ends of the second bonding wire are electrically connected to the 2 by 2 matrix, respectively. The p-electrode of one of the light-emitting element wafers at the opposite corner and the n-electrode of the other of the light-emitting element wafers. The light-emitting device chip set according to claim 1, wherein when the 2 by 2 matrix is plural, the second bonding wire is electrically connected to two light-emitting elements of the same column of another 2 by 2 matrix. Wafer. The light-emitting device wafer set according to claim 1, wherein when the 2 by 2 matrix is plural, each of the light-emitting device chips has a p-electrode and an n-electrode, so that the second bonding wires are complexed. Electrically connected to the p-electrode or n-electrode of the two light-emitting element wafers of the same column of another 2 by 2 matrix. The light-emitting device chip set according to claim 1, wherein when the 2 by 2 matrix is plural, the second bonding wire is electrically connected to any 2 by 2 matrix of the m-row k-column array. Two different light-emitting element wafers in different rows. The light-emitting device wafer set according to claim 1, wherein the number of the first bonding wires is greater than or equal to (k+1)×m-2. The light-emitting device wafer set according to claim 1, wherein the number of the second bonding wires is greater than or equal to (k-1)×(m-1). The light-emitting device wafer set according to claim 1, further comprising a carrier, wherein the array of light-emitting element wafers is disposed. The light-emitting device wafer set according to claim 13 further comprising an encapsulant formed on the carrier to cover the light-emitting device wafer and the first and second bonding wires. A circuit of a light-emitting device chip set includes: a plurality of light-emitting element wafers; a plurality of first bonding wires, wherein the light-emitting element chips are connected in series and in parallel, electrically connected into an array circuit of m rows and k columns, and m is greater than An integer of 1 , k is an integer greater than 1, and four conductive element wafers whose conductive paths are located in adjacent rows and adjacent to each other are defined as a 2 by 2 matrix circuit; and at least a second bonding wire And electrically connecting the two light-emitting element wafers located at opposite corners of the 2 by 2 matrix circuit. The circuit of the light-emitting element chip set of claim 15, wherein the light-emitting element chips are arranged in a non-array array. The circuit of the light-emitting device chip set according to claim 15, wherein when the two-by-two matrix circuit is plural, the second bonding wire is electrically connected to any one of the m-row and k-row array circuits. Two rows of two light-emitting element wafers in a 2 by 2 matrix circuit. A bonding wire bonding method for a light-emitting device wafer set is performed on a light-emitting device wafer array arranged in m rows and k columns, and the wire bonding process is performed, and the m system is large In the integer of 1, k is an integer greater than 1, the wire bonding method includes: four light-emitting device wafers corresponding to the intersection of two adjacent rows and two adjacent columns are defined as a 2 by 2 matrix; at least one welding The wires are connected to the two light-emitting device wafers located at opposite corners of the 2 by 2 matrix, and the positions of the two light-emitting device wafers are respectively the i-th row j-th column and the i+1-th row j+1th column, or respectively I-th column j+1 column and i+1 row j column; i is an integer greater than 0; j is an integer greater than 0; i+1 is an integer not greater than m; and j+1 is not greater than k Integer. The bonding wire bonding method according to claim 18, comprising the electrodes of the adjacent light-emitting element chips in the respective rows in series, and paralleling the electrodes of the light-emitting element chips at the respective rows of ends. The bonding wire bonding method according to claim 18, wherein when the 2 by 2 matrix is plural, the bonding wire is electrically connected to the two light emitting element wafers of the same column of another 2 by 2 matrix. The bonding wire bonding method according to claim 18, wherein when the 2 by 2 matrix is plural, the bonding wire is electrically connected to any of the 2 by 2 matrix of the m row and k column array. Two light-emitting element wafers are arranged. A bonding wire bonding method for a light emitting device chip set is performed on a plurality of light emitting device wafers for performing a wire bonding process, and the bonding wire bonding method includes: Electrically connected into an array of m rows and k columns, and m is an integer greater than 1, k is an integer greater than 1, and the conductive path is located in the adjacent two rows and the adjacent two columns intersect four The light-emitting element wafer is defined as a 2 by 2 matrix circuit; at least one bonding wire is connected to two light-emitting element wafers whose conductive paths are located at opposite corners of the 2 by 2 matrix circuit, and the conductive path positions of the two light-emitting element wafers are respectively i The jth column and the i+1th row j+1 column, or the i th row j+1 column and the i+1 row j column respectively; i is an integer greater than 0; j is an integer greater than 0; i+1 is an integer not greater than m; and j+1 is an integer not greater than k. The wire bonding method according to claim 22, wherein the array of m rows and k columns is composed of a series connection and a parallel connection. The bonding wire bonding method according to claim 22, wherein the light emitting device chips are arranged in a non-array manner. The bonding wire bonding method according to claim 22, wherein when the 2 by 2 matrix circuit is plural, the bonding wire is electrically connected to two light emitting components of the same column of another 2 by 2 matrix circuit. Wafer. The bonding wire bonding method according to claim 22, wherein when the 2 by 2 matrix circuit is plural, the bonding wire is electrically connected to any 2 by 2 matrix of the m row k column array circuit Two rows of light-emitting element wafers in the circuit.