TW201327675A - Semiconductor manufacturing device and semiconductor manufacturing method - Google Patents
Semiconductor manufacturing device and semiconductor manufacturing method Download PDFInfo
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- TW201327675A TW201327675A TW101142372A TW101142372A TW201327675A TW 201327675 A TW201327675 A TW 201327675A TW 101142372 A TW101142372 A TW 101142372A TW 101142372 A TW101142372 A TW 101142372A TW 201327675 A TW201327675 A TW 201327675A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 claims abstract description 113
- 239000007789 gas Substances 0.000 claims abstract description 84
- 238000005530 etching Methods 0.000 claims abstract description 76
- RWRIWBAIICGTTQ-UHFFFAOYSA-N difluoromethane Chemical compound FCF RWRIWBAIICGTTQ-UHFFFAOYSA-N 0.000 claims abstract description 65
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 58
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000001301 oxygen Substances 0.000 claims abstract description 33
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 33
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 29
- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 claims abstract description 19
- 150000004767 nitrides Chemical class 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims description 47
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 41
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 17
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 16
- 229920005591 polysilicon Polymers 0.000 claims description 16
- 238000010438 heat treatment Methods 0.000 claims description 8
- 229910001925 ruthenium oxide Inorganic materials 0.000 claims description 6
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 claims description 6
- 229920006254 polymer film Polymers 0.000 claims description 4
- 229920000642 polymer Polymers 0.000 claims description 3
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims 1
- GVGCUCJTUSOZKP-UHFFFAOYSA-N nitrogen trifluoride Chemical compound FN(F)F GVGCUCJTUSOZKP-UHFFFAOYSA-N 0.000 claims 1
- 229910052707 ruthenium Inorganic materials 0.000 claims 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 113
- 229910052732 germanium Inorganic materials 0.000 description 11
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 11
- 238000009792 diffusion process Methods 0.000 description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 6
- 238000001816 cooling Methods 0.000 description 6
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 229910000449 hafnium oxide Inorganic materials 0.000 description 4
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 229910052735 hafnium Inorganic materials 0.000 description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 238000013022 venting Methods 0.000 description 2
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
- H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
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- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Plasma & Fusion (AREA)
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Abstract
Description
本發明係關於一種半導體製造裝置及方法，更詳細而言係關於蝕刻基板之裝置及方法。 The present invention relates to a semiconductor manufacturing apparatus and method, and more particularly to an apparatus and method for etching a substrate.
為了製造半導體元件，需要蒸鍍、照相、蝕刻、灰化(ashing)、及清洗等多種製程。其等之中，蝕刻製程是在形成於如晶圓那樣的半導體基板上的薄膜中去除所期望之區域的製程，且最近使用的是利用電漿而蝕刻薄膜之方法。於如此之蝕刻製程中，重點考慮的要素之一為蝕刻選擇比。蝕刻選擇比表示不蝕刻其他薄膜而可僅蝕刻所欲蝕刻之薄膜的程度。 In order to manufacture a semiconductor element, various processes such as evaporation, photographing, etching, ashing, and cleaning are required. Among them, the etching process is a process of removing a desired region in a thin film formed on a semiconductor substrate such as a wafer, and a method of etching a thin film by using plasma is recently used. One of the key considerations in such an etching process is the etching selectivity. The etch selection ratio indicates the extent to which only the film to be etched can be etched without etching other films.
薄膜中，氮化矽膜(Silicon Nitride，SiN)之蝕刻一般如以下方式進行。首先，使基板位於製程腔室內之夾盤(chuck)上，向製程腔室內供給源氣體，並由該等氣體於製程腔室內產生電漿。電漿與薄膜發生化學反應而於基板上去除薄膜。作為用於蝕刻氮化矽膜之源氣體，可使用四氟化碳(CF4，tetra fluoro methane)、三氟甲烷(CHF3，trifluoro methane)、及氧O2。然而，於使用上述裝置構造及上述氣體蝕刻氮化矽膜之情形時，即便如夾盤之溫度或製程腔室內之壓力等製程條件產生多種變化，氮化矽膜相對於氧化矽膜或多晶矽膜之蝕刻選擇比亦較低，約為30：1~50：1左右。 In the thin film, etching of a tantalum nitride film (SiN) is generally performed in the following manner. First, the substrate is placed on a chuck in the process chamber, source gas is supplied to the process chamber, and plasma is generated in the process chamber by the gases. The plasma chemically reacts with the film to remove the film on the substrate. As a source gas for etching the tantalum nitride film, tetrafluorocarbon (CF 4 ), trifluoromethane (CHF 3 ), and oxygen O 2 can be used . However, in the case of using the above device configuration and the above-described gas etching of the tantalum nitride film, the tantalum nitride film is opposed to the tantalum oxide film or the polysilicon film even if various process variations such as the temperature of the chuck or the pressure in the process chamber are caused. The etching selectivity ratio is also low, about 30:1~50:1.
[先前技術文獻] [Previous Technical Literature]
[專利文獻] [Patent Literature]
[專利文獻1]日本專利公開第10-2004-172584號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 10-2004-172584
本發明之實施形態提供給一種於對基板進行蝕刻製程時，可提高氮化膜相對於其他薄膜之蝕刻選擇比的半導體製造裝置及方法。 Embodiments of the present invention provide a semiconductor manufacturing apparatus and method for improving an etching selectivity of a nitride film with respect to other thin films when an etching process is performed on a substrate.
本發明所欲解決之課題並不限制於此，從業者可根據以下之記載明確地理解未提及之其他課題。 The subject matter to be solved by the present invention is not limited thereto, and the practitioner can clearly understand other problems not mentioned based on the following description.
本發明提供一種對形成於基板上之氮化膜進行蝕刻的半導體製造方法。根據一實施形態，半導體製造方法如下：使基板位於製程腔室內，於前述製程腔室之外部由第1源氣體產生電漿，並將前述電漿供給至前述製程腔室；且前述第1源氣體包含二氟甲烷CH2F2、氮N2、及氧O2。 The present invention provides a semiconductor manufacturing method for etching a nitride film formed on a substrate. According to one embodiment, the semiconductor manufacturing method is as follows: the substrate is placed in the processing chamber, the plasma is generated from the first source gas outside the processing chamber, and the plasma is supplied to the processing chamber; and the first source The gas contains difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 .
根據一例，前述二氟甲烷CH2F2之供給量可為10~500 SCCM，前述氮之供給量可為100~2500 SCCM，且前述氧之供給量可為100~2500 SCCM。又，於製程進行時，供前述基板放置之基座之溫度可為0~70℃，且前述製程腔室內之壓力可為300~1000 mTorr。又，於製程進行時，用於產生前述電漿而供給之電力可為1000~3000 W。 According to an example, the supply amount of the difluoromethane CH 2 F 2 may be 10 to 500 SCCM, the supply amount of the nitrogen may be 100 to 2500 SCCM, and the supply amount of the oxygen may be 100 to 2500 SCCM. Moreover, during the process, the temperature of the susceptor placed on the substrate may be 0 to 70 ° C, and the pressure in the process chamber may be 300 to 1000 mTorr. Further, when the process is performed, the power for supplying the plasma may be 1000 to 3000 W.
根據一例，可將第2源氣體供給至將前述電漿向前述製程腔室供給的通路，前述第2源氣體可包含三氟化氮NF3。於製程進行時，前述三氟化氮之供給量可大於0且為1000 SCCM以下。 According to an example, the second source gas may be supplied to a passage for supplying the plasma to the processing chamber, and the second source gas may include nitrogen trifluoride NF 3 . The amount of the nitrogen trifluoride supplied may be greater than 0 and less than 1000 SCCM during the course of the process.
根據一例，前述氮化膜可為氮化矽膜。 According to an example, the nitride film may be a tantalum nitride film.
根據其他實施形態，提供一種提高基板上氮化膜相對於其他種類之膜的蝕刻選擇比的半導體製造方法。根據前 述半導體製造方法，由第1源氣體產生電漿，藉由所產生之電漿對基板進行蝕刻製程；且前述第1源氣體包含二氟甲烷CH2F2、氮N2、及氧O2。 According to another embodiment, there is provided a semiconductor manufacturing method for improving an etching selectivity of a nitride film on a substrate with respect to other types of films. According to the semiconductor manufacturing method described above, the plasma is generated by the first source gas, and the substrate is etched by the generated plasma; and the first source gas contains difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O. 2 .
根據一例，前述其他種類之膜為氧化矽膜或多晶矽膜，於蝕刻製程進行時，前述二氟甲烷於前述氧化矽膜或前述多晶矽膜上形成聚合物膜，前述氮與前述氧去除前述聚合物膜，藉此增加前述氮化矽膜相對於前述氧化矽膜或前述多晶矽膜的蝕刻選擇比。 According to an example, the other type of film is a ruthenium oxide film or a polysilicon film. When the etching process is performed, the difluoromethane forms a polymer film on the yttrium oxide film or the polysilicon film, and the nitrogen and the oxygen remove the polymer. The film thereby increasing the etching selectivity of the tantalum nitride film with respect to the foregoing hafnium oxide film or the polysilicon film.
根據一例，前述二氟甲烷CH2F2之供給量可為10~500 SCCM，前述氮之供給量可為100~2500 SCCM，且前述氧之供給量可為100~2500 SCCM。又，於製程進行時，供前述基板放置之基座之溫度可為0~70℃，前述製程腔室內之壓力可為300~1000 mTorr。又，於製程進行時，用於產生前述電漿而供給之電力可為1000~3000 W。 According to an example, the supply amount of the difluoromethane CH 2 F 2 may be 10 to 500 SCCM, the supply amount of the nitrogen may be 100 to 2500 SCCM, and the supply amount of the oxygen may be 100 to 2500 SCCM. Moreover, during the process, the temperature of the susceptor placed on the substrate may be 0 to 70 ° C, and the pressure in the process chamber may be 300 to 1000 mTorr. Further, when the process is performed, the power for supplying the plasma may be 1000 to 3000 W.
根據一例，可藉由降低前述基座之溫度，而增加前述氮化矽膜相對於前述多晶矽膜之蝕刻選擇比。 According to an example, the etching selectivity of the tantalum nitride film with respect to the polysilicon film can be increased by lowering the temperature of the susceptor.
根據一例，可藉由增加前述二氟甲烷與前述氧之供給量，而增加前述氮化矽膜相對於前述氧化矽膜之蝕刻選擇比。 According to an example, the etching selectivity of the tantalum nitride film with respect to the tantalum oxide film can be increased by increasing the supply amount of the difluoromethane and the oxygen.
根據一例，可於前述基板所處之製程腔室之外部產生前述電漿後，將其供給至前述製程腔室。將第2源氣體供給至將前述電漿向前述製程腔室供給的通路，前述第2源氣體可包含三氟化氮NF3。 According to an example, the plasma may be generated outside the processing chamber in which the substrate is placed, and then supplied to the processing chamber. The second source gas is supplied to a passage for supplying the plasma to the processing chamber, and the second source gas may include nitrogen trifluoride NF 3 .
又，本發明提供一種半導體製造裝置。前述半導體製造裝置包含：製程單元，其進行蝕刻製程；及電漿供給單元，其設於前述製程單元之外部，向前述製程單元供給電 漿。前述製程單元包含：製程腔室；及基座，其位於前述製程腔室內，支持基板，並具有加熱構件。前述電漿供給單元包含：電漿室，其設於前述製程單元之外部，並於內部具有放電空間；第1源氣體供給部，其向前述放電空間供給第1源氣體；電力施加部，其以於前述放電空間內由第1源氣體產生電漿之方式提供電力；及流入管道，其形成為將前述放電空間中所產生之電漿向前述製程腔室供給的通路。前述第1源氣體包含二氟甲烷CH2F2、氮N2、及氧O2。 Further, the present invention provides a semiconductor manufacturing apparatus. The semiconductor manufacturing apparatus includes: a process unit that performs an etching process; and a plasma supply unit that is disposed outside the process unit to supply plasma to the process unit. The process unit includes: a process chamber; and a susceptor located in the process chamber, supporting the substrate, and having a heating member. The plasma supply unit includes a plasma chamber provided outside the processing unit and having a discharge space therein, a first source gas supply unit that supplies a first source gas to the discharge space, and a power application unit. The electric power is supplied from the first source gas in the discharge space to supply electric power, and the inflow pipe is formed as a passage for supplying the plasma generated in the discharge space to the processing chamber. The first source gas contains difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 .
根據一例，前述電漿室可於前述製程腔室之上部與前述製程腔室結合。 According to an example, the plasma chamber can be coupled to the process chamber above the processing chamber.
根據一例，前述製程單元進而可包含擋板，該擋板位於前述基座之上部、且於上下方向上形成有多個孔。 According to an example, the process unit may further include a baffle that is located above the susceptor and has a plurality of holes formed in the vertical direction.
根據一例，前述電漿供給單元進而可包含第2源氣體供給部，該第2源氣體供給部向如下通路供給第2源氣體，該通路係使前述放電空間內所產生之前述電漿流向前述製程腔室。前述第2源氣體可包含三氟化氮NF3。 According to an example, the plasma supply unit may further include a second source gas supply unit that supplies the second source gas to the passage that causes the plasma generated in the discharge space to flow to the front side Process chamber. The second source gas may include nitrogen trifluoride NF 3 .
根據本發明之實施形態，於對基板進行蝕刻製程時，可提高氮化膜之蝕刻選擇比。 According to the embodiment of the present invention, the etching selectivity of the nitride film can be improved when the substrate is subjected to an etching process.
又，根據本發明之實施形態，於利用電漿對基板進行蝕刻製程時，可較大地提高氮化矽膜相對於氧化矽膜或多晶矽膜之蝕刻選擇比。 Further, according to the embodiment of the present invention, when the substrate is etched by plasma, the etching selectivity of the tantalum nitride film with respect to the ruthenium oxide film or the polysilicon film can be greatly improved.
以下，參照隨附之圖式，對本發明之一實施形態之半導體製造裝置及半導體製造方法進行詳細說明。於說明本 發明時，當判斷對於相關聯之公知之構成或功能之具體說明會模糊本發明主旨之情形時，省略其詳細說明。 Hereinafter, a semiconductor manufacturing apparatus and a semiconductor manufacturing method according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. Explain this In the present invention, a detailed description of the present invention will be omitted when it is judged that the specific description of the related configuration or function is omitted.
本實施形態中，基板可為半導體晶圓。然而，並不限定於此，基板亦可為如玻璃基板等其他種類之基板。 In this embodiment, the substrate may be a semiconductor wafer. However, the present invention is not limited thereto, and the substrate may be another type of substrate such as a glass substrate.
圖1係表示本發明之一實施形態之半導體製造裝置的圖式。 Fig. 1 is a view showing a semiconductor manufacturing apparatus according to an embodiment of the present invention.
參照圖1，半導體製造裝置1利用電漿而蝕刻基板W上之薄膜。所欲蝕刻之薄膜可為氮化膜。根據一例，氮化膜可為氮化矽膜(Silicon nitride)。 Referring to Fig. 1, a semiconductor manufacturing apparatus 1 etches a thin film on a substrate W by using plasma. The film to be etched may be a nitride film. According to an example, the nitride film may be a silicon nitride film.
半導體製造裝置1具有：製程單元(processing unit，100)、排氣單元(exhausting unit，200)、及電漿供給單元(plasma supplying unit，300)。製程單元100中設置有基板，並具有進行蝕刻製程之空間。排氣單元200係將滯留於製程腔室100內部之製程氣體及於基板處理過程中產生之反應部產物等向外部排出，且將製程腔室100內之壓力維持為設定壓力。電漿供給單元300係於製程單元100之外部由製程氣體生成電漿(plasma)，並將其供給至製程單元100。 The semiconductor manufacturing apparatus 1 has a processing unit (100), an exhaust unit (200), and a plasma supply unit (300). The process unit 100 is provided with a substrate and has a space for performing an etching process. The exhaust unit 200 discharges the process gas remaining inside the process chamber 100 and the product of the reaction portion generated during the substrate processing to the outside, and maintains the pressure in the process chamber 100 at a set pressure. The plasma supply unit 300 generates plasma from the process gas outside the process unit 100 and supplies it to the process unit 100.
製程單元100具有製程腔室110、基板支持部120、及擋板130。於製程腔室110之內部形成有進行基板處理製程之處理空間111。就製程腔室110而言，上部壁可開放，且於側壁形成開口(未圖示)。基板通過開口而出入於製程腔室110之內部。開口可藉由如門(未圖示)等開閉構件開閉。於製程腔室110之底面形成有排氣孔112。排氣孔112與排氣單元200連接，以提供將滯留於製程腔室110內部之氣體與反應部產物向外部排出之通路。 The process unit 100 has a process chamber 110, a substrate support portion 120, and a baffle 130. A processing space 111 for performing a substrate processing process is formed inside the processing chamber 110. In the case of the process chamber 110, the upper wall can be opened and an opening (not shown) is formed in the side wall. The substrate enters and exits the interior of the process chamber 110 through the opening. The opening can be opened and closed by an opening and closing member such as a door (not shown). A vent hole 112 is formed in a bottom surface of the process chamber 110. The vent hole 112 is connected to the exhaust unit 200 to provide a passage for discharging the gas remaining inside the process chamber 110 and the reaction portion product to the outside.
基板支持部120支持基板W。基板支持部120包含基座121與支持軸122。基座121位於處理空間111內，並為圓板形狀。基座121係藉由支持軸122支持。基板W位於基座121之上表面。可於基座121內部設置電極(未圖示)。電極與外部電源連接，藉由施加之電力產生靜電。產生之靜電可將基板W固定於基座121上。可於基座121內部設置加熱構件125。根據一例，加熱構件125可為加熱線圈。又，可於基座121內部設置冷卻構件126。冷卻構件可為供冷卻水流通之冷卻線。加熱構件125將基板W加熱至已設定之溫度。冷卻構件126強制冷卻基板W。可將製程處理結束之基板W冷卻至常溫狀態、或進行下一製程所需之溫度。 The substrate supporting portion 120 supports the substrate W. The substrate supporting portion 120 includes a base 121 and a support shaft 122. The susceptor 121 is located in the processing space 111 and has a circular plate shape. The base 121 is supported by a support shaft 122. The substrate W is located on the upper surface of the susceptor 121. An electrode (not shown) may be provided inside the susceptor 121. The electrodes are connected to an external power source to generate static electricity by the applied power. The generated static electricity can fix the substrate W to the susceptor 121. A heating member 125 may be disposed inside the susceptor 121. According to an example, the heating member 125 can be a heating coil. Further, a cooling member 126 may be provided inside the susceptor 121. The cooling member may be a cooling line through which cooling water flows. The heating member 125 heats the substrate W to a set temperature. The cooling member 126 forcibly cools the substrate W. The substrate W after the completion of the process can be cooled to a normal temperature state or a temperature required for the next process.
擋板130位於基座121之上部。於擋板130上形成有孔131。孔131係作為自擋板130之上表面至下表面為止之貫通孔，且均勻地形成於擋板130之各區域內。 The baffle 130 is located above the base 121. A hole 131 is formed in the baffle 130. The hole 131 serves as a through hole from the upper surface to the lower surface of the baffle 130, and is uniformly formed in each region of the baffle 130.
再次參照圖1，電漿供給單元300位於製程腔室110之上部。電漿供給單元300使源氣體放電而生成電漿，並將所生成之電漿供給至處理空間111。電漿供給單元300包含：電漿室310、第1源氣體供給部320、第2源氣體供給部322、電力施加部330、及流入管道340。 Referring again to FIG. 1, the plasma supply unit 300 is located above the process chamber 110. The plasma supply unit 300 discharges the source gas to generate plasma, and supplies the generated plasma to the processing space 111. The plasma supply unit 300 includes a plasma chamber 310, a first source gas supply unit 320, a second source gas supply unit 322, a power application unit 330, and an inflow conduit 340.
電漿室310係位於製程腔室110之外部。根據一例，電漿室310位於製程腔室110之上部並與製程腔室110結合。就電漿室310而言，於內部形成有上表面及下表面均開放之放電空間311。電漿室310之上端係藉由氣體供給孔315密閉。氣體供給孔315與第1源氣體供給部320連接。第1源氣體係通過氣體供給孔315而供給至放電空間311。 第1源氣體包含二氟甲烷(CH2F2，Difluoromethane)、氮N2、及氧O2。第1源氣體可選擇性地進一步包含四氟化碳(CF4，Tetrafluoromethane)等其他種類之氣體。 The plasma chamber 310 is located outside of the process chamber 110. According to one example, the plasma chamber 310 is located above the process chamber 110 and is coupled to the process chamber 110. In the plasma chamber 310, a discharge space 311 in which both the upper surface and the lower surface are open is formed inside. The upper end of the plasma chamber 310 is hermetically sealed by a gas supply hole 315. The gas supply hole 315 is connected to the first source gas supply unit 320. The first source gas system is supplied to the discharge space 311 through the gas supply hole 315. The first source gas contains difluoromethane (CH 2 F 2 , Difluoromethane), nitrogen N 2 , and oxygen O 2 . The first source gas may optionally further contain other kinds of gases such as carbon tetrafluoride (CF 4 ).
電力施加部330向放電空間311施加高頻電力。電力施加部330包含天線331與電源332。 The power application unit 330 applies high frequency power to the discharge space 311. The power application unit 330 includes an antenna 331 and a power source 332.
天線331為感應耦合形電漿ICP天線，並為線圈形狀。天線331係於電漿室310之外部以複數圈捲繞在電漿室310上。天線331在對應於放電空間311之區域內捲繞於電漿室310上。天線331之一端與電源332連接，另一端接地。 The antenna 331 is an inductively coupled plasma ICP antenna and is in the shape of a coil. The antenna 331 is wound around the plasma chamber 310 in a plurality of turns on the plasma chamber 310. The antenna 331 is wound around the plasma chamber 310 in a region corresponding to the discharge space 311. One end of the antenna 331 is connected to the power source 332, and the other end is grounded.
電源332向天線331供給高頻電流。將供給至天線331之高頻電力施加至放電空間311。藉由高頻電流使放電空間311中形成感應電場，放電空間311內之第1源氣體自感應電場獲得離子化所需之能量而轉換為電漿狀態。 The power source 332 supplies a high frequency current to the antenna 331. The high frequency power supplied to the antenna 331 is applied to the discharge space 311. An induced electric field is formed in the discharge space 311 by the high-frequency current, and the first source gas in the discharge space 311 is converted into a plasma state by obtaining energy required for ionization from the induced electric field.
電力施加部之構造並不限定於上述示例，可使用用於自源氣體產生電漿之多種構造。 The configuration of the power application portion is not limited to the above example, and various configurations for generating plasma from the source gas can be used.
流入管道340係位於電漿室310與製程腔室110之間。流入管道340將製程腔室110之開放的上表面密閉，其下端與擋板130結合。於流入管道340之內部形成有流入空間341。流入空間341將放電空間311與處理空間111連接，形成為將放電空間311內所生成之電漿向處理空間111供給的通路。 The inflow conduit 340 is located between the plasma chamber 310 and the process chamber 110. The inflow conduit 340 seals the open upper surface of the process chamber 110 and the lower end thereof is coupled to the baffle 130. An inflow space 341 is formed inside the inflow pipe 340. The inflow space 341 connects the discharge space 311 to the processing space 111, and is formed as a path for supplying the plasma generated in the discharge space 311 to the processing space 111.
流入空間341可包含流入口341a與擴散空間341b。流入口341a位於放電空間311之下部，並與放電空間311連接。放電空間311中所生成之電漿通過流入口341a而流入。擴散空間341b位於流入口341a之下部，並將流入口341a與處理空間111連接。就擴散空間341b而言，越位於 下方，橫截面積越變大。擴散空間341b可具有倒漏斗形狀。由流入口341a供給之電漿在通過擴散空間341b期間被擴散。 The inflow space 341 may include an inflow port 341a and a diffusion space 341b. The inflow port 341a is located below the discharge space 311 and is connected to the discharge space 311. The plasma generated in the discharge space 311 flows in through the inflow port 341a. The diffusion space 341b is located below the inflow port 341a, and connects the inflow port 341a to the processing space 111. As far as the diffusion space 341b is concerned, the more Below, the cross-sectional area becomes larger. The diffusion space 341b may have an inverted funnel shape. The plasma supplied from the inflow port 341a is diffused during passage through the diffusion space 341b.
將放電空間311中所產生之電漿向製程腔室110供給之通路，可與第2源氣體供給部322連接。例如，第2源氣體供給部322於天線331之下端所處之位置與擴散空間341b之上端所處之位置之間，向供電漿流通之通路供給第2源氣體。根據一例，第2源氣體包含三氟化氮(NF3，Nitrogen trifluoride)。亦可選擇性地不供給第2源氣體而僅以第1源氣體進行蝕刻製程。 The passage for supplying the plasma generated in the discharge space 311 to the processing chamber 110 can be connected to the second source gas supply unit 322. For example, the second source gas supply unit 322 supplies the second source gas to the path through which the power supply slurry flows between the position where the lower end of the antenna 331 is located and the position where the upper end of the diffusion space 341b is located. According to an example, the second source gas contains nitrogen trifluoride (NF 3 , Nitrogen trifluoride). Alternatively, the second source gas may be selectively supplied, and only the first source gas may be subjected to an etching process.
其次，利用圖1之半導體製造裝置來說明蝕刻基板之方法。圖1之半導體製造裝置為遠程電漿裝置之1種，該遠程電漿裝置係於製程處理單元之外部產生電漿，並藉由下游(downstream)方式將其供給至製程腔室110。根據本實施形態，作為源氣體可使用二氟甲烷CH2F2、三氟化氮NF3、氮N2、及氧O2。可將二氟甲烷CH2F2、氮N2、及氧O2直接供給至放電空間311，而將三氟化氮NF3供給至將放電空間311內所產生之電漿向製程腔室110供給的通路。作為第1源氣體，可追加性地進一步使用四氟化碳CF4。 Next, a method of etching a substrate will be described using the semiconductor manufacturing apparatus of FIG. The semiconductor manufacturing apparatus of FIG. 1 is one type of remote plasma apparatus which generates plasma outside the process processing unit and supplies it to the process chamber 110 by means of a downstream method. According to the present embodiment, difluoromethane CH 2 F 2 , nitrogen trifluoride NF 3 , nitrogen N 2 , and oxygen O 2 can be used as the source gas. Difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 may be directly supplied to the discharge space 311, and nitrogen trifluoride NF 3 may be supplied to the plasma generated in the discharge space 311 to the process chamber 110. The path of supply. As the first source gas, carbon tetrafluoride CF 4 can be additionally used in addition.
於進行蝕刻製程時，與使用四氟化碳CF4或三氟甲烷CHF3氣體作為源氣體之情形相比，於一併使用二氟甲烷CH2F2、氮N2、及氧O2之情形時，同時進行使二氟甲烷CH2F2於多晶矽膜(polysilicon)與氧化矽膜(Silicon oxide)上形成CxHy之聚合物膜之機制、與藉由氧O2與氮N2去除前述聚合物膜之機制，藉此，可實現氮化矽膜之高選擇比。 When the etching process is performed, difluoromethane CH 2 F 2 , nitrogen N 2 , and oxygen O 2 are used together as compared with the case of using carbon tetrafluoride CF 4 or trifluoromethane CHF 3 gas as a source gas. In this case, the mechanism of forming a polymer film of C x H y on the polysilicon and the sulphide oxide film by difluoromethane CH 2 F 2 is simultaneously performed, and oxygen O 2 and nitrogen N 2 are used. The mechanism of removing the aforementioned polymer film, whereby a high selectivity ratio of the tantalum nitride film can be achieved.
為了實現氮化矽膜相對於氧化矽膜與多晶矽膜之高選 擇比，可利用以下之製程條件進行蝕刻製程。於此情形時，可實現如下之高選擇比：氮化矽膜相對於氧化矽膜之選擇比約為100：1~3000：1，且氮化矽膜相對於多晶矽膜之選擇比約為100：1~1000：1。 In order to achieve high selectivity of tantalum nitride film relative to tantalum oxide film and polycrystalline germanium film The etching process can be performed using the following process conditions. In this case, the following high selectivity ratio can be achieved: the selection ratio of the tantalum nitride film to the tantalum oxide film is about 100:1 to 3000:1, and the selection ratio of the tantalum nitride film to the polycrystalline germanium film is about 100. :1~1000:1.
(製程條件) (process conditions)
基座之溫度：0~70℃ Base temperature: 0~70°C
二氟甲烷CH2F2氣體之供給量：10~500 SCCM Supply of difluoromethane CH 2 F 2 gas: 10~500 SCCM
三氟化氮NF3氣體之供給量：0~1000 SCCM Supply of nitrogen trifluoride NF 3 gas: 0~1000 SCCM
氮N2氣體之供給量：100~2500 SCCM Supply of nitrogen N 2 gas: 100~2500 SCCM
氧O2氣體之供給量：100~2500 SCCM Supply of oxygen O 2 gas: 100~2500 SCCM
電力：1000~3000 W Electricity: 1000~3000 W
製程腔室內之壓力：300~1000 mTorr Pressure in the process chamber: 300~1000 mTorr
圖2~4分別係表示利用如圖1所示於製程腔室110之外部生成電漿、而以下游方式向製程腔室供給電漿的裝置，使用二氟甲烷、三氟化氮、氮、及氧作為源氣體而進行蝕刻製程時，氮化矽膜之蝕刻選擇比的實驗例。 2 to 4 respectively show a device for supplying plasma to the process chamber in a downstream manner by using plasma generated outside the process chamber 110 as shown in FIG. 1, using difluoromethane, nitrogen trifluoride, nitrogen, An experimental example of an etching selectivity ratio of a tantalum nitride film when an etching process is performed using oxygen as a source gas.
圖2所示之實驗例表示氮化矽膜相對於氧化矽膜之蝕刻選擇比顯著提高之情形。可知：於如圖2所示提供基座之溫度、製程腔室內之壓力、二氟甲烷CH2F2、三氟化氮NF3、氧O2、及氮N2之供給量、以及電力時，氮化矽膜相對於氧化矽膜之蝕刻選擇比非常高，約為2984：1。 The experimental example shown in Fig. 2 shows a case where the etching selectivity of the tantalum nitride film with respect to the tantalum oxide film is remarkably improved. It can be seen that the temperature of the susceptor, the pressure in the process chamber, the supply of difluoromethane CH 2 F 2 , nitrogen trifluoride NF 3 , oxygen O 2 , and nitrogen N 2 , and the power supply are provided as shown in FIG. 2 . The etching selectivity ratio of the tantalum nitride film to the tantalum oxide film is very high, about 2984:1.
圖3所示之實驗例表示氮化矽膜相對於多晶矽膜之蝕刻選擇比顯著提高之情形。可知：於如圖3所示提供基座之溫度、製程腔室內之壓力、二氟甲烷CH2F2、三氟化氮NF3、氧O2、及氮N2之供給量、以及電力時，氮化矽膜相對於多晶矽膜之蝕刻選擇比非常高，約為1000：1。 The experimental example shown in Fig. 3 shows a case where the etching selectivity of the tantalum nitride film with respect to the polycrystalline germanium film is remarkably improved. It can be seen that the temperature of the susceptor, the pressure in the process chamber, the supply amount of difluoromethane CH 2 F 2 , nitrogen trifluoride NF 3 , oxygen O 2 , and nitrogen N 2 , and the electric power are provided as shown in FIG. 3 . The etching selectivity ratio of the tantalum nitride film to the polycrystalline germanium film is very high, about 1000:1.
圖4所示之實驗例表示相對於氧化矽膜及多晶矽膜之全部而言，氮化矽膜之蝕刻選擇比大幅提高之情形。可知：於如圖4所示提供基座之溫度、製程腔室內之壓力、二氟甲烷CH2F2、三氟化氮NF3、氧O2、及氮N2之供給量、以及電力時，氮化矽膜相對於氧化矽膜之蝕刻選擇比約為180：1，且氮化矽膜相對於多晶矽膜之蝕刻選擇比為450：1，故而相對於氧化矽膜及多晶矽膜之全部而言，氮化矽膜之蝕刻選擇比非常高。 The experimental example shown in FIG. 4 shows a case where the etching selectivity of the tantalum nitride film is greatly improved with respect to all of the tantalum oxide film and the poly germanium film. It can be seen that the temperature of the susceptor, the pressure in the process chamber, the supply amount of difluoromethane CH 2 F 2 , nitrogen trifluoride NF 3 , oxygen O 2 , and nitrogen N 2 , and the electric power are provided as shown in FIG. 4 . The etching selectivity ratio of the tantalum nitride film to the tantalum oxide film is about 180:1, and the etching selectivity ratio of the tantalum nitride film to the polycrystalline germanium film is 450:1, so that it is relative to the entire tantalum oxide film and the poly germanium film. In other words, the etching selectivity of the tantalum nitride film is very high.
圖5係表示於利用與圖1之裝置構造不同地、於製程腔室內部直接產生電漿之構造的裝置，並使用二氟甲烷CH2F2、氧O2、氮N2、及氬Ar氣體作為源氣體而進行蝕刻製程時，氮化矽膜相對於氧化矽膜與多晶矽膜之蝕刻選擇比的實驗例。 Figure 5 is a view showing a configuration in which a plasma is directly generated inside a process chamber by using a device structure different from that of Figure 1, and using difluoromethane CH 2 F 2 , oxygen O 2 , nitrogen N 2 , and argon Ar An experimental example of the etching selectivity of the tantalum nitride film with respect to the tantalum oxide film and the polycrystalline germanium film when the gas is used as the source gas for the etching process.
根據圖5所示之實驗例可知：於如圖5所示提供基座之溫度、製程腔室內之壓力、二氟甲烷CH2F2、氬Ar、氧O2、及氮N2之供給量、以及電力時，氮化矽膜相對於氧化矽膜之蝕刻選擇比約為36：1，氮化矽膜相對於多晶矽膜之蝕刻選擇比約為48：1，與使用如圖1之裝置構造而進行蝕刻製程時相比，蝕刻選擇比相對來說非常低。 According to the experimental example shown in FIG. 5, the supply of the temperature of the susceptor, the pressure in the process chamber, the difluoromethane CH 2 F 2 , the argon Ar, the oxygen O 2 , and the nitrogen N 2 is provided as shown in FIG. 5 . And electric power, the etching selectivity ratio of the tantalum nitride film to the tantalum oxide film is about 36:1, and the etching selectivity ratio of the tantalum nitride film to the polycrystalline germanium film is about 48:1, and the device structure is as shown in FIG. The etching selectivity is relatively low compared to when performing an etching process.
又，根據本發明之實施形態可知：對於在圖1之裝置構造中使用包含二氟甲烷CH2F2、三氟化氮NF3、氧O2、及氮N2之源氣體之情形來說，與先前之使用三氟甲烷CHF3、四氟化碳CF4、及氧O2氣體作為源氣體、並由該等源氣體於製程腔室內直接產生電漿之情形相比，氮化矽膜相對於多晶矽膜或氧化矽膜等其他膜之蝕刻選擇比顯著提高。 Further, according to the embodiment of the present invention, it is understood that the source gas containing difluoromethane CH 2 F 2 , nitrogen trifluoride NF 3 , oxygen O 2 , and nitrogen N 2 is used in the apparatus structure of Fig. 1 . Compared with the previous case of using trifluoromethane CHF 3 , carbon tetrafluoride CF 4 , and oxygen O 2 gas as source gases, and directly generating plasma from the source gases in the process chamber, the tantalum nitride film The etching selectivity is significantly improved with respect to other films such as a polycrystalline germanium film or a hafnium oxide film.
又，與本發明之實施形態類似地，於使用二氟甲烷CH2F2、氬Ar、氮N2、及氧O2作為源氣體之情形時，若於製程腔室外部產生電漿而將其供給至製程腔室，則與於製程腔室內由源氣體直接產生電漿之情形相比，氮化矽膜之蝕刻選擇比亦相對非常高。 Further, similarly to the embodiment of the present invention, when difluoromethane CH 2 F 2 , argon Ar, nitrogen N 2 , and oxygen O 2 are used as the source gas, if plasma is generated outside the processing chamber, When it is supplied to the process chamber, the etching selectivity ratio of the tantalum nitride film is relatively high as compared with the case where the plasma is directly generated from the source gas in the process chamber.
又，如圖2~圖4之實驗例所示，於利用圖1之裝置且使用相同源氣體之情形時，藉由調節氣體之供給量或溫度，可實現顯著地提高氮化矽膜相對於氧化矽膜之蝕刻選擇比(圖2)、或可實現顯著地提高氮化矽膜相對於多晶矽膜之蝕刻選擇比(圖3)、或可實現提高氮化矽膜相對於多晶矽膜與氧化矽膜之全部的蝕刻選擇比。 Further, as shown in the experimental examples of FIGS. 2 to 4, when the apparatus of FIG. 1 is used and the same source gas is used, by adjusting the supply amount or temperature of the gas, it is possible to remarkably improve the tantalum nitride film relative to The etching selectivity ratio of the hafnium oxide film (Fig. 2), or the etching selectivity ratio of the tantalum nitride film to the polycrystalline hafnium film can be remarkably improved (Fig. 3), or the tantalum nitride film can be improved relative to the polycrystalline hafnium film and hafnium oxide. The total etching selectivity of the film.
例如，如圖2所示增加氧O2氣體之使用比率而減少氧化矽膜之蝕刻量，並同時增加二氟甲烷CH2F2且增加CxHy之聚合物量，藉此可增加氮化矽膜相對於氧化矽膜之蝕刻選擇比。 For example, as shown in FIG. 2, the use ratio of oxygen O 2 gas is increased to reduce the etching amount of the ruthenium oxide film, and at the same time, difluoromethane CH 2 F 2 is increased and the amount of C x H y polymer is increased, thereby increasing nitridation. The etching selectivity of the tantalum film relative to the tantalum oxide film.
又，可如圖3所示採用藉由因溫度所致之反應性差異而利用多晶矽膜之化學性反應之惰性化而減少蝕刻量的機制，來增加氮化矽膜相對於多晶矽膜之蝕刻選擇比。 Further, as shown in FIG. 3, the etching selectivity of the tantalum nitride film relative to the polysilicon film can be increased by using a mechanism of reducing the etching amount by inerting the chemical reaction of the polysilicon film by the difference in reactivity due to temperature. ratio.
於上述之例中，係以蝕刻對象膜為氮化矽膜、而作為與氮化矽膜一併蝕刻之其他種類之膜為多晶矽膜與氧化矽膜為示例加以說明。然而，本發明之技術思想亦可應用於蝕刻對象膜為氮化矽膜以外之其他種類之氮化膜之情形時，且為了實現提高氮化膜相對於多晶矽膜及氧化矽膜以外之其他種類之膜的蝕刻選擇比，亦可應用本發明。 In the above-described example, the etching target film is a tantalum nitride film, and the other types of films which are collectively etched together with the tantalum nitride film are polycrystalline tantalum film and tantalum oxide film as an example. However, the technical idea of the present invention can also be applied to the case where the etching target film is a nitride film other than the tantalum nitride film, and in order to improve the nitride film relative to the polysilicon film and the yttrium oxide film. The present invention can also be applied to the etching selectivity of the film.
以上之說明僅為示例性地說明本發明之技術思想者，只要為於本發明所屬之技術領域中具有通常之知識者，則 可於不脫離本發明之本質特性之範圍內進行多種修正及變形。因此，本發明所揭示之實施形態並非為了對本發明之技術思想加以限定，而是僅用於進行說明，且本發明之技術思想之範圍並不受如此之實施形態的限定。本發明之保護範圍必需基於以下之申請專利範圍進行解釋，且必需分析為，與其處於同等範圍內的全部技術思想包含於本發明之權利範圍內。 The above description is merely illustrative of the technical idea of the present invention, as long as it has the usual knowledge in the technical field to which the present invention pertains. Various modifications and changes can be made without departing from the essential characteristics of the invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical concept of the present invention, but are intended to be illustrative only, and the scope of the technical idea of the present invention is not limited by the embodiments. The scope of the present invention must be construed as being based on the following claims, and all the technical ideas that are within the scope of the invention are included in the scope of the present invention.
1‧‧‧半導體製造裝置 1‧‧‧Semiconductor manufacturing equipment
100‧‧‧製程單元 100‧‧‧Processing unit
110‧‧‧製程腔室 110‧‧‧Processing chamber
111‧‧‧處理空間 111‧‧‧Processing space
112‧‧‧排氣孔 112‧‧‧ venting holes
120‧‧‧基板支持部 120‧‧‧Substrate Support Department
121‧‧‧基座 121‧‧‧Base
122‧‧‧支持軸 122‧‧‧Support shaft
125‧‧‧加熱構件 125‧‧‧heating components
126‧‧‧冷卻構件 126‧‧‧Cooling components
130‧‧‧擋板 130‧‧ ‧ baffle
131‧‧‧孔 131‧‧‧ hole
200‧‧‧排氣單元 200‧‧‧Exhaust unit
300‧‧‧電漿供給單元 300‧‧‧ Plasma supply unit
310‧‧‧電漿室 310‧‧‧Plastic chamber
311‧‧‧放電空間 311‧‧‧Discharge space
315‧‧‧氣體供給埠 315‧‧‧ gas supply埠
320‧‧‧第1源氣體供給部 320‧‧‧1st source gas supply
322‧‧‧電源 322‧‧‧Power supply
330‧‧‧電力施加部 330‧‧‧Power Application Department
331‧‧‧天線 331‧‧‧Antenna
332‧‧‧電源 332‧‧‧Power supply
340‧‧‧流入管道 340‧‧‧Inflow pipe
341‧‧‧流入空間 341‧‧‧Inflow space
341a‧‧‧流入口 341a‧‧‧Inlet
341b‧‧‧擴散空間 341b‧‧‧Diffusion space
W‧‧‧基板 W‧‧‧Substrate
圖1係概略地表示本發明之一實施形態之半導體製造裝置的圖式。 Fig. 1 is a view schematically showing a semiconductor manufacturing apparatus according to an embodiment of the present invention.
圖2係表示於利用圖1之裝置進行蝕刻製程時，氮化矽膜相對於氧化矽膜之蝕刻選擇比的實驗例。 Fig. 2 is a view showing an experimental example of the etching selectivity of the tantalum nitride film with respect to the tantalum oxide film when the etching process is performed by the apparatus of Fig. 1.
圖3係表示於利用圖1之裝置進行蝕刻製程時，氮化矽膜相對於多晶矽膜之蝕刻選擇比的實驗例。 Fig. 3 is a view showing an experimental example of the etching selectivity of the tantalum nitride film with respect to the polysilicon film when the etching process is performed by the apparatus of Fig. 1.
圖4係表示於利用圖1之裝置進行蝕刻製程時，氮化矽膜相對於氧化矽膜及多晶矽膜之蝕刻選擇比的實驗例。 Fig. 4 is a view showing an experimental example of the etching selectivity of the tantalum nitride film with respect to the tantalum oxide film and the polycrystalline germanium film when the etching process is performed by the apparatus of Fig. 1.
圖5係表示於利用與圖1構造不同之裝置進行蝕刻製程時，氮化矽膜相對於氧化矽膜及多晶矽膜之蝕刻選擇比的實驗例。 Fig. 5 is a view showing an experimental example of the etching selectivity of the tantalum nitride film with respect to the tantalum oxide film and the polysilicon film when the etching process is performed by a device different from the structure of Fig. 1.
1‧‧‧半導體製造裝置 1‧‧‧Semiconductor manufacturing equipment
100‧‧‧製程單元 100‧‧‧Processing unit
110‧‧‧製程腔室 110‧‧‧Processing chamber
111‧‧‧處理空間 111‧‧‧Processing space
112‧‧‧排氣孔 112‧‧‧ venting holes
120‧‧‧基板支持部 120‧‧‧Substrate Support Department
121‧‧‧基座 121‧‧‧Base
122‧‧‧支持軸 122‧‧‧Support shaft
125‧‧‧加熱構件 125‧‧‧heating components
126‧‧‧冷卻構件 126‧‧‧Cooling components
130‧‧‧擋板 130‧‧ ‧ baffle
131‧‧‧孔 131‧‧‧ hole
200‧‧‧排氣單元 200‧‧‧Exhaust unit
300‧‧‧電漿供給單元 300‧‧‧ Plasma supply unit
310‧‧‧電漿室 310‧‧‧Plastic chamber
311‧‧‧放電空間 311‧‧‧Discharge space
315‧‧‧氣體供給埠 315‧‧‧ gas supply埠
320‧‧‧第1源氣體供給部 320‧‧‧1st source gas supply
322‧‧‧電源 322‧‧‧Power supply
330‧‧‧電力施加部 330‧‧‧Power Application Department
331‧‧‧天線 331‧‧‧Antenna
332‧‧‧電源 332‧‧‧Power supply
340‧‧‧流入管道 340‧‧‧Inflow pipe
341‧‧‧流入空間 341‧‧‧Inflow space
341a‧‧‧流入口 341a‧‧‧Inlet
341b‧‧‧擴散空間 341b‧‧‧Diffusion space
W‧‧‧基板 W‧‧‧Substrate
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