TW201327154A - Motherboard - Google Patents

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TW201327154A
TW201327154A TW101100704A TW101100704A TW201327154A TW 201327154 A TW201327154 A TW 201327154A TW 101100704 A TW101100704 A TW 101100704A TW 101100704 A TW101100704 A TW 101100704A TW 201327154 A TW201327154 A TW 201327154A
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Taiwan
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transistor
power
management chip
cpu
output
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TW101100704A
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Chinese (zh)
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Ying-Bin Fu
Yuan-Xi Chen
ya-jun Pan
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Hon Hai Prec Ind Co Ltd
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Publication of TW201327154A publication Critical patent/TW201327154A/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
    • G06F11/3062—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations where the monitored property is the power consumption
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324—Display of status information
    • G06F11/325—Display of status information by lamps or LED's

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Led Devices (AREA)

Abstract

A motherboard includes a CPU, a driver, and a power state display system to display the work mode of the CPU. The power state display system includes a power management chip, a first transistor, a second transistor, a first light emitting diode (LED), and a second LED. A first phase voltage output terminal of the power management chip is connected to the first LED through the first transistor. A second phase voltage output terminal of the power management chip is connected to the second LED through the second transistor.

Description

主機板motherboard

本發明係關於一種主機板。The present invention relates to a motherboard.

為了對CPU的電源進行節能，則對CPU的電源實行省電模式控制，即當CPU工作在負載比較小的情況下，透過CPU發送指令到電源控制器，使電源控制器進入省電模式工作。為了能夠辨別CPU的電源的工作模式，通常透過使用示波器來量測電源控制器的每相電源輸出引腳才可知道其CPU的電源的工作模式。惟，透過上述方式辨識CPU的電源的工作模式非常的不方便。In order to save power of the CPU power supply, the power saving mode control is implemented on the power of the CPU, that is, when the CPU operates in a relatively small load, the CPU sends a command to the power controller to cause the power controller to enter the power saving mode. In order to be able to distinguish the operating mode of the CPU's power supply, the operating mode of the power supply of the CPU is usually known by measuring the power output pin of each phase of the power controller using an oscilloscope. However, it is very inconvenient to identify the operating mode of the power supply of the CPU in the above manner.

鑒於以上內容，有必要提供一種主機板及電源狀態顯示系統，以方便快捷地辨識CPU的電源的工作模式。In view of the above, it is necessary to provide a motherboard and power status display system to quickly and easily identify the working mode of the CPU power supply.

一種主機板，包括一CPU、一驅動器及一用於顯示該CPU的電源工作模式的電源狀態顯示系統，該電源狀態顯示系統包括一電源管理晶片、一第一電晶體、一第二電晶體、一第一發光二極體及一第二發光二極體，該電源管理晶片包括一第一相電源輸出端及一第二相電源輸出端，該第一相電源輸出端連接至該第一電晶體的控制端以輸出第一PWM訊號至該第一電晶體的控制端，該第一電晶體的第一端接地，該第一電晶體的第二端連接至該第一發光二極體，該第二相電源輸出端連接至該第二電晶體的控制端以輸出第二PWM訊號至該第二電晶體的控制端，該第二電晶體的第一端接地，該第二電晶體的第二端連接至該第二發光二極體，該第一及第二相電源輸出端還連接至該驅動器以輸出該第一及第二PWM訊號至該驅動器，該驅動器連接至該CPU以根據接收到的第一及第二PWM訊號來輸出電壓至該CPU，該CPU還連接至該電源管理晶片以輸出一控制指令至該電源管理晶片以表明該CPU所需的電源工作模式以使該電源管理晶片來調整該第一及第二相電源輸出端的PWM訊號輸出狀況，當電源管理晶片處於PS0狀態時，該第一相電源輸出端連續地輸出第一PWM訊號至該第一電晶體的控制端，該第二相電源輸出端連續地輸出該第二PWM訊號至該第二電晶體的控制端，該第一及第二發光二極體發光表明該CPU的電源處於PS0工作模式下，當該電源管理晶片處於PS1狀態下時，該第一相電源輸出端連續地輸出該第一PWM訊號至該第一電晶體的控制端，該第二相電源輸出端不輸出該第二PWM訊號至該第二電晶體的控制端，該第一發光二極體處於長亮狀態，該第二發光二極體不發光以表明該CPU的電源處於PS1工作模式下，當該電源管理晶片處於PS2狀態下，該第一相電源輸出端不連續地輸出PWM訊號至該第一電晶體的控制端，該第二相電源輸出端不輸出該第二PWM訊號至該第二電晶體的控制端，第一發光二極體處於閃爍狀態，該第二發光二極體處於熄滅狀態以表明該CPU的電源處於PS2工作模式下。A motherboard includes a CPU, a driver, and a power state display system for displaying a power operation mode of the CPU, the power state display system including a power management chip, a first transistor, a second transistor, a first light emitting diode and a second light emitting diode, the power management chip includes a first phase power output end and a second phase power output end, and the first phase power output end is connected to the first power The control end of the crystal outputs a first PWM signal to the control end of the first transistor, the first end of the first transistor is grounded, and the second end of the first transistor is connected to the first LED The second phase power supply output end is connected to the control end of the second transistor to output a second PWM signal to the control end of the second transistor, the first end of the second transistor is grounded, and the second transistor is The second end is connected to the second LED, the first and second phase power output terminals are further connected to the driver to output the first and second PWM signals to the driver, the driver is connected to the CPU according to Received first and second P The WM signal outputs a voltage to the CPU, the CPU is further connected to the power management chip to output a control command to the power management chip to indicate a power operation mode required by the CPU to enable the power management chip to adjust the first The PWM signal output status of the output of the second phase power supply, when the power management chip is in the PS0 state, the first phase power output terminal continuously outputs the first PWM signal to the control end of the first transistor, the second phase power output The terminal continuously outputs the second PWM signal to the control end of the second transistor, and the first and second LEDs emit light to indicate that the power of the CPU is in the PS0 working mode, when the power management chip is in the PS1 state. The first phase power output terminal continuously outputs the first PWM signal to the control end of the first transistor, and the second phase power output terminal does not output the second PWM signal to the control end of the second transistor. The first light emitting diode is in a long light state, and the second light emitting diode does not emit light to indicate that the power of the CPU is in the PS1 working mode. When the power management chip is in the PS2 state, the first The power output terminal discontinuously outputs a PWM signal to the control end of the first transistor, and the second phase power output terminal does not output the second PWM signal to the control end of the second transistor, the first light emitting diode is at In the blinking state, the second LED is in an extinguished state to indicate that the power of the CPU is in the PS2 mode of operation.

本發明主機板包括該電源管理晶片、該第一電晶體、該第二電晶體、該第一發光二極體及該第二發光二極體，該電源管理晶片的第一相電源輸出端透過該第一電晶體連接至該第一發光二極體，該電源管理晶片的第二相電源輸出端透過該第二電晶體連接至該第二發光二極體，透過直接觀察該第一及第二發光二極體的發光狀況即可確定該CPU的電源的工作模式，方便快捷。The motherboard of the present invention includes the power management chip, the first transistor, the second transistor, the first LED and the second LED, and the first phase power output of the power management chip is transmitted through The first transistor is connected to the first light emitting diode, and the second phase power output end of the power management chip is connected to the second light emitting diode through the second transistor, and the first and the first are directly observed. The illumination state of the two light-emitting diodes can determine the working mode of the power supply of the CPU, which is convenient and quick.

請參閱圖1，本發明主機板300的第一較佳實施方式包括一CPU 30、一驅動器20及一電源狀態顯示系統100。Referring to FIG. 1, a first preferred embodiment of the motherboard 300 of the present invention includes a CPU 30, a driver 20, and a power state display system 100.

該電源狀態顯示系統100用於顯示該CPU 30的電源工作模式。該電源狀態顯示系統100包括一電源管理晶片10、一第一電晶體Q1、一第二電晶體Q2、一第一發光二極體LED1、一第二發光二極體LED2、一第一電阻R1及一第二電阻R2。在本實施方式中，該電源管理晶片10為一兩相電源管理晶片。The power state display system 100 is for displaying the power mode of operation of the CPU 30. The power state display system 100 includes a power management chip 10, a first transistor Q1, a second transistor Q2, a first LED, a second LED, and a first resistor R1. And a second resistor R2. In the present embodiment, the power management chip 10 is a two-phase power management chip.

該電源管理晶片10包括一第一相電源輸出端11及一第二相電源輸出端12。該第一相電源輸出端11用於輸出一第一PWM訊號。該第一相電源輸出端11連接至該第一電晶體Q1的控制端。該第二相電源輸出端12用於輸出一第二PWM訊號。該第二相電源輸出端12連接至該第二電晶體Q2的控制端。該第一電晶體Q1的第一端連接至該第一發光二極體LED1的陰極。該第一電晶體Q1的第二端接地。該第一發光二極體LED1的陽極透過第一電阻R1連接至該主機板上的電源端40。該第二電晶體Q2的第一端連接至該第二發光二極體LED2的陰極。該第二發光二極體LED2的陽極透過該第二電阻R2連接至該電源端40。The power management chip 10 includes a first phase power output 11 and a second phase power output 12. The first phase power output 11 is configured to output a first PWM signal. The first phase power supply output 11 is connected to the control terminal of the first transistor Q1. The second phase power output 12 is configured to output a second PWM signal. The second phase power supply output 12 is coupled to the control terminal of the second transistor Q2. The first end of the first transistor Q1 is connected to the cathode of the first LED diode 1. The second end of the first transistor Q1 is grounded. The anode of the first LED LED1 is connected to the power terminal 40 of the motherboard through the first resistor R1. The first end of the second transistor Q2 is connected to the cathode of the second LED 2 . The anode of the second LED LED 2 is connected to the power terminal 40 through the second resistor R2.

該電源管理晶片10的第一及第二相電源輸出端11及12還連接至一驅動器20以輸出該第一及第二PWM訊號至該驅動器20。該驅動器20連接至該CPU 30以根據接收到的第一及第二PWM訊號來輸出電壓至該CPU 30。該CPU 30還連接至該電源管理晶片10以輸出一控制指令至該電源管理晶片10以表明該CPU 30所需的電源工作模式以使該電源管理晶片10來調整該第一及第二相電源輸出端11及12的PWM訊號輸出狀況。The first and second phase power output terminals 11 and 12 of the power management chip 10 are also coupled to a driver 20 for outputting the first and second PWM signals to the driver 20. The driver 20 is coupled to the CPU 30 to output a voltage to the CPU 30 based on the received first and second PWM signals. The CPU 30 is further connected to the power management chip 10 to output a control command to the power management chip 10 to indicate the power operation mode required by the CPU 30 to enable the power management chip 10 to adjust the first and second phase power sources. PWM signal output status of output terminals 11 and 12.

根據Intel的規定，電源管理晶片具有三種工作狀態，即PS0狀態、PS1狀態及PS2狀態。其中PS0狀態為電源管理晶片的所有相電源輸出端均正常連續輸出PWM訊號；PS1狀態為電源管理晶片的所有相電源輸出端中最多有兩相電源輸出端來輸出PWM訊號，即當電源管理晶片為兩相電源管理晶片（兩相電源管理晶片為只包括第一及第二相電源輸出端的電源管理晶片）時，則只有第一相電源輸出端正常連續地輸出PWM訊號，而第二相電源管理晶片不輸出PWM訊號；當電源管理晶片為三相或三相以上電源管理晶片（三相或三相以上電源管理晶片為至少包括第一至第三相電源輸出端的電源管理晶片）時，則只有第一及第二相電源輸出端同時正常連續地輸出PWM訊號，而其他相電源輸出端不輸出PWM訊號；PS2狀態為電源管理晶片只有第一相電源輸出端不連續地輸出PWM訊號。According to Intel regulations, the power management chip has three operating states, namely PS0 state, PS1 state, and PS2 state. The PS0 state is that all phase power output ends of the power management chip are normally continuously outputting PWM signals; the PS1 state is that all phase power output ends of the power management chip have at most two phase power output terminals to output PWM signals, that is, when the power management chip For a two-phase power management chip (the two-phase power management chip is a power management chip including only the first and second phase power supply outputs), only the first phase power supply output outputs the PWM signal continuously and continuously, and the second phase power supply The management chip does not output a PWM signal; when the power management chip is a three-phase or three-phase power management chip (three-phase or three-phase power management chip is a power management chip including at least the first to third phase power supply outputs), Only the first and second phase power supply outputs simultaneously output PWM signals normally, while the other phase power supply outputs do not output PWM signals; the PS2 state is that the power management chip only outputs the PWM signals discontinuously from the first phase power output.

當電源管理晶片處於PS0狀態時，則該CPU 30的電源工作模式相應的為PS0狀態。當電源管理晶片處於PS1狀態時，則該CPU 30的電源工作模式相應的為PS1狀態。當電源管理晶片處於PS2狀態時，則該CPU 30的電源工作模式相應的為PS2狀態。When the power management chip is in the PS0 state, the power operation mode of the CPU 30 is corresponding to the PS0 state. When the power management chip is in the PS1 state, the power operation mode of the CPU 30 is corresponding to the PS1 state. When the power management chip is in the PS2 state, the power operation mode of the CPU 30 is corresponding to the PS2 state.

由於在第一較佳實施方式中，該電源管理晶片10為兩相電源管理晶片，其僅包括該第一相電源輸出端11及該第二相電源輸出端12。故當該電源管理晶片10在PS0狀態下時，該第一相電源輸出端11連續地輸出第一PWM訊號至該第一電晶體Q1的控制端。該第二相電源輸出端12連續地輸出該第二PWM訊號至該第二電晶體Q2的控制端；該第一及第二電晶體Q1及Q2的控制端接收到高電平訊號時導通，此時，該第一及第二發光二極體LED1及LED2發光。該第一及第二電晶體Q1及Q2接收到低電平訊號時截止，此時，該第一及第二發光二極體LED1及LED2不發光。由於第一及第二PWM訊號的頻率很高，則該電源管理晶片10在PS0狀態下時，用戶將會觀察到該第一及第二發光二極體LED1及LED2處於長亮狀態。In the first preferred embodiment, the power management chip 10 is a two-phase power management chip that includes only the first phase power output 11 and the second phase power output 12. Therefore, when the power management chip 10 is in the PS0 state, the first phase power output terminal 11 continuously outputs the first PWM signal to the control end of the first transistor Q1. The second phase power supply output terminal 12 continuously outputs the second PWM signal to the control end of the second transistor Q2; the control terminals of the first and second transistors Q1 and Q2 are turned on when receiving the high level signal, At this time, the first and second light-emitting diodes LED1 and LED2 emit light. The first and second transistors Q1 and Q2 are turned off when receiving the low level signal. At this time, the first and second LEDs 1 and 2 do not emit light. Since the frequency of the first and second PWM signals is high, when the power management chip 10 is in the PS0 state, the user will observe that the first and second LEDs 1 and 2 are in a long light state.

當該電源管理晶片10在PS1狀態下時，該電源管理晶片10的第一相電源輸出端11連續地輸出該第一PWM訊號至該第一電晶體Q1的控制端；該電源管理晶片10的第二相電源輸出端12不輸出該第二PWM訊號至該第二電晶體Q2的控制端，則該第一發光二極體LED1處於長亮狀態，該第二發光二極體LED2不發光。When the power management chip 10 is in the PS1 state, the first phase power output 11 of the power management chip 10 continuously outputs the first PWM signal to the control end of the first transistor Q1; The second phase power supply output terminal 12 does not output the second PWM signal to the control end of the second transistor Q2, and the first light emitting diode LED1 is in a long bright state, and the second light emitting diode LED 2 does not emit light.

當該電源管理晶片10在PS2狀態下，則該電源管理晶片10的第一相電源輸出端11不連續地輸出PWM訊號至該第一電晶體Q1的控制端；該電源管理晶片10的第二相電源輸出端12不輸出該第二PWM訊號至該第二電晶體Q2的控制端。由於該第一PWM訊號是不連續地輸出至該第一電晶體Q1的控制端。當該第一發光二極體LED1接收到該第一PWM訊號時則會長亮，當該第一發光二極體LED1接收不到該第一PWM訊號是時則會熄滅。故在該電源管理晶片10在PS2狀態下時，第一發光二極體LED1處於閃爍狀態，該第二發光二極體LED2處於熄滅狀態。When the power management chip 10 is in the PS2 state, the first phase power output 11 of the power management chip 10 discontinuously outputs a PWM signal to the control terminal of the first transistor Q1; the power management wafer 10 is second. The phase power supply output terminal 12 does not output the second PWM signal to the control terminal of the second transistor Q2. The first PWM signal is discontinuously outputted to the control terminal of the first transistor Q1. When the first LED sensor receives the first PWM signal, it will be bright, and when the first LED LED1 does not receive the first PWM signal, it will be extinguished. Therefore, when the power management chip 10 is in the PS2 state, the first light-emitting diode LED 1 is in a blinking state, and the second light-emitting diode LED 2 is in an extinguished state.

透過觀察該第一及第二發光二極體LED1及LED2的發光狀況即可得知該CPU 30的電源的工作模式。即當該第一及第二發光二極體LED1及LED2均長亮時，表明該電源管理晶片10處於PS0工作狀態，故CPU 30的電源處於PS0工作模式下。當該第一發光二極體LED1長亮，該第二發光二極體LED2不亮時，表明該電源管理晶片10處於PS1工作狀態，故CPU 30的電源處於PS1工作模式下。當該第一發光二極體LED1閃爍，該第二發光二極體LED2不亮時，表明該電源管理晶片10處於PS2工作狀態，故CPU 30的電源處於PS2工作模式下。The operation mode of the power source of the CPU 30 can be known by observing the light-emitting conditions of the first and second light-emitting diodes LED1 and LED2. That is, when both the first and second LEDs 1 and 2 are bright, it indicates that the power management chip 10 is in the PS0 operating state, so the power of the CPU 30 is in the PS0 mode. When the first LED diode 1 is long and the second LED LED 2 is off, it indicates that the power management chip 10 is in the PS1 operating state, so the power of the CPU 30 is in the PS1 mode. When the first LED 2 flashes and the second LED 2 is off, it indicates that the power management chip 10 is in the PS2 operating state, so the power of the CPU 30 is in the PS2 operating mode.

請參考圖2，本發明主機板400的第二較佳實施方式與第一較佳實施方式的區別在於：在該電源狀態顯示系統200中，該電源管理晶片220為四相電源管理晶片，即該電源管理晶片220除了包括該第一相電源輸出端11及該第二相電源輸出端12外還包括一第三相電源輸出端223及一第四相電源輸出端224。該電源狀態顯示系統200還包括一第三電晶體Q3、一第三發光二極體LED3及一第三電阻R3。該第三及第四相電源輸出端223及224均連接至該驅動器20。Referring to FIG. 2, a second preferred embodiment of the motherboard 400 of the present invention is different from the first preferred embodiment in that the power management wafer 220 is a four-phase power management chip, that is, The power management chip 220 includes a third phase power output 223 and a fourth phase power output 224 in addition to the first phase power output 11 and the second phase power output 12 . The power state display system 200 further includes a third transistor Q3, a third LED LED 3, and a third resistor R3. The third and fourth phase power supply output terminals 223 and 224 are both connected to the driver 20.

由於該電源管理晶片220具有PS0、PS1及PS2的工作狀態，且根據上述Intel對PS0、PS1及PS2的工作狀態的規定。該電源管理晶片220的第三相電源輸出端223輸出的第三PWM訊號的狀態與該第四相電源輸出端224輸出的第四PWM訊號的狀況完全相同。即該電源管理晶片220的第四相電源輸出端224連續地輸出第四PWM訊號時，則該電源管理晶片220的第三相電源輸出端223也同樣連續地輸出第三PWM訊號。故只需在該第三及第四相電源輸出端223及224中選擇一相電源輸出端來連接該第三發光二極體LED3即可。在第二較佳實施方式中，選擇將該電源管理晶片220的第四相電源輸出端224連接該第三發光二極體LED3。具體為：該第四相電源輸出端224連接至該第三電晶體Q3的控制端，該第三電晶體Q3的第一端連接至該第三發光二極體LED3的陰極，該第三電晶體Q3的第二端接地，該第三發光二極體LED3的陽極透過該第三電阻R3連接至該電源端40。Since the power management chip 220 has the operating states of PS0, PS1, and PS2, and according to the above-mentioned Intel regulations on the operating states of PS0, PS1, and PS2. The state of the third PWM signal outputted by the third phase power output 223 of the power management chip 220 is exactly the same as the state of the fourth PWM signal output by the fourth phase power output 224. That is, when the fourth phase power output terminal 224 of the power management chip 220 continuously outputs the fourth PWM signal, the third phase power output terminal 223 of the power management chip 220 also continuously outputs the third PWM signal. Therefore, it is only necessary to select a phase power output terminal of the third and fourth phase power output terminals 223 and 224 to connect the third LED LED3. In the second preferred embodiment, the fourth phase power output 224 of the power management wafer 220 is selected to be coupled to the third LED LED 3. Specifically, the fourth phase power output terminal 224 is connected to the control end of the third transistor Q3, and the first end of the third transistor Q3 is connected to the cathode of the third LED 3, the third The second end of the crystal Q3 is grounded, and the anode of the third LED 3 is connected to the power terminal 40 through the third resistor R3.

在第二較佳實施方式中，當該第一至第三發光二極體LED1至LED3均長亮時，表明該電源管理晶片10處於PS0工作狀態，故該CPU 30的電源處於PS0工作模式下。當該第一發光二極體LED1長亮或第一及第二發光二極體LED1及LED2均長亮，而該第三發光二極體LED3不亮時，表明該電源管理晶片10處於PS1工作狀態，故該CPU 30的電源處於PS1工作模式下。當該第一發光二極體LED1閃爍，該第二及第三發光二極體LED2及LED3不亮時，表明該電源管理晶片10處於PS2工作狀態，故該CPU 30的電源處於PS2工作模式下。In the second preferred embodiment, when the first to third LEDs LED1 to LED3 are all bright, it indicates that the power management chip 10 is in the PS0 operating state, so the power of the CPU 30 is in the PS0 working mode. . When the first LEDs 1 are long bright or the first and second LEDs 1 and 2 are both bright and the third LED 3 is not lit, it indicates that the power management chip 10 is in PS1 operation. State, so the power of the CPU 30 is in the PS1 mode of operation. When the first LEDs and the LEDs are not lit, the power management chip 10 is in the PS2 operating state, so the power of the CPU 30 is in the PS2 mode. .

在本實施方式中，該第一至第三電晶體Q1-Q3為N溝道的場效應電晶體，該第一至第三電晶體Q1-Q3的控制端、第一端及第二端分別是場效應電晶體的閘極、汲極及源極。In this embodiment, the first to third transistors Q1-Q3 are N-channel field effect transistors, and the control ends, the first ends, and the second ends of the first to third transistors Q1-Q3 are respectively It is the gate, drain and source of the field effect transistor.

在其他實施方式中，該第一至第三電晶體Q1-Q3可以根據需要調整，如可以為N型電晶體等。該電源管理晶片220的第三相電源輸出端223也可以連接至一第四電晶體的控制端，該第四電晶體的第一端連接至一第四發光二極體的陰極，該第四發光二極體的陽極透過一第四電阻連接至該電源端40。該第一至第三發光二極體LED1至LED3的陽極也可以連接至其他電源端。In other embodiments, the first to third transistors Q1-Q3 may be adjusted as needed, such as an N-type transistor or the like. The third phase power output end 223 of the power management chip 220 can also be connected to the control end of a fourth transistor. The first end of the fourth transistor is connected to the cathode of a fourth LED, the fourth The anode of the light emitting diode is connected to the power terminal 40 through a fourth resistor. The anodes of the first to third LEDs LED1 to LED3 may also be connected to other power terminals.

本發明電源狀態顯示系統100包括該電源管理晶片10、該第一電晶體Q1、該第二電晶體Q2、該第一發光二極體LED1及該第二發光二極體LED2，該電源管理晶片10的第一相電源輸出端11透過該第一電晶體Q1連接至該第一發光二極體LED1，該電源管理晶片10的第二相電源輸出端12透過該第二電晶體連接至該第二發光二極體LED2。當該第一及第二發光二極體LED1及LED2均長亮時，則表明該CPU 30的電源處於PS0工作模式下。當該第一發光二極體LED1長亮時，而該第二發光二極體LED2不亮時，則表明該CPU 30的電源處於PS1工作模式下。當該第一發光二極體LED1閃爍時，而該第二發光二極體LED2不亮時，則表明該CPU 30的電源處於PS2工作模式下。透過直接觀察該第一及第二發光二極體LED1及LED2的發光狀況即可確定該CPU 30的電源的工作模式，方便快捷。The power state display system 100 of the present invention includes the power management chip 10, the first transistor Q1, the second transistor Q2, the first LED LED1, and the second LED LED2. The first phase power output terminal 11 of the first phase transistor Q1 is connected to the first light emitting diode LED1, and the second phase power source output terminal 12 of the power management wafer 10 is connected to the second transistor through the second transistor. Two light-emitting diode LED2. When both the first and second LEDs LED1 and LED2 are bright, it indicates that the power of the CPU 30 is in the PS0 mode of operation. When the first LED 2 is long bright and the second LED 2 is not lit, it indicates that the power of the CPU 30 is in the PS1 operating mode. When the first LED LED 1 is blinking and the second LED LED 2 is not lit, it indicates that the power of the CPU 30 is in the PS2 operation mode. By directly observing the illumination states of the first and second LEDs LED1 and LED2, the operation mode of the power supply of the CPU 30 can be determined, which is convenient and quick.

綜上所述，本發明符合發明專利要件，爰依法提出專利申請。惟，以上所述者僅為本發明之較佳實施例，舉凡熟悉本案技藝之人士，在爰依本發明精神所作之等效修飾或變化，皆應涵蓋於以下之申請專利範圍內。In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. The above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims.

10、220．．．電源管理晶片10,220. . . Power management chip

11．．．第一相電源輸出端11. . . First phase power supply output

12．．．第二相電源輸出端12. . . Second phase power supply output

20．．．驅動器20. . . driver

30．．．CPU30. . . CPU

40．．．電源端40. . . Power terminal

100、200．．．電源狀態顯示系統100, 200. . . Power status display system

223．．．第三相電源輸出端223. . . Third phase power supply output

224．．．第四相電源輸出端224. . . Fourth phase power supply output

300、400．．．主機板300, 400. . . motherboard

R1．．．第一電阻R1. . . First resistance

R2．．．第二電阻R2. . . Second resistance

R3．．．第三電阻R3. . . Third resistance

LED1．．．第一發光二極體LED1. . . First light emitting diode

LED2．．．第二發光二極體LED2. . . Second light emitting diode

LED3．．．第三發光二極體LED3. . . Third light emitting diode

Q1．．．第一電晶體Q1. . . First transistor

Q2．．．第二電晶體Q2. . . Second transistor

Q3．．．第三電晶體Q3. . . Third transistor

圖1係本發明主機板的第一較佳實施方式的電路圖。1 is a circuit diagram of a first preferred embodiment of a motherboard of the present invention.

圖2係本發明主機板的第二較佳實施方式的電路圖。2 is a circuit diagram of a second preferred embodiment of the motherboard of the present invention.

10．．．電源管理晶片10. . . Power management chip

11．．．第一相電源輸出端11. . . First phase power supply output

12．．．第二相電源輸出端12. . . Second phase power supply output

20．．．驅動器20. . . driver

30．．．CPU30. . . CPU

40．．．電源端40. . . Power terminal

100．．．電源狀態顯示系統100. . . Power status display system

300．．．主機板300. . . motherboard

R1．．．第一電阻R1. . . First resistance

R2．．．第二電阻R2. . . Second resistance

LED1．．．第一發光二極體LED1. . . First light emitting diode

LED2．．．第二發光二極體LED2. . . Second light emitting diode

Q1．．．第一電晶體Q1. . . First transistor

Q2．．．第二電晶體Q2. . . Second transistor

Claims (5)

一種主機板，包括一CPU、一驅動器及一用於顯示該CPU的電源工作模式的電源狀態顯示系統，該電源狀態顯示系統包括一電源管理晶片、一第一電晶體、一第二電晶體、一第一發光二極體及一第二發光二極體，該電源管理晶片包括一第一相電源輸出端及一第二相電源輸出端，該第一相電源輸出端連接至該第一電晶體的控制端以輸出第一PWM訊號至該第一電晶體的控制端，該第一電晶體的第一端接地，該第一電晶體的第二端連接至該第一發光二極體，該第二相電源輸出端連接至該第二電晶體的控制端以輸出第二PWM訊號至該第二電晶體的控制端，該第二電晶體的第一端接地，該第二電晶體的第二端連接至該第二發光二極體，該第一及第二相電源輸出端還連接至該驅動器以輸出該第一及第二PWM訊號至該驅動器，該驅動器連接至該CPU以根據接收到的第一及第二PWM訊號來輸出電壓至該CPU，該CPU還連接至該電源管理晶片以輸出一控制指令至該電源管理晶片以表明該CPU所需的電源工作模式以使該電源管理晶片來調整該第一及第二相電源輸出端的PWM訊號輸出狀況，當電源管理晶片處於PS0狀態時，該第一相電源輸出端連續地輸出第一PWM訊號至該第一電晶體的控制端，該第二相電源輸出端連續地輸出該第二PWM訊號至該第二電晶體的控制端，該第一及第二發光二極體發光表明該CPU的電源處於PS0工作模式下，當該電源管理晶片處於PS1狀態下時，該第一相電源輸出端連續地輸出該第一PWM訊號至該第一電晶體的控制端，該第二相電源輸出端不輸出該第二PWM訊號至該第二電晶體的控制端，該第一發光二極體處於長亮狀態，該第二發光二極體不發光以表明該CPU的電源處於PS1工作模式下，當該電源管理晶片處於PS2狀態下，該第一相電源輸出端不連續地輸出PWM訊號至該第一電晶體的控制端，該第二相電源輸出端不輸出該第二PWM訊號至該第二電晶體的控制端，第一發光二極體處於閃爍狀態，該第二發光二極體處於熄滅狀態以表明該CPU的電源處於PS2工作模式下。A motherboard includes a CPU, a driver, and a power state display system for displaying a power operation mode of the CPU, the power state display system including a power management chip, a first transistor, a second transistor, a first light emitting diode and a second light emitting diode, the power management chip includes a first phase power output end and a second phase power output end, and the first phase power output end is connected to the first power The control end of the crystal outputs a first PWM signal to the control end of the first transistor, the first end of the first transistor is grounded, and the second end of the first transistor is connected to the first LED The second phase power supply output end is connected to the control end of the second transistor to output a second PWM signal to the control end of the second transistor, the first end of the second transistor is grounded, and the second transistor is The second end is connected to the second LED, the first and second phase power output terminals are further connected to the driver to output the first and second PWM signals to the driver, the driver is connected to the CPU according to Received first and second P The WM signal outputs a voltage to the CPU, the CPU is further connected to the power management chip to output a control command to the power management chip to indicate a power operation mode required by the CPU to enable the power management chip to adjust the first The PWM signal output status of the output of the second phase power supply, when the power management chip is in the PS0 state, the first phase power output terminal continuously outputs the first PWM signal to the control end of the first transistor, the second phase power output The terminal continuously outputs the second PWM signal to the control end of the second transistor, and the first and second LEDs emit light to indicate that the power of the CPU is in the PS0 working mode, when the power management chip is in the PS1 state. The first phase power output terminal continuously outputs the first PWM signal to the control end of the first transistor, and the second phase power output terminal does not output the second PWM signal to the control end of the second transistor. The first light emitting diode is in a long light state, and the second light emitting diode does not emit light to indicate that the power of the CPU is in the PS1 working mode. When the power management chip is in the PS2 state, the first The power output terminal discontinuously outputs a PWM signal to the control end of the first transistor, and the second phase power output terminal does not output the second PWM signal to the control end of the second transistor, the first light emitting diode is at In the blinking state, the second LED is in an extinguished state to indicate that the power of the CPU is in the PS2 mode of operation. 如申請專利範圍第1項所述之主機板，還包括一電源端，該第一發光二極體的陰極連接至該第一電晶體的第二端，該第一發光二極體的陽極連接至該電源端，該第二發光二極體的陰極連接至該第二電晶體的第二端，該第二發光二極體的陽極連接至該電源端。The motherboard of claim 1, further comprising a power terminal, the cathode of the first LED is connected to the second end of the first transistor, and the anode of the first LED is connected To the power supply end, the cathode of the second LED is connected to the second end of the second transistor, and the anode of the second LED is connected to the power terminal. 如申請專利範圍第2項所述之主機板，其中該電源狀態顯示系統還包括一第一電阻及一第二電阻，該第一發光二極體的陽極透過該第一電阻連接至該電源端，該第二發光二極體的陽極透過該第二電阻連接至該電源端。The motherboard of claim 2, wherein the power state display system further includes a first resistor and a second resistor, wherein an anode of the first LED is connected to the power terminal through the first resistor The anode of the second LED is connected to the power terminal through the second resistor. 如申請專利範圍第1項所述之主機板，其中該第一及第二電晶體為N溝道場效應電晶體，該第一及第二電晶體的控制端、第一端及第二端分別為該場效應電晶體的閘極、汲極及漏極。The motherboard of claim 1, wherein the first and second transistors are N-channel field effect transistors, and the control ends, the first ends, and the second ends of the first and second transistors are respectively It is the gate, drain and drain of the field effect transistor. 如申請專利範圍第1項所述之主機板，其中該電源管理晶片還包括一第三相電源輸出端，該電源狀態顯示系統還包括一第三電晶體及一第三發光二極體，該第三相電源輸出端連接至該第三電晶體的控制端，該第三電晶體的第一端接地，該第三電晶體的第二端連接至該第三發光二極體來控制該第三發光二極體是否發光，當電源管理晶片處於PS0狀態時，該第一相電源輸出端連續地輸出第一PWM訊號至該第一電晶體的控制端，該第二相電源輸出端連續地輸出該第二PWM訊號至該第二電晶體的控制端，該第三相電源輸出端連續地輸出一第三PWM訊號至該第三電晶體的控制端，該第一至第三發光二極體發光表明該CPU的電源處於PS0工作模式下，當該電源管理晶片處於PS1狀態下時，該第三相電源輸出端不輸出該第三PWM訊號至該第三電晶體的控制端，該第一發光二極體處於長亮狀態，該第二及第三發光二極體不發光以表明該CPU的電源處於PS1工作模式下，當該電源管理晶片處於PS2狀態下，該第三相電源輸出端不輸出該第三PWM訊號至該第三電晶體的控制端，第一發光二極體處於閃爍狀態，該第二及第三發光二極體處於熄滅狀態以表明該CPU的電源處於PS2工作模式下。The motherboard of claim 1, wherein the power management chip further includes a third phase power output, the power state display system further includes a third transistor and a third LED. The third phase power output end is connected to the control end of the third transistor, the first end of the third transistor is grounded, and the second end of the third transistor is connected to the third light emitting diode to control the first Whether the three-emitting diode emits light, and when the power management chip is in the PS0 state, the first phase power output terminal continuously outputs the first PWM signal to the control end of the first transistor, and the second phase power output terminal continuously And outputting the second PWM signal to the control end of the second transistor, the third phase power output terminal continuously outputting a third PWM signal to the control end of the third transistor, the first to third light emitting diodes The body light indicates that the power of the CPU is in the PS0 working mode. When the power management chip is in the PS1 state, the third phase power output terminal does not output the third PWM signal to the control end of the third transistor. a light-emitting diode is at In the long light state, the second and third light emitting diodes do not emit light to indicate that the power of the CPU is in the PS1 working mode, and when the power management chip is in the PS2 state, the third phase power output terminal does not output the third The PWM signal is sent to the control end of the third transistor, the first LED is in a blinking state, and the second and third LEDs are in an extinguished state to indicate that the power of the CPU is in the PS2 mode of operation.
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